JP2010109743A - Fm transmitter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an FM transmitter which does not require the setting of a sampling frequency even when an input signal is a digital audio signal. <P>SOLUTION: A BCK signal contained in the digital audio signal is used to determine the format of the digital audio signal, and the result of the determination is supplied to a DSP which is a digital signal processing means, whereby a sampling frequency used in the DSP, a coefficient used in each process, and the like are automatically set. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an FM transmitter that modulates an input signal into an FM signal.

  2. Description of the Related Art Conventionally, there is an FM transmitter that converts an input signal into an FM signal and transmits it, and outputs sound from an FM transmitter / receiver installed nearby.

  In the conventional FM transmitter, as described in Patent Document 1 and Patent Document 2, by dividing the oscillation signal output from the crystal oscillator, a PLL (Phase-locked loop) circuit for FM broadcast wave output The reference frequency signal required in the above is generated. In the conventional FM transmitter, an operation clock signal of a DSP (Digital Signal Processor) that modulates an input signal is generated by dividing the oscillation signal.

  Normally, in FM transmitters, when the input signal is an analog signal, the sampling frequency of the input analog signal and the sampling frequency of the subsequent DSP are generally arbitrarily selected from frequencies that are integral multiples of 32 KHz, 44.1 KHz, and 48 KHz. You can choose.

  Further, when the input signal is a digital audio signal such as the IIS (the Inter-IC Sound bus) format, the IIS format itself is defined based on the sampling frequency. For this reason, it is necessary to make the sampling frequency in the latter DSP correspond to the sampling frequency of the digital audio signal.

  In the conventional FM transmitter, for example, the coefficient used in the DSP signal processing is changed in accordance with the sampling frequency of the digital audio signal so that normal signal processing can be executed at the sampling frequency of the digital audio signal.

Also, in the conventional FM transmitter, for example, an SRC (Sampling Rate Converter) that converts the sampling frequency is provided in the preceding stage of the DSP, and the sampling frequency of the digital audio signal is converted into a sampling frequency corresponding to the DSP, so that a normal digital signal is obtained. Processing is enabled.
JP 2007-96694 A JP 2007-88657 A

  In the above conventional technique, for example, when the FM transmitter is connected to a wide variety of audio devices, the user knows in advance the sampling frequency of the audio device to be connected to the FM transmitter, and samples the audio device with respect to the FM transmitter in advance. It is necessary to set the frequency.

  Further, in the FM transmitter provided with SRC, the sampling frequency after SRC can be set to the sampling frequency matched to the DSP, but it is necessary to set the coefficient, the number of taps, etc. according to the sampling frequency of the digital audio signal in SRC. is there. Therefore, the user needs to grasp the sampling frequency of the digital audio signal in advance.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an FM transmitter that does not require setting of a sampling frequency even when an input signal is a digital audio signal.

  The present invention employs the following configuration in order to achieve the above object.

  The present invention is an FM transmitter that modulates an input signal into an FM signal, and when the input signal is a digital audio signal, a determination unit that determines a format of the digital audio signal, and the determination unit that is determined by the determination unit Digital signal processing means for performing digital signal processing for modulating the input signal in accordance with information indicating the sampling frequency included in the format.

  The FM transmitter of the present invention includes a measuring means for counting the number of clocks of the sampling frequency included in the digital audio signal in a predetermined period, the number of clocks of the bit clock signal included in the digital audio signal, A table indicating a relationship between a sampling frequency and the number of clocks of the bit clock signal at one clock of the sampling frequency, and the determination unit uses the measurement result of the measurement unit and the table to determine the digital audio It may be configured to determine the signal format.

  Further, the FM transmitter of the present invention uses stop determination means for determining stop of input of the digital audio signal, first clock generation means for generating a clock signal synchronized with a reference frequency signal, and the reference frequency signal. Second clock generation means for generating an operation clock signal of digital signal processing means for performing digital signal processing for modulating the input signal, and the stop determination means stops the input of the digital audio signal. When the determination is made, the first clock generation means and the second clock generation means are the oscillation circuit connected to the first clock generation means and the second clock generation means as the reference frequency signal. A configuration for selecting an output signal may be employed.

  In the FM transmitter of the present invention, when a digital audio signal is input as the input signal, the first clock generation unit and the second clock generation unit use the bit clock signal as the reference frequency signal. It is good also as a structure selected as the said reference frequency.

  In the FM transmitter according to the present invention, the digital signal processing means includes a mute processing means, and the mute processing means performs mute processing when the stop determination means determines that the input of the digital audio signal is stopped. It is good also as a structure.

  The present invention is an FM transmitter for modulating an input signal into an FM signal, the first clock generating means for generating a clock signal synchronized with a reference frequency signal, and modulating the input signal using the reference frequency signal. And second clock generation means for generating an operation clock signal of the digital signal processing means for performing digital signal processing for the first and second clock generation means, the input signal Is a digital audio signal, the clock signal and the operation clock signal are generated using the bit clock signal included in the digital audio signal as the reference frequency signal.

  According to the present invention, it is possible to provide an FM transmitter that does not require setting of a sampling frequency even when an input signal is a digital audio signal.

  The present invention determines the format of a digital audio signal by using a BCK signal included in the digital audio signal, and supplies the determination result to a DSP which is a digital signal processing means, so that the sampling frequency used in the DSP and each processing are used. The coefficient used is automatically set.

(Embodiment)
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram for explaining an FM transmitter 100 according to the present embodiment.

  The FM transmitter 100 of this embodiment includes a crystal resonator 110, an oscillation circuit 120, clock generation units 130 and 140, a serial-parallel converter 150, an analog / digital converter (hereinafter referred to as ADC) 160, a selector 170, a DSP 180, and a digital / analog. A converter (hereinafter referred to as DAC) 190, a determination unit 200, frequency dividers 191, 192, 193, mixers 194, 195, an adder 196, a power amplifier 197, and an antenna 198 are included.

  Further, the FM transmitter 100 has an LRCK terminal, a BCK terminal, a DATA terminal, an Lch terminal, and an Rch terminal to which an input signal is input. When the input signal is digital, the input signal is input from the LRCK terminal, the BCK terminal, and the DATA terminal. The digital input signal in this embodiment is an IIS format signal. When the input signal is an analog system, the input signal is input from the Lch terminal and the Rch terminal.

  The oscillation circuit 120 is connected to the crystal unit 110, and an output signal (hereinafter referred to as “xck signal”) of the oscillation circuit 120 is supplied to the clock generation units 130 and 140.

  The clock generator 130 includes a selector 131 that selects either the output signal from the oscillation circuit 120 or the BCK signal input from the BCK terminal, and a frequency divider that divides the output of the selector 131 by 1 / K that can be changed. 132, phase comparator (hereinafter referred to as PFD) 133, charge pump (hereinafter referred to as CP) 134, LPF (Low-pass filter) 135, VCO (Voltage Controlled Oscillator) 136, and output of VCO 136 can be changed at 1 / L. A frequency divider 137 for frequency division is provided.

  The clock generation unit 140 selects either the xck signal or the BCK signal input from the BCK terminal, the frequency divider 142, the PFD 143, and the CP 144 that divide the output of the selector 141 by 1 / M that can change the output of the selector 141. , LPF 145, VCO 146, divider 147 for dividing the output of VCO 146 by 1 / N which can be changed, and divider 148 for dividing by 1 / O which can be changed.

  The serial-to-parallel converter 150 converts the digital signal input from the LRCK terminal, the BCK terminal, and the DATA terminal into parallel data and outputs it when the input signal is digital. The output of the serial-parallel converter 150 is supplied to one input of the selector 170.

  The ADC 160 digitizes analog data input from the Lch terminal and the Rch terminal when the input signal is analog. Analog data input from the Lch terminal and Rch terminal is input to the ADC 160 via an analog front end including an amplifier and an anti-aliasing filter (not shown). The output of the ADC 160 is supplied to the other input of the selector 170.

  Note that either one of the analog system and the digital system can be selected as the input signal. For this reason, for example, if any two terminals of the LRCK terminal, the BCK terminal, and the DATA terminal are used as the Lch terminal and the Rch terminal, the number of terminals of the FM transmitter 100 can be reduced.

  The selector 170 selects either the output signal of the serial-parallel converter 150 or the output signal of the ADC 160. The output signal selected by the selector 170 is supplied to the DSP 180.

  The DSP 180 includes a filter unit, a level control unit, a pre-emphasis unit, a compressor unit, a stereo modulation unit, an FM modulation unit, and an IQ modulation unit (not shown), and these parts perform digital signal processing. The system clock used by the DSP 180 uses the output of the frequency divider 148. The output from the DSP 180 is input to the mixers 194 and 195 via the DAC 190. The mixers 194 and 195 receive the transmission frequency generated by the frequency divider 191 and the frequency dividers 192 and 193 that divide the output of the VCO 136 by 1 / P which can be changed. The output signals of the mixers 194 and 195 are FM-transmitted via an adder 196, a power amplifier 197, and an antenna 198.

  The determination unit 200 is supplied with the xck signal, the BCK signal input from the BCK terminal, and the LRCK signal input from the LRCK terminal. The output of the determination unit 200 is supplied to the DSP 180. When the input signal is an IIS format digital audio signal, the determination unit 200 according to the present embodiment determines the format of the digital audio signal based on the xck signal, the BCK signal, and the LRCK signal.

  Hereinafter, the determination unit 200 of the present embodiment will be further described with reference to FIG. FIG. 2 is a diagram for explaining the determination unit 200 of the present embodiment.

  The determination unit 200 of this embodiment includes a frequency measurement unit 210, a format determination unit 220, and a CL stop determination unit 230.

  The frequency measurement unit 210 counts the number of clocks of the BCK signal and the LRCK signal within a certain period obtained by dividing the xck signal. The measurement result is supplied to the format determination unit 220 and the CK stop determination unit 230. The frequency measurement unit 210 has a frequency divider (not shown) and divides the input xck signal during a preset period.

  The format determination unit 220 includes a table 221. The format determination unit 220 determines the format with reference to the table 221 from the measurement result of the frequency measurement unit 210.

  The table 221 included in the format determination unit 220 of this embodiment will be described below with reference to FIG. FIG. 3 is a diagram for explaining the table 221.

  In general, the frequency (sampling frequency) of the LRCK signal is 2 times or 4 times the frequency of 2 fs or 4 fs when 32 kHz, 44.1 kHz, or 48 kHz is 1 fs. Among the sampling frequencies, for example, the number of clocks of the BCK signal during one clock of the LRCK signal may be generally 32, 48, or 64, for example. As shown in the table 221, the frequency of the BCK signal is determined by the number of clocks of the BCK signal included in one clock of the LRCK signal.

  For example, when the frequency of the LRCK signal is 32 KHz and the number of clocks of the BCK signal included in one clock of the LRCK signal is 32, the frequency of the BCK signal is 1.0240 MHz.

  The format determination unit 220 of this embodiment acquires the number of clocks of the LRCK signal and the number of clocks of the BCK signal measured by the frequency measurement unit 210 and refers to the table 221. The format determination unit 230 determines the format corresponding to the acquired clock number of the LRCK signal and the clock number of the BCK signal from the table 221.

  Specifically, the format determination unit 220 determines the frequency (sampling frequency) of the LRCK signal from the number of clocks of the LRCK signal within a certain period obtained by dividing the xck signal. The format determination unit 220 determines the number of clocks of the BCK signal in one clock of the LRCK signal from the number of clocks of the BCK signal within a certain period obtained by dividing the xck signal and the sampling frequency. For example, if the sampling frequency is 32 KHz and the number of clocks of the BCK signal in one clock of the LRCK signal is 32, the format determination unit 220 refers to the table 221 and sets the format of the digital audio signal to the sampling frequency of 32 KHz, the number of BCK clocks of 32, and BCK. It is determined that the format is a signal frequency of 1.0240 MHz.

  The format determination unit 220 passes the determined format to the DSP 180. The DSP 180 automatically sets a coefficient, the number of taps, and the like according to the format based on information such as a sampling frequency included in the format, and performs digital signal processing corresponding to the format of the input digital audio signal.

  For this reason, in the DSP 180 of this embodiment, it is not necessary to set the format of the digital audio signal input in advance.

  Returning to FIG. 2, the CK stop determination unit 230 of the present embodiment determines that the BCK signal has stopped based on the measurement result of the frequency measurement unit 210. The CK stop determination unit 230 determines that the BCK signal has stopped when the number of clocks of the BCK signal is 0 as a result of the measurement by the frequency measurement unit 210. When the CK stop determination unit 230 determines that the BCK signal has stopped, the CK stop determination unit 230 outputs a selection signal for causing the selectors 131 and 141 to select the xck signal.

  Therefore, in the present embodiment, for example, when playback of an audio device to which the FM transmitter 100 is connected is temporarily stopped, or when input of a digital audio signal is interrupted due to skipping of music during music selection, the oscillation circuit 120 Output signals can be selected. When the output signal of the oscillation circuit 120 is selected as the output signal of the selectors 131 and 141, the output signal of the oscillation circuit 120 is supplied to the clock generation units 130 and 140.

  As described above, in the present embodiment, when the input of the digital audio signal is interrupted, the operation of the FM transmitter 100 can be stabilized by supplying the output signal of the oscillation circuit 120 to the clock generators 130 and 140.

  Further, the DSP 180 of the present embodiment may include a mute processing unit 181 and may perform mute processing when the CK stop determination unit 230 determines that the input of the digital audio signal is stopped. In the DSP 180 of this embodiment, by providing the mute processing unit 181, it is possible to avoid unnecessary noise being output when the input of the digital audio signal is interrupted.

  In the FM transmitter 100 according to the present embodiment, the BCK signal included in the digital audio signal is supplied to the clock generation units 130 and 140, and the clock signal can be generated using the BCK signal. For this reason, for example, when the input signal of the FM transmitter 100 is limited to a digital audio signal, the oscillation circuit 120 is not necessary, and the circuit configuration can be simplified.

  As mentioned above, although this invention has been demonstrated based on each embodiment, this invention is not limited to the requirements shown in the said embodiment. With respect to these points, the gist of the present invention can be changed without departing from the scope of the present invention, and can be appropriately determined according to the application form.

It is a figure for demonstrating the FM transmitter 100 of this embodiment. It is a figure for demonstrating the determination part 200 of this embodiment. It is a figure for demonstrating the table 221. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 FM transmitter 110 Crystal oscillator 120 Oscillation circuit 130, 140 Clock generation part 180 DSP
181 Mute processing unit 200 Determination unit 210 Frequency measurement unit 220 Format determination unit 221 Table 230 CK stop determination unit

Claims (6)

An FM transmitter for modulating an input signal into an FM signal,
When the input signal is a digital audio signal, determination means for determining the format of the digital audio signal;
An FM transmitter comprising: digital signal processing means for performing digital signal processing for modulating the input signal in accordance with information indicating a sampling frequency included in the format determined by the determination means. Measuring means for counting the number of clocks of the sampling frequency included in the digital audio signal in a predetermined period, and the number of clocks of the bit clock signal included in the digital audio signal;
A table indicating a relationship between the sampling frequency of the digital audio signal and the number of clocks of the bit clock signal in one clock of the sampling frequency;
The FM transmitter according to claim 2, wherein a format of the digital audio signal is determined using a measurement result obtained by the measuring unit and the table. Stop determination means for determining stop of input of the digital audio signal;
First clock generation means for generating a clock signal synchronized with the reference frequency signal;
Second clock generation means for generating an operation clock signal of digital signal processing means for performing digital signal processing for modulating the input signal using the reference frequency signal,
When the stop determination unit determines that the input of the digital audio signal is stopped, the first clock generation unit and the second clock generation unit are configured to use the first clock generation unit and the second clock generation unit as the reference frequency signal. The FM transmitter according to claim 2 or 3, wherein an output signal of an oscillation circuit connected to the second clock generation means is selected. When a digital audio signal is input as the input signal,
5. The FM transmitter according to claim 4, wherein the first clock generation means and the second clock generation means select the bit clock signal as the reference frequency as the reference frequency signal. The digital signal processing means has a mute processing means,
5. The FM transmitter according to claim 3, wherein the mute processing unit performs mute processing when the stop determination unit determines stop of input of the digital audio signal. An FM transmitter for modulating an input signal into an FM signal,
First clock generation means for generating a clock signal synchronized with the reference frequency signal;
Second clock generation means for generating an operation clock signal of digital signal processing means for performing digital signal processing for modulating the input signal using the reference frequency signal,
The first clock generation means and the second clock generation means are:
When the input signal is a digital audio signal, an FM transmitter that generates the clock signal and the operation clock signal using a bit clock signal included in the digital audio signal as the reference frequency signal.

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