JP2010104600A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine preventing such a fraud as intentionally increasing a winning probability in a game parlor side and tempting players to play from a time when starting business by clearly distinguishing a state after a power-off recovery due to the fraud, from a state after the power-off recovery due to an accidental force such as power failure and notifying of the game state after the game machine acquires the fraud. <P>SOLUTION: A main control board 101 for controlling a game state determines the game state, and includes a main RAM 101c for storing information of the game state by a capacitor even if a power to be supplied to the game machine is stopped. When a high probability game state is determined where a glass frame 110 is opened from an outer frame 100 and then the power is recovered, a performance control board 102 determines a probability variable mode for making a liquid crystal display device 13 notify that it is the high probability game state and allows the liquid crystal display device 13 to notify that it is the high probability game state. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a gaming machine that is intended to prevent fraud in a gaming store.

  In a conventional gaming machine, when a game ball wins in a start winning opening provided on the game board, a symbol change is started in the symbol display device, and when a special symbol (a jackpot symbol) is stopped, a special game ( It is configured to perform control of jackpot). In such special games, the big prize opening provided on the game board is opened so that the game ball can be easily won, and the prize ball corresponding to the game ball won in the big prize opening is paid out to the player. It has become. And if it is stopped at a specific symbol (probability variation symbol) of a special symbol, a special game state (high probability game) with an increased jackpot probability will be easier after the special game is over so that it will be easier to shift to a special game. State).

  In addition, in recent years, game machines such as the game state immediately before power-off and the number of prize balls to be paid out should not be adversely affected even if the machine power is cut off due to a sudden power failure. Information is backed up for a predetermined time.

Here, after the game store is closed, the store clerk, etc., plays with the gaming machine in his / her own game store and shuts off the power when a specific game state is generated. If the backup is made, the player can start the game from the specific game state by turning on the power at the start of business the next morning.
In particular, after the power is turned off, the game information is backed up in the main control (main board) that controls the gaming state, but the game information is not backed up in the sub control (sub board) that notifies the gaming state. As a result, the gaming state cannot be notified immediately after the power is turned on.

  For this reason, it is a problem that the gaming store side intentionally increases the chance of hitting secretly, and fraudulent acts that attract players from the start of business are rampant in the gaming store, increasing the gambling of gaming machines. It was.

  Therefore, in order to prevent the illegal acts as described above, the main control means transmits a status signal related to the gaming state information to the sub control means a plurality of times after the power supply is restored, and the sub control means performs the design based on the status signal. A gaming machine that performs effect control after restoration of a display device is known (see Patent Document 1). According to this, since the symbol display device can reliably receive the status signal regarding the gaming state information at the time of power failure after the power is restored and can inform the gaming state information after the restoration of the power source, the backup function is abused. It can prevent fraud.

JP 2003-62187 A

  However, although the game status is notified after the power supply is restored, it is not possible to clearly distinguish whether it is after power failure restoration due to fraud or power failure restoration due to power failure. There has been a problem that it is impossible to notify the state only when an illegal act occurs after recovery from the disconnection, or to provide an information corresponding to the illegal act.

  The present invention clearly distinguishes between after power failure restoration due to fraud and after power restoration due to force majeure due to power failure, etc., and the gaming machine notifies the gaming state after grasping the cheating behavior, The purpose of the present invention is to provide a gaming machine that deliberately increases the hit probability and prevents fraudulent acts that attract players from the start of business.

The invention according to claim 1 is a notification means for notifying a gaming state, a main control means for controlling the gaming state, and a sub-control means for controlling the notification means based on a control signal from the main control means. A gaming machine equipped with
A game board in which a game area in which game balls flow down is formed, a transparent plate that covers the game area in a visible manner in front of the game board, and is pivotally supported by the gaming machine main body to hold the transparent board Transparent plate holding frame, and transparent plate holding frame detection means for detecting that the transparent plate holding frame is released from the gaming machine body,
The main control means includes a gaming state storage means for storing gaming state information even when power supplied to the gaming machine is stopped,
Based on a predetermined probability, it is determined that special game determination means for determining whether or not to control a special game advantageous to the player, and that the special game control means determines that the special game is to be controlled. Special game control means for controlling the special game, and the special game determination from a first probability game state in which the special game determination means is determined to control the special game based on a first probability. Specific game state transition determining means for determining to shift to a second probability gaming state in which means determines that the special game is to be controlled based on a second probability higher than the first probability; and the specific game Specific state control means for controlling the gaming state to the second probability gaming state after the end of the special game when it is determined by the state transition determining means to shift to the second probability gaming state.
The sub-control unit is configured to notify the notification unit of a gaming state in a predetermined notification mode based on a signal reception unit that receives a control signal transmitted from the main control unit and a control signal received by the signal reception unit. Notification control means for performing control to perform
The notification control means detects the second probability gaming state by the specific gaming state transition determination means when the transparent board holding frame detection means detects that the transparent board holding frame is released from the gaming machine main body. After the determination is made, if the power is supplied from the power-off state in which power is not supplied to the gaming machine, the notification means is notified that the second probability gaming state is in effect. It is characterized by.

According to the first aspect of the present invention, the main control means for controlling the gaming state has a so-called backup function. The sub-control means, when the transparent plate holding frame (glass frame) is released from the gaming machine main body and when the power interruption is restored after the second probability gaming state (high probability gaming state) is determined, The display device) is informed of being in the second probability gaming state (high probability gaming state).
Here, the situation in which the high-probability gaming state is determined when the glass frame is opened from the gaming machine main body can be created only by the gaming store side. In other words, in a normal game, the game ball is fired toward the game area by the launching device and the game is played. Therefore, the glass frame is closed to the game machine body to prevent the game ball from jumping forward from the game board. Has been. Then, when the game ball that has flowed down on the game board surface wins a start opening or the like, an opportunity (lottery) to shift to the high probability game state is given. However, when the game store side performs an illegal act, it takes time and effort to make the game ball flow down on the surface of the game board and win the game ball at the starting port, so open the glass frame, The game ball is picked up, and the game ball is directly put into the starting port by hand. For this reason, the situation where the high-probability gaming state is determined when the glass frame is opened from the gaming machine body is a fraudulent in which the game store side deliberately increases the hit probability and invites the player from the start of business. It can be determined that an action is being performed.
Therefore, it is possible to clearly distinguish between restoration after power interruption due to fraud and restoration after power interruption due to force majeure due to power failure, etc., and the gaming machine can inform the gaming state after grasping the illegal behavior. It is possible to increase the probability of hitting and prevent fraudulent acts that attract players from the start of business.

According to a second aspect of the present invention, in the gaming machine according to the first aspect, the main control means detects that the transparent plate holding frame is released from the gaming machine main body by the transparent plate holding frame detecting means. When the second probability gaming state is determined by the specific gaming state transition determination unit, a gaming state storage instructing unit that stores abnormal information in the gaming state storage unit, and the power interruption state When it becomes the supply state from, it has a power failure recovery signal transmission means for transmitting a power failure recovery signal including the abnormality information stored in the gaming state storage means to the sub-control means,
The notification control unit causes the notification unit to notify that the state is the second probability gaming state when the signal reception unit receives the power failure recovery signal including the abnormality information. .

According to the invention of claim 2, since the abnormal information when the high probability gaming state is determined while detecting that the glass frame is released from the gaming machine main body is backed up, the glass After the high probability gaming state is determined when it is detected that the frame is released from the gaming machine main body, the fraudulent act of closing the glass frame to the gaming machine main body and restoring power interruption is also determined. Therefore, fraud can be prevented more effectively.
In addition, since the backup function is not required in the sub-control unit, the control burden on the sub-control unit can be reduced, and the cost for electronic components for backup can also be reduced.

According to a third aspect of the present invention, in the gaming machine according to the first aspect, the main control means detects that the transparent plate holding frame is released from the gaming machine main body by the transparent plate holding frame detecting means. A gaming state storage instructing means for storing abnormal information in the gaming state storage means, and information on the gaming state stored in the gaming state storage means when the supply state is changed from the power interruption state; A power failure recovery signal transmitting means for transmitting a power failure recovery signal including the abnormality information to the sub-control means;
When the signal control means receives the power failure recovery signal including the information on the second probability gaming state and the abnormality information by the signal receiving means, the notification means means that the notification means is in the second probability gaming state. This is characterized in that the notification is performed.

According to the third aspect of the present invention, since the abnormal information is detected when it is detected that the glass frame is released from the gaming machine main body, the glass frame is opened from the gaming machine main body. After the high-probability gaming state is determined while detecting this, the glass frame is closed to the gaming machine main body, and the transition to the high-probability gaming state is performed again in the high-probability gaming state to restore power interruption. Since it is also possible to discriminate fraudulent acts, it is possible to prevent frauds more effectively.
In addition, since the backup function is not required in the sub-control unit, the control burden on the sub-control unit can be reduced, and the cost for electronic components for backup can also be reduced.

According to a fourth aspect of the present invention, in the gaming machine according to the first aspect, the main control means includes a gaming state signal transmitting means for transmitting a gaming state signal in which the gaming state information is determined to the sub-control means. And a power failure recovery signal transmitting means for transmitting a power failure recovery signal including information on the gaming state stored in the gaming state storage means to the sub control means when the power interruption state is changed to the supply state. And
The sub-control means includes a sub-storage means for storing information even when power supplied to the gaming machine is stopped, and the transparent plate holding frame is released from the gaming machine main body by the transparent plate holding frame detecting means. Sub-memory instruction means for storing abnormal information in the secondary storage means when the signal receiving means receives a gaming state signal in which the information on the second probability gaming state is determined. Have
The notification control means receives the power interruption recovery signal including the information on the second probability gaming state by the signal reception means, and when the abnormality information is stored in the secondary storage means, the notification means Is made to notify that it is in the second probability gaming state.

According to the invention described in claim 4, the main control means transmits a game state signal (game state command) to the sub-control means. The secondary control means has a backup function, and when a glass frame is opened from the gaming machine main body and a gaming state signal in which high probability gaming state information is defined is received, abnormal information is backed up. Remember. And after power failure recovery, when abnormality information is backed up, a notification means (display device) is notified that it is in a high probability gaming state.
According to this, since the fraud determination process can be performed in the sub-control unit, it is possible to reduce the burden of the control process of the main control unit.

  According to a fifth aspect of the present invention, in the gaming machine according to any of the second to fourth aspects, when the predetermined operation is detected by the operation detecting means for detecting a predetermined operation and the operation detecting means, the abnormality information is displayed. And an information erasing means for erasing.

  According to the fifth aspect of the present invention, since the abnormality information can be erased, it is possible to erase the abnormality that has occurred in the normal game and quickly return to the normal game.

According to a sixth aspect of the present invention, in the gaming machine according to any one of the first to fifth aspects, the main control means transmits a gaming state signal in which the gaming state information is determined to the sub-control means. Means,
The sub-control unit determines a first notification mode when the signal receiving unit receives a gaming state signal in which information on the first probability gaming state is determined, and information on the second probability gaming state When receiving a game state signal for which the first notification mode is determined, a notification mode determination means for determining any notification mode of the first notification mode and a second notification mode different from the first notification mode. And
The notification control unit causes the notification unit to notify the gaming state in the notification mode determined by the notification mode determination unit.

According to the sixth aspect of the present invention, when the notification mode determination means receives a gaming state signal (gaming state command) in which information on the first probability gaming state (low probability gaming state) is defined, 1 notification mode is determined, and when a gaming state signal (gaming state command) in which information on the second probability gaming state (high probability gaming state) is determined is received, the first notification mode and the second notification mode One of the notification modes of the notification mode is determined.
Thereby, even if the gaming state is a high-probability gaming state, the notifying means is notified of the gaming state in the first notification mode. Therefore, even when the first notification mode is performed, the player can play a game while maintaining his expectation that the gaming state is controlled to the high probability gaming state. On the other hand, such a display method tends to invite an illegal act in which the game store side intentionally increases the hit probability and calls the player from the start of business. However, as described above, since the gaming machine can notify the gaming state after grasping the illegal act, the illegal act can be prevented.

  According to a seventh aspect of the present invention, in the gaming machine according to the sixth aspect of the invention, the notification mode determining means indicates that the transparent plate holding frame is released from the gaming machine main body by the transparent plate holding frame detecting means. The second probability gaming state is determined by the specific gaming state transition determination means when detecting, and the signal receiving means receives the power failure recovery signal including information on the second probability gaming state Is characterized in that a notification mode of a specific mode different from any of the first notification mode and the second notification mode is determined.

  According to the invention described in claim 7, since the notification is performed in a specific mode after the restoration of the power interruption due to the fraud, the notification of the gaming state after the restoration of the power interruption due to the fraud and the power interruption due to a force majeure due to a power failure, etc. It is possible to clearly discriminate between the notification of the game state after the restoration, and to increase the probability of deliberately at the game store side, and to prevent fraudulent acts that attract the player from the start of business.

  The present invention clearly discriminates between after power failure restoration due to fraud and after power failure restoration due to force majeure due to power outages, etc. By increasing the probability, it is possible to prevent fraudulent acts that attract players from the start of business.

Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings.
FIG. 1 is a front view showing an example of a gaming machine according to the present invention, and FIG. 2 is a perspective view of the gaming machine with a glass frame opened and a gaming board 2 removed.

The gaming machine 1 is provided with a gaming board 2 in which a gaming area 6 in which gaming balls flow down is formed, and a glass frame 110 is provided on an outer peripheral portion of the gaming area 6 of the gaming board 2. An operation handle 3 is rotatably provided on the glass frame 110.
When the player touches the operation handle 3, the touch sensor 3 b in the operation handle 3 detects that the player has touched the operation handle 3 and transmits a touch signal to the firing control board 106. When the firing control board 106 receives a touch signal from the touch sensor 3b, the firing control board 106 permits energization of the firing solenoid 4a. When the rotation angle of the operation handle 3 is changed, the gear directly connected to the operation handle 3 rotates and the knob of the firing volume 3a connected to the gear rotates. A voltage corresponding to the detection angle of the firing volume 3a is applied to a firing solenoid 4a provided in the game ball launching mechanism. When a voltage is applied to the firing solenoid 4a, the firing solenoid 4a is operated according to the applied voltage, and the game ball is directed toward the game area 6 with a strength according to the rotation angle of the operation handle 3. Fire. In the present embodiment, a launching solenoid 4a provided in the game ball launching mechanism constitutes a launching device. Further, a shot ball detection switch 4b is provided to detect the game ball that has been shot. In the present embodiment, the touch sensor 3b constitutes a firing operation detection means, and the firing ball detection switch 4b constitutes a firing ball detection means.

The game ball fired as described above rises between the rails 5 a and 5 b and reaches the upper position of the game board 2, and then falls within the game area 6. At this time, the game ball falls unpredictably by a plurality of nails and windmills (not shown) provided in the game area 6.
The game area 6 is provided with a plurality of general winning ports 7. Each of these general winning ports 7 is provided with a general winning port detecting switch 7a. When this general winning port detecting switch 7a detects the entering of a game ball, a predetermined winning ball (for example, 10 game balls) is provided. Will be paid out.

  Further, in the gaming area 6, above the general winning opening 7, a normal symbol gate 8 is provided so as to pass the game ball. The normal symbol gate 8 is provided with a gate detection switch 8a for detecting the passage of the game ball. When the gate detection switch 8a detects the passage of the game ball, the normal symbol lottery described later is performed. In the present embodiment, the gate detection switch 8a constitutes passage detection means.

Further, a lower start position of the game area 6 is provided with a first start port 9 through which a game ball can enter, similarly to the general winning port 7. Further, a second start port 10 is provided directly below the first start port 9. The second starting port 10 has a pair of movable pieces 10b, a first mode in which the pair of movable pieces 10b is maintained in a closed state, and a second mode in which the pair of movable pieces 10b are in an open state. It is controlled to move according to the mode. When the second starting port 10 is controlled in the first mode, the first starting port 9 located immediately above the second starting port 10 becomes an obstacle and does not accept game balls. It is possible or difficult. On the other hand, when the second starting port 10 is controlled to the second mode, the pair of movable pieces 10b function as a tray, and it is easy to enter the game ball into the second starting port 10. That is, when the second start port 10 is in the first mode, there is almost no opportunity for entering a game ball, and when the second start port 10 is in the second mode, the opportunity for entering a game ball is increased.
The first start port 9 and the second start port 10 are provided with a first start port detection switch 9a and a second start port detection switch 10a for detecting the entrance of a game ball, respectively. When the game ball is detected, a lottery for acquiring a right to execute a jackpot game, which will be described later (hereinafter referred to as a “hit lottery”), is performed. Also, when the detection switches 9a and 10a detect the entry of game balls, predetermined prize balls (for example, 4 game balls) are paid out. In the present embodiment, the first start port detection switch 9a and the second start port detection switch 10a constitute a start ball detecting means. Further, only the second start port detection switch 10a constitutes a start detection means. Moreover, the 2nd starting port which has a pair of movable piece 10b comprises a starting variable prize-winning apparatus.

  As shown in FIG. 1, a special winning opening 11 is provided further below the second starting opening 10. The special winning opening 11 is normally kept closed by the special winning opening / closing door 11b, and it is impossible to enter a game ball. On the other hand, when a special game, which will be described later, is started, the special prize opening / closing door 11b is opened, and the special prize opening / closing door 11b functions as a tray for guiding the game ball into the special winning opening 11, A game ball can enter the big prize opening 11. The big prize opening 11 is provided with a big prize opening detection switch 11a. When the big prize opening detection switch 11a detects the entry of a game ball, preset prize balls (for example, nine game balls) are provided. To be paid out. In the present embodiment, the special winning opening detection switch 11a constitutes a pitch detection means. The large winning opening 11 having the large winning opening / closing door 11b constitutes a variable winning apparatus.

  The player does not enter any of the general winning port 7, the first starting port 9, the second starting port 10, and the grand winning port 11 further below the grand winning port 11, that is, at the bottom of the game area 6. A discharge port 12 is provided for discharging the game balls. The outlet 12 is provided with an out-ball detection switch 12a, which counts game balls that have entered the outlet. In the present embodiment, the out ball detection switch 12a constitutes a discharge ball detection means, and the general winning port detection switch 7a, the first starting port detection switch 9a, the second starting port detection switch 10a, and the big winning port detection switch 11a A winning ball detecting means is configured.

In addition, the game board 2 is provided with an effect device for performing various effects.
Specifically, a liquid crystal display device 13 composed of a liquid crystal display (LCD) or the like is provided at a substantially central portion of the game area 6. 14 and 15 are provided. Further, an effect lighting device 16 is provided at both the upper position and the lower position of the game board 2, and an effect button 17 is provided on the left side of the operation handle 3.

  The liquid crystal display device 13 displays an image while the game is not being performed or displays an image according to the progress of the game. In particular, when a game ball enters the first start port 9 or the second start port 10, the effect symbol for notifying the player of the lottery result is variably displayed. The effect symbol is, for example, scrolling and displaying three numbers, and stopping the scrolling after a predetermined time, and displaying a specific symbol (number) in an array. As a result, while the symbols are being scrolled, the player is given an impression that the lottery is currently being performed, and the player is notified of the lottery result by the symbols displayed when the scrolling is stopped. By displaying various images, characters, and the like during the variation display of the effect symbols, the player is given a high expectation that they may win a jackpot. Furthermore, in order to notify the gaming state, a background image corresponding to the gaming state is displayed. In the present embodiment, the liquid crystal display device 13 constitutes notification means.

The stage effect devices 14 and 15 give the player a sense of expectation according to their operation modes. In the present embodiment, the stage effect device 14 is composed of a movable device in the shape of a person's face, and the bag is used as the stage effect device 15. The stage effect device 14 moves, for example, in the left-right direction or protrudes to the front side of the gaming machine 1. In addition, the production effect device 15 is configured such that the opening degree of the bag is variably controlled. Various expectation feelings are given to the player by the combination of the operation modes of these effect actor devices 14 and 15 and the operations of both effect actor devices 14 and 15.
In addition, the effect lighting device 16 includes a plurality of lights 16a, and performs various effects while changing the light irradiation direction and emission color of each light 16a.

Further, an effect button 17 that can be pressed by the player is provided on the left side of the operation handle 3. For example, the effect button 17 is effective only when a message for operating the effect button 17 is displayed on the liquid crystal display device 13. The effect button 17 is provided with an effect button detection switch 17a. When the effect button detection switch 17a detects the player's operation, a further effect is executed according to this operation.
Further, although not shown in FIG. 1, the gaming machine 1 is provided with an audio output device 18 (refer to FIG. 2) including a speaker, and in addition to the above-described effect devices, an effect by sound is also performed. ing.

Below the game area 6, the first special symbol display device 19, the second special symbol display device 20, the normal symbol display device 21, the first hold indicator 22, the second hold indicator 23, the normal symbol hold display A vessel 24 is provided.
The first special symbol display device 19 notifies a jackpot lottery result that is performed when a game ball enters the first start port 9. In other words, a plurality of special symbols corresponding to the jackpot lottery result are provided, and the lottery result is notified to the player by displaying the special symbol corresponding to the jackpot lottery result on the first special symbol display device 19. I am doing so. For example, “7” is displayed when the jackpot is won, and “−” is displayed when the player wins. “7” and “−” displayed in this way are special symbols, but these special symbols are not displayed immediately, but are displayed in a stopped state after being displayed for a predetermined time. .

  More specifically, when a game ball enters the first starting port 9, a jackpot lottery will be performed. However, the jackpot lottery result is not immediately notified to the player, and a predetermined time is passed. The player is notified when it has passed. When a predetermined time has elapsed, a special symbol corresponding to the jackpot lottery result is stopped and displayed so that the player is notified of the lottery result. The second special symbol display device 20 is for informing a lottery winning result that is made when a game ball enters the second starting port 10, and the display mode is the above-mentioned first display mode. This is the same as the special symbol display mode in the special symbol display device 19.

  Further, the normal symbol display device 21 is for notifying the lottery result of the normal symbol that is performed when the game ball passes through the normal symbol gate 8. As will be described in detail later, when the winning symbol is won by the normal symbol lottery, the normal symbol display device 21 is turned on, and then the second start port 10 is controlled to the second mode for a predetermined time. Note that this normal symbol also does not immediately notify the lottery result when the game ball passes through the normal symbol gate 8, but the normal symbol display device 21 blinks until a predetermined time elapses. Is displayed in a variable manner. In the present embodiment, the normal symbol display device 21 constitutes a symbol display device.

Furthermore, when a special ball is displayed in the first starting port 9 or the second starting port 10 during a special symbol variation display or during a special game to be described later, the special symbol variation display cannot be performed immediately. The right to display special symbols is reserved under the above conditions. In more detail, the right to display the variable of the special symbol in which the game ball enters and is retained at the first start opening 9 is reserved as the first hold, and the game ball enters the second start opening 10 and is retained. The right of variable display of special symbols is reserved as the second reservation.
For both of these holds, the upper limit reserved number is set to four, and the reserved number is displayed on the first hold indicator 22 and the second hold indicator 23, respectively. When there is one first hold, the left LED of the first hold indicator 22 is lit, and when there are two first holds, the two LEDs of the first hold indicator 22 are lit. Further, when there are three first holds, the LED on the left side of the first hold indicator 22 blinks and the LED on the right side lights up. When there are four first holds, the first hold indicator 22 Two LEDs flash. Further, on the second hold indicator 23, the number of the second hold reserved is displayed in the same manner as described above.
The upper limit reserved number of normal symbols is also set to four, and the reserved number is displayed on the normal symbol hold indicator 24 in the same manner as the first hold indicator 22 and the second hold indicator 23. Is done.

  The glass frame 110 supports a glass plate 111 that covers the game area 6 so as to be visible in front of the game board 2 (player side). The glass plate 111 is fixed to the back side of the glass frame 110 by glass plate fixing hooks 112 provided at a plurality of locations (for example, three locations) on the back side of the glass frame 110. The glass plate 111 is detachably fixed to the glass frame 110 by a glass plate fixing hook 112. Further, a glass holding switch 34 for detecting that the glass plate is held is provided. In the present embodiment, the glass plate 111 constitutes a transparent plate.

  FIG. 2B is a schematic diagram illustrating an example of the configuration of the glass holding switch 34. As shown in FIG. 2B, the glass holding switch 34 is pressing the glass holding switch 34 when the glass plate 111 is held by the glass frame. When the glass plate 111 is removed from the glass frame, the glass plate 111 is separated from the glass holding switch 34 and the glass holding switch 34 detects that the glass plate 111 has been removed from the glass frame. In the present embodiment, the glass holding switch 34 constitutes a transparent plate detection unit.

  Further, the glass frame 110 is connected to the outer frame 100 via the connection mechanism portion 113 on one end side in the left-right direction (for example, the left side facing the gaming machine), and the other end in the left-right direction using the connection mechanism portion 113 as a fulcrum. The side (for example, the right side facing the gaming machine) can be rotated in a direction to release it from the outer frame 100. The glass frame 110 covers the game board 2 together with the glass plate 111, and can rotate like a door with the connection mechanism 113 as a fulcrum, thereby opening the inner part of the outer frame 100 including the game board 2. On the other end side of the glass frame 110, a lock mechanism for fixing the other end side of the glass frame 110 to the outer frame 100 is provided. The fixing by the lock mechanism can be released by a dedicated key. The glass frame 110 is basically locked during the game, and is opened only in a specific situation such as when a game ball is clogged in the game area 6 or during maintenance of the gaming machine. The glass frame 110 is also provided with a door opening switch 33 that detects whether or not the glass frame 110 is opened from the outer frame 100. In the present embodiment, the glass frame 110 constitutes a transparent plate holding frame, and the door opening switch 33 constitutes a transparent plate holding frame detecting means.

  The outer frame 100 includes a game board holding frame 120 that supports the game board 2. The game board holding frame 120 is provided on the inner peripheral side of the outer frame 100 so that the outer peripheral surface is in contact with (in contact with) the inner peripheral surface of the outer frame 100. The outer frame 100 and the game board holding frame 120 are opened on the front side and the back side so that the back side of the game board 2 is opened with the game board 2 supported by the game board holding frame 120 so as to face the glass plate 111. Has been.

  A board unit including a main control board 101, an effect control board 102, a payout control board 103 and the like is provided on the back surface of the game board 2. The illustration of each control board is omitted. A power board 107 is provided on the back side of the game board 2, and a power plug 50 for supplying power to the gaming machine and a power switch (not shown) are provided on the power board 107.

(Internal structure of control means)
Next, control means for controlling the progress of the game will be described with reference to FIG.

  The main control board 101 controls the basic operation of the game. The main control board 101 includes a main CPU 101a, a main ROM 101b, and a main RAM 101c. The main CPU 101a reads out a program stored in the main ROM 101b based on an input signal from each detection switch or timer, performs arithmetic processing, directly controls each device or display, or outputs the result of the arithmetic processing. In response, a command is transmitted to another board. The main RAM 101c functions as a data work area during the arithmetic processing of the main CPU 101a. In the present embodiment, the main control board 101 constitutes main control means.

  A general winning opening detection switch 7a, a gate detection switch 8a, a first starting opening detection switch 9a, a second starting opening detection switch 10a, and a large winning opening detection switch 11a are connected to the input side of the main control board 101. The game ball detection signal is input to the main control board 101.

  Further, on the output side of the main control board 101, a starting opening / closing solenoid 10c for opening / closing the pair of movable pieces 10b of the second starting opening 10 and a large winning opening opening / closing solenoid 11c for opening / closing the large winning opening opening / closing door 11b. It is comprised by.

The main ROM 101b of the main control board 101 stores a game control program and data and tables necessary for determining various games.
For example, a jackpot determination table (see FIG. 4A) that is referred to when determining whether or not the stop result of the special symbol variation is a jackpot, a symbol determination table that determines the stop symbol at the time of winning (FIG. 4). (Refer to (b-1 to b-3)), command data (refer to FIG. 5) at the time of power failure recovery determined at the time of power failure recovery is stored in the main ROM 101b. Specific examples of these various tables will be described later with reference to FIGS.
Note that the above-described table is merely an example of characteristic tables among the tables in the present embodiment, and a number of other tables and programs (not shown) are provided for the progress of the game. ing.

The main RAM 101c of the main control board 101 has a plurality of storage areas. The storage areas listed below are merely examples, and many other storage areas are provided.
The main RAM 101c has a normal symbol hold number (G) storage area, a normal symbol hold storage area, a special symbol hold number (U) storage area, a special symbol hold storage area, and a remaining fluctuation count (X) storage area of the high probability gaming state. , The remaining number of fluctuations of the short-time gaming state (J) storage area, the round game number of times (R) storage area, the number of small hits operation (K) storage area, the number of winning winning a prize (C) storage area, a game state storage area, A payout counter is provided. The game state storage area includes an auxiliary game start flag storage area, a short-time game flag storage area, a high probability game flag storage area, a long hit game start flag storage area, a short hit game start flag storage area, and a small hit game start flag storage. Has an area.

  Further, the main RAM 101 c constitutes a backup RAM as a nonvolatile storage means that is partly or wholly backed up by a backup power source created in the power supply substrate 107. That is, even if the power supply to the gaming machine is stopped, the content of data in the main RAM 101c is stored for a predetermined period (until the backup power supply cannot be supplied because the capacitor as the backup power supply is discharged). In the present embodiment, a main RAM 101c that constitutes a backup RAM and has a gaming state storage area constitutes a gaming state storage means. The main RAM 101c may be configured with a flash memory or the like without having a backup power source.

  Further, a RAM clear switch 101d for instructing to clear the data contents of the main RAM 101c is directly mounted on the main control board. In the present embodiment, the RAM clear switch 101d constitutes an operation detection unit.

  The power supply board is provided with a backup power supply composed of a capacitor. The power supply voltage supplied to the gaming machine is monitored, and when the power supply voltage falls below a predetermined value, the power interruption detection signal is sent to the main control board 101 and the effect control board. To 102. More specifically, when the power interruption detection signal becomes high level, the main CPU 101a and the sub CPU 102a become operable, and when the power interruption detection signal becomes low level, the main CPU 101a and sub CPU 102a become inactive. In the present embodiment, the capacitor constitutes the backup power supply. However, the backup power supply is not limited to the capacitor, and may be, for example, a battery or a combination of the capacitor and the battery.

  The effect control board 102 mainly controls each effect such as during game play or standby. The effect control board 102 includes a sub CPU 102a, a sub ROM 102b, and a sub RAM 102c, and is connected to the main control board 101 so as to be communicable in one direction from the main control board 101 to the effect control board 102. . The sub CPU 102a is stored in the main ROM 101b based on a command transmitted from the main control board 101 or an input signal from the effect button detection switch 17a, the shot ball detection switch 4b, the out ball detection switch 12a, and the timer. The program is read to perform arithmetic processing, and corresponding data is transmitted to the lamp control board 104 or the image control board 105 based on the processing. The sub RAM 102c functions as a data work area when the sub CPU 102a performs arithmetic processing. Similar to the main RAM 101c, the sub RAM 102c is also a backup RAM as a nonvolatile storage means that is backed up by a backup power source created on the power supply board 107. In the present embodiment, the effect control board 102 constitutes a sub control means, the sub CPU 102a constitutes a notification control means, and the sub RAM 102c constituting the backup RAM constitutes a sub storage means. Note that the sub RAM 102c may be configured by a flash memory or the like without having a backup power source.

The sub ROM 102b of the effect control board 102 stores an effect control program and data and tables necessary for determining various games.
For example, an effect mode determination table (see FIG. 6) for determining an effect mode based on a command received from the main control board is stored in the sub ROM 102b. Specific examples of these various tables will be described later with reference to FIG.
Note that the above-described table is merely an example of characteristic tables among the tables in the present embodiment, and a number of other tables and programs (not shown) are provided for the progress of the game. ing.

The sub RAM 102c of the effect control board 102 has a plurality of storage areas. The storage areas listed below are merely examples, and many other storage areas are provided.
The sub RAM 102c includes a command reception buffer, a game state storage area, an effect mode storage area, a sub abnormality information storage area, a unit time counter, a payout counter, a non-payout counter, a unit non-payout counter, a start opening prize counter, and a unit start opening prize. Counter, special prize counter, unit special prize counter, normal symbol inactive counter, gate non-passing time counter, firing ball non-detection counter, touch sensor counter, gate passing counter, normal electric accessory operating flag area, time storage area A power interruption time storage area is provided.

In this embodiment, the effect control board 102 is equipped with an RTC (real time clock) 102d for outputting the current time. The sub CPU 102a inputs a date signal indicating the current date and a time signal indicating the current time from the RTC 102d, and executes various processes based on the current date and time. The RTC 102d is normally operated by power from the gaming machine when power is supplied to the gaming machine, and is powered by power supplied from a backup power source mounted on the power supply board 107 when the gaming machine is powered off. Operate. Accordingly, the RTC 102d can measure the current date and time even when the gaming machine is turned off.
Note that the RTC 102d may be provided with a battery on the effect control board and operated by the battery.
Alternatively, the RTC 102d may not be provided, and the time may be measured by counting up a counter provided in the sub RAM 102c having a function as a backup RAM every predetermined time (for example, every 2 ms). Further, the RTC may be mounted on the main control board 101. In the embodiment, an RTC (real time clock) 102d constitutes a time measuring means.

The payout control board 103 performs game ball launch control and prize ball payout control. The payout control board 103 includes a payout CPU 103a, a payout ROM 103b, and a payout RAM 103c, and is connected to the main control board 101 so as to be capable of two-way communication. The payout CPU 103a executes a program stored in the payout ROM 103b based on input signals from a payout ball count detection switch 32, a door opening switch 33, a glass holding switch 34, and a timer that detect whether or not a game ball has been paid out. It reads and performs arithmetic processing, and transmits corresponding data to the main control board 101 based on the processing. The payout control board 103 is connected to a payout motor 31 of a prize ball payout device for paying out a predetermined number of prize balls from the game ball storage unit to the player. The payout CPU 103a reads out a predetermined program from the payout ROM 103b based on the payout number designation command transmitted from the main control board 101, performs arithmetic processing, and controls the prize ball payout device 26 to play a predetermined prize ball. Pay to the person. At this time, the payout RAM 103c functions as a data work area during the calculation process of the payout CPU 103a. In the present embodiment, the payout motor 31 of the prize ball payout device constitutes the payout device.
Also, it is confirmed whether a game ball lending device (card unit) (not shown) is connected to the payout control board 103, and if the game ball lending device (card unit) is connected, the game control ball 106 is caused to fire a game ball. Send launch control data to allow that.

When the launch control board 106 receives the launch control data from the payout control board 103, the launch control board 106 permits the launch. Then, the touch signal from the touch sensor 3b and the input signal from the launch volume 3a are read out, the energization of the launch solenoid 4a is controlled, and the game ball is launched. In the present embodiment, the firing control board 106 constitutes a firing control means.
Here, the rotational speed of the firing solenoid 4a is set to about 99.9 (times / minute) based on the frequency based on the output period of the crystal oscillator provided on the firing control board 106. As a result, the number of games played per minute is about 99.9 (pieces / minute) because one shot is fired every time the firing solenoid rotates.
In the present embodiment, the touch signal from the touch sensor 3 b is transmitted from the launch control board 106 to the effect control board 102 via the payout control board 103 and the main control board 101.

  The lamp control board 104 controls lighting of the effect lighting device 16 provided on the game board 2 and controls driving of the motor for changing the light irradiation direction. In addition, energization control is performed on a drive source such as a solenoid or a motor for operating the production actors 14 and 15. The lamp control board 104 is connected to the effect control board 102, and performs the above-described controls based on data transmitted from the effect control board 102.

  The image control board 105 includes an image CPU, an image ROM, an image RAM, and a VRAM (not shown) for performing image display control of the liquid crystal display device 13, and an audio CPU, an audio ROM, and an audio RAM. The image control board 105 is connected to the effect control board 102 so as to be capable of bidirectional communication, and the liquid crystal display device 13 and the audio output device 18 are connected to the output side thereof.

The image ROM stores a large number of image data such as effect symbols and backgrounds displayed on the liquid crystal display device 13, and the image CPU reads a predetermined program based on a command transmitted from the effect control board 102. Then, predetermined image data is read from the image ROM to the VRAM, and display control in the liquid crystal display device 13 is performed. The image CPU executes various image processing such as background image display processing, effect symbol display processing, and character image display processing on the liquid crystal display device 13, but the background image, effect symbol image, and character image are displayed on the liquid crystal display. The image is superimposed on the display screen of the device 13.
That is, the effect design image and the character image are displayed so as to be seen in front of the background image. At this time, if the background image and the design image overlap at the same position, the design image is preferentially stored in the VRAM by referring to the Z value of the Z buffer of each image data by a known hidden surface removal method such as the Z buffer method. .

  The audio ROM stores a large amount of audio data output from the audio output device 18, and the audio CPU reads out a predetermined program based on a command transmitted from the effect control board 102 and Audio output control in the output device 18 is performed.

  Next, details of various tables stored in the main ROM 101b will be described with reference to FIGS.

FIG. 4A is a diagram showing a jackpot determination table.
The jackpot determination table is made up of a low probability random number determination table and a high probability random number determination table with reference to the gaming state, and based on the selected table and the extracted special symbol determination random number value, Or “Lost” or “Lost”.
Specifically, in the low probability gaming state, the jackpot random number is determined based on the low probability random number determination table. According to the low probability random number determination table, the two random numbers 7 and 317 are jackpots. It is determined. On the other hand, in the high-probability gaming state, the jackpot random number is determined based on the high-probability random number determination table. According to this high probability random number determination table, 7, 37, 67, 97, 127, 157, 187, 217, 247, 277, 317, 337, 367, 397, 427, 457, 487, 517, 547, 577 20 special symbol determination random numbers are determined to be jackpots. Further, whether the random number determination table for low probability or the random number determination table for high probability is used, if the random number value is 50 or 100, “small hit” is determined. If the random number is other than the above, it is determined as “lost”.

4B-1 to 4B-3 are examples of symbol determination tables.
The symbol determination table is a symbol determination table that determines the type of a special symbol based on a random number value for a jackpot symbol when a game ball enters the first start port 9 and is determined to be a jackpot (FIG. 4 ( b-1)), a symbol determination table for determining the type of special symbol based on the random number value for the jackpot symbol when a game ball enters the second starting port 10 and is determined to be a jackpot symbol (FIG. 4 ( b-2)) and a symbol determination table that determines the type of a special symbol based on the random number value for a small hit symbol when it is determined that the bonus symbol is determined regardless of the type of the start port (FIG. 4B-3). )).
The symbol determination table determines the type of the special symbol based on the extracted jackpot symbol random value. Then, as will be described later, any one of the six types of jackpots is determined according to the type of special symbol.

In the symbol determination table of FIG. 4 (b-2), the special symbol type corresponding to either “High probability per short with length” or “Normal per short length” is selected. The reason is as follows.
That is, in the non-short game state, almost no game ball enters the second start port 10. In other words, in the non-time-saving gaming state, most of the jackpot lottery is performed when a gaming ball enters the first start port 9. Therefore, in the non-time-saving gaming state, any of the six types of jackpots is won to increase the interest of the game.

On the other hand, even when a game ball enters the second starting port 10, if six types of jackpots are won, a short-time game state is provided to change the player's willingness to play the game. There is a risk of declining.
For example, if you win the “short win with high probability” and become short-time gaming state, if you win “short win with normal time” or “short win with no normal time”, It is impossible to enjoy the game value due to winning the “Short-Catch”, and the player's willingness to play is reduced at once.

Also, for example, if a player wins a short-time game with a high probability and becomes a short-time game state, if a player frequently wins one of the “short wins” again, the player receives a lot of prize balls. It is difficult to achieve the maximum goal of the game to win the game, and the willingness to play can decline at once. Such a situation frequently occurs in the short-time gaming state.
Therefore, in order to prevent the above-mentioned situation from occurring frequently, the second hold is selected only for either “perpendicular length with high probability” or “per length with regular time”.

FIG. 5 is a diagram illustrating a configuration of command data at the time of power failure recovery determined at the time of power failure recovery.
As shown in FIG. 5A, the main CPU 101a confirms the presence / absence of backup, confirms the gaming state, and transmits a power interruption restoration command corresponding to the gaming state to the effect control board 102.
Specifically, if the backup is invalid, a power-on designation command is first determined and transmitted, and after the RAM clear switch is pressed, a RAM clear start designation command is transmitted.
Also, when backup is valid, if low probability / short time non-operation, a power failure recovery 1 designation command is transmitted, and if high probability / short time operation, a power failure recovery 2 designation command is transmitted. If it is a short-time operation, a power failure recovery 3 designation command is transmitted. If it is a high probability and a short time non-operation, a power failure recovery 4 designation command is transmitted.
FIG. 5B is a modification of the command data configuration at the time of power failure recovery in FIG. 5A. The main CPU 101a confirms the abnormality information and then refers to the gaming state to recover from power failure. Send a command. Further, the power interruption recovery command data may be stored in a table, or may be included in the processing in the program so as to be determined in the program.

Next, the effect mode determination table stored in the sub ROM 102b will be described with reference to FIG.
FIG. 6A is a table for determining the normal performance mode. FIG. 6B is a table in which the effect control board 102 determines the effect mode when the power interruption is restored.
The effect mode determination table in FIG. 6A determines the effect mode based on the effect symbol designation command received from the main control board 101. Here, the effect mode indicates a notification state for effect in relation to the gaming state, a probability changing mode for notifying that it is a high-probability gaming state, a time-saving mode for notifying that it is a time-short gaming state, It is composed of a chance mode for notifying that there is a possibility of a high probability gaming state and a normal mode for notifying that it is not a short-time gaming state but a low probability gaming state. Then, the liquid crystal display device 13, the audio output device 18, the effect lighting device 16, and the effect accessory devices 14 and 15 perform effects based on the effect mode. More specifically, the background image and effect pattern performed on the liquid crystal display device 13 change based on the effect mode.

  Further, as a feature of the table of FIG. 6A, the chance mode 1, the special symbol E, and the special symbol F are received when an effect symbol designation command (E0H003H and E0H004H) of the special symbol C and the special symbol D is received. When the special symbol G and special symbol H effect symbol designation commands (E0H005H to E0H008H) are received, the chance mode 2 is determined. Thereby, during the chance mode, it becomes difficult to distinguish between the low-probability gaming state and the high-probability gaming state, and the player can continue the game while always expecting the high-probability gaming state.

The effect mode determination table in FIG. 6B-1 is a new effect mode based on the effect mode and the game state that are backed up after confirming the abnormality information flag after the power interruption of the effect control board 102 is restored. It is used when determining.
As a feature of this table, when there is abnormality information after restoration of power interruption, a different kind of effect mode from the normal time is determined.
As a result, since the notification is performed in a specific manner after the restoration of the power interruption due to the fraud, the notification of the gaming state after the restoration of the power interruption due to the fraud and the notification of the gaming state after the restoration of the power interruption due to force majeure due to a power failure, etc. Can be clearly discriminated, and the game store side deliberately increases the hit probability, and can prevent illegal acts that attract players from the start of business.
In this embodiment, the probability variation modes 2 and 3 that are not determined in the normal state are determined when the abnormality information is in a high probability state. However, the probability that the abnormality information is satisfied is high. Even in the state, the probability variation mode 1 that is the same as that in the normal state may be determined.

  FIG. 6B-2 shows a modification of the effect mode determination table of FIG. 6B, and refers to the power failure recovery command from the main control board 101, and the data of the power failure recovery command is shown. From this, an abnormality is determined and the production mode is determined.

(Description of gaming state)
Next, the gaming state when the game progresses will be described. In the present embodiment, one of “low probability gaming state”, “high probability gaming state”, “short-time gaming state”, “non-short-time gaming state”, “long-hitting gaming state”, “short-hit gaming state”, and “small-hit gaming state” The game progresses in the game state. However, while the game is in progress, if the game state is “low probability game state” or “high probability game state”, it is always “time-short game state” or “non-time-short game state”. In other words, there are cases of “low probability gaming state” and “short-time gaming state” and “low probability gaming state” and “non-short-time gaming state”. . Note that the gaming state when the game is started, that is, the initial gaming state of the gaming machine 1 is a “low probability gaming state” and is set to a “non-short-time gaming state”. Is referred to as a “normal gaming state”.

In this embodiment, the “low probability gaming state” means that in the jackpot lottery performed on the condition that a game ball has entered the first starting port 9 or the second starting port 10, the winning probability of jackpot is 2 / The game state set to 601. The jackpot winning here is to acquire a right to execute a “long win game” or a “short win game” which will be described later.
On the other hand, the “high probability gaming state” means a gaming state in which the jackpot winning probability is set to 20/601. Therefore, in the “high probability gaming state”, it is easier to acquire the right to execute “game per long” or “game per short” than in the “low probability gaming state”.

  In the present embodiment, the “non-temporary gaming state” means that in the normal symbol lottery performed on condition that the game ball has passed through the normal symbol gate 8, the time required for the lottery is set as long as 29 seconds, and The game state in which the opening control time of the second starting port 10 when winning is won is set to be as short as 0.2 seconds. That is, when a game ball passes through the normal symbol gate 8, a normal symbol lottery is performed, and the lottery result is determined 29 seconds after the lottery is started. If the lottery result is a win, then the second start port 10 is controlled to the second mode for about 0.2 seconds.

On the other hand, the “short-time gaming state” means that the time required for the normal symbol lottery is 3 seconds, which is shorter than the “non-short-time gaming state”, and the second starting point when winning in the win A game state in which the release control time of 10 is set to 3.5 seconds, which is longer than the “non-short game state”.
In this embodiment, the probability of winning in the normal symbol lottery is set to 90%, and this winning probability is the game state of either “non-short game state” or “short-time game state”. But it doesn't change. Therefore, in the “short-time gaming state”, the second starting port 10 is more easily controlled to the second mode as long as the game ball passes through the normal symbol gate 8 than in the “non-short-time gaming state”. As a result, in the “short-time gaming state”, the player can advance the game without consuming the game ball, but this is the original purpose of the “short-time gaming state”.
However, in the “short-time gaming state”, the above-mentioned purpose of providing the “short-time gaming state” may be achieved by making the winning probability in the normal symbol lottery higher than the “non-short-time gaming state”. I do not care.

In the present embodiment, the “long hit gaming state” means a right to execute a long hit game in a jackpot lottery performed on the condition that a game ball has entered the first start port 9 or the second start port 10. This is the gaming state that is executed when the player has earned.
In the “long hit gaming state”, a round game in which the special winning opening 11 is opened is performed 15 times in total. The total opening time of the grand prize opening 11 in each round game is set to a maximum of 30 seconds. If a predetermined number of game balls (for example, nine) enter the big prize opening 11 during this period, one round game will be played. End. In other words, the “long hit game state” is a game state in which a game ball enters the big winning opening 11 and a player can acquire a prize ball corresponding to the winning ball, so that a large number of prize balls can be acquired. is there.

In the present embodiment, the “short win game state” means the right to execute a short win game in the big win lottery performed on the condition that a game ball has entered the first start port 9 or the second start port 10. This is the gaming state that is executed when the player has earned.
In the “short win game state”, a round game in which the special winning opening 11 is opened is performed twice in total. However, in each round game, the big prize opening 11 is opened only once, and the opening time is set to 0.1 seconds. During this time, when a predetermined number of game balls (for example, 9 balls) enter the big prize opening 11, one round game is finished. However, since the opening time of the big prize opening 11 is extremely short as described above, Hardly enters, and even if a game ball enters, only one or two game balls enter in one round game. Even in the “short win game state”, when a game ball enters the big winning opening 11, a predetermined prize ball (for example, 15 game balls) is paid out.

In the present embodiment, the “small hit game state” means the right to execute the small hit game in the big hit lottery performed on the condition that a game ball has entered the first start port 9 or the second start port 10. This is the gaming state that is executed when the player has earned.
Also in the “small winning game state”, as in the above “short winning game state”, the big winning opening 11 is opened twice. The opening time, opening / closing timing, and opening / closing mode of the special winning opening 11 at this time are the same as the “short hit gaming state”, or the player determines whether the “small hit gaming state” and the “short hit gaming state”. Is approximated to the extent impossible or difficult. However, when a game ball enters the special winning opening 11, a predetermined prize ball (for example, 15 game balls) is paid out in the same manner as described above.

In the present embodiment, the “long win game” and the “short win game” are referred to as “big hit game”, and the “big hit game” and the “small hit game” are collectively referred to as “special game”. That's it.
In the main control board 101, a flag is stored in the game state storage area of the main RAM 101c so as to grasp which game state is the current game state.
In addition, the game state is changed from one game state to another game state when “big hit” is won as a result of the jackpot lottery. In the present embodiment, a plurality of types of “hit” are provided, and the gaming state thereafter changes according to the type of “hit” won. The “big hit” provided in the present embodiment will be described below.

(Description of jackpot type)
In the present embodiment, "per length with high probability time", "per length with normal time", "short per time with high probability", "short per time with normal time", "short per time without high time", " There are six types of big hits, “normal short and short short hits”.

  "Per length with a high probability of shortening" means that three game values are given. When this “per-long with high probability” is selected, the first gaming value becomes the “long-hitting gaming state”, and the player can acquire a large amount of prize balls. When this “long-run gaming state” ends, the game progresses in the “high probability gaming state” as the second gaming value, and in the “short-time gaming state” as the third gaming value. The game progresses. As a result, the player can win a large number of prize balls, and after winning the prize balls, can reduce the consumption of the game balls and realize a big win again early. In the present embodiment, the “high probability gaming state” and the “short-time gaming state” are continued until the special symbol variation display is performed a maximum of 10,000 times. Therefore, from the viewpoint of the probability, the “high probability gaming state” and the “time-short gaming state” will continue until the jackpot is won again.

“Regular per length with a short time” means that two game values are given. When this “ordinary length with a short time” is won, the first gaming value is the above “long gaming state”, and the player can acquire a large amount of prize balls. Further, when the “long hit gaming state” ends, the game proceeds in the “short time gaming state” as the second gaming value. However, it is different from the above “per length with high probability time reduction” in that the game proceeds in the “low probability gaming state” instead of the “high probability gaming state” after the “long winning gaming state”. In the present embodiment, when winning the “ordinary time with short time” wins and becomes “short time game state”, when the special symbol variation display is performed up to 100 times, the “short time game state” is displayed. Is finished.
As described above, in the present embodiment, after the “long hit gaming state” in which a large amount of prize balls can be obtained, the game progresses in the “high probability gaming state” with a high jackpot winning probability. And a long win in which the game progresses in a “low probability gaming state” in which the winning probability of the jackpot is low.

  "Short win with high probability short-time" means that the gaming state shifts to the above "short winning gaming state", and after the "short winning gaming state" ends, "high-probable gaming state" and "short-short gaming state" The game progresses at. If you win this short chance with high probability, you will not be able to win a large amount of prize balls immediately, but the subsequent gaming state will be a “high probability gaming state”, The chance to win a prize ball increases. In addition, when winning “short win with high probability”, it will be in “short-time gaming state” after the short winning game ends, so it is possible to reduce the consumption of game balls until winning a big win again . In addition, even when this “short win with high probability time reduction” is won, the above “high probability gaming state” and “time saving gaming state” continue until the special symbol variation display is performed 10,000 times at the maximum.

  “Short win with normal time” means that the gaming state shifts to the above “short winning gaming state”, and after the “short winning gaming state”, the game progresses in “shorter gaming state”. is there. As in the case of “Short per win with high probability” above, since the subsequent game state is “Time-short game state”, the consumption of game balls should be reduced until the special symbol is displayed 100 times. Is possible. In addition, in the “low probability gaming state”, when “winning with a short time with normal time” is won, it will only enjoy the advantage that the game can proceed in the “short time gaming state” thereafter. In the “high probability gaming state”, if the winning “short win with normal time” is won, there is a demerit that the player falls into the “low probability gaming state”.

  In the present embodiment, both the “short win with normal time” and “short win with high probability” have the opening / closing operation of the big prize opening 11 and the second start port 10 after shifting to the “short game state”. The same opening / closing operation. Also, as will be described later, the production contents are the same for “short win with normal time” and “short win with high probability”. Therefore, it is very difficult for the player to determine whether the game state is the “high probability game state” or the “low probability game state” after the end of the “short hit game state”. Yes. In this way, by providing “short win with normal time”, the player has doubts about whether the gaming state is “high probability gaming state” or “low probability gaming state”. It is possible to enhance the interest of the game.

  “Short per hit without high-probability time” refers to “high-probability gaming state” after the “short-winning gaming state” ends, as in the above “short win with high probability time-short”. However, this “high probability short-time short win” is different from the above “high probability short-time short hit” in that it does not become a “short-time gaming state” after the short-winning game ends. Even if this “high probability short / no short win” is won, a large number of prize balls cannot be obtained immediately. In addition, since it does not become the “short-time gaming state” thereafter, the consumption of the gaming ball is larger than the “short hit with high probability short-time”. However, since the subsequent gaming state becomes the “high probability gaming state”, in the subsequent games, there is a high possibility of winning a large amount of prize balls by winning per long game. In addition, even when this “high probability short-time short win” is won, the “high-probability gaming state” continues until the special symbol change display is performed a maximum of 10,000 times.

  “Normal short no short hit” means that after the “short win gaming state” ends, the game proceeds in the “low probability gaming state”. In other words, even if the “normal short-time short win” is won, neither the “high probability gaming state” nor the “short-time gaming state” is transferred. In addition, since it is impossible to obtain a large number of prize balls depending on the short win game, the player is hardly given the game value due to the big win. The reason for providing such “normal time short hits” is mainly to return the gaming state from the “high probability gaming state” to the “low probability gaming state” without paying out a prize ball. In addition, even if the “low probability short win” in the “low probability gaming state” is won, the gaming state does not change at all. Therefore, if the player is not able to distinguish between “high chance short / short short hit” and “normal short / short short hit”, is the “high probability gaming state” after the short win game ended? It is possible to raise the interest of the game by making the player have doubts about whether or not it is in the “low probability gaming state”.

  In this embodiment, “small hit” is provided separately from “big hit”, and when “small hit” is won, the subsequent gaming state becomes “small bonus gaming state”. However, when the “small hit” is won, the gaming state such as the “high probability gaming state” or the “short time gaming state” is not changed after the “small hit gaming state” ends. For example, when “small hit” is won in the “high probability gaming state”, the “high probability gaming state” continues even after the “small hit gaming state” ends.

  Next, the progress of the game in the gaming machine 1 will be described using a flowchart.

(Main processing of main control board)
The main process of the main control board 101 will be described with reference to FIG.

  When power is supplied from the power supply board 107, a system reset occurs in the main CPU 101a, and the main CPU 101a performs the following main processing.

  First, in step S1, the main CPU 101a sets permission to access the main RAM 101c.

  In step S2, the main CPU 101a determines whether or not the RAM clear switch 101d is on. If the RAM clear switch 101d is determined to be on, the main CPU 101a shifts the processing to step S10 to perform RAM clear. On the other hand, if the RAM clear switch is not determined to be on, the process proceeds to step S3.

  In step S3, the main CPU 101a creates a checksum of the main RAM 101c when the power is turned on, and compares the created checksum of the main RAM 101c when the power is turned on with the checksum of the main RAM 101c when the power is turned off. . If they match, it is determined to be normal, and the process proceeds to step S5. If they do not match, it is determined to be an error, and the process proceeds to step S8.

  In step S5, the main CPU 101a loads the value of the gaming state information from the gaming state storage area being backed up.

  In step S6, as shown in FIG. 5A, the main CPU 101a determines a power failure recovery command based on the loaded gaming state, and sets the determined power failure recovery command in the transmission buffer.

  In step S7, the main CPU 101a sets an initial value in the work area of the main RAM 101c that requires an initial value at the time of power failure and power recovery, and performs a RAM setting process when backup is valid.

  In step S8, the main CPU 101a clears the use area of the main RAM 101c. In this embodiment, the main CPU 101a that performs the process of step S2 for determining whether or not the RAM clear switch 101d is turned on and step S10 for performing the RAM clear when it is determined that the RAM clear switch 101d is turned on, Constitute.

  In step S9, the main CPU 101a sets an initial value in the work area of the main RAM 101c that requires an initial value at the time of initialization, and performs setting processing of the main RAM 101c when backup is not valid.

  In step S10, the main CPU 101a sets a power-on designation command in the transmission buffer, as shown in FIG.

  In step S11, the main CPU 101a transmits the command set in the transmission buffer to the effect control board 102. That is, a power-on designation command is transmitted to the effect control board 102.

  In step S12, the main CPU 101a waits until the RAM clear switch 101d is pressed again, and when the RAM clear switch 101d is pressed again, the process moves to step S13.

  In step S13, the main CPU 101a sets a RAM clear start designation command in the transmission buffer, as shown in FIG.

  In step S <b> 14, the main CPU 101 a transmits the command set in the transmission buffer to the effect control board 102. That is, either the power failure recovery command or the RAM clear start designation command is transmitted to the effect control board 102. In the present embodiment, the main CPU 101a that performs the processing of Step S6 and Step S14 for setting the power failure recovery command in the transmission buffer and outputting the power failure recovery command constitutes a power failure recovery signal transmission means.

  In step S15, the main CPU 101a performs initial setting of devices around the CPU.

  In step S20, the main CPU 101a updates the random number value for variation pattern and the random number value for reach determination.

  In step S30, the main CPU 101a updates the special symbol determination initial value random number, the big hit symbol initial value random number, and the small hit symbol initial value random number. Thereafter, the processes of step S20 and step S30 are repeated until a predetermined interrupt process is performed.

(Power interruption processing of the main control board)
The power interruption interruption process of the main control board is demonstrated using FIG.

  When the power supply board 107 detects a power failure, it outputs a power interruption detection signal to the main control board 101, and the main CPU 101a performs the following power interruption interrupt processing.

  In step S40, the output port is cleared, and the drive data of the start opening / closing solenoid 10c and the special winning opening opening / closing solenoid 11c are turned off.

  In step S41, a checksum of the main RAM 101c being used is created and saved.

  In step S42, the power failure recovery start designation command is set in the transmission buffer, and the set power interruption recovery start designation command is transmitted to the effect control board 102 in the transmission buffer.

  In step S43, access to the main RAM 101c is prohibited and the contents of the main RAM 101c are protected. Then, an infinite loop is performed to prepare for power down.

(Timer interrupt processing of main control board)
The timer interrupt process of the main control board will be described with reference to FIG.
A clock pulse is generated every predetermined period (4 milliseconds) by the reset clock pulse generation circuit provided on the effect control board 101, whereby a timer interrupt process described below is executed.

  First, in step S100, the main CPU 101a saves the information stored in the register of the main CPU 101a to the stack area.

  In step S110, the main CPU 101a performs a time control process for updating the timer counter, such as a process for updating the variation time of the special symbol and a process for updating the special electric accessory release time.

In step S120, the main CPU 101a performs a random number update process for the special symbol determination random number value, the big hit symbol random number value, the small hit symbol random number value, and the hit determination random number value.
Specifically, each random number counter is incremented by 1 to update the random number counter. When the addition result exceeds the maximum value in the random number range, the random number counter is reset to 0. When the random number counter makes one round, the random number is updated from the initial random number value at that time.

  In step S130, the main CPU 101a performs an initial value random number update process of adding +1 to the special symbol determination initial value random number counter, the big hit symbol initial value random number counter, and the small hit symbol initial value random number counter to update the random number counter. .

In step S200, the main CPU 101a performs input control processing.
In this process, the main CPU 101a performs an input process for determining whether or not there is an input to the switch and an error input determination process. Details will be described later with reference to FIG.

  In step S300, the main CPU 101a performs a special figure special power control process for controlling special symbols and special electric accessories. Details will be described later with reference to FIGS.

  In step S400, the main CPU 101a performs a normal / normal power control process for controlling the normal symbol and the normal electric accessory. Details will be described later with reference to FIGS.

In step S500, the main CPU 101a performs a payout control process.
In this process, the main CPU 101a checks whether or not a game ball has won the big winning opening 11, the first starting opening 9, the second starting opening 10, and the general winning opening 7, and if there is a winning, Is sent to the payout control board 103 and the effect control board 102.

  In step S600, the main CPU 101a performs data creation processing of external information data, start opening / closing solenoid data, special winning opening opening / closing solenoid data, special symbol display device data, normal symbol display device data, and a storage number designation command.

  In step S700, the main CPU 101a performs output control processing. In this process, a port output process is performed for outputting signals of the external information data, the start opening / closing solenoid data, and the special winning opening opening / closing solenoid data created in S600. Further, in order to light each LED of the special symbol display device and the normal symbol display device, a display device output process for outputting the special symbol display device data and the normal symbol display device data created in S600 is performed. Further, command transmission processing for transmitting a command set in the transmission buffer of the main RAM 101c is also performed.

  In step S800, the main CPU 101a restores the information saved in step S100 to the register of the main CPU 101a.

  The input control process of the main control board will be described with reference to FIG.

In step S210, the main CPU 101a receives the detection signal from the general winning opening detection switch 7a to determine whether the general winning opening detection switch 7a has detected a game ball. When the main CPU 101a determines that a game ball has been detected, the main CPU 101a updates a general winning opening prize ball counter used for a prize ball.
Thereby, the general winning a prize opening detection switch input process is completed.

In step S220, the main CPU 101a receives the detection signal from the special winning opening detection switch 11a, and determines whether the special winning opening detection switch 11a has detected a game ball. When the main CPU 101a determines that a game ball has been detected, the main CPU 101a updates the big prize opening prize ball counter used for the prize ball, and the big prize opening number counter in the storage area for the big prize opening entrance (C).
Further, when the main CPU 101a determines that a game ball has been detected, the main CPU 101a sets the big prize opening prize designation command in the transmission buffer so that the big prize opening prize designation command is transmitted to the effect control board 102.
Thereby, the special winning opening detection switch input processing is completed.

In step S230, the main CPU 101a receives the detection signal from the first start port detection switch 9a, and determines whether the first start port detection switch 9a has detected a game ball. When the main CPU 101a determines that a game ball has been detected, the main CPU 101a updates the starting opening prize ball counter used for the prize ball, and also obtains a special symbol determination random number value, a jackpot symbol random number value, and a small bonus symbol random number value. The extracted random number value is stored in the special symbol holding number (U) storage area.
Further, when the main CPU 101a determines that a game ball has been detected, the main CPU 101a sets the first start opening prize designation command in the transmission buffer so that the first start opening prize designation command is transmitted to the effect control board 102.
Thereby, the first start port detection switch input process ends.

In step S240, the main CPU 101a determines whether the second start port detection switch 10a has detected a game ball by receiving a detection signal from the second start port detection switch 10a. When the main CPU 101a determines that a game ball has been detected, the main CPU 101a updates the starting opening prize ball counter used for the prize ball, and also obtains a special symbol determination random number value, a jackpot symbol random number value, and a small bonus symbol random number value. The extracted random number value is stored in the special symbol holding number (U) storage area.
Further, when the main CPU 101a determines that a game ball has been detected, the main CPU 101a sets the second start opening prize designation command in the transmission buffer so that the second start opening prize designation command is transmitted to the effect control board 102.
Thereby, the second start port detection switch input process ends.

In step S250, the main CPU 101a determines whether or not the gate detection switch 8a has detected a signal, that is, whether or not the game ball has passed through the normal symbol gate 8. If it is determined that the gate detection switch 8a is ON, it is determined whether or not the normal symbol hold count (G) stored in the normal symbol hold count (G) storage area is less than four. When the number (G) is less than 4, “1” is added to and stored in the normal symbol hold count (G) storage area.
Next, the main CPU 101a acquires a hit determination random number value from a random number range (for example, 0 to 250) prepared in advance. The acquired random number for hit determination is stored in the normal symbol holding storage area.
Further, when the main CPU 101a determines that the gate detection switch 8a is ON, the main CPU 101a sets the gate passage designation command in the transmission buffer so that the gate passage designation command is transmitted to the effect control board 102.
Thereby, the gate detection switch input process ends.

In step S260, the main CPU 101a confirms whether or not the count detection signal of the payout ball count switch is received from the payout control board 103. When the count detection signal of the payout ball count switch is received from the payout control board 103, the payout counter is updated.
Further, the main CPU 101 a transmits a payout ball count signal to the effect control board 102 when receiving the count detection signal of the payout ball count switch. Thus, the payout number storage process is completed.

In step S900, the main CPU 101a performs error determination processing.
Details will be described later with reference to FIG.

  The error determination process for the main control board will be described with reference to FIG.

  First, in step S910, the main CPU 101a checks the gaming state signal and confirms the received gaming state signal.

  In step S920, the main CPU 101a checks whether a door opening switch signal is received as a gaming state signal. If the door opening switch signal has been received, in step S930, the main CPU 101a sets a door opening designation command in the transmission buffer so that door opening information is transmitted to the effect control board 102.

  In step S940, the main CPU 101a checks whether or not a glass holding switch signal is received as a gaming state signal. If the glass holding switch signal has been received, in step S950, the main CPU 101a sets a no glass holding designation command in the transmission buffer so that information that the glass is not held on the effect control board 102 is transmitted. When this process ends, the error determination process ends.

  The special figure special electric control process will be described with reference to FIG.

  First, in step S301, the value of special figure special processing data is loaded, the branch address is referenced from the special figure special processing data loaded in step S302, and if special figure special processing data = 0, special symbol variation processing (step S310). ), The process moves to the special symbol stop process (step S320) if the special figure special process data = 1, and the special game process process (step S330) if the special figure special process data = 2. If the special figure special electric processing data = 3, the process moves to the short hit game process (step S340), and if the special figure special electric treatment data = 4, the process moves to the small hit game process (step S350). If special electric processing data = 5, the processing is shifted to the big hit game ending processing (step S360). Details will be described later with reference to FIGS.

  The special symbol variation process will be described with reference to FIG.

  First, in step S310-1, the main CPU 101a determines whether or not special figure special electricity processing data = 0. If the special figure special power processing data is not 0, the special symbol variation processing is terminated, and if the special figure special power processing data = 0, the process proceeds to step S310-2.

  In step S <b> 310-2, the main CPU 101 a determines whether or not a special symbol variation display is being performed.

  In step S310-3, when the special symbol is not changing, the main CPU 101a determines whether or not the number of special symbols held (U) stored in the special symbol holding number (U) storage area is 1 or more. To do. More specifically, it is determined whether at least one first hold or second hold is reserved. If neither the first hold nor the second hold is stored, the special symbol variation process is terminated and the next subroutine is executed.

  In step S310-4, if the main CPU 101a determines in step S310-3 that the number of special symbol hold (U) is “1” or more, it is stored in the special symbol hold number (U) storage area. The new hold number (U) obtained by subtracting “1” from the current value (U) is stored.

  In step S310-5, the main CPU 101a performs a shift process on the data stored in the special symbol storage area. Specifically, each data stored in the first storage unit to the eighth storage unit is shifted to the previous storage unit. For example, data stored in the fifth storage unit is shifted to the fourth storage unit. At this time, the data stored in the first storage unit is written into the predetermined processing area and is erased from the special symbol holding storage area.

  In step S311, the main CPU 101a executes a jackpot determination process based on the data written in the predetermined processing area in step S310-5.

  Here, the jackpot determination process will be described with reference to FIG.

  In step S311-1, the main CPU 101a determines whether or not a flag is turned on in the high probability game flag storage area. The case where the flag is turned on in the high probability game flag storage area is a case where the current gaming state is a high probability gaming state.

  In step S311-2, when the main CPU 101a determines that the current gaming state is a high probability gaming state, the main CPU 101a selects a “high probability random number determination table”.

  If the main CPU 101a determines in step S311-3 that the current gaming state is not the high probability gaming state (low probability gaming state), the main CPU 101a selects the “low probability random number determination table”.

In step S311-4, the main CPU 101a uses the special symbol determination random number value written in the processing area in step S310-5 as the “high probability random number determination” selected in step S311-2 or step S311-3. The determination is made based on the “table” or “low probability random number determination table”.
More specifically, with reference to the jackpot determination table in FIG. 4A, it is determined whether the game is “big hit”, “small hit”, or “losing” based on the special symbol determination random number value and the gaming state. The

  In step S <b> 311-5, the main CPU 101 a determines whether or not the jackpot determination is made as a result of the jackpot determination in step S <b> 311-4. If it is determined to be a big hit, the process proceeds to step S311-6, and if it is not determined to be a big hit, the process proceeds to step S311-9.

In step S311-6, the main CPU 101a determines the jackpot symbol random number value written in the processing area in step S310-5, determines the special symbol type in step S311-7, and determines the determined special symbol. Set the data.
Specifically, with reference to the symbol determination table of FIG. 4B-1 or FIG. 4B-2, the type of special symbol is determined based on the jackpot symbol random value.
The determined special symbol is used to determine “long win” or “short win” in the special symbol stop process of FIG. 15 as described later, and after the big hit in the jackpot game end process of FIG. Used to determine the game state of the game.

  In step S <b> 311-8, the main CPU 101 a sets an effect symbol designating command corresponding to the special symbol for jackpot in the transmission buffer in order to transmit data corresponding to the special symbol to the effect control board 102.

  In step S311-9, if the main CPU 101a does not determine a big hit in step S311-5, the main CPU 101a determines whether or not a big hit is determined. If it is determined to be a small hit, the process proceeds to step S311-10. If it is not determined to be a small hit, the process proceeds to step S311-12.

In step S311-10, the main CPU 101a determines the random number value for the small hit symbol written in the processing area in step S310-5, determines the special symbol type, and sets the determined special symbol data. .
Specifically, referring to the symbol determination table of FIG. 4B-3, the type of the special symbol is determined based on the random number value for the small hit symbol. In the present embodiment, “small hit 1” and “small hit 2” are provided as the types of “small hit”. However, regardless of which “small hit” is won, the contents of the small hit game executed thereafter are exactly the same. In “small hit 1” and “small hit 2”, the special symbol display device 19, Only the special symbol stopped and displayed at 20 is different.

  In step S <b> 311-11, the main CPU 101 a sets an effect symbol designation command corresponding to the special symbol for small hits in the transmission buffer in order to transmit data corresponding to the special symbol to the effect control board 102.

  In step S311-12, the main CPU 101a determines a special symbol for losing, and sets the determined special symbol for losing.

In step S <b> 311-13, the main CPU 101 a sets an effect symbol designation command corresponding to the special symbol for loss in the transmission buffer in order to transmit data corresponding to the special symbol to the effect control board 102.
As described above, the main CPU 101a that performs the jackpot determination process of FIG. 14 constitutes a special game determination unit. In addition, since the gaming state is determined by the type of special symbol, in the present embodiment, step S311-8, step S310-11, step S311 for setting an effect symbol designation command in the transmission buffer and outputting the effect symbol designation command. The main CPU 101a that performs the processes of -13 and step S700 constitutes a gaming state signal transmission unit.

When the jackpot determination process is completed as described above, the description is returned to the special symbol variation process shown in FIG. 13 and step S312 is described. In step S312, the main CPU 101a performs a variation pattern selection process.
The variation pattern selection process acquires a variation pattern random value and a reach determination random value, and based on the big hit determination result, the small hit determination result, the variation pattern random value, and the reach determination random value, the variation pattern To decide.

  In step S313, the main CPU 101a sets a variation pattern designation command corresponding to the determined variation pattern in the transmission buffer. This change pattern designation command includes at least information related to the jackpot determination result of “big win”, “small win”, and “losing”, and the special symbol change time and production mode (reach with reach or production without reach). Have such information.

  In step S314, the main CPU 101a confirms the gaming state at the start of the change, and sets a gaming state designation command corresponding to the current gaming state in the transmission buffer.

  In step S315, the main CPU 101a starts the special symbol variable display on the special symbol display device 19 or 20. That is, when the information written in the processing area relates to the first hold, the special symbol display device 19 blinks, and when the information relates to the second hold, the special symbol display device 20 blinks.

  In step S316, when the main CPU 101a starts displaying the variation of the special symbol as described above, the variation time counter (counter value) based on the variation pattern determined in step S312 is set in the variation time counter. The variation time counter is subtracted every 4 ms in S110.

  In step S310-6, the main CPU 101a determines whether or not the variation time set in step S316 has elapsed (whether or not the variation time counter = 0). As a result, if it is determined that the set time has not elapsed, the special symbol variation process is terminated and the next subroutine is executed.

  In step S310-6, when the main CPU 101a determines that the set time has elapsed, in the routine process (special symbol variation process) before the special symbol variation process, the steps S311-7 and S311-10 are performed. The special symbol set in S311-12 is stopped and displayed on the special symbol display devices 19 and 20. As a result, the jackpot determination result is notified to the player.

  In step S317, the main CPU 101a sets 1 to the special symbol special electric processing data, and moves the processing to the special symbol stop processing shown in FIG.

  The special symbol stop process will be described with reference to FIG.

  First, in step S320-1, the main CPU 101a determines whether or not special figure special electricity processing data = 1. If the special figure special electricity processing data is not 1, the special symbol stop process is terminated. If the special figure special electricity treatment data is 1, the process proceeds to step S320-2.

  In step S320-2, the main CPU 101a determines whether or not a flag is turned on in the time-saving game flag storage area. The case where the flag is turned on in the time-short game flag storage area is a case where the current game state is the time-short game state.

  In step S320-3, when the current gaming state is the short-time gaming state, the main CPU 101a subtracts "1" from (J) stored in the remaining number of fluctuations (J) storage area of the short-time gaming state. The calculated value is stored as a new remaining fluctuation count (J).

  In step S320-4, the main CPU 101a determines whether or not the remaining number of fluctuations (J) = 0. If the remaining fluctuation count (J) = 0, the process proceeds to step S320-5. If the remaining fluctuation count (J) = 0 is not satisfied, the process proceeds to step S320-6.

  In step S320-5, when the remaining number of changes (J) = 0, the main CPU 101a turns off the flag stored in the short time game flag storage area. Note that the remaining variation number (J) becomes “0” means that the special symbol variation display in the short-time gaming state is performed a predetermined number of times and the short-time gaming state is ended.

  In step S320-6, the main CPU 101a determines whether or not a flag is turned on in the high probability game flag storage area. The case where the flag is turned on in the high probability game flag storage area is a case where the current gaming state is a high probability gaming state. If the flag is turned on in the high probability game flag storage area, the process proceeds to step S320-7. If the flag is turned off in the high probability game flag storage area, the process proceeds to step S320-10. Transfer.

  In step S320-7, when the current gaming state is the high probability gaming state, the main CPU 101a stores “1” from (X) stored in the remaining variation count (X) storage area of the high probability gaming state. Is stored as a new remaining number of fluctuations (X).

  In step S320-8, the main CPU 101a determines whether or not the remaining number of fluctuations (X) = 0. If it is determined that the remaining number of changes (X) = 0, the process proceeds to step S320-9. If it is determined that the remaining number of changes (X) = 0 is not satisfied, the process proceeds to step S320-10. Move.

  In step S320-9, when the remaining number of changes (X) = 0, the main CPU 101a turns off the flag stored in the high probability game flag storage area. Note that the number of remaining fluctuations (X) being “0” means that the special symbol fluctuation display in the high probability gaming state is performed a predetermined number of times and the high probability gaming state is terminated.

  In step S320-10, the main CPU 101a confirms the current gaming state and sets a gaming state designation command in the transmission buffer.

  In step S320-11, the main CPU 101a determines whether or not it is a big hit. Specifically, it is determined whether or not the special symbol set in S311-7, S311-10, S311-12 is a jackpot symbol (special symbols A, B, C, D, E, F). . If it is determined that the jackpot symbol is determined, the process proceeds to step S320-12. If it is not determined that the jackpot symbol is determined, the process proceeds to step S320-15.

  In step S320-12, the main CPU 101a determines whether or not it is a small hit. Specifically, it is determined whether or not the special symbol set in S311-7, S311-10, and S311-12 is a small bonus symbol (special symbols G and H). If it is determined that the symbol is a small hit symbol, the process proceeds to step S320-13. If it is not determined to be a small symbol, the process proceeds to step S320-14.

  In step S320-15, the main CPU 101a determines whether or not the long winning symbol. Specifically, it is determined whether or not the type of the special symbol set in S311-7, S311-10, and S311-12 is a long winning symbol (special symbols A and B). If it is determined that the symbol is long, the process proceeds to step S320-16. If the symbol is not determined to be long, the process proceeds to step S320-17.

  In step S320-13, the main CPU 101a sets 4 in the special figure special electricity processing data, and shifts the processing to the small hit game processing shown in FIG.

  In step S320-14, the main CPU 101a sets 0 to the special symbol special processing data, and shifts the processing to the special symbol variation processing shown in FIG.

  In step S320-16, the main CPU 101a sets 2 in the special figure special electricity processing data, and shifts the processing to the long hit game processing shown in FIG.

  In step S320-17, the main CPU 101a sets 3 in the special figure special processing data, and shifts the processing to the short hit game processing shown in FIG.

  The long hit game process will be described with reference to FIG.

  First, in step S330-1, the main CPU 101a determines whether or not special figure special electricity processing data = 2. If it is not special figure special power processing data 2, the long hit game processing is terminated, and if special figure special power processing data = 2, the process proceeds to step S330-2.

  In step S330-2, the main CPU 101a determines whether an opening command has already been transmitted.

  In step S330-3, when the main CPU 101a determines that the opening command has not yet been transmitted, the main CPU 101a sets the long hitting opening command in the transmission buffer.

  In step S330-4, the main CPU 101a sets the opening time in the opening timer counter. Note that the opening timer counter is subtracted every 4 ms in step S110.

  In step S330-5, when determining that the opening command has already been transmitted, the main CPU 101a determines whether or not the opening command is currently being opened.

In step S330-6, if the main CPU 101a determines that the opening is currently in progress, the main CPU 101a determines whether a preset opening time has elapsed. That is, it is determined whether or not the opening timer counter = 0, and when the opening timer counter = 0, it is determined that the opening time has elapsed. Further, as will be described later, it is determined in step 330-12 that the interval is in progress, and it is also determined whether or not the interval time set in step S330-18 has elapsed. The interval time is also determined by whether or not the interval timer counter = 0 as in the opening time.
As a result, when the set time has not elapsed, the game processing per long is finished and the next subroutine is executed.

  In step S330-7, when the main CPU 101a determines that the set time has elapsed, the main CPU 101a clears the special winning opening entrance number (C) storage area.

  In step S330-8, the main CPU 101a adds “1” to the current round game number (R) stored in the round game number (R) storage area and stores it. If it is determined that the opening is currently in progress and the set opening time has elapsed, nothing is stored in the round game count (R) storage area. That is, since no round game has been performed yet, “1” is stored in the round game count (R) storage area.

  In step S330-9, the main CPU 101a sets a round start command in the transmission buffer in order to transmit the start information of the round game in the main control board 101 to the effect control board 102. When the effect control board 102 receives a round start command in the long hit gaming state, an effect display is performed, for example, “fifth round”. Even if the effect control board 102 receives the round start command in the short hit gaming state, no control for the effect is performed.

  In step S330-10, the main CPU 101a starts energization of the big prize opening / closing solenoid 11c and opens the big prize opening / closing door 11b.

  In step S330-11, the main CPU 101a sets the opening timer counter of the main RAM 101c to a value that is 29 seconds as the opening time of the special prize opening / closing solenoid 11c. The release timer counter is subtracted every 4 ms in step S110.

In step S330-12, when the main CPU 101a determines that the opening is not in progress in step S330-5, the main CPU 101a determines whether or not it is currently in the interval. As will be described later in detail, the interval here is a pause time set between round games and is set to 2 seconds in this embodiment. Therefore, if it is determined that the interval is in progress, it is determined in step S330-6 whether or not the interval time of 2 seconds has elapsed. If the set time (2 seconds) has not elapsed, the long win is determined. The game process ends and the next subroutine is executed.
On the other hand, when the set time has elapsed, the processes of steps S330-7 to S330-11 are executed as processes for starting the next round game.

  In step S330-13, if the main CPU 101a determines that the interval is not in progress, the main CPU 101a determines whether the ending is currently in progress. Ending here refers to processing after all preset round games have been completed. Therefore, if it is determined that the ending is currently in progress, it is determined in step S330-21 whether or not the set ending time has passed. If it is determined that the set time has passed, step S330- In 23, the main CPU 101a sets 5 to the special figure special electric processing data, and shifts the processing to the jackpot game end process shown in FIG. On the other hand, if it is determined in step S330-22 that the set time has not elapsed, the long hit game process is terminated.

  In step S330-14, if it is determined that the ending is not in progress, the main CPU 101a determines whether or not the set release time has elapsed (whether or not the release timer counter = 0).

In step S330-15, the main CPU 101a determines whether or not the value of the special winning opening entrance counter (C) has reached a predetermined number (9).
Here, if the set opening time has not elapsed and the winning prize opening counter (C) has not reached the predetermined number, the long hit game process is terminated as it is, If the number of the winning counters (C) has reached the predetermined number, the process proceeds to step S330-16 to close the big winning opening.

  In step S330-16, the main CPU 101a has entered a predetermined number (for example, 9) of game balls into the big winning opening 11 when the set opening time has elapsed or even within the set opening time. In this case, the energization of the special winning opening / closing solenoid 11c is stopped. As a result, the big prize opening is closed.

  In step S330-17, when the main CPU 101a stops energizing the special prize opening / closing solenoid 11c, the main CPU 101a determines whether or not the round game number (R) stored in the round game number (R) storage area is the maximum. . In the long hit game process, “15” is stored in the main RAM 101c as the maximum number of round games. The main CPU 101a compares the data stored in the main RAM 101c with the round game count (R) stored in the round game count (R) storage area, so that the round game count (R) is maximized. It is determined whether or not.

  In step S330-18, when the main CPU 101a determines that the number of round games (R) is not the maximum, the main CPU 101a sets an interval time. In this embodiment, since the interval from the end of the round game to the start of the next round game is 2 seconds, a counter corresponding to 2 seconds is set in the interval timer counter of the main RAM 101c. The interval timer counter is subtracted every 4 ms in step S110.

  In step S330-19, when the main CPU 101a determines that the round game number (R) has reached the maximum, the main CPU 101a resets the round game number (R) stored in the round game number (R) storage area.

  In step S330-20, the main CPU 101a sets an ending command in the transmission buffer in order to transmit the jackpot game end information to the effect control board 102.

  In step S330-21, the main CPU 101a sets a counter corresponding to the time required for ending, that is, the ending time (for example, 5 seconds), in the ending timer counter of the main RAM 101c. The ending timer counter is subtracted every 4 ms in step S110.

  In step S330-23, the main CPU 101a sets 5 to the special figure special power processing data, and shifts the processing to the jackpot game end processing shown in FIG. On the other hand, if it is determined in step S330-22 that the set time has not elapsed, the long hit gaming process is terminated.

  The short hit game process will be described with reference to FIG.

  First, in step S340-1, the main CPU 101a determines whether or not special figure special processing data = 3. If the special figure special electric processing data is not 3, the short hit game process is terminated, and if the special figure special electric treatment data is 3, the process proceeds to step S340-2.

  In step S340-2, the main CPU 101a determines whether an opening command has already been transmitted.

  In step S340-3, when the main CPU 101a determines that the opening command has not been transmitted yet, the main CPU 101a sets the short hit opening command in the transmission buffer.

  In step S340-4, the main CPU 101a sets the opening time in the opening timer counter. Note that the opening timer counter is subtracted every 4 ms in step S110.

  In step S340-5, when determining that the opening command has already been transmitted, the main CPU 101a determines whether or not the opening command is currently being opened.

In step S340-6, when the main CPU 101a determines that the opening is currently in progress, the main CPU 101a determines whether or not a preset opening time has elapsed. That is, it is determined whether or not the opening timer counter = 0, and when the opening timer counter = 0, it is determined that the opening time has elapsed. Further, as described later, it is determined in step 340-12 that the interval is being performed, and it is also determined whether or not the interval time set in step S340-17 has elapsed. The interval time is also determined by whether or not the interval timer counter = 0 as in the opening time.
As a result, when the set time has not elapsed, the short hit game process is terminated and the next subroutine is executed.

  In step S340-7, when the main CPU 101a determines that the set time has elapsed, the main CPU 101a clears the special winning opening entrance number (C) storage area.

  In step S340-8, the main CPU 101a adds “1” to the current round game count (R) stored in the round game count (R) storage area and stores the result. If it is determined that the opening is currently in progress and the set opening time has elapsed, nothing is stored in the round game count (R) storage area. That is, since no round game has been performed yet, “1” is stored in the round game count (R) storage area.

  In step S340-9, the main CPU 101a sets a round start command in the transmission buffer in order to transmit the start information of the round game in the main control board 101 to the effect control board 102. Even if the effect control board 102 receives the round start command in the short hit gaming state, no control for the effect is performed.

  In step S340-10, the main CPU 101a starts energizing the big prize opening / closing solenoid 11c and opens the big prize opening / closing door 11b.

  In step S340-11, the main CPU 101a sets the opening timer counter of the main RAM 101c to a value that becomes 0.1 seconds as the opening time of the special winning opening opening / closing solenoid 11c. The release timer counter is subtracted every 4 ms in step S110.

In step S340-12, when the main CPU 101a determines that the opening is not being performed, the main CPU 101a determines whether or not the current interval is being performed. If it is determined that the interval is in progress, it is determined in step S340-6 whether or not the interval time of 0.1 second has elapsed, and if the set time (0.1 second) has not elapsed, The short hit game process is terminated and the next subroutine is executed.
On the other hand, when the set time has elapsed, the processes of steps S340-7 to S340-11 are executed as processes for starting the next round game.

  In step S340-13, if the main CPU 101a determines that it is not during the interval, the main CPU 101a determines whether it is currently ending. If it is determined that the current ending is in progress, it is determined in step S340-21 whether or not the set ending time has elapsed. If it is determined that the set time has elapsed, in step S340-23. The main CPU 101a sets 5 in the special figure special electric processing data, and shifts the processing to the jackpot game end process shown in FIG. On the other hand, if it is determined in step S340-22 that the set time has not elapsed, the short hit game process is terminated.

  In step S340-14, when it is determined that the ending is not in progress, the main CPU 101a determines whether or not the set release time has elapsed (whether or not the release timer counter = 0).

In step S340-15, the main CPU 101a determines whether or not the value of the big winning opening entrance counter (C) has reached a predetermined number (9).
Here, if the set opening time has not passed and the winning prize entrance counter (C) has not reached the predetermined number, the short win game processing is terminated as it is. If the number of the winning counters (C) has reached the predetermined number, the process proceeds to step S330-16 to close the big winning opening.

  In step S340-16, the main CPU 101a has entered a predetermined number (for example, 9) of game balls into the big prize opening 11 when the set opening time has elapsed or even within the set opening time. In this case, the energization of the special winning opening / closing solenoid 11c is stopped. As a result, the big prize opening is closed.

  In step S340-17, when the main CPU 101a stops energizing the special prize opening / closing solenoid 11c, the main CPU 101a determines whether or not the round game number (R) stored in the round game number (R) storage area is the maximum. . In the short hit game process, “2” is stored in the main RAM 101c as the maximum number of round games. The main CPU 101a compares the data stored in the main RAM 101c with the round game count (R) stored in the round game count (R) storage area, so that the round game count (R) is maximized. It is determined whether or not.

  In step S340-18, when the main CPU 101a determines that the number of round games (R) is not the maximum, the main CPU 101a sets an interval time. In this embodiment, since the interval from the end of the round game to the start of the next round game is 0.1 second, a counter corresponding to 0.1 second is set in the interval timer counter of the main RAM 101c. . The interval timer counter is subtracted every 4 ms in step S110.

  In step S340-19, when the main CPU 101a determines that the round game number (R) has reached the maximum, the main CPU 101a resets the round game number (R) stored in the round game number (R) storage area.

  In step S340-20, the main CPU 101a sets an ending command in the transmission buffer in order to transmit the jackpot game end information to the effect control board 102.

  In step S340-21, the main CPU 101a sets a counter corresponding to the time required for ending, that is, the ending time (for example, 5 seconds), in the ending timer counter of the main RAM 101c. The ending timer counter is subtracted every 4 ms in step S110.

In step S340-23, the main CPU 101a sets 5 in the special figure special electric processing data, and shifts the processing to the jackpot game end processing shown in FIG. On the other hand, if it is determined in step S340-22 that the set time has not elapsed, the short hit game process is terminated.
As described above, the main CPU 101a that performs the long hit game process and the short hit game process constitutes the special game control means.

  The small hit game process will be described with reference to FIG.

  First, in step S350-1, the main CPU 101a determines whether or not special figure special electricity processing data = 4. If the special figure special power processing data is not 4, the small hit game processing is terminated. If the special figure special power processing data is 4, the process proceeds to step S350-2.

  In step S350-2, the main CPU 101a determines whether an opening command has already been transmitted.

  In step S350-3, when the main CPU 101a determines that the opening command has not been transmitted yet, the main CPU 101a sets the opening command for small hits in the transmission buffer.

  In step S350-4, the main CPU 101a sets the opening time in the opening timer counter. Note that the opening timer counter is subtracted every 4 ms in step S110.

  In step S350-5, when determining that the opening command has already been transmitted, the main CPU 101a determines whether or not the opening command is currently being opened.

In step S350-6, if the main CPU 101a determines that the opening is currently in progress, the main CPU 101a determines whether or not a preset opening time has elapsed. That is, it is determined whether or not the opening timer counter = 0, and when the opening timer counter = 0, it is determined that the opening time has elapsed. Further, as will be described later, it is determined in step 350-10 that the non-operation time is in progress, and it is also determined whether or not the non-operation time set in step S350-16 has elapsed. Note that the non-operation time is also determined by whether or not the non-operation timer counter = 0 as in the opening time.
As a result, if the set time has not elapsed, the small hit game process is terminated and the next subroutine is executed.

  In step S350-7, the main CPU 101a adds “1” to the current operation count (K) stored in the small hit operation count (K) storage area and stores it.

  In step S350-8, the main CPU 101a starts energization of the big prize opening / closing solenoid 11c and opens the big prize opening / closing door 11b.

  In step S350-9, the main CPU 101a sets a value of 0.1 seconds as the operating time of the special prize opening / closing solenoid 11c in the open timer counter of the main RAM 101c. The release timer counter is subtracted every 4 ms in step S110.

In step S350-10, when the main CPU 101a determines that the opening is not in progress, the main CPU 101a determines whether or not it is during a non-operation time. If it is determined that the non-operation time is being reached, it is determined in step S350-6 whether or not the non-operation time of 0.1 seconds has elapsed, and the set time (0.1 seconds) must have elapsed. For example, the small hit game process is terminated and the next subroutine is executed.
On the other hand, when the set time has elapsed, the processes of steps S350-7 to S350-9 are executed as a process for opening the next prize winning opening.

  When determining in step S350-11 that the main CPU 101a is not in the non-operation time, the main CPU 101a determines whether or not it is currently ending. If it is determined that the ending is currently in progress, it is determined in step S350-21 whether the set ending time has elapsed. If it is determined that the set time has elapsed, in step S350-22. The main CPU 101a sets 0 in the special figure special electric processing data, and shifts the processing to the special symbol variation process shown in FIG. On the other hand, if it is determined in step S350-21 that the set time has not elapsed, the small hit game process is terminated.

  In step S350-12, when it is determined that the ending is not in progress, the main CPU 101a determines whether or not the set operation time has elapsed (whether or not the release timer counter = 0).

In step S350-13, the main CPU 101a determines whether or not the value of the special winning opening entrance counter (C) has reached a predetermined number (9).
Here, if the set operation time has not elapsed and the big winning opening entrance counter (C) has not reached the predetermined number, the small hit game processing is ended as it is, but the big winning opening is ended. If the number of the winning counters (C) has reached the predetermined number, the process proceeds to step S350-14, and the big winning opening is closed.

  In step S350-14, the main CPU 101a has entered a predetermined number (for example, nine) of game balls when the set operation time has elapsed or within the set operation time. In this case, the energization of the special winning opening / closing solenoid 11c is stopped. As a result, the big prize opening is closed.

  In step S350-15, when the main CPU 101a stops energizing the big prize opening / closing solenoid 11c, whether or not the current number of operations (K) stored in the small hit number of operations (K) storage area is the maximum. Judging. In the short hit game process, “2” is stored in the main RAM 101c as the maximum small hit operation count. The main CPU 101a compares these data stored in the main RAM 101c with the current number of operations (K) stored in the small number of operations (K) storage area, so that the small number of operations (( It is determined whether or not K) is the maximum.

  In step S350-16, if the main CPU 101a determines that the number of small hitting operations (K) is not the maximum, the main CPU 101a sets a non-operation time. In the present embodiment, the small non-operation time is set to 0.1 second as with the short interval time, so a counter corresponding to 0.1 second is set in the non-operation timer counter of the main RAM 101c. To do. Note that the non-operation timer counter is subtracted every 4 ms in step S110.

  In step S350-17, when the main CPU 101a determines that the small hit operation number (K) has reached the maximum, the main CPU 101a sets the small hit operation number (K) stored in the small hit operation number (K) storage area. Reset.

  In step S350-18, the main CPU 101a clears the winning prize opening number (C) storage area.

  In step S350-19, the main CPU 101a sets an ending command in the transmission buffer in order to transmit information on the end of the small hit game to the effect control board 102.

  In step S350-20, the main CPU 101a sets a counter corresponding to the time required for ending, that is, the ending time (for example, 5 seconds), in the ending timer counter of the main RAM 101c. The ending timer counter is subtracted every 4 ms in step S110.

  In step S340-21, the main CPU 101a determines whether or not the ending time has elapsed. When determining that the ending time has elapsed, the main CPU 101a sets 0 in the special figure special electric processing data in step S350-22. The process moves to the special symbol variation process shown in FIG. On the other hand, if it is determined in step S350-21 that the ending time has not elapsed, the small hit game process is terminated as it is.

  The jackpot game ending process will be described with reference to FIG.

  First, in step S360-1, the main CPU 101a determines whether or not special figure special electricity processing data = 5. If the special figure special power processing data is not 5, the jackpot game end processing is terminated. If the special figure special power processing data is 5, the process proceeds to step S360-2.

  In step S360-2, the main CPU 101a further determines whether the set special symbol is a high-probability jackpot symbol (special symbols A, C, E). That is, it is determined whether the set special symbol is a symbol related to one of “long per short with high probability”, “short per short with high probability” or “short per short without high probability”.

  In step S360-3, the main CPU 101a turns on the flag in the high probability game flag storage area if the set special symbol is a symbol related to a high probability jackpot.

  In step S360-4, the main CPU 101a stores, in the remaining probability count (X) storage area of the high probability gaming state, how many times the jackpot random number is determined in the “high probability random number determination table” thereafter. In the present embodiment, “10000” is stored in the upper limit fluctuation count (X).

  In step S360-5, when the main CPU 101a determines that the set jackpot symbol is a normal jackpot symbol (special symbols B, D, F), that is, the set special symbol is “normally short”. When it is determined that the symbol pertains to one of “long per short with”, “short per short with normal time”, and “short per short without normal time”, the flag in the high probability game flag storage area is turned off.

  In step S360-6, the main CPU 101a resets the data when the data is stored in the remaining fluctuation count (X) storage area of the high probability gaming state.

  In step S360-7, the main CPU 101a further determines whether or not the jackpot symbol is a jackpot symbol (special symbols A, B, C, D) with a short time. In other words, whether the set special symbol is a symbol related to one of “long per short with high probability”, “per long per short with normal”, “short per short with high probability” or “short per short with normal” to decide.

  In step S360-8, when the main CPU 101a determines that the jackpot symbol is a jackpot symbol with a time reduction, the main CPU 101a turns on a flag in the hourly game flag storage area.

In step S360-9, the main CPU 101a determines whether or not the flag is turned on in the high probability game flag storage area.
If the flag is turned on in the high probability game flag storage area, the process proceeds to step S360-10. If the flag is not turned on in the high probability game flag storage area, step S360-11 is performed. Move processing to.

  In step S360-10, when the flag is turned on in the high-probability gaming flag storage area, the main CPU 101a stores “10000” in the remaining fluctuation count (J) storage area in the short-time gaming state.

  In step S360-11, when the flag is not turned on in the high probability game flag storage area, the main CPU 101a stores "100" in the remaining fluctuation count (J) storage area of the short-time gaming state.

  In step S360-12, when the main CPU 101a determines that the jackpot symbol is a jackpot symbol without special time (special symbols E and F), that is, the set special symbol is “high probability short / short short hit. If the symbol is determined to be a symbol related to “ordinary short no short hit”, the flag is turned off in the short time game flag storage area.

  In step S360-13, the main CPU 101a clears the value (J) stored in the remaining fluctuation count (J) storage area of the short-time gaming state.

  In step S360-13, the main CPU 101a confirms the gaming state and sets a gaming state designation command in the transmission buffer.

In step S360-15, the main CPU 101a sets 0 to the special symbol special electric processing data, and shifts the processing to the special symbol variation processing shown in FIG.
As described above, the main CPU 101a that performs the jackpot game end processing for setting the high-probability gaming state flag based on the jackpot symbol constitutes the specific gaming state transition determination unit and the specific gaming state control unit.

  The ordinary power transmission control process will be described with reference to FIG.

  First, in step S401, the value of the ordinary map electric power processing data is loaded, and the branch address is referenced from the loaded ordinary electric power processing data in step S401. The process is moved to (Step S410), and if the ordinary power / general power process data = 1, the process is moved to the ordinary electric accessory control process (Step S420). Details will be described later with reference to FIGS.

  The normal symbol variation process will be described with reference to FIG.

  First, in step S410-1, the main CPU 101a determines whether or not the ordinary power transmission processing data = 0. If the ordinary map / electric power processing data = 0 is not satisfied, the normal symbol variation processing is terminated, and if the special figure / electric power processing data = 0, the processing proceeds to step S410-2.

  In step S410-2, the main CPU 101a determines whether or not the normal symbol variation display is in progress.

  In step S410-3, the main CPU 101a determines whether or not the normal symbol hold count (G) stored in the normal symbol hold count (G) storage area is 1 or more when the normal symbol fluctuation display is not being performed. To do. When the number of holds (G) is “0”, the normal symbol variation display is not performed, so the normal symbol variation process is terminated.

  In step S410-4, when the main CPU 101a determines in step S410-3 that the number of ordinary symbols held (G) is equal to or greater than “1”, the main CPU 101a stores the number in the special symbol holding number (G) storage area. A new hold number (G) obtained by subtracting “1” from the stored value (G) is stored.

  In step S410-5, the main CPU 101a performs a shift process on the data stored in the normal symbol reservation storage area. Specifically, each data stored in the first storage unit to the fourth storage unit is shifted to the previous storage unit. At this time, the data stored in the previous storage unit is written into a predetermined processing area and is erased from the normal symbol holding storage area.

  In step S410-6, the main CPU 101a determines the winning random number value stored in the normal symbol holding storage area. When a plurality of winning random numbers are stored, the winning random numbers are read in the stored order. The main ROM 101b is provided with a table for determining the winning random number, and the winning random number determination program determines whether or not the reading random number is checked against the above table. For example, according to the above table, among the random numbers from “0” to “250”, random numbers from “0” to “224” are determined to be successful, and other random numbers are determined to be lost. That is, in this embodiment, the normal symbol winning probability is set to about 90%.

In step S410-7, the main CPU 101a refers to the result of determination of the winning random number in step S205. If the winning determination is made, the main CPU 101a sets the winning symbol in step S410-8 and determines that it is lost. In this case, a lost symbol is set in step S410-9.
Here, the winning symbol is a symbol in which the LED is finally turned on in the normal symbol display device 21, and the lost symbol is a symbol in which the LED is finally turned off without being turned on. The winning symbol set is to store a command to turn on the LED in the normal symbol display device 21 in a predetermined storage area, and the lost symbol set is a command to turn off the LED in the normal symbol display device 21. Is stored in a predetermined storage area.

  In step S410-10, the main CPU 101a determines whether or not a flag is turned on in the time-saving game flag storage area. When the flag is turned on in the short-time game flag storage area, the game state is in the short-time game state, and when the flag is not turned on, the game state is in the non-short-time game state. Is the time.

  If the main CPU 101a determines that the flag is turned on in the short time game flag storage area, the main CPU 101a sets a counter corresponding to 3 seconds to the normal symbol variation time counter in step S410-11, and the short time game flag is set. If it is determined that the flag is not turned on in the storage area, a counter corresponding to 29 seconds is set in the normal symbol variation time counter in step S410-12. By the processing of step S410-11 or step S410-12, the time for displaying the normal symbol variation is determined. The variable time counter is subtracted every 4 ms in step S110.

  In step S410-13, the main CPU 101a starts normal symbol fluctuation display on the normal symbol display device 21. The normal symbol variation display is to flash the LED at a predetermined interval in the normal symbol display device 21 and give the player an impression as if it is currently being drawn. This normal symbol variation display is continuously performed for the time set in step S410-11 or step S410-12.

  In step S410-14, the main CPU 101a sets a normal symbol operation start command in the transmission buffer to transmit information indicating that the normal symbol display device operates to the effect control board 102, and the normal symbol variation process is completed. To do.

  In step S410-15, if the main CPU 101a determines in step S410-2 that the normal symbol variation display is being performed, the main CPU 101a determines whether or not the set variation time has elapsed. That is, the set variation time counter is subtracted every 4 ms, and it is determined whether the variation time counter is zero. As a result, if it is determined that the set variation time has not elapsed, it is necessary to continue the variation display as it is, so the normal symbol variation process is terminated and the next subroutine is executed.

  In step S410-16, when the main CPU 101a determines that the set fluctuation time has elapsed, the main CPU 101a stops the fluctuation of the normal symbol in the normal symbol display device 21. At this time, the normal symbol display device 21 stops and displays the normal symbol (winning symbol or lost symbol) set by the previous routine processing. As a result, the result of the normal symbol lottery is notified to the player.

  In step S410-17, the main CPU 101a determines whether or not the set normal symbol is a winning symbol. If the set normal symbol is a winning symbol, the main CPU 101a determines whether or not the normal symbol that has been set is a winning symbol in step S410-18. Fig. Ordinary power processing data = 1 is set, and the processing is shifted to the normal electric accessory control processing. If the set normal symbol is a lost symbol, the normal symbol variation processing is terminated as it is. In the present embodiment, the main CPU 101a that performs normal symbol variation processing constitutes a display control means.

  The normal electric accessory control process will be described with reference to FIG.

  First, in step S420-1, the main CPU 101a determines whether or not the ordinary power transmission processing data = 1. If the ordinary power transmission process data is not 1, the normal electric utility control process is terminated. If the ordinary power transmission process data is 1, the process proceeds to step S420-2.

  In step S420-2, the main CPU 101a determines whether or not the time-saving game flag is turned on in the time-saving game flag storage area.

  In step S420-3, if the main CPU 101a determines that the time-saving game flag is ON in the time-saving game flag storage area, that is, if the current gaming state is the time-saving gaming state, the main power release time counter Set a counter corresponding to 3.5 seconds.

In step S420-4, when the main CPU 101a determines that the time-saving game flag is not turned on in the time-saving game flag storage area, the main CPU 101a sets a counter corresponding to 0.2 seconds to the public power open time counter.
Here, the normal power release time is a time for controlling the pair of movable pieces 10b of the second starting port 10 to the second mode. In addition, the public power open time counter is subtracted every 4 ms in step S110.

  In step S420-5, the main CPU 101a starts energizing the start port opening / closing solenoid 10c. Thereby, the 2nd starting port 10 will open and it will be controlled by the 2nd mode.

  In step S420-6, the main CPU 101a sets a normal electric accessory operation start command in the transmission buffer in order to transmit information indicating that the start opening / closing solenoid 10c is operating to the effect control board 102.

  In step S420-7, the main CPU 101a determines whether or not the set public power open time has elapsed. That is, the normal power open time counter is subtracted every 4 ms, and it is determined whether or not the normal power open time counter = 0.

  In step S420-8, when it is determined that the set normal power release time has elapsed, the main CPU 101a stops energization of the start opening / closing solenoid 10c. As a result, the second starting port 10 returns to the first mode, and it becomes impossible or difficult to enter the game ball again, and the auxiliary game that has been executed ends.

  In step S420-9, the main CPU 101a sets the ordinary figure normal power processing data = 0, and shifts the processing to the normal symbol variation process of FIG.

  In step S420-10, the main CPU 101a sets a normal electric accessory operation end command in the transmission buffer in order to transmit information indicating that the operation of the start port opening / closing solenoid 10c has ended to the effect control board 102. When this process ends, the ordinary electric accessory control process ends. In the present embodiment, the main CPU 101a that performs the ordinary electric accessory control process constitutes a starting variable winning device control means.

  Next, processing executed by the payout CPU 103a in the payout control board 103 will be described.

(Main processing of payout control board)
The main process of the payout control board 103 will be described with reference to FIG.

  When power is supplied from the power supply board 107, a system reset occurs in the payout CPU 103a, and the payout CPU 103a performs the following main processing.

  In step S3001, the payout CPU 103a performs an initialization process. In this process, the payout CPU 103a reads the activation program from the payout ROM 103b and initializes a flag stored in the payout RAM 103c in response to power-on. If this process ends, the process moves to a step S3002.

  In step S3002, the payout CPU 103a loads an operation continuation flag.

  In step S3003, the payout CPU 103a performs processing for determining the loaded operation continuation flag. Specifically, when it is determined that the operation is on standby (operation continuation flag ≠ 01H), the operation continuation flag determination process is repeatedly performed until it is determined that continuation is permitted (operation continuation flag = 01H). If it is determined that the continuation is permitted, the process proceeds to S3004.

In step S3004, the payout CPU 103a sets 00H to the operation continuation flag, and moves the process to S3100.
As described above, the operation continuation flag is set to the operation continuation flag = 01H every 2 ms in the timer interrupt processing 1 described later, and the operation continuation flag = 00H is set in S3003 to perform the processing of S3100 to S3600 described later. Will do.

  In step S3100, the payout CPU 103a performs input processing of the payout ball counting switch 32, the door opening switch 33, and the glass holding switch 34. Details will be described later with reference to FIG.

In step S3200, the payout CPU 103a performs a prize ball control process. Specifically, a payout number designation command from the main control board is received and stored in the reception buffer. Thereafter, the payout number designation command stored in the reception buffer is analyzed, and the payout number is stored in the prize ball number counter.
Also, a prize ball monitoring process for monitoring the value of the prize ball number counter is performed. If the value of the prize ball number counter is zero, the data at the end of the prize ball is set, and the value of the prize ball number counter must be zero. For example, the payout data setting process is performed.

  In step S3300, the payout CPU 103a performs a ball lending control process. Specifically, it is confirmed whether or not there is a lending request from the game ball lending device (card unit). If there is a lending request, the number of payouts necessary for lending is stored in the ball lending number counter. Also, a ball lending monitoring process for monitoring the value of the ball lending number counter is performed. If the value of the ball lending number counter is zero, data at the end of the ball lending is set, and the value of the ball lending number counter must be zero. For example, the payout data setting process is performed.

  In step S3400, the payout CPU 103a performs payout control processing. Specifically, in either the prize ball monitoring process or the ball lending monitoring process, a payout determination process is performed to determine whether the payout data is set. If the payout data is set, the payout start data is set, If the payout data is not set, the payout stop data is set.

  In step S3500, the payout CPU 103a performs a firing control data creation process. Specifically, it checks whether or not the game ball lending device (card unit) is connected, and if the game ball lending device (card unit) is connected, the launch control allows the launch device to fire the game ball Set the data.

In step S3600, the payout CPU 103a performs output control processing. Specifically, firing motor data for driving the payout motor to the output port and launch control data permitting the launching device to launch the game ball are output.
Further, lending-related data is output to the game ball lending device (card unit), and door opening switch data, glass holding switch data, and paying ball count switch data are output to the main control board 101. If this process ends, the process returns to step S3002.

  The timer interrupt process of the payout control board 103 will be described with reference to FIG.

(Timer interrupt processing 1 of payout control board)
With reference to FIG. 24A, the timer interruption process 1 of the payout control board will be described. Timer interrupt processing 1 is executed by generating a clock pulse every first cycle (for example, 2 milliseconds) by a reset clock pulse generation circuit provided on the payout control board.

  In step S3700, the payout CPU 103a sets 01H to the operation continuation flag in order to permit the operation to be continued. When this process is finished, the timer interrupt process 1 is finished.

(Timer interrupt processing 2 of the payout control board)
With reference to FIG. 24B, the timer interruption process 2 of the payout control board will be described. Similarly to the timer interrupt process 1 described above, a reset clock pulse generation circuit provided on the payout control board is used every second period (eg, 3.12 milliseconds) different from the first period of the timer interrupt process 1. When the clock pulse is generated, the timer interrupt process 2 is executed.

  First, in step S3800, the payout CPU 103a saves the information stored in the register of the payout CPU 103a in the stack area.

  In step S3810, the payout CPU 103a determines the drive of the payout motor. If it is determined that the payout motor is driven, the payout motor drive data is stored in the payout motor work area. When it is determined to stop, excitation control processing for stopping the payout motor is performed. After that, similarly to S3600, the output motor outputs firing motor data for driving the payout motor and firing control data for allowing the launching device to launch the game ball.

  In step S3820, the payout CPU 103a restores the information saved in step S3800 to the register of the payout CPU 103a. When this process is finished, the timer interrupt process 2 is finished.

(Input control processing of payout control board)
The input control process of the payout control board will be described with reference to FIG.

  In step S3110, the payout CPU 103a checks whether or not the game ball has passed through the payout ball counting switch 32. If it has passed, the prize ball number counter or the ball lending number counter depends on the game ball that has been paid out. Update processing is performed.

  In step S3120, the payout CPU 103a confirms whether or not a signal is input from the door opening switch 33, and if detected, sets the door opening data in a predetermined work area.

  In step S3130, the payout CPU 103a checks whether or not a signal is input from the glass holding switch 34, and if detected, sets the glass holding switch data in a predetermined work area. When this process ends, the input control process ends.

  Next, processing executed by the sub CPU 102a in the effect control board 102 will be described.

(Main processing of production control board 102)
The main process of the effect control board 102 will be described with reference to FIG.

  When power is supplied from the power supply board 107, the sub CPU 102a undergoes a system reset, and the sub CPU 102a performs the following main processing.

  First, in step S1001, the sub CPU 102a sets permission to access the sub RAM 102c.

  In step S1002, the sub CPU 102a creates a check sum of the sub RAM 102c at power-on, and compares the created check sum of the sub RAM 102c at power on with the check sum of the sub RAM 102c at power interruption in step S1003. . If they match, it is determined to be normal, and the process proceeds to step S1004. If they do not match, it is determined to be an error, and the process proceeds to step S1010.

  In step S1004, the sub CPU 102a sets an initial value in a work area of the sub RAM 102c that requires an initial value at the time of power failure and power recovery, and performs setting processing of the sub RAM 102c when backup is valid.

  In step S1005, the sub CPU 102a performs a power interruption time determination process. In this process, the power interruption time is calculated by referring to the time (power interruption start time) set when the power interruption start command transmitted from the main control board 101 is received and the current time from the RTC 102d. In the present embodiment, the RTC 102d that updates the time to calculate the power interruption time constitutes the power interruption time measuring means.

  In step S1006, the sub CPU 102a determines whether the power interruption time calculated in step S1005 is a predetermined time or more (6 hours or more). If it is determined that the predetermined time or more has elapsed, in step S1007, the abnormality information 12 flag is set in the sub abnormality information storage area in the sub RAM 102c. In the present embodiment, the sub CPU 102a that performs the process of step S1007 for determining the power interruption time constitutes a power interruption time determination unit.

In step S1008, the sub CPU 102a checks whether any of the abnormality information 1 flag to the abnormality information 13 flag is stored in the sub abnormality information storage area of the sub RAM 102c functioning as the backup RAM, and determines the effect mode. Specifically, referring to the effect mode determination table of FIG. 6B-1, after confirming the abnormality information flag, the effect mode is newly determined based on the effect mode and the gaming state that are backed up. To do.
As described above, the effect mode indicates the notification state for the effect in relation to the gaming state, so the effect is determined based on step S1008 for determining the effect mode at the time of power failure recovery and an effect designating command to be described later. The sub CPU 102a that performs the process of step S1207 for determining the mode constitutes a notification mode determination unit.

  In step S1009, if the sub CPU 102a receives a RAM clear start designation command, the sub CPU 102a moves to step S1010 to clear the sub RAM 102c.

  In step S1010, the sub CPU 102a clears the use area of the sub RAM 102c.

  In step S1011, the initial value is set in the work area of the sub RAM 102c that requires the initial value at the time of initialization, and the setting process of the sub RAM 102c when the backup is not valid is performed.

  In step S1012, the sub CPU 102a performs initial setting of devices around the sub CPU.

  In step S1100, the sub CPU 102a performs an effect random number update process. In this process, the sub CPU 102a performs a process of updating the effect random number counter stored in the sub RAM 102c.

  In step S1200, the sub CPU 102a performs command analysis processing. In this processing, the sub CPU 102a receives a command from the main control board and stores it in the reception buffer of the sub RAM 102c. Thereafter, as will be described later with reference to FIG. 31, processing for analyzing the command stored in the reception buffer is performed.

  In step S1300, the sub CPU 102a performs display / sound control processing. In this processing, the sub CPU 102a determines data for causing the image control board 105 to perform display control of the liquid crystal display device 13 and output control of the audio output device 18 based on the effect pattern determined in the command analysis processing. And store it in the transmission buffer.

  In step S1400, the sub CPU 102a performs a lamp / effect combination control process. In this process, the sub CPU 102a causes the lamp control board 104 to perform lighting control of the effect lighting device 16 and drive control of the effect agent devices 14 and 15 based on the effect pattern determined in the command analysis process. Is determined and stored in the transmission buffer. If this process ends, the process returns to step S1100.

(Power interruption interrupt processing of production control board)
With reference to FIG. 27, the power interruption interrupt processing of the effect control board 102 will be described.

  When the power supply board detects a power failure, it outputs a power interruption detection signal to the effect control board 102, and the sub CPU 102a performs the following power interruption interrupt processing.

  In step S1601, the sub CPU 102a clears the output port and turns off the effect solenoid used in the effect accessory device.

  In step S1602, the sub CPU 102a creates and stores a checksum of the sub RAM 102c being used.

In step S1603, the sub CPU 102a prohibits access to the sub RAM 102c and protects the contents of the sub RAM 102c.
An infinite loop is performed to prepare for power down.

(Timer interrupt processing of production control board)
The timer interrupt process of the effect control board will be described with reference to FIG.
Although not shown in the figure, a clock pulse is generated every predetermined period (2 milliseconds) by a reset clock pulse generation circuit provided in the effect control board 102, a timer interrupt processing program is read, and a timer of the effect control board is read. Interrupt processing is executed.

  First, in step S1510, the sub CPU 102a saves the information stored in the register of the sub CPU 102a to the stack area.

In step S1520, the sub CPU 102a measures a unit time, a normal symbol non-operation time, a gate non-passing time, a launch ball non-detection time, a touch sensor non-detection time, and the like. Details will be described later with reference to FIG.
In this embodiment, although the RTC 102d is provided, the time may be measured and stored in the work area of the sub RAM 102c having a function as a backup RAM.

  In step S1530, the sub CPU 102a detects various switches and checks signals transmitted from the main control board 101. Details will be described later with reference to FIG.

  In step S1540, the sub CPU 102a transmits various data set in the transmission buffer of the sub RAM 102b to the image control board 105 and the lamp control board 104.

  In step S1550, the sub CPU 102a restores the information saved in step S1900 to the register of the sub CPU 102a.

  The timer update process will be described with reference to FIG.

  In step S1520-1, the sub CPU 102a performs a subtraction process for subtracting -1 from the unit time counter. In the present embodiment, the sub CPU 102a that performs the process of step S1520-1 for measuring a unit time (1 minute) constitutes a time measuring unit.

  In step S1520-2, the sub CPU 102a determines whether or not the unit time counter = 0, that is, that the unit time counter becomes 0 means that one minute has elapsed. If it is determined that the unit time counter = 0, the process proceeds to step S1520-3. If it is determined that the unit time counter = 0 is not satisfied, the process proceeds to step S1520-7.

  In step S1520-3, when it is determined that the unit time counter = 0, the sub CPU 102a newly sets 30000 in the unit time counter. Since the unit time counter is subtracted every 2 ms, setting 30000 in the unit time counter means setting 1 minute.

  In step S1520-4, the sub CPU 102a sets the value of the unpaid counter in the unit unpaid counter. As a result, the value of the unit unpaid counter is updated every minute.

  In step S1520-5, the sub CPU 102a sets the value of the starting port winning counter in the unit starting port winning counter. As a result, the value of the unit start opening prize counter is updated every minute. In the present embodiment, the sub CPU 102a that performs the process of step S1520-5 for measuring the winning of the starting opening per unit time (1 minute) constitutes a unit time counting means.

  In step S1520-6, the sub CPU 102a sets the value of the big prize winning prize counter to the unit big prize winning prize counter. As a result, the value of the unit big prize winning prize counter is updated every minute.

  In step S1520-7, the sub CPU 102a performs a process of updating the normal symbol inoperative counter value by +1. Thereby, the non-operation time of a normal symbol can be measured. In the present embodiment, the sub CPU 102a that performs the process of step S1520-7 for updating the non-operation time of the normal symbol constitutes the non-operation time measurement unit.

  In step S1520-8, the sub CPU 102a determines whether or not there is a gate detection switch signal input. If there is no gate detection switch signal input, in step S1520-9, the gate non-passing time in the sub RAM 102c is determined. A process of updating the counter value by +1 is performed. On the other hand, if a gate detection switch signal is input, the value of the gate non-passing time counter in the sub RAM 102c is cleared (set to 0) in step S1520-10. Thereby, the sub CPU 102a can measure the non-passing time of the gate. In the present embodiment, the sub CPU 102a that performs the process of step S1520-9 for updating the undetected time of the normal symbol gate constitutes the undetected time measuring means.

  In step S1520-11, the sub CPU 102a determines whether or not there is an input of a fire ball detection switch signal. If there is no input of a fire ball detection switch signal, the sub ball 102c in the sub RAM 102c in step S1520-12. A process of updating the undetected counter value by +1 is performed. On the other hand, if there is an input of a shot ball detection switch signal, the value of the shot ball undetected counter in the sub RAM 102c is cleared (set to 0) in step S1520-13. Thereby, the sub CPU 102a can measure the undetected time of the shot ball. In the present embodiment, the sub CPU 102a that performs the process of step S1520-12 for updating the undetected time of the fired ball constitutes a fired ball undetected time measuring unit.

  In step S1520-14, the sub CPU 102a determines whether or not there is a touch sensor signal input. If no touch sensor signal is input, the sub CPU 102a sets the value of the touch sensor counter in the sub RAM 102c in step S1520-15. +1 and update processing. On the other hand, if a touch sensor signal is input, the value of the touch sensor counter in the sub RAM 102c is cleared (set to 0) in step S1520-16. Thereby, the sub CPU 102a can measure the non-detection time of the touch sensor. When this process ends, the timer update process ends. In this embodiment, sub CPU102a which performs the process of step S1520-15 for updating the non-detection time of a touch sensor comprises a firing operation non-detection time measurement means.

  The effect input control process will be described with reference to FIG.

  In step S1531, the sub CPU 102a checks whether or not there is an effect button detection signal from the effect button detection switch 17a. If there is an effect button detection signal, the effect button information is set in a predetermined work area of the sub RAM 102c. To do.

  In step S1532, the sub CPU 102a inputs a date signal indicating the current date or a time signal indicating the current time from the RTC 102d, and sets time information in a predetermined work area of the sub RAM 102c.

  In step S1533, the sub CPU 102a checks whether or not there is a shot ball detection signal from the shot ball detection switch 4b. If there is a shot ball detection signal, the sub CPU 102a displays the shot ball detection information in a predetermined work area of the sub RAM 102c. set.

  In step S1534, the sub CPU 102a checks whether or not there is an out ball detection signal from the out ball detection switch 12a. If there is an out ball detection signal, the out ball counter in a predetermined work area of the sub RAM 102c. Update. In the present embodiment, when there is an out-ball detection signal, the sub CPU 102a that performs the process of step S534 for adding and updating the out-ball number counter constitutes the discharged ball counting means.

  In step S1535, the sub CPU 102a checks whether there is a touch sensor signal from the touch sensor 3b via the main control board 101. If there is a touch sensor signal, the sub CPU 102a touches a predetermined work area of the sub RAM 102c. Set sensor information.

  In step S1536, the sub CPU 102a checks whether or not there is a payout ball count signal from the payout ball count switch 32 via the main control board 101. If there is a payout ball count signal, a predetermined value in the sub RAM 102c is checked. The payout counter in the work area is updated by adding +1, and the unpaid counter in the predetermined work area of the sub RAM 102c is subtracted and updated. When this process ends, the timer update process ends. In the present embodiment, when there is a payout ball count signal, the sub CPU 102a that performs the process of step S536 for adding and updating the payout counter constitutes a winning ball counting means.

  The command analysis process will be described with reference to FIGS.

In step S1201, the sub CPU 102a receives a command from the main control board 101 and stores it in the reception buffer of the sub RAM 102c.
As described above, the sub CPU 102a that performs the process of step S1201 for storing a command in the reception buffer of the sub RAM 102c constitutes a signal receiving unit.

  In step S1202, the sub CPU 102a checks whether there is command data in the reception buffer, and checks whether a command has been received. If there is no command data in the reception buffer, the sub CPU 102a ends the command analysis processing.

  In step S1203, the sub CPU 102a checks whether or not the command data is a variation pattern designation command. If it is a change pattern designation command, in step S1204, the sub CPU 102a acquires the effect random number value from the effect random number counter, and converts the acquired effect random number value and the effect mode determined in step S1207 described later. Based on this, an effect pattern for effecting in the liquid crystal display device effect 13, the sound output device 18, the effect lighting device 16, and the effect accessory devices 14 and 15 is determined and determined as a predetermined work area in the sub RAM 102c. Set the production pattern.

  In step S1205, the sub CPU 102a checks whether or not the command data is an effect designating command. If it is an effect designating command, in step S1206, the sub CPU 102a determines an effect design based on the effect designating command, and sets the determined effect design in a predetermined work area in the sub RAM 102c.

  In step S1207, the sub CPU 102a determines an effect mode based on the effect mode determination table shown in FIG. 6A based on the effect symbol designation command, and the effect mode determined as the predetermined work area in the sub RAM 102c. Set. As described above, the sub CPU 102a that performs the processes of step S1008 for determining the effect mode at the time of restoration of power interruption and step S1207 for determining the effect mode based on the effect symbol designation command constitutes the notification mode determining means.

  In step S1208, the sub CPU 102a determines whether or not the effect symbol designation command indicates a jackpot symbol. If the effect designating command indicates a jackpot symbol, the sub error determination process shown in FIG. 33 is performed in step S1209. The sub error determination process will be described later in detail.

  In step S1210, the sub CPU 102a checks whether the command data is a gate passage designation command. If it is a gate passage designation command, in step S1211, the sub CPU 102a updates the gate passage counter in the sub RAM 102c. Thereby, the number of game balls that have passed through the normal symbol gate 8 can be measured.

  In step S1212, the sub CPU 102a checks whether or not the command data is a normal symbol operation start command. If it is a normal symbol operation start command, in step S1213, the sub CPU 102a updates the normal symbol operation non-operation counter in the sub RAM 102c. Thereby, the non-operation time of the normal symbol updated in step S1520-7 is cleared.

  In step S1214, the sub CPU 102a checks whether or not the command data is a normal electric accessory operation start command. If it is an ordinary electric accessory operation start command, in step S1215, the sub CPU 102a sets an ordinary electric accessory operation flag in the sub RAM 102c. Thereby, sub CPU102a can recognize that a pair of movable piece 10b provided in the 2nd starting port 10 is controlled to the 1st mode which will be in an open state.

  In step S1216, the sub CPU 102a checks whether or not the command data is a normal electric accessory operation end command. If it is a normal electric accessory operation end command, in step S1217, the sub CPU 102a clears the normal electric accessory operation flag in the sub RAM 102c. Thereby, sub CPU102a can recognize that a pair of movable piece 10b provided in the 2nd starting port 10 is controlled by the 2nd mode which will be in a closed state.

  In step S1218, the sub CPU 102a checks whether or not the command data is a start opening prize designation command. If it is a start opening winning designation command, in step S1219, the sub CPU 102a updates the starting opening winning counter in the sub RAM 102c. Thereby, the number of game balls that have passed through the first start port 9 and the second start port 10 can be measured.

  In step S1220, the sub CPU 102a checks whether or not the command data is a big winning opening prize designation command. If it is a big winning mouth winning designation command, in step S1221, the sub CPU 102a updates the big winning mouth counter in the sub RAM 102c. As a result, the number of game balls that have passed through the special winning opening 11 can be measured. In the present embodiment, the sub CPU 102a that performs the process of step S1221 that performs the process of updating the special winning opening counter constitutes the number-of-balls counting unit.

  In step S1222, the sub CPU 102a checks whether or not the command data is a gaming state designation command. If it is a gaming state designation command, in step S1223, the sub CPU 102a sets the current gaming state in a predetermined work area in the sub RAM 102c.

  In step S1224, the sub CPU 102a checks whether or not the command data is a power failure recovery designation command. If it is a power failure restoration designation command, in step S1225, the sub CPU 102a sets the current gaming state in a predetermined work area in the sub RAM 102c.

  In step S1226, the sub CPU 102a checks whether or not the command data is a power interruption start designation command. If it is a power interruption start designation command, in step S1227, the sub CPU 102a inputs a date signal indicating the current date or a time signal indicating the current time from the RTC 102d, and disconnects power to a predetermined work area in the sub RAM 102c. Set the time.

In step 1228, the sub CPU 102a checks whether or not the received command is another command, executes the corresponding processing, and ends the command analysis processing.
Here, in particular, when the sub CPU 102a receives the payout number designation command from the main control board 101, the sub CPU 102a analyzes the received payout number designation command, and has not paid out the payout number corresponding to the received payout number designation command. Addition is performed on the counter. Since the unpaid counter is subtracted every time there is a payout ball count signal in S1536 of FIG. 30, the sub CPU 102a recognizes the number of game balls that have not been paid out by the unpaid counter. I can do it. As described above, the command analysis process for adding the payout number corresponding to the payout number designation command received from the main control board 101 to the unpaid counter, and the effect input control process for subtracting from the unpaid counter every time there is a payout ball count signal The sub CPU 102a that performs the process of S1536 constitutes an unpaid number counting unit.

  The sub error determination process will be described with reference to FIG.

  In step S1250, the sub CPU 102a checks whether or not the command data has received a door opening designation command. If the door opening designation command has been received, in step S1251, the sub CPU 102a sets the abnormality information 1 flag in the sub abnormality information storage area in the sub RAM 102c. As a result, the sub CPU 102a can recognize that the glass frame 110 is open at the time of the big hit.

  In step S1252, the sub CPU 102a confirms whether or not the command data has received a glass holding no designation command. If the no glass holding designation command has been received, in step S1253, the sub CPU 102a sets the abnormality information 2 flag in the sub abnormality information storage area in the sub RAM 102c. Thereby, the sub CPU 102a can recognize that the glass plate 111 was not held at the time of the big hit.

  In step S1260, the sub CPU 102a performs unit time determination processing for determining whether an abnormality per unit time (one minute) has occurred. Details will be described with reference to FIG.

  In step S1270, the sub CPU 102a performs an abnormal time measurement process for determining whether an abnormal time is not measured. Details will be described with reference to FIG.

  In step S1271, the sub CPU 102a determines whether or not the normal electric accessory actuated flag is turned off on condition that the received effect designating command is an effect designating command (E1H001H, E1H002H) for the second start port. Determine. If the normal electric accessory operating flag is off, in step S1272, the sub CPU 102a sets the abnormality information 6 flag in the sub abnormality information storage area in the sub RAM 102c. As a result, the sub CPU 102a can recognize whether or not the normal electric accessory operation was activated at the time of the big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1271 that determines whether or not the normal electric accessory actuating flag is off constitutes an abnormality determination unit.

  In step S1273, the sub CPU 102a determines the payout rate (= total payout / total number of payouts) based on the value of the out ball counter updated in step S1534 and the value of the payout counter updated in step S1536. Out total). In the present embodiment, the sub CPU 102a that performs the process of step S1273 that performs the calculation process of the payout rate constitutes a calculation unit.

  In step S1274, the sub CPU 102a determines whether or not the calculation result in step S1273 is an abnormal value (for example, 150% or more). If it is determined that the calculation result is an abnormal value, in step S1275, the sub CPU 102a sets the abnormal information 8 flag in the sub abnormal information storage area in the sub RAM 102c. Thereby, the sub CPU 102a can recognize that the payout rate when the jackpot is determined is abnormal. In the present embodiment, the sub CPU 102a that performs the process of step S1274 for determining the calculation result constitutes a calculation result determination unit.

  In step S1276, the sub CPU 102a inputs a date signal indicating the current date or a time signal indicating the current time from the RTC 102d, and sets the current time in a predetermined work area in the sub RAM 102c. Thereby, the sub CPU 102a can recognize the time of the big hit.

  In step S1277, the sub CPU 102a determines whether or not the jackpot time set in step S1276 is outside the business hours of the amusement store (between 23:00 to 9:00). If it is determined that the game store is out of business hours, in step S1278, the sub CPU 102a sets the abnormality information 11 flag in the sub abnormality information storage area in the sub RAM 102c. Thereby, the sub CPU 102a can recognize that the time of the big hit is abnormal. When this process ends, the sub error determination process ends. In the present embodiment, the sub CPU 102a that performs the process of step S1277 for determining the jackpot time constitutes a time determination unit.

  The unit time determination process will be described with reference to FIG.

  In step S1260-1, the sub CPU 102a determines whether the unit unpaid counter is equal to or larger than a predetermined number (300 or more, that is, whether the unit unpaid counter ≧ 300). If it is determined that the unit unpaid counter is greater than or equal to the predetermined number, in step S1260-2, the sub CPU 102a sets the abnormality information 3 flag in the sub abnormality information storage area in the sub RAM 102c. Thereby, the sub CPU 102a can recognize that the number of unpaid per unit time is abnormal at the time of big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1260-1 that determines whether the unit unpaid counter is equal to or larger than a predetermined number constitutes an unpaid number determination unit.

  In step S1260-3, the sub CPU 102a determines whether or not the number of unit start opening prize counters is equal to or larger than a predetermined number (20 or more, that is, unit start opening winning counter ≧ 20). If it is determined that the unit start port winning counter is greater than or equal to the predetermined number, in step S1260-4, the sub CPU 102a sets the abnormality information 7 flag in the sub abnormality information storage area in the sub RAM 102c. Thereby, the sub CPU 102a can recognize that the number of winnings to the first starting port 9 and the second starting port 10 per unit time is abnormal at the time of big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1260-3 that determines whether the unit start port winning counter is equal to or larger than a predetermined number constitutes a unit time determination unit.

  In step S1260-5, the sub CPU 102a determines whether or not the number of unit prize winning counters is equal to or less than a predetermined number (two or less, that is, whether or not a unit prize winning counter ≦ 2). If it is determined that the unit special prize counter is equal to or smaller than the predetermined number, in step S1260-6, the sub CPU 102a sets the abnormality information 13 flag in the sub abnormality information storage area in the sub RAM 102c. As a result, the sub CPU 102a can recognize that the number of winnings to the big winning opening 11 per unit time is abnormal at the time of big winning. When this process ends, the unit time determination process ends. In the present embodiment, the sub CPU 102a that performs the process of step S1260-5 that determines whether or not the unit winning prize counter is equal to or less than a predetermined number constitutes the number of balls entered determination unit.

  The abnormal time measurement process will be described with reference to FIG.

  In step S1270-1, the sub CPU 102a determines whether or not the gate non-passing time counter is an abnormal value (5 minutes or more, that is, gate non-passing time counter ≧ 75000). When it is determined that the gate non-passing time counter is an abnormal value, in step S1270-2, the sub CPU 102a sets the abnormal information 4 flag. Thereby, the sub CPU 102a can recognize that the time when the gate has not passed is abnormal at the time of the big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1270-1 that determines whether or not the gate non-passing time counter is an abnormal value constitutes an undetected time determination unit.

  In step S1270-3, the sub CPU 102a determines whether or not the normal symbol inoperative counter is an abnormal value (5 minutes or more, that is, whether the normal symbol inoperative counter ≧ 75000?). If it is determined that the normal symbol non-operation counter is an abnormal value, in step S1270-4, the sub CPU 102a sets the abnormality information 5 flag. Thereby, the sub CPU 102a can recognize that the non-operation time of the normal symbol is abnormal at the time of the big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1270-3 that determines whether or not the normal symbol inoperative counter is an abnormal value constitutes an inoperative time determination unit.

  In step S1270-5, the sub CPU 102a determines whether or not the firing ball undetected counter is an abnormal value (5 minutes or more, that is, whether or not the firing ball undetected counter ≧ 75000). If it is determined that the firing ball non-detection counter is an abnormal value, in step S1270-6, the sub CPU 102a sets the abnormality information 9 flag. Accordingly, the sub CPU 102a can recognize that the undetected time of the shot ball is abnormal at the time of the big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1270-5 that determines whether or not the firing ball undetected counter is an abnormal value constitutes a firing ball undetected time determination unit.

  In step S1270-7, the sub CPU 102a determines whether or not the touch sensor counter is an abnormal value (5 minutes or more, that is, whether the touch sensor counter ≧ 75000). If it is determined that the touch sensor counter has an abnormal value, in step S1270-8, the sub CPU 102a sets the abnormal information 10 flag. Thereby, the sub CPU 102a can recognize that the undetected time of the touch sensor is abnormal at the time of big hit. In the present embodiment, the sub CPU 102a that performs the process of step S1270-7 that determines whether or not the touch sensor counter is an abnormal value constitutes a firing operation non-detection time determination unit. When this process ends, the abnormal time measurement process ends. In the present embodiment, Step S1007, Step S1251, Step S1253, Step S1272, Step S1275, Step S1278, Step S1260-2, Step S1260-4, and Step S1260-4 for setting the abnormality flag in the sub abnormality information storage area in the sub RAM 101c. The sub CPU 102a that performs the process of step S1260-6 constitutes a secondary storage instruction unit.

  Next, the outline of the image control board 105 and the lamp control board 104 will be briefly described.

  When controlling the liquid crystal display device 13 on the image control board 105, the voice CPU reads the voice output device control program from the voice ROM based on the received command for presentation, and outputs the voice in the voice output device 18. Control. When an effect command is transmitted from the effect control board 102 to the image control board 105, the image CPU reads a program from the image ROM and displays an image on the liquid crystal display device 13 based on the received effect command. Control.

  In the lamp control board 104, the effect actor device operation program is read based on the received effect mand and controls the operation of the effect agent devices 14 and 15, and for the effect based on the received effect command. The lighting device control program is read, and the lighting device for effect 16 is controlled.

  As described above, according to the present embodiment, the presence of abnormal information clearly distinguishes between after power failure restoration due to fraud and after power failure restoration due to force majeure due to power failure, etc. By performing the above notification, it is possible to intentionally increase the hit probability on the game store side, and to prevent an illegal act of calling the player from the start of business.

  In addition, since the fraud determination process can be performed on the effect control board 102, the burden of the control process on the main control board 101 can be reduced.

  Furthermore, since the abnormal information can be erased by the RAM clear switch 101d, it is possible to erase an abnormality that has occurred in a normal game and quickly return to the normal game.

  Furthermore, even if the gaming state is a high probability gaming state, the effect control means determines the chance mode, and the liquid crystal display device 13 is ambiguous whether it is a high probability gaming state or a low probability gaming state. There is a status notification. Therefore, when the chance mode is notified, the player can play the game while maintaining his expectation that the gaming state is controlled to the high probability gaming state. On the other hand, such a display method tends to invite an illegal act in which the game store side intentionally increases the hit probability and calls the player from the start of business. However, as described above, when a gaming machine recognizes an illegal act, the gaming state is directly notified without notifying the chance mode, so that the illegal act is prevented while improving the interest of the game. Can also be planned.

  In addition, after restoration of power interruption due to fraudulent acts, a different production mode from normal times is determined and notifications different from normal times are performed, so due to the notification of gaming status after power interruption restoration due to fraudulent acts and power outages, etc. The notification of the gaming state after power failure recovery due to force majeure can be clearly distinguished and notified.

(Modification 1)
In the present embodiment, the production control board 102 determines the abnormal information for deliberately raising the probability of hitting on the game store side and determining whether an illegal act of calling the player from the start of business has been performed. However, the main control board 101 may make the determination.

  Specifically, the main process of the main control board 101 in FIG. 36 is performed in place of the main process of the main control board 101 in FIG. 7 of the previous embodiment. Hereinafter, the main process of the main control board 101 in FIG. 36 will be described focusing on the difference from the main process of the main control board 101 in FIG. 7 that performs the same processing as the main process of the main control board 101 in FIG. 7 is the same as the step number used in FIG. 7 in the main process of the main control board 101 in FIG.

  In step S16, if the RAM is not cleared (see step S2) and the checksum is normal (see step S4), the main CPU 101a performs a power interruption time measurement process. Here, in the first modification, the main control board 102 is provided with an RTC (real-time clock) as in the production control board 103, and a time signal is input from the RTC at the start of power interruption to set the power interruption start time to the main The data is stored in a predetermined work area of the RAM 101c. In step S16, a time signal from the RTC is input when the power failure is restored, the power interruption end time is stored in a predetermined work area of the main RAM 101c, and the electric power is calculated from the time difference between the power interruption start time and the power interruption end time. Calculate cut-off time. In the first modification, an RTC (real time clock) provided on the main control board 102 constitutes a time measuring means.

  In step S17, the main CPU 101a determines whether or not the power interruption time is a predetermined time or longer (6 hours or longer). If the power interruption time is equal to or longer than the predetermined time, in step S18, the main CPU 101a sets the main abnormality information 12 flag in the abnormality information storage area in the main RAM 101c. Thereby, the main CPU 101a can recognize that the power interruption time is abnormal.

  In step S19, the main CPU 101a loads the data in the abnormality information storage area backed up in the main RAM 101c and checks whether or not the main abnormality information flag is set. The main abnormality information set will be described later with reference to FIGS.

  In step S5, the main CPU 101a loads the value of the gaming state information from the gaming state storage area being backed up.

In step S6-2, as shown in FIG. 5B, the main CPU 101a determines a power failure recovery command based on the loaded abnormality information and the loaded gaming state, and stores the determined power failure recovery command in the transmission buffer. set. In the first modification, the main CPU 101a that performs the processing of step S6-2 and step S14 for setting the power interruption recovery command in the transmission buffer and outputting the power interruption recovery command constitutes the power interruption recovery signal transmission means. .
Then, as shown in FIG. 37, the effect control board 102 receives the power interruption recovery command transmitted from the main control board 101, and determines the effect mode.

  Specifically, the main process of the effect control board 102 in FIG. 37 is performed in place of the effect control board 102 main process in FIG. 26 of the previous embodiment. Hereinafter, the main process of the effect control board 102 in FIG. 37 will be described focusing on the differences from the main process of the effect control board 102 in FIG. Note that the same processing as the effect control board 102 main process in FIG. 26 uses the same step number used in FIG. 26 in the effect control board 102 main process in FIG.

In step S1013, the sub CPU 102a confirms whether or not the power interruption recovery command data exists in the reception buffer in the sub RAM 102c.
If there is no data for the power failure recovery command, the process waits until a power failure recovery command is received from the main control board 101. On the other hand, if there is data of the power failure recovery command, the gaming state on the main control board 101 is confirmed whether there is abnormality information from the received power failure recovery command, and is shown in FIG. 5 (b-2). Based on the abnormality information determined on the main control board 101 and the gaming state from the effect mode determination table, the effect mode after restoration of power interruption is determined. Other processing is the same as the processing described in FIG.

  Next, processing for determining abnormality information in the main control board 101 will be described with reference to FIGS.

  The error determination process 2 in FIG. 38 is performed in place of the error determination process in FIG. 11 performed in the subroutine of the input control process (see FIG. 10) in the timer interrupt process (see FIG. 9) of the main control board 101. Become. Hereinafter, the error determination process 2 in FIG. 38 will be described focusing on the differences from the error determination process in FIG.

  First, in step S910, the main CPU 101a checks the gaming state signal and confirms the received gaming state signal.

  In step S920, the main CPU 101a checks whether or not a door opening switch signal is received as a gaming state signal. If the door opening switch signal has been received, in step S921, the main CPU 101a sets the main abnormality information 1 flag in the abnormality information storage area in the main RAM 101c.

  In step S940, the main CPU 101a checks whether or not a glass holding switch signal is received as a gaming state signal. If the glass holding switch signal has been received, in step S941, the main CPU 101a sets the main abnormality information 2 flag in the abnormality information storage area in the main RAM 101c.

  In step S960, the main CPU 101a performs a main abnormal time measurement process.

  The main abnormal time measurement process will be described with reference to FIG.

  In step S960-1, the main CPU 101a determines whether or not there is an input of a gate detection switch signal. If there is no input of a gate detection switch signal, the main non-passing time in the main RAM 101c in step S960-2. A process of updating the counter value by +1 is performed. On the other hand, when there is an input of the gate detection switch signal, the value of the gate non-passing time counter in the main RAM 101c is cleared (set to 0) in step S960-3. Thereby, the main CPU 101a can measure the non-passing time of the gate.

  In step S960-4, the main CPU 101a determines whether or not normal symbol variation has started (normal symbol variation time counter ≠ 0?). If normal symbol variation has not started (normal symbol variation has not started). In step S960-5, the normal symbol inoperative counter value in the main RAM 101c is incremented by 1 and updated. On the other hand, when the variation of the normal symbol is started (normal symbol variation time counter ≠ 0), the value of the normal symbol inoperative counter in the main RAM 101c is cleared (set to 0) in step S960-6. Thereby, the main CPU 101a can measure the non-operation time of the normal symbol.

  In step S960-7, the main CPU 101a determines whether or not there is an input of a launch ball detection switch signal. If there is no input of a launch ball detection switch signal, the main CPU 101a has a launch ball in the main RAM 101c in step S960-8. A process of updating the undetected counter value by +1 is performed. On the other hand, when there is an input of a shot ball detection switch signal, the value of the shot ball undetected counter in the main RAM 101c is cleared (set to 0) in step S960-9. Thereby, the main CPU 101a can measure the undetected time of the shot ball.

  In step S960-10, the main CPU 101a determines whether or not there is a touch sensor signal input. If no touch sensor signal is input, the main CPU 101a sets the value of the touch sensor counter in the main RAM 101c in step S960-11. +1 and update processing. On the other hand, when a touch sensor signal is input, the value of the touch sensor counter in the main RAM 101c is cleared (set to 0) in step S960-12. Thereby, the undetected time of the main CPU 101a and the touch sensor can be measured.

  In step S960-13, the main CPU 101a determines whether or not the values of the gate non-passing time counter, the normal symbol non-operation counter, the firing ball non-detection counter, and the touch sensor counter are not abnormal values.

  In step S960-14, when the value of the gate non-passing time counter is an abnormal value (5 minutes or more, that is, the gate non-passing time counter ≧ 150,000), the main CPU 101a stores the main abnormality information 4 flag in the main RAM 101c. When the value of the normal symbol non-operating counter is set to an abnormal information storage area and the value of the normal symbol non-operating counter is an abnormal value (5 minutes or more, that is, the normal symbol non-operating counter ≧ 150,000), the main abnormality information 5 flag is stored in the main RAM 101c. When the value of the firing ball undetected counter is an abnormal value (5 minutes or more, that is, the firing ball undetected counter ≧ 150,000), the main abnormality information 9 flag is stored in the abnormality information storage area in the main RAM 101c. And the touch sensor counter value is an abnormal value (5 minutes or more, If Tsu a switch sensor counter ≧ 150000) is set to the abnormality information storage area in the main abnormality information 10 flag to the main RAM 101c. When this process ends, the main abnormal time measurement process ends.

  Returning to the description of the error determination process 2 shown in FIG. 38, step S970 will be described.

  In step S970, the main CPU 101a determines whether the unit time counter in the main RAM 101c = 0, that is, whether one minute, which is a unit time, has been measured. It is assumed that the unit time counter is decremented by −1 every 4 ms in step S110.

  In step S971, when it is determined that the unit time counter in the main RAM 101c = 0, the main CPU 101a newly sets 150,000 in the unit time counter in the main RAM 101c. As described above, since the unit time counter is subtracted every 4 ms, setting 15000 to the unit time counter means setting 1 minute. Thereafter, in step S980, main unit time abnormality determination processing is performed.

  The main unit time abnormality determination process will be described with reference to FIG.

  In step S980-1, the main CPU 101a determines whether the number of unit payout counters in the main RAM 101c is equal to or greater than a predetermined number (300 or more, that is, whether the unit payout counter ≧ 300). If it is determined that the payout counter is equal to or greater than the predetermined number, in step S980-2, the main CPU 101a sets the main abnormality information 3 flag in the abnormality information storage area in the main RAM 101c. Thereby, the main CPU 101a can recognize that the number of payouts per unit time is abnormal.

  In step S980-3, the main CPU 101a determines whether or not the start opening prize counter is equal to or greater than a predetermined number (20 or more, that is, whether or not the unit start opening winning counter ≧ 20). When it is determined that the start opening prize counter is equal to or larger than the predetermined number, in step S980-4, the main CPU 101a sets the main abnormality information 7 flag in the abnormality information storage area in the main RAM 101c. Thereby, the main CPU 101a can recognize that the number of winnings to the first start port 9 and the second start port 10 per unit time is abnormal.

  In step S980-5, the main CPU 101a determines whether or not the number of winning prize counters is equal to or less than a predetermined number (two or less, that is, whether or not the unit winning prize counter ≦ 2). If it is determined that the big prize counter is equal to or less than the predetermined number, in step S980-6, the main CPU 101a sets the main abnormality information 13 flag in the abnormality information storage area in the main RAM 101c. As a result, the main CPU 101a can recognize that the number of winnings to the big winning opening 11 per unit time is abnormal. When this process ends, the main unit time abnormality determination process ends.

  Returning to the description of the error determination processing 2 shown in FIG. 38, step S990 will be described.

In step S990, the main CPU 101a performs a payout rate calculation process. Specifically, based on the value of the out ball counter in the main RAM 101c and the value of the payout counter updated in step S260, the payout rate (= total payout / out total) is calculated. Do. In the modification, the out ball detection switch 12a is provided not on the effect control board 102 but on the main control board 101, and the main CPU 101a performs input control processing (see FIG. 9) in the timer interrupt processing (see FIG. 9). 10), it is checked whether or not there is an out ball detection signal from the out ball detection switch 12a. If there is an out ball detection signal, the out ball number counter in the main RAM 101c is updated.
Further, the main CPU 101a determines whether or not the calculation result of the payout rate is an abnormal value (for example, 150% or more). When it is determined that the calculation result is an abnormal value, the main abnormality information 8 flag is set in the abnormality information storage area in the main RAM 101c. Thereby, the main CPU 101a can recognize that the payout rate is abnormal.

  In step S991, the main CPU 101a performs time determination processing. Specifically, a time signal indicating the current time is input from the RTC provided in the main control board 102, and the current time is set in a predetermined work area in the main RAM 101c. Then, the main CPU 101a determines whether or not the current time is outside the business hours of the amusement store. If it is determined that the game shop is out of business hours, the main CPU 101a sets the main abnormality information 11 flag in the abnormality information storage area in the main RAM 101c. Thereby, the main CPU 101a can recognize that the current time is outside business hours. When this process ends, the error determination process 2 ends.

Further, in step S420-10 of the ordinary electric accessory control process of FIG. 22, instead of setting the ordinary electric accessory operation end command in the transmission buffer, the main abnormality information 6 flag is set in the abnormality information storage area in the main RAM 101c. May be. Thereby, the main CPU 101a can recognize that the operation of the ordinary electric accessory is not performed.
In the first modification, Step S18, Step S921, Step S941, Step S960-14, Step S980-2, Step S980-4, Step S980- for setting the main abnormality information flag in the abnormality information storage area in the main RAM 101c. 6. The main CPU 101a that performs the processes of steps S990 and S991 constitutes a game state storage instruction unit.

(Modification 2)
In the first modification, the abnormal information determination for determining whether or not the illegal act of inviting the player from the start of business is performed is performed regardless of the jackpot determination. However, only when it is determined that the jackpot is a specific jackpot, it may be determined whether the abnormal information is established as shown in the first modification.

  Specifically, the error determination process 3 of the main control board 101 in FIG. 41 is performed in place of the error determination process 2 in FIG. In the following, the error determination process 3 in FIG. 41 will be described focusing on the differences from the error determination process 2 in FIG. Note that the same processing as the error determination processing 2 in FIG. 38 uses the same step number used in FIG. 38 in the error determination processing 3 in FIG.

In step S899, the main CPU 101a determines whether or not the jackpot symbol is a specific symbol (special symbol A, C, E) for shifting to the high probability gaming state. If the jackpot symbol is not a specific symbol, the error determination process 3 is terminated. On the other hand, if the jackpot symbol is a specific symbol, the main CPU 101a executes the same processing as the error determination processing 2 shown in FIG. 38 after step S899.
Thereby, when the jackpot symbol is a specific symbol, that is, when the so-called probability variation jackpot is determined, the success or failure of each abnormality information is determined.

  As described above, according to the modification example, the production control board 102 does not require a backup function, so that the control burden on the production control board can be reduced, and backup electronic components are also unnecessary, so that the cost is reduced. You can also go down.

(Other variations)
In the present embodiment, as shown in FIGS. 5 (b-1) and 5 (b-2), when abnormality information is established at the time of restoration of power interruption, an effect mode that is not determined in normal time is determined. Even if it is a high-probability state in which abnormality information is established, if it is a production mode that directly notifies that it is a high-probability state, You may decide the same production mode as time.

  In this embodiment, a plurality of types of abnormality information are determined. However, only one type of abnormality information may be determined.

  Furthermore, in the present embodiment, a plurality of types of abnormality information are determined, and if any one of the abnormality information is established, an abnormality rendering mode different from the normal time is determined regardless of the type of abnormality information. However, the production mode may be determined according to the type of abnormality information.

It is a front view of the gaming machine of the present embodiment. It is a perspective view of the gaming machine with the glass frame opened It is a block diagram of a control means. It is a figure which shows an example of the determination table of jackpot determination, and a symbol determination table. It is a figure which shows an example of a structure of the classification of the command at the time of a power failure recovery. It is a figure which shows an example of an effect mode determination table. It is a figure which shows the main process in a main control board. It is a figure which shows the electric interruption interruption process in a main control board. It is a figure which shows the timer interruption process in a main control board. It is a figure which shows the input control process in a main control board. It is a figure which shows the error determination process in a main control board. It is a figure which shows the special figure special electric control process in a main control board. It is a figure which shows the special symbol fluctuation | variation process in a main control board. It is a figure which shows the big hit determination process in the main control board. It is a figure which shows the special symbol stop process in a main control board. It is a figure which shows the game processing per long in a main control board. It is a figure which shows the short hit game process in a main control board. It is a figure which shows the small hit game process in a main control board. It is a figure which shows the jackpot game end process in a main control board. It is a figure which shows the common figure normal electric power control process in a main control board. It is a figure which shows the normal symbol fluctuation | variation process in a main control board. It is a figure which shows the normal electric accessory control process in a main control board. It is a figure which shows the main process in a payout control board. It is a figure which shows the timer interruption process in a payout control board. It is a figure which shows the input control process in a payout control board. It is a figure which shows the main process in an effect control board. It is a figure which shows the electric interruption interruption process in an effect control board. It is a figure which shows the timer interruption process in an effect control board. It is a figure which shows the timer update process in an effect control board. It is a figure which shows the effect input control process in an effect control board. It is a figure which shows the command analysis process in an effect control board. It is a figure which shows the command analysis process in an effect control board. It is a figure which shows the sub error determination process in an effect control board. It is a figure which shows the unit time determination process in an effect control board. It is a figure which shows the abnormal time measurement process in an effect control board. It is a figure which shows the main process in the main control board in the modification 1. It is a figure which shows the main process in the production | presentation control board in the modification 1. FIG. It is a figure which shows the error determination process 2 in the main control board in the modification 1. It is a figure which shows the main abnormal time measurement process in the main control board in the modification 1. It is a figure which shows the main unit time abnormality determination process in the main control board in the modification 1. It is a figure which shows the error determination process 3 in the main control board in the modification 2.

Explanation of symbols

3b Touch sensor 4b Firing ball detection switch 7a General winning opening detection switch 8a Gate detection switch 9a First starting opening detection switch 10a Second starting opening detection switch 11b Outstanding winning opening detection switch 12a Out ball detection switch 13 Liquid crystal display devices 14 and 15 Effector device 16 Effect lighting device 18 Audio output device 32 Discharge ball counting switch 33 Door opening switch 34 Glass holding switch 50 Power plug 101 Main control substrate 102 Effect control substrate 103 Discharge control substrate 104 Lamp control substrate 105 Image control substrate 106 Launch control board 107 Power supply board 101a Main CPU
102a Sub CPU
102d RTC
103a payout CPU

Claims (7)

A gaming machine comprising notifying means for notifying a gaming state, main control means for controlling the gaming state, and sub-control means for controlling the notifying means based on a control signal from the main control means. ,
A game board in which a game area where game balls flow down is formed;
A transparent plate that covers the game area so as to be visible in front of the game board;
A transparent plate holding frame that is pivotally supported by the gaming machine body and holds the transparent plate;
A transparent plate holding frame detecting means for detecting that the transparent plate holding frame is released from the gaming machine body,
The main control means includes
Game state storage means for storing information on the game state even when power supplied to the gaming machine is stopped;
Special game determination means for determining whether or not to control a special game advantageous to the player based on a predetermined probability;
Special game control means for controlling the special game on condition that the special game determination means determines that the special game is to be controlled;
Based on a second probability higher than the first probability from the first probability gaming state in which the special game determining means determines that the special game is to be controlled based on a first probability. Specific game state transition determining means for determining to shift to the second probability gaming state in which it is determined that the special game is controlled.
If it is determined by the specific gaming state transition determining means to shift to the second probability gaming state, specific gaming state control means for controlling the gaming state to the second probability gaming state after the end of the special game,
The sub-control means is
Signal receiving means for receiving a control signal transmitted from the main control means;
Based on a control signal received by the signal receiving means, and a notification control means for performing control to cause the notification means to notify the gaming state in a predetermined notification mode,
The notification control means includes
After the second gaming state is determined by the specific game state transition determining unit when the transparent plate holding frame detecting unit detects that the transparent plate holding frame is released from the gaming machine main body, A gaming machine characterized by causing the notification means to notify that the game machine is in the second probability gaming state when the power supply state is changed from an interruption state in which power is not supplied to the gaming machine. . The main control means includes
The second probability gaming state is determined by the specific gaming state transition determining unit when the transparent plate holding frame detecting unit detects that the transparent plate holding frame is released from the gaming machine main body. Includes a gaming state storage instruction means for storing abnormal information in the gaming state storage means,
When the supply state is changed from the power interruption state, a power interruption recovery signal transmission unit that transmits a power interruption recovery signal including the abnormality information stored in the gaming state storage unit to a sub control unit,
The notification control means includes
2. The device according to claim 1, wherein when the power reception signal including the abnormality information is received by the signal receiving unit, the notification unit is notified that the second probability gaming state is set. Gaming machine. The main control means includes
When the transparent plate holding frame detecting means detects that the transparent plate holding frame is released from the gaming machine main body, a gaming state storage instruction means for storing abnormal information in the gaming state storage means;
When the supply state is changed from the power-off state, a power-off recovery signal is transmitted to the sub-control unit to transmit a power-off recovery signal including the gaming state information stored in the gaming state storage unit and the abnormality information. Means,
The notification control means includes
When the signal receiving unit receives the power failure recovery signal including the information on the second probability gaming state and the abnormality information, the notification unit notifies the fact that the player is in the second probability gaming state. The gaming machine according to claim 1. The main control means includes
A gaming state signal transmitting means for transmitting a gaming state signal in which the gaming state information is defined to the sub-control means;
A power failure recovery signal transmitting means for transmitting a power failure recovery signal including information on the gaming state stored in the gaming state storage means to the sub-control means when the power interruption state is changed to the supply state; ,
The sub-control means is
Sub-storage means for storing information even when power supplied to the gaming machine is stopped,
A gaming state in which the information on the second probability gaming state is determined by the signal receiving means when the transparent board holding frame detecting means detects that the transparent board holding frame is released from the gaming machine main body. A secondary storage instruction means for storing abnormality information in the secondary storage means when receiving a signal;
The notification control means includes
When the signal receiving means receives the power interruption recovery signal including the information on the second probability gaming state, and the abnormality information is stored in the secondary storage means, the notification means is provided with the second probability game. The gaming machine according to claim 1, wherein the game machine is notified of the state. Operation detecting means for detecting a predetermined operation;
5. The gaming machine according to claim 2, further comprising: an information erasing unit that erases the abnormal information when a predetermined operation is detected by the operation detecting unit. The main control means includes
A gaming state signal transmitting means for transmitting a gaming state signal in which the gaming state information is defined to the sub-control means;
The sub-control means is
When the signal receiving means receives a gaming state signal in which information on the first probability gaming state is determined, a first notification mode is determined, and a game in which information on the second probability gaming state is determined. In the case of receiving a status signal, it has a notification mode determining means for determining any one of the first notification mode and a second notification mode different from the first notification mode,
The notification control means includes
The gaming machine according to any one of claims 1 to 5, wherein the notifying means is caused to notify a gaming state in a notifying manner determined by the notifying manner determining means. The notification mode determination means includes
When the transparent plate holding frame detecting means detects that the transparent plate holding frame is released from the gaming machine body, the specific game state transition determining means determines the second probability gaming state, When the signal receiving means receives the power interruption recovery signal including information on the two-probability gaming state, a notification mode of a specific mode different from both the first notification mode and the second notification mode The gaming machine according to claim 6, wherein the game machine is determined.

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