JP2010068033A - Fm transmitting circuit and oversampling processing circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an FM transmitting circuit configured to suppress generation of harmonics due to nonlinear amplitude control processing for determining a maximum frequency shift when an audio signal is processed and also to significantly reduce a circuit scale and reduce power consumption as compared with a prior art. <P>SOLUTION: The FM transmitting circuit includes a nonlinear amplitude control circuit 5 which performs amplitude adjustment for limiting the degree of modulation of a signal output from a pre-emphasis circuit 3, and an LPF 7 and an FM modulator 10 provided at a stage subsequent to the nonlinear amplitude control circuit 5. The DM transmitting circuit includes also a CIC up-sampler 4 provided between the nonlinear amplitude control circuit 5 and pre-emphasis circuit 3 and performing up-sampling at a predetermined up-sampling ratio using a predetermined number of stages of CIC filters, and a CIC down-sampler 6 provided between the nonlinear amplitude control circuit 5 and LPF 7 and performing down-sampling at a predetermined down-sampling rate using the CIC filters. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an FM transmitter circuit that has an audio nonlinear processing circuit by digital processing and performs frequency modulation (hereinafter referred to as FM modulation), and more particularly to harmonic suppression when nonlinear processing is performed by digital signal processing. The present invention relates to an FM transmitter circuit that can prevent overmodulation of the signal and reduce sound quality degradation caused by the modulation, and stabilizes characteristics and suppresses an increase in circuit scale to reduce power consumption. The present invention also relates to an oversampling processing circuit used in the preceding stage of the FM modulator.

  2. Description of the Related Art Conventionally, FM transmission circuits have been developed and used for FM stereo modulation of audio signals and wireless transmission. The present invention is applied not only to the analog system but also to the digital system for miniaturization and high performance. The circuit technology for realizing the frequency modulation has been conventionally realized by the analog circuit technology. However, due to the recent progress of digital signal processing technology and the development of IC technology, the frequency modulation and the digital signal technology together with the audio signal processing. Came to be done.

  FIG. 2 is a block diagram showing a configuration of an FM transmitter circuit according to the prior art. In FIG. 2, the FM transmission circuit includes an audio signal input processing circuit 1, a band-limited low-pass filter (hereinafter referred to as LPF) 2, a pre-emphasis circuit 3, and a nonlinear amplitude control circuit 5. , A harmonic noise elimination LPF 7, a pilot signal generator 8, a composite signal generation circuit 9, a frequency modulator 10, a DA converter (hereinafter referred to as DAC) 11, and a high frequency analog circuit (hereinafter referred to as RF analog). Circuit)) 12.

  In FIG. 2, an audio signal input processing circuit 1 samples an input audio signal at a sampling frequency several times the effective frequency band and outputs a digital audio signal. Here, when an analog audio signal is input, it is converted into digital data by a built-in AD converter, and when a digital audio data signal is input, sampling frequency conversion is performed as necessary. Next, the band limiting LPF 2 is a filter for band limiting the input audio signal to an effective band required for FM broadcasting, and a transversal type FIR (Finite Impulse Response) filter having a linear phase is desirable. The pre-emphasis circuit 3 emphasizes the modulation factor of the high band in advance and transmits the signal with the aim of correcting the deterioration of the high band SNR due to the triangular noise generated at the time of frequency modulation. A process of increasing as the frequency band to be converted becomes higher is performed. Further, the nonlinear amplitude control circuit 5 limits the amplitude of the input signal output from the pre-emphasis circuit 3 within a predetermined peak height limit value. In the nonlinear amplitude control circuit 5, the simplest process is a limiter process, and some other known methods such as a method using a sigmoid curve may be used. The harmonic noise removing LPF 7 removes the harmonic component generated by the nonlinear amplitude control circuit 5 from the input signal and outputs it to the composite signal generating circuit 9.

  The pilot signal generator 8 includes a pilot signal (19 kHz single tone) required for stereo FM modulation and a carrier signal (38 kHz single tone) tuned with a pilot signal for AM modulation of a stereo LR signal. ) And output to the composite signal generation circuit 9. The composite signal generation circuit 9 uses the various pilot signals from the pilot signal generator 8 from the stereo signals (L, R) input from the LPF 7 and 38 kHz of the (L + R) signal and the (LR) signal. The composite signal is output by synthesizing the carrier wave suppressed amplitude modulation (AM) wave and the pilot signal. If digital data multiplex transmission is possible, a digital data modulation signal may be combined. Further, the FM modulator 10 digitally modulates the carrier wave signal in accordance with the composite signal, and up-converts the signal to an IF frequency or a direct RF frequency as necessary, and outputs it to the DAC 11. The DAC 11 converts an input digital signal into an analog intermediate frequency signal (hereinafter, the intermediate frequency signal is referred to as an IF signal) and outputs the analog signal to the RF analog circuit 12. The RF analog circuit 12 up-converts the IF signal from the DAC 11 into an RF signal, or when the RF signal is directly output from the DAC 11, there is no need for up-conversion. Thereafter, the RF signal from the RF analog circuit 12 is amplified by a power amplifier (not shown), and FM radio waves are transmitted from the antenna. An LPF or a band pass filter (hereinafter referred to as BPF) is inserted as necessary. For example, Patent Literature 1 discloses a frequency modulation method for transmitting a stereo audio signal wirelessly.

  In the FM transmitter circuit according to the related art configured as described above, an audio signal is emphasized by a pre-emphasis circuit 3 and then an FM signal is obtained by processing after the nonlinear amplitude control circuit 5. The signal-to-noise power ratio (hereinafter referred to as SNR) of a weak audio signal in a wireless line is prevented from being deteriorated. The audio signal compressed by the nonlinear amplitude control circuit 5 is FM modulated by the FM modulator 10 with a predetermined modulation degree. In FM modulation, the frequency shift is determined by the instantaneous peak value of the baseband signal. Therefore, in order to prevent the baseband signal amplitude from exceeding a certain value (maximum frequency shift), a nonlinear amplitude such as a limiter circuit is used. The amplitude is limited using a control process. These are conventional examples of general FM transmission circuits.

  Note that by reducing the amplitude of the audio signal from the beginning, it may be possible to prevent the peak value after pre-emphasis from exceeding the maximum frequency deviation. Although it is not necessary to use processing, if the amplitude is reduced over the entire frequency region of the audio signal in this way, the average volume is lowered, the average frequency shift is narrowed, and the SNR is deteriorated. It is not preferable.

  However, when the amplitude of an audio signal is limited by nonlinear amplitude control such as a limiter circuit, the output signal includes a harmonic component. In the pre-emphasis circuit 3 in the previous stage, high-frequency emphasis of the audio signal is performed. Therefore, as the audio signal has a higher frequency component, harmonic noise is more likely to occur in the nonlinear amplitude control. Therefore, in order to remove the harmonic component, LPF 7 having a steep cut-off characteristic is used.

  However, when non-linear amplitude control is performed by digital processing, if the sampling frequency is low, harmonic components appear as audible noise and appear in the audible range, so that the resulting noise cannot be cut by the harmonic removal LPF 7. For this reason, signal-to-noise distortion sensitivity (hereinafter referred to as SINAD (Signal to Noise Distortion Sensitivity)) characteristics and total harmonic distortion + noise (hereinafter referred to as THD + N (Total Harmonic Distortion Plus Noise)) characteristics are deteriorated.

  FIG. 3 is a diagram showing the aliasing frequency for explaining the aliasing noise. The odd-order harmonics of the input signal are ½ × Fs (where Fs is the sampling frequency, and fmax is It is the highest frequency of the input signal.) At this time, when there is an effective bandwidth of about 1/8 × Fs, for example, the sampling frequency is 24 × 8 = 192 kHz with respect to the audio band of 24 kHz, but the 9th-order harmonic turns back to 24 kHz. I understand that. The magnitude of the 9th-order or higher harmonics actually generated depends on the magnitude of the amplitude compression of the nonlinear amplitude control process, but the actual frequency of 13 kHz in the case of pre-emphasis characteristics with a time constant of 50 usec is actually increased. When the state of harmonic generation for one tone is simulated, the amplitude is enhanced by about 12 to 13 dB at 13 kHz by pre-emphasis, so that it is necessary to perform amplitude compression of −12 to −13 dB.

  FIG. 4 is a spectrum diagram showing frequency characteristics simulating harmonic generation for a single tone of 13 kHz in a pre-emphasis circuit with a time constant of 50 μsec. It can be seen from FIG. 4 that harmonics are generated toward the high frequency by the amplitude compression. This is a characteristic when a harmonic is generated by applying a limiter with the sampling frequency once increased to 16 times after pre-emphasis. That is, the sampling is 8 × 16 times the required audio band. From FIG. 4, for example, the 15th order characteristic shows a magnitude of about −40 dB with respect to a 13 kHz primary signal. The 15th-order frequency of 13 kHz is 13 × 15 = 195 kHz, and considering that it is folded at ½ × Fs = 96 kHz, 195-96 = 99 kHz, and a folded harmonic noise of −40 dB appears in the audible region of 3 kHz. become. This is a signal level that is sufficiently distinguishable for hearing. In order to reduce such aliasing noise, there has been a method in which an input signal is oversampled, nonlinear processing is performed, and then undersampling is performed through a decimation filter.

JP-A-7-162383. Japanese Patent No. 2775570. Japanese Patent No. 2618951. Japanese Patent No. 4035474.

  However, considering that the filter required at the time of oversampling and undersampling is composed of a linear phase transversal FIR filter, for example, only the necessary band is obtained by sampling 8 × 16 times the necessary band as in the above example. In order to obtain an attenuation of about 100 dB in the stop band, it is necessary to construct an FIR filter with several hundred taps, and it is necessary to process the filter twice, oversampled and undersampled. This will increase the power consumption.

  Although several inventions have been disclosed to reduce the harmonic aliasing noise by performing oversampling and undersampling before and after the nonlinear amplitude control as described above, the nonlinear amplitude processing characterized by small power saving regarding the filter configuration There is no conventional example. In particular, there is no optimum conventional example regarding nonlinear amplitude control for preventing overmodulation of the FM transmitter circuit.

  FIG. 5 is a spectrum diagram showing frequency characteristics of total harmonic distortion + noise (THD + N) when an audio signal is subjected to amplitude limitation by a simple limiter using a nonlinear amplitude control circuit. FIG. 6 is a block diagram showing a configuration of a measurement circuit including a pre-emphasis circuit 22, a simple limiter 23, a low-pass filter (LPF) 24, and a de-emphasis circuit 25. As shown in FIG. 6, the characteristics shown in FIG. 5 are measured by passing an input signal input through an input terminal 21 through a pre-emphasis circuit 22 and then passing through a simple limiter 23 as a non-linear amplitude control circuit. The harmonics outside the band appearing in the high band are removed, and the frequency characteristic of the output signal from the output terminal 26 after de-emphasis by the de-emphasis circuit 25 is measured. Note that the sampling frequency of the audio source of the input signal is 192 kHz, which is four times 48 kHz, and the THD + N at each input frequency is measured by sweeping the input signal to 20 kHz. As can be seen from the characteristic results in FIG. 5, harmonic noise is generated as the frequency becomes higher due to pre-emphasis and nonlinear amplitude control, and the THD + N characteristic deteriorates. However, at an input frequency of 8 kHz or higher, the third harmonic or higher is generated. Therefore, it is generated outside the effective audio band, so that it is removed by the subsequent harmonic removal LPF 7 and the THD + N characteristic should be improved. However, as can be seen from the characteristic diagram of FIG. 5, once the characteristics are improved, the characteristics further deteriorate as the frequency becomes higher. This is because the harmonic folding noise that cannot be removed by the harmonic elimination LPF appears in the band, thereby degrading the THD + N characteristics.

  FIG. 7 is a spectrum diagram showing the linear frequency characteristic of the relative power level measured by the measurement circuit of FIG. FIG. 8 is a spectrum diagram showing the logarithmic frequency characteristic of the relative power level measured by the measurement circuit of FIG. That is, these are output spectrum diagrams when the input signal in the measurement system of FIG. 6 is 13 kHz. In the measurement circuit of FIG. 6, the measurement is performed by adding the de-emphasis circuit 25 inserted in the reception system. In FIG. 7, the horizontal axis is displayed up to ½ Fs = 96 kHz in frequency linear display, and in FIG. 8, the horizontal axis is displayed up to about 20 kHz of the effective audio band on the logarithmic scale of frequency. As can be seen from FIG. 8, a large aliasing noise appears at 3 kHz as described above. It can be seen that a large amount of aliasing noise occurs in addition to 3 kHz.

  The object of the present invention is to solve the above-mentioned problems, particularly to suppress the generation of harmonics by nonlinear amplitude control processing for determining the maximum frequency deviation when processing an audio signal, and to reduce the circuit scale compared to the prior art. Is to provide an FM transmitter circuit having a circuit configuration that can significantly reduce power consumption and consume less power.

  Another object of the present invention is to provide an oversampling processing circuit having a circuit configuration that can greatly reduce the circuit scale and consume less power as compared with the prior art.

The FM transmitter circuit according to the first invention is:
Pre-emphasis means for pre-emphasis processing on an input audio digital signal;
Non-linear amplitude control means for performing amplitude adjustment for modulation degree limitation on the signal output from the pre-emphasis means;
Low-pass filter means for removing harmonic noise from the signal output from the nonlinear amplitude control means;
In an FM transmission circuit comprising FM modulation means for FM-modulating and outputting a carrier wave signal in accordance with a signal output from the low-pass filter means,
Up-sampler means provided between the non-linear amplitude control means and the pre-emphasis means, and performs up-sampling at a predetermined up-sampling ratio using a predetermined number of cascade integrating comb filters (hereinafter referred to as CIC filters). When,
A downsampler means is provided between the nonlinear amplitude control means and the low-pass filter means, and performs downsampling at a predetermined downsampling ratio using a CIC filter.

In the FM transmitter circuit,
The upsampling ratio is set to 8M,
The downsampling ratio is set to 1 / 8M,
The number of stages of the CIC filter is set to N,
The M and N are natural numbers, respectively.

  In the FM transmitter circuit, the sampling frequency of the input audio digital signal is set to 8 times the effective audio band (16 kHz to 24 kHz), and the upsampling ratio of the nonlinear amplitude control means is set to 16 times. The downsampling ratio of the non-linear amplitude control means is set to 1/16 times, and M = 1 and N = 3.

  Further, the FM transmitter circuit is configured to be able to change M and N.

Furthermore, the FM transmitter circuit further includes an oversampling processing unit that is provided before the FM modulation unit and performs an oversampling process on an input signal,
The oversampling processing means includes
A first upsampler that upsamples the input signal using a FIR filter;
And a second upsampler that is provided after the first upsampler and upsamples an input signal using a CIC filter.

  In the FM transmitter circuit, the CIC filter of the up-sampler means, the CIC filter of the down-sampler means, and the CIC filter of the over-sampling means are shared and selectively switched alternately in time series. It is characterized by that.

  Further, in the FM transmitter circuit, each CIC filter includes a filter circuit formed by cascading a plurality of stages of one adder or subtracter and one delay unit as one adder or subtractor. It is configured by replacing with a filter circuit comprising a plurality of delay devices, and each delay device is selectively connected to the adder or the subtracter sequentially to perform serial processing.

An oversampling processing circuit according to a second invention is an oversampling processing circuit that performs oversampling processing on an input signal.
A first upsampler that upsamples the input signal using a FIR filter;
And a second upsampler that is provided after the first upsampler and upsamples an input signal using a CIC filter.

  In the oversampling circuit, each of the CIC filters includes a filter circuit formed by cascading a plurality of stages composed of one adder or subtracter and one delay unit and one adder or subtractor. The delay circuit is replaced by a filter circuit, and each delay device is selectively connected to the adder or the subtracter for serial processing.

  According to the present invention, in an FM transmission circuit for digital audio signals, the signal processing circuit from the input to the frequency modulation circuit is digital signal processing, and the frequency conversion and high frequency power amplification part is analog processing. In a non-linear amplitude control circuit for controlling a stable modulation degree, the oversampled non-linear amplitude control method using the CIC filter according to the present invention is used to generate a characteristic generated by digital processing without increasing the circuit scale. It is possible to suppress the aliasing noise of the higher harmonic components. The present invention can be similarly used in digital nonlinear amplitude control other than the FM transmitter circuit as a technique for suppressing the aliasing noise of the harmonic component due to nonlinear processing.

  According to the oversampling processing circuit of the present invention, the first upsampler for upsampling the input signal using the FIR filter and the first upsampler are provided after the first upsampler and input using the CIC filter. Since the second upsampler for upsampling the signal is provided, the circuit scale can be reduced as compared with the prior art, and the manufacturing cost can be reduced.

  Hereinafter, embodiments according to the present invention will be described with reference to the drawings. In addition, in each following embodiment, the same code | symbol is attached | subjected about the same component.

  FIG. 1 is a block diagram showing a configuration of an FM transmitter circuit according to an embodiment of the present invention. In FIG. 1, the FM transmitter circuit according to the present embodiment has cascaded moving average filters, not transversal type FIR filters, at the front and rear stages of the nonlinear amplitude control circuit 5 as compared with the prior art of FIG. 2. It is characterized in that a CIC up sampler 4 and a CIC down sampler 6 using a cascade integrated comb (CIC) filter (hereinafter referred to as a CIC filter) are inserted.

1 includes an audio signal input processing circuit 1, a band-limited LPF 2, a pre-emphasis circuit 3, a CIC up sampler 4, a nonlinear amplitude control circuit 5, a CIC down sampler 6, and harmonic noise removal. LPF 7, pilot signal generator 8, composite signal generation circuit 9, frequency modulator 10, DAC 11, and RF analog circuit 12. Circuits other than the CIC upsampler 4 and the CIC downsampler 6 are the same as those of the above-described prior art, and detailed description thereof is omitted. Here, the CIC filter is a cascade connection of moving average filters, and the transfer function H ₀ (z) of the moving average filter is expressed by the following equation.

  FIG. 11 shows a circuit that realizes the expression (1). 11 is a block diagram showing a configuration of a CIC filter basic circuit 41F used to configure the CIC upsampler 4 and the CIC downsampler 6 of FIG. In FIG. 11, the CIC filter basic circuit 41F includes a CIC filter 41 and an amplifier 35 having an amplification factor of 1 / N. Here, the CIC filter 41 includes (a) an adder 31 and an adder delay circuit 51 including a delayer 32 that delays the output signal of the adder 31 by one clock and feeds it back to the adder 31; And a delay subtracting circuit 61n including a delay unit 33n that delays the output signal of the adder 31 by N clocks and outputs the delayed signal to the subtractor 34.

  FIG. 12 is a block diagram showing an example of the configuration of the CIC downsampler 6a. Here, FIG. 12 is a circuit that cascades the CIC filters 41 of FIG. 11 in four stages and downsamples to 1 / N, and includes four CIC filters 41 to 44, a 1 / N downsampler 36, and an amplifier 37. And is configured.

  FIG. 13A is a block diagram showing a configuration of a CIC downsampler 6b modified from the CIC downsampler 6a of FIG. 12, and FIG. 13B is a CIC downsampler modified from the CIC downsampler 6b of FIG. It is a block diagram which shows the structure of 6c. In FIG. 13 (a), in the circuit of FIG. 12, the adder delay circuit 51 is cascaded in four stages and the delay subtracter circuit 61n is cascaded in four stages. Next, in FIG. 13B, among the circuits in FIG. 13A, the 1 / N downsampler 36 includes a cascade-connected circuit having four stages of addition delay circuits 51, and a four-stage delay subtraction circuit 61n. The circuit conversion is performed by inserting each delay subtracting circuit 61n into the delay subtracting circuit 61 and inserting it between the circuits connected in cascade. Here, the delay subtracting circuit 61 includes a subtractor 34 and a delayer 33 that delays the input signal by one clock and outputs the delayed signal to the subtractor 34.

  Circuits configured using the circuit conversion method of FIG. 13 are shown in FIGS. FIG. 14 is a block diagram showing the configuration of the CIC upsampler 4 of FIG. In FIG. 14, the CIC upsampler 4 is configured by a filter circuit 61A configured by cascading three stages of delay subtracting circuits 61, a 16-times upsampler 38a, and an adder delay circuit 51 by cascading three stages. A filter circuit 51A and an amplifier 37 are provided.

FIG. 15 is a block diagram showing a configuration of an improved example of the filter circuit 61A of FIG. The filter circuit 61A of FIG. 15 includes switches 101 to 103, 111 to 116, three delay devices 33a, 33b, and 33c, and a subtractor 34, and is a subtractor compared to the circuit of FIG. The number of 34 is reduced. The clock signal generator 71 generates a predetermined clock signal CLK and outputs it to the delay units 33a, 33b, 33c and the timing signal generator 71. The timing signal generator 72 generates a timing signal for controlling on / off of the switches 101 to 103 and 111 to 116 based on the clock signal CLK as follows and outputs the timing signal to the switches 101 to 103 and 111 to 116.
(1) First, the switches 101, 111, and 112 are turned on to operate the first-stage delay subtraction circuit.
(2) Next, the switch 101 is turned off and the switches 103, 113, and 114 are turned on to operate the second-stage delay subtraction circuit.
(3) Further, the switches 111 and 112 are turned off and the switches 115, 116 and 102 are turned on to operate the third-stage delay subtraction circuit, and the output signal from the subtractor 34 is output.

  That is, serial processing as in the circuit of FIG. 15 can be realized by one subtractor 34, and the circuit scale can be greatly reduced.

  FIG. 16 is a block diagram showing a configuration of an improved example of the filter circuit 51A of FIG. The filter circuit 51A of FIG. 16 includes an adder 31, switches 101 to 103, 111 to 116, and three delay devices 32a, 32b, and 32c. Compared to the circuit of FIG. The number of 31 is reduced. The filter circuit 51A of FIG. 16 can be operated by similarly controlling the switches 101 to 103 and 111 to 116 of FIG. 16, using the clock signal generator 71 and the timing signal generator 72 of FIG. 15 in the same manner. .

  FIG. 17 is a block diagram showing the configuration of the CIC downsampler 6 of FIG. In FIG. 17, the CIC downsampler 6 includes a filter circuit 51A configured by three stages of addition delay circuits 51 connected in cascade, a 1/16 downsampler 36a, and a delay subtraction circuit 61 connected in three stages. The filter circuit 61A and the amplifier 37 are provided.

  18 is a spectrum diagram showing the frequency characteristics of the CIC upsampler 4 in FIG. 14, and FIG. 19 is a spectrum diagram showing the frequency characteristics of the CIC downsampler 6 in FIG. FIG. 20 is an enlarged view of the notch portion of FIGS. 18 and 19. Here, the spectra of FIGS. 18 and 19 basically show the same characteristics. Further, as is apparent from the enlarged view of FIG. 20, the characteristics are such that the image area of the audio band is greatly attenuated. In this example, an input signal with a sampling frequency Fs = 192 kHz is up-sampled by 16 times (16 × 192 kHz), then nonlinear amplitude control such as a limiter is performed, and then down-sampling to 1/16 to obtain the original sampling frequency Fs = 192 kHz. At that time, since the frequency is turned back at the sampling frequency Fs / 2 = 192/2 = 96 kHz, the frequency band that first enters the effective audio band as the turn-back noise is 192 ± 24 kHz = 168 kHz to 216 kHz, and the next turn-back noise Further, the band becomes (192 × 2) ± 24 kHz = 360 kHz to 408 kHz ahead of 192 kHz. FIG. 20 shows attenuation amounts at these frequencies. An attenuation of -51 dB is obtained at the worst value. With ordinary audio sources, aliasing noise is difficult to perceive if it can be attenuated to this extent. Further, the THD + N characteristic can be improved to about 0.1%, and sufficient performance can be secured.

  FIG. 21 is a spectrum diagram showing frequency characteristics of total harmonic distortion + noise (THD + N) of the FM transmission circuit according to the present embodiment of FIG. 1 and the FM transmission circuit according to the prior art of FIG. The frequency characteristics of FIG. 21 are measured by the measurement circuit of FIG. 6, and it can be seen that the frequency characteristics are greatly improved at a frequency of 10 kHz or more as compared with the prior art.

  FIG. 22 is a spectrum diagram showing a linear frequency characteristic of an output signal when an input signal having a single tone of 13 kHz is input in the FM transmitter circuit according to the present embodiment of FIG. 1, and FIG. It is a spectrum figure which shows the logarithmic frequency characteristic of an output signal when the input signal of single tone 13kHz is input in the FM transmitter circuit which concerns. Here, in FIG. 22, the horizontal axis is displayed up to 1/2 Fs = 96 kHz in the frequency linear display as in FIG. 7, and in FIG. 23, the horizontal axis is the effective audio band on the logarithmic scale of frequency as in FIG. Up to around 20 kHz. As is apparent from FIGS. 22 and 23, it can be seen that the effect of aliasing noise due to the generation of harmonics is greatly reduced compared to the results of the conventional method, as compared with FIGS.

  As described above, according to the present embodiment having the configuration shown in FIG. 1, harmonic noise generated after nonlinear amplitude control at a high sampling rate oversampled can be removed by notch characteristics, and then down-sampled. Therefore, it is possible to suppress the aliasing noise within the band.

  In the above embodiment, the signal to be FM-modulated is described as a stereo signal, but the present invention is not limited to this and may be a monaural signal. In the case of a stereo signal, the circuits from the audio signal input processing circuit 1 to the harmonic removal LPF 7 need to be two systems of L / R.

  In the above embodiment, if the input sampling frequency is 8 times the audio band, for example, 24 kHz, the sampling frequency is 24 kHz × 8 = 192 kHz and the oversampling ratio is 16 times. However, depending on the signal components of the input audio source, There may be no band component power or the use bandwidth may be narrow. In addition, power consumption may be prioritized even if performance is somewhat reduced. In that case, since the characteristics of the CIC filter can be relaxed, the number of cascade stages can be reduced. Also, the oversampling ratio can be reduced. Thereby, power consumption can be reduced. Therefore, these configurations are made variable so that they can be changed to optimum configurations according to the application. Conversely, the notch characteristics can be improved by increasing the number of cascade stages of the CIC filter.

  In the present embodiment, as described above, it is preferable that the upsampling ratio of the CIC upsampler 4 is 8M and the downsampling ratio of the CIC downsampler 6 is 1 / 8M. Here, M is a natural number of 1 or more. Most preferably, when M = 1, according to the simulation results of the present inventors, it is preferable to use the CIC up sampler 4 and the CIC down sampler 6 using the three-stage CIC filter as shown in FIGS. . That is, the sampling frequency of the input audio digital signal is set to 8 times the effective audio band (16 kHz to 24 kHz), the upsampling ratio of the nonlinear amplitude control means is set to 16 times, and the nonlinear amplitude control means It is preferable to set the downsampling ratio to 1/16 times and to set M = 1 and N = 3.

  FIG. 24 is a spectrum diagram showing the frequency characteristics of the CIC filter when cascaded in six stages. As is apparent from FIG. 24, it is improved by about 50 dB compared with the three-stage CIC filter characteristic shown in FIG. In order to make the characteristics variable in this way, specifically, the number of CIC filter stages used may be switchable. In particular, if the circuits of FIGS. 15 and 16 are used, the number of stages can be easily changed by changing the timing signal of the switch. Also, a variable tap FIR filter configuration may be used to change the ratio of the input sampling frequency to the oversampled sampling frequency. Thus, by making these variable, it is possible to control the processing amount and control the power consumption. It is also possible to control the aliasing noise removal capability.

  In addition, the FM modulator 10 may generally perform an oversampling process in order to up-convert to an IF frequency and output, for example. At that time, a multi-stage filter configuration that is effective in reducing the amount of processing is used. For example, in order to oversample an input signal with a sampling frequency of 24 kHz × 8 = 192 kHz by 16 times, if it is configured by 4 times × 2 stages, it is configured by an upsampler using an FIR filter of about 45 taps in the first stage, and the subsequent stage In addition, it can be configured with an FIR filter of about 15 taps (prior art). Here, the FIR filter is, for example, a transversal filter according to the prior art.

  FIG. 25 is a block diagram showing a configuration of an FM modulation circuit according to a modification of the present invention. In the modification of FIG. 25, an oversampling processing circuit 13 is provided in the front stage of the FM modulator 10, and the oversampling processing circuit 13 uses an upsampler 13a using a front-end FIR filter and a back-end CIC filter. And an upsampler 13b (for example, having the configuration of FIGS. 14 to 16).

  FIG. 9 is a spectrum diagram showing the frequency characteristics of the upsampler 13a in the previous stage (45 taps) of the oversampling processing circuit 13. FIG. 10 is a spectrum diagram showing the frequency characteristics of the upsampler 13b in the subsequent stage (15 taps) of the oversampling processing circuit 13. Here, the effective frequency pass band is set to 60 kHz in consideration of the stereo signal in which the pilot signal and the AM modulated (LR) modulated at 38 kHz are synthesized in addition to the audio band in the output composite signal. In consideration of the fact that an RDS (Radio Data System) standard FM data multiplexing modulation signal 57 KHz ± 2 to 3 dB is also included, the filter characteristics are determined with a composite signal pass band of 60 kHz.

  FIG. 26 is a spectrum diagram showing frequency characteristics of the upsampler 13b using the CIC filter when cascaded in four stages instead of the subsequent 15-tap FIR filter. Since the CIC filter is a four-stage filter, the filter can be configured with eight adders or subtractors. Here, the adder of the CIC filter in the oversampling processing circuit 13 in the preceding stage of the FM modulator 10 is shared with the adder of the CIC filter arranged in the preceding and succeeding stages of the nonlinear amplitude control circuit 5, and is time-sequentially. Alternatively, a plurality of switches may be selectively used alternately. Thereby, the circuit scale can be greatly reduced.

  FIG. 27 is a diagram showing a block operation in the FM transmitter circuit of FIG. FIG. 27 shows a state of classification for each processing sample frequency of each circuit block, which is divided into two types, a normal processing block and an oversample processing block. In the normal processing block, areas are indicated by broken lines at B1 and B3. In the oversample processing block, areas are indicated by solid lines at B2 and B4. It is possible to make the adder used in the filter processing of the normal processing block and the adder used in the CIC filter of the oversampling processing block common by performing all the circuit block sequential processing, but it is necessary to raise the operation clock There is an increase in current consumption. Therefore, parallel processing must be performed as much as possible. However, if all are processed in parallel, the circuit scale increases.

  FIG. 28 is a timing chart showing parallel processing in the block operation of FIG. In the case of the example of FIG. 26, in order to perform parallel processing, as shown in FIG. 28, the processing of B1 and the processing of B4 may be made into blocks that can be processed in parallel from the difference in processing sample time. By doing so, the CIC filters used in the B2 circuit block and the B4 circuit block are sequentially processed, so that the adders can be shared. As a result, non-linear amplitude control by oversampling processing can be performed without increasing the circuit scale, and the performance can be improved while maintaining the circuit scale.

  In the above embodiment, the numerical values of the filter cutoff frequency and the out-of-band attenuation are merely examples, and are not limited thereto.

Effects of this embodiment.
In the FM transmitter circuit according to the present embodiment, as shown in FIG. 1, a CIC upsampler 4 and a CIC downsampler 6 each composed of a CIC filter are inserted in the front stage and the rear stage of the nonlinear amplitude control circuit 5, respectively. Yes. As a result, even if nonlinear processing is performed by oversampling processing in order to prevent aliasing noise, processing can be performed with only a few adders or subtractors, and the circuit scale and current consumption can be suppressed.

  In addition, when an audio signal in the 20 kHz band is actually transmitted using pre-emphasis in the FM transmitter circuit, an optimum sampling frequency setting and CIC filter setting for removing harmonic components generated by nonlinear processing and aliasing noise are removed. Determine the number of steps. As a result, the nonlinear amplitude control process is performed with a minimum-scale configuration capable of obtaining sufficient performance with the FM transmitter circuit.

  Furthermore, by changing the oversampling ratio and the number of stages of CIC filters depending on the signal components of the input audio source, the bandwidth used, and when priority is given to power consumption even if performance is somewhat reduced, it is optimal for the application. The configuration can be changed.

  Furthermore, in order to increase the modulation accuracy, the frequency modulator generally performs an oversampling process in order to up-convert to IF frequency or RF frequency and output. Here, in order to perform this oversampling, in order to remove only the image component with high accuracy without affecting the necessary data, a linear phase transversal method FIR having a steep cutoff characteristic and less ripples. Although it is common to use a filter, when an oversampling filter is composed of one FIR filter, the number of taps increases to several hundred taps, so hundreds of product-sum operations are performed to process one output sample. Is required. For this reason, if the multi-stage FIR filter is divided into a multi-stage FIR filter (multi-stage), the total number of taps is reduced, the number of operations is drastically reduced, and calculation errors are reduced due to the influence of the finite word length. It is known to be effective in reducing scale and power consumption.

  For example, in order to oversample an input signal with a sampling frequency of 24 kHz × 8 = 192 kHz to 16 times, when directly multiplying by 16 times, about 170 taps are required to obtain a blocking characteristic of about 100 dB, but 4 times × 2 Since it can be configured with FIR of about 45 taps in the first stage and about 15 taps in the subsequent stage when configured in stages, the total number of operations can be reduced.

  FIG. 9 is a spectrum diagram showing the frequency characteristics of the filter circuit in the previous stage (45 taps) of the oversampling circuit. FIG. 10 is a spectrum diagram showing the frequency characteristics of the filter circuit in the latter stage (15 taps) of the oversampling circuit. In the present embodiment, the FIR filter in the subsequent stage of the multistage oversampling process may be replaced with a CIC filter, and the CIC filter of the nonlinear amplitude control processing circuit 5 and the adder or subtracter may be shared. Thus, even if the oversampling process is performed by the nonlinear amplitude control processing circuit 5, the circuit scale does not increase.

  In the above embodiment, the circuit blocks 1 to 13 may be configured by hardware, and the functions of the circuit blocks 1 to 13 are configured by software using a digital computer such as a DSP (Digital Signal Processor). May be.

  As described above in detail, according to the present invention, the signal processing circuit from the input to the frequency modulation circuit for digital audio signals is digital signal processing, and the frequency conversion and high-frequency power amplification portions are analog processing. In the FM transmitter circuit, in the nonlinear amplitude control circuit for controlling the modulation degree stable by digital processing, the oversampled nonlinear amplitude control method using the CIC filter according to the present invention is used, thereby increasing the circuit scale. It becomes possible to suppress the aliasing noise of the unique harmonic component generated by digital processing. The present invention can be similarly used in digital nonlinear amplitude control other than the FM transmitter circuit as a technique for suppressing the aliasing noise of the harmonic component due to nonlinear processing.

  The suppression circuit for harmonic noise by the nonlinear amplitude control processing according to the present invention is applied to an application circuit such as a frequency modulator that performs frequency modulation for changing the frequency of a high-frequency signal in proportion to an audio signal, or an FM transmitter configured using the frequency modulator. Useful.

It is a block diagram which shows the structure of the FM transmitter circuit which concerns on one Embodiment of this invention. It is a block diagram which shows the structure of the FM transmitter circuit based on a prior art. It is a figure which shows the folding frequency for demonstrating the folding noise. FIG. 6 is a spectrum diagram showing frequency characteristics simulating harmonic generation for a single tone of 13 kHz in a pre-emphasis circuit with a time constant of 50 μsec. It is a spectrum figure which shows the frequency characteristic of a total harmonic distortion + noise (THD + N) when carrying out the amplitude limitation by a simple limiter with an nonlinear amplitude control circuit. 2 is a block diagram illustrating a configuration of a measurement circuit including a pre-emphasis circuit 22, a simple limiter 23, a low-pass filter (LPF) 24, and a de-emphasis circuit 25. FIG. It is a spectrum figure which shows the linear frequency characteristic of the relative power level measured by the measuring circuit of FIG. It is a spectrum figure which shows the logarithmic frequency characteristic of the relative power level measured by the measurement circuit of FIG. It is a spectrum figure which shows the frequency characteristic of the filter circuit of the front | former stage (45 tap) of an oversampling circuit. It is a spectrum figure which shows the frequency characteristic of the filter circuit of the back | latter stage (15 taps) of an oversampling circuit. It is a block diagram which shows the structure of the CIC filter basic circuit 41F used in order to comprise the CIC up sampler 4 and the CIC down sampler 6 of FIG. It is a block diagram which shows the structure of an example of the CIC downsampler 6a. (A) is a block diagram showing a configuration of a CIC downsampler 6b modified from the CIC downsampler 6a of FIG. 12, and (b) shows a configuration of a CIC downsampler 6c modified from the CIC downsampler 6b of FIG. FIG. It is a block diagram which shows the structure of the CIC upsampler 4 of FIG. FIG. 15 is a block diagram showing a configuration of an improved example of the filter circuit 61A of FIG. FIG. 15 is a block diagram showing a configuration of an improved example of the filter circuit 51A of FIG. It is a block diagram which shows the structure of the CIC downsampler 6 of FIG. It is a spectrum figure which shows the frequency characteristic of the CIC upsampler 4 of FIG. It is a spectrum figure which shows the frequency characteristic of the CIC downsampler 6 of FIG. It is an enlarged view of the notch part of FIG.18 and FIG.19. FIG. 3 is a spectrum diagram showing frequency characteristics of total harmonic distortion + noise (THD + N) of the FM transmission circuit according to the present embodiment in FIG. 1 and the FM transmission circuit according to the prior art in FIG. 2; It is a spectrum figure which shows the linear frequency characteristic of an output signal when the input signal of single tone 13kHz is input in the FM transmitter circuit which concerns on this embodiment of FIG. It is a spectrum figure which shows the logarithmic frequency characteristic of an output signal when the input signal of single tone 13kHz is input in the FM transmitter circuit which concerns on this embodiment of FIG. It is a spectrum figure which shows the frequency characteristic of a CIC filter when it cascade-connects by 6 steps | paragraphs. It is a block diagram which shows the structure of the FM modulation circuit which concerns on the modification of this invention. It is a spectrum figure which shows the frequency characteristic of a CIC filter when it cascade-connects by four steps instead of a 15-tap FIR filter of a back | latter stage. It is a figure which shows a block operation | movement in the FM transmitter circuit of FIG. It is a timing chart which shows the parallel processing in the block operation | movement of FIG.

Explanation of symbols

1 ... Audio signal input processing circuit,
2 Band-limited low pass filter (LPF),
3 ... Pre-emphasis circuit,
4 ... CIC upsampler,
5 ... Nonlinear gain control circuit,
6, 6a, 6b, 6c ... CIC downsampler,
7: A low-pass filter (LPF) for removing harmonic noise,
8 ... Pilot signal generator,
9 ... Composite signal generation circuit,
10: Frequency modulator,
11 ... DA converter (DAC),
12 ... RF analog circuit,
13: Oversampling processing circuit,
13a: Upsampler using FIR filter,
13b: Upsampler using CIC filter,
21 ... Input terminal,
22: Pre-emphasis circuit,
23 ... Simple limiter,
24. Low pass filter (LPF),
25 ... de-emphasis circuit,
26: Output terminal,
31 ... adder,
32, 32a, 32b, 32c, 33, 33n, 33a, 33b, 33c ... delay devices,
34 ... subtractor,
35 ... Amplifier,
36, 36a ... down sampler,
37 ... Amplifier,
38a ... Upsampler,
41, 42, 43, 44 ... CIC filter circuit,
41 ... CIC filter basic circuit,
51, 52, 53, 54 ... addition delay circuit,
51A, 61A ... Filter circuit,
61, 62, 63, 64, 61n, 62n, 63n, 64n ... delay subtraction circuit,
71: Clock signal generator,
72 ... Timing signal generator,
101, 102, 103, 111-116 ... switches.

Claims (9)

Pre-emphasis means for pre-emphasis processing on an input audio digital signal;
Non-linear amplitude control means for performing amplitude adjustment for modulation degree limitation on the signal output from the pre-emphasis means;
Low-pass filter means for removing harmonic noise from the signal output from the nonlinear amplitude control means;
In an FM transmission circuit comprising FM modulation means for FM-modulating and outputting a carrier wave signal in accordance with a signal output from the low-pass filter means,
Up-sampler means provided between the non-linear amplitude control means and the pre-emphasis means, and performs up-sampling at a predetermined up-sampling ratio using a predetermined number of cascade integrating comb filters (hereinafter referred to as CIC filters). When,
An FM transmitter circuit comprising: a downsampler unit provided between the nonlinear amplitude control unit and the low-pass filter unit and performing downsampling at a predetermined downsampling ratio using a CIC filter. The upsampling ratio is set to 8M,
The downsampling ratio is set to 1 / 8M,
The number of stages of the CIC filter is set to N,
2. The FM transmitter circuit according to claim 1, wherein M and N are natural numbers.   The sampling frequency of the input audio digital signal is set to 8 times the effective audio band (16 kHz to 24 kHz), the upsampling ratio of the nonlinear amplitude control means is set to 16 times, and the downsampling of the nonlinear amplitude control means is set. 3. The FM transmitter circuit according to claim 2, wherein the ratio is set to 1/16 times, and M = 1 and N = 3.   3. The FM transmitter circuit according to claim 2, wherein M and N can be changed. An oversampling processing unit that is provided before the FM modulation unit and that performs an oversampling process on an input signal;
The oversampling processing means includes
A first upsampler that upsamples the input signal using a FIR filter;
5. The apparatus according to claim 1, further comprising: a second up-sampler that is provided at a subsequent stage of the first up-sampler and up-samples an input signal using a CIC filter. The FM transmitter circuit described.   The CIC filter of the up-sampler means, the CIC filter of the down-sampler means, and the CIC filter of the oversampling processing means are shared, and are configured to selectively switch alternately in time series. The FM transmitter circuit according to any one of 1 to 5.   Each of the CIC filters is a filter circuit formed by cascading a plurality of stages of a circuit composed of one adder or subtracter and one delay unit, and a filter composed of one adder or subtractor and a plurality of delay elements. 7. A circuit according to claim 1, wherein each delay unit is selectively connected to the adder or the subtracter for serial processing. The FM transmitter circuit according to one. In an oversampling circuit that performs oversampling on the input signal,
A first upsampler that upsamples the input signal using a FIR filter;
An oversampling processing circuit comprising a second upsampler provided after the first upsampler and upsampling an input signal using a CIC filter.   Each of the CIC filters is a filter circuit formed by cascading a plurality of stages of a circuit composed of one adder or subtracter and one delay unit, and a filter composed of one adder or subtractor and a plurality of delay elements. 9. The oversampling processing circuit according to claim 8, wherein the oversampling processing circuit is configured to be replaced with a circuit, and serial processing is performed by sequentially connecting the delay units to the adder or the subtracter.

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