JP2010066486A - Large-sized lcos display element and method for manufacturing the same - Google Patents

Large-sized lcos display element and method for manufacturing the same Download PDF

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JP2010066486A
JP2010066486A JP2008232412A JP2008232412A JP2010066486A JP 2010066486 A JP2010066486 A JP 2010066486A JP 2008232412 A JP2008232412 A JP 2008232412A JP 2008232412 A JP2008232412 A JP 2008232412A JP 2010066486 A JP2010066486 A JP 2010066486A
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Kanetaka Sekiguchi
関口  金孝
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Citizen Finetech Miyota Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a large-sized LCOS display element which does not lower the quality of image display by division exposure, and to provide a method for manufacturing the same. <P>SOLUTION: The large-sized LCOS display element has an image display area and a peripheral drive circuit area on the outer periphery of the image display area, wherein the image display area is formed by one time of exposure, and the peripheral drive circuit area on the outer periphery of the image display area is connected by two or more times of exposure. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は大型LCOS表示素子及びその製造方法に関するものである。   The present invention relates to a large LCOS display element and a manufacturing method thereof.

液晶テレビ等に使用する液晶表示素子は大型化が進み40インチ、50インチ、60インチと更に大型化されてきている。液晶表示素子部は一括投影露光法により1回で露光するため一括投影露光装置も大型化が進んでいる。   Liquid crystal display elements used for liquid crystal televisions and the like have been increased in size and further increased to 40 inches, 50 inches, and 60 inches. Since the liquid crystal display element portion is exposed once by the batch projection exposure method, the size of the batch projection exposure apparatus is also increasing.

一方、電子ビューファインダーやプロジェクターに使用されるLCOS表示素子は小型化が要望され、表示領域は1インチ以下が主流である。通常シリコンマザー基板に多数のLCOS表示素子を形成するが、高精細な回路網を形成するため、露光にはステッパーが用いられる。   On the other hand, LCOS display elements used in electronic viewfinders and projectors are required to be miniaturized, and the display area is mainly 1 inch or less. Usually, a large number of LCOS display elements are formed on a silicon mother substrate, but a stepper is used for exposure in order to form a high-definition circuit network.

ステッパーは解像力が非常に高く、小形の表示素子の解像度を上げることが可能であり、集積回路の製造に使用されている。画像表示領域と画像表示領域外周に周辺駆動回路領域を有するLCOS表示素子の製造にも適している。   A stepper has a very high resolving power, can increase the resolution of a small display element, and is used in the manufacture of integrated circuits. It is also suitable for manufacturing an LCOS display element having an image display area and a peripheral drive circuit area on the outer periphery of the image display area.

但し、解像度の高いステッパーの露光面積は20〜30mm角程度と小さく、それより大きい対象物を露光するには何回かに分割して露光しなければならない。このようなパターン領域を繋ぎ合わせの精度をよくするためにはパターン領域の近傍にバーニアパターンを配置し位置合わせをしていた。(特許文献1参照)   However, the exposure area of a stepper with high resolution is as small as about 20 to 30 mm square, and in order to expose an object larger than that, it must be divided and exposed several times. In order to improve the accuracy of joining such pattern areas, a vernier pattern is arranged in the vicinity of the pattern area for alignment. (See Patent Document 1)

LCOS表示素子を大型化(例えば画像表示領域を1.5インチ)すると30mm角の露光面積では一回で露光できず分割して露光しなければならない。   When the LCOS display element is enlarged (for example, the image display area is 1.5 inches), the exposure area of 30 mm square cannot be exposed at one time but must be divided and exposed.

図2は表示素子の上面図であり、図3はシリコン基板に表示素子を4分割して露光する例を示す上面図である。シリコン基板1上に画像表示領域2と周辺駆動回路領域3を形成するが、露光領域は分割ラインXと分割ラインYでP1〜P4に分割し、露光の際は分割したラインの位置を合わせ繋ぎ合わせる。   FIG. 2 is a top view of the display element, and FIG. 3 is a top view showing an example in which the display element is exposed on a silicon substrate in four parts. The image display area 2 and the peripheral drive circuit area 3 are formed on the silicon substrate 1, but the exposure area is divided into P1 to P4 by the dividing line X and the dividing line Y, and the positions of the divided lines are aligned and connected at the time of exposure. Match.

図3はシリコン基板上に露光領域P1〜P4を露光する状態を模式的に示している。順番は特定しないが、4工程を経て表示素子の露光が終了する。LCOS表示素子は多層になっているので、各層で同様な露光を行う。   FIG. 3 schematically shows a state in which the exposure regions P1 to P4 are exposed on the silicon substrate. Although the order is not specified, the exposure of the display element is completed through four steps. Since the LCOS display element has multiple layers, the same exposure is performed on each layer.

特開平5−343285号公報JP-A-5-343285

前述のように画像表示領域を分割して露光をすると、如何に位置合わせを精確に行っても、温度による露光パターンの歪などで重ね合わせのズレは発生してしまう。   As described above, when the image display area is divided and the exposure is performed, no matter how accurately the alignment is performed, misalignment occurs due to distortion of the exposure pattern due to temperature.

配線は0.5〜5μm程度のため、重ね合わせの二重露光による配線の細りや露光ズレが発生すると繋ぎ部分で配線が切れやすく歩留りが低下する。   Since the wiring is about 0.5 to 5 [mu] m, if the wiring is thinned or the exposure shift occurs due to overlapping double exposure, the wiring is easily cut off at the connecting portion, and the yield is lowered.

繋ぎ部で寄生容量等が変化し駆動回路のばらつきが発生する。   The parasitic capacitance or the like changes at the connection portion, and the drive circuit varies.

画像表示領域と画像表示領域外周に周辺駆動回路領域を有する大型LCOS表示素子であって、画像表示領域は1回の露光で形成する大型LCOS表示素子とする。   A large LCOS display element having an image display area and a peripheral drive circuit area on the outer periphery of the image display area, and the image display area is a large LCOS display element formed by one exposure.

画像表示領域と周辺行動回路領域の間にダミー画素領域を設け、前記画像表示領域と前記ダミー画素領域は1回の露光で形成する大型LCOS表示素子とする。   A dummy pixel area is provided between the image display area and the peripheral action circuit area, and the image display area and the dummy pixel area are large LCOS display elements formed by one exposure.

画像表示領域と周辺駆動回路領域及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)には駆動回路を設けない大型LCOS表示素子とする。   A large LCOS display element in which no drive circuit is provided in an image display region and a peripheral drive circuit region, and a connection portion (overlapping portion) between the peripheral drive circuit region and the peripheral drive circuit region.

ダミー画素領域と周辺駆動回路領域及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)には駆動回路を設けない大型LCOS表示素子とする。   A large LCOS display element is provided in which a drive circuit is not provided in a connection portion (overlapping portion) between the dummy pixel region and the peripheral drive circuit region and between the peripheral drive circuit region and the peripheral drive circuit region.

画像表示領域またはダミー画素領域と周辺駆動回路領域、及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)の配線が他の部分より太い大型LCOS表示素子とする。   A large LCOS display element in which the image display region or dummy pixel region and the peripheral drive circuit region, and the connection between the peripheral drive circuit region and the peripheral drive circuit region (overlapping portion) are thicker than the other portions.

前記ダミー画素領域には、画像表示領域と同等の画素を配列する画素相当ダミー画素領域と大きな表示電極を設ける大画素ダミー領域とを具備する大型LCOS表示素子とする。   The dummy pixel region is a large LCOS display element having a pixel-equivalent dummy pixel region in which pixels equivalent to the image display region are arranged and a large pixel dummy region in which a large display electrode is provided.

画像表示領域を1回で露光する工程と、画像表示領域外周の周辺駆動回路領域を複数回露光する工程を具備する大型LCOS表示素子の製造方法とする。   A large-scale LCOS display element manufacturing method comprising a step of exposing an image display region at a time and a step of exposing a peripheral drive circuit region on the outer periphery of the image display region a plurality of times.

画像表示領域は分割しないので、画像表示領域内でのズレは発生せず、表示は均一に見える。   Since the image display area is not divided, no deviation occurs in the image display area, and the display looks uniform.

画像表示領域外周にダミー画素領域を設けたので、ダミー画素領域を黒表示とすることで見切りとして使用でき、またダミー画素領域と周辺駆動回路領域を接続することで画像表示領域への繋ぎ部の影響を無くすことができる。   Since the dummy pixel area is provided on the outer periphery of the image display area, it can be used as a parting by displaying the dummy pixel area in black, and by connecting the dummy pixel area and the peripheral drive circuit area, The influence can be eliminated.

二重露光する部分の繋ぎ部の配線を太くしたので、二重露光による配線細りに対応でき、配線が切れることを防げるので歩留りの低下がなくなる。   Since the wiring at the connecting portion of the double exposure portion is thickened, it can cope with the thinning of the wiring due to the double exposure, and it is possible to prevent the wiring from being cut, so that the yield is not lowered.

ダミー画素領域と周辺駆動回路領域及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)には駆動回路を設けないので、繋ぎ部による駆動回路のばらつきがなくなり、駆動回路のばらつきに起因する不良の発生がなくなる。   The drive circuit is not provided in the dummy pixel area and the peripheral drive circuit area, and the peripheral drive circuit area and the peripheral drive circuit area connecting portion (overlapping portion). The occurrence of defectives is eliminated.

ダミー画素領域には、画像表示領域と同等の画素を配列する画素相当ダミー画素領域と大きな表示電極を設ける大画素ダミー領域とを設けたので、大画素ダミー領域をベタ電極にして黒表示にし、大画素ダミー領域の下に下層の重ね合わせ部を配置することで下層の重ね合わせ部の目隠しとして利用でき、重ね合わせが楽になる。
また、ダミー画素領域は、大型LCOS表示素子をプロジェクター等に使用する場合に表示中心を出すための合わせの縦、横の自由度が増し、対向電極に見切りを設ける場合の中央合わせの自由度を増すことができる。
Since the dummy pixel area is provided with a pixel-equivalent dummy pixel area in which pixels equivalent to the image display area are arranged and a large pixel dummy area in which a large display electrode is provided, the large pixel dummy area is set as a solid electrode to display black, By disposing a lower layer overlapping portion under the large pixel dummy region, it can be used as a blindfold of the lower layer overlapping portion, and the overlapping becomes easy.
In addition, the dummy pixel area increases the vertical and horizontal degrees of freedom for aligning the display center when a large LCOS display element is used in a projector or the like. Can be increased.

画像表示領域と画像表示領域外周に周辺駆動回路領域を有する大型LCOS表示素子であって、画像表示領域は1回の露光で形成し、画像表示領域外周の周辺駆動回路領域を複数回露光して繋ぎ合わせる大型LCOS表示素子とする。   A large LCOS display element having an image display area and a peripheral drive circuit area on the outer periphery of the image display area. The image display area is formed by one exposure, and the peripheral drive circuit area on the outer periphery of the image display area is exposed multiple times. A large LCOS display element to be connected is used.

図1は本発明により形成された大型LCOS表示素子の上面図であり、図4はシリコン基板に表示素子を5分割して露光する例を示す上面図である。シリコン基板1上に画像表示領域2と周辺駆動回路領域3を形成するが、露光領域は画像表示領域P0、と周辺駆動回路領域を4つのP5、P6、P7、P8に分割し、5分割したラインの位置を合わせ繋ぎ合わせる。   FIG. 1 is a top view of a large LCOS display element formed according to the present invention, and FIG. 4 is a top view showing an example in which a display element is exposed on a silicon substrate by dividing the display element into five parts. The image display area 2 and the peripheral drive circuit area 3 are formed on the silicon substrate 1, and the exposure area is divided into five parts by dividing the image display area P0 and the peripheral drive circuit area into four P5, P6, P7, and P8. Align and connect the lines.

図4はシリコン基板上に露光領域P0、P5、P6、P7、P8を露光する状態を模式的に示している。例えば最初に露光領域P0を所定位置に露光し(図では28箇所)、その周囲にP5、P6、P7、P8の順に重ね合わせ露光をする。LCOS表示素子は多層になっているので、各層で同様な露光を行う。   FIG. 4 schematically shows a state in which the exposure regions P0, P5, P6, P7, and P8 are exposed on the silicon substrate. For example, the exposure region P0 is first exposed at a predetermined position (28 locations in the figure), and the surroundings are exposed in the order of P5, P6, P7, and P8. Since the LCOS display element has multiple layers, the same exposure is performed on each layer.

特に図示はしないが、重ね合わせて露光する部分の配線は他の配線より太くして二重露光による配線細りを防止する。また、重ね合わせて露光する部分は配線のみとし、駆動回路網は形成しない配置とする。   Although not shown in particular, the portion of the wiring that is overlaid and exposed is thicker than the other wiring to prevent wiring thinning due to double exposure. In addition, only the wiring is exposed and the driving circuit network is not formed.

図5は本発明による大型LCOS表示素子の第2実施例を示す上面図である。実施例1と異なるのは、画像表示領域2と外周駆動回路領域3の間にダミー画素領域2aを設けた点であり、その他は同じである。図1と同じ符号は同じ物であり、説明は省略する。露光としては、画像表示領域2とダミー画素領域2aは一つのマスクを使用する1回露光とし、その他は実施例1と同様に露光する。   FIG. 5 is a top view showing a second embodiment of a large LCOS display device according to the present invention. The difference from the first embodiment is that a dummy pixel region 2a is provided between the image display region 2 and the outer peripheral drive circuit region 3, and the other points are the same. The same reference numerals as those in FIG. As the exposure, the image display area 2 and the dummy pixel area 2a are exposed once using a single mask, and the others are exposed in the same manner as in the first embodiment.

図6は本発明による大型LCOS表示素子の第3実施例を示す上面図である。実施例2と異なるのは、ダミー画素領域を画像表示領域と同等の画素を配列する画素相当ダミー画素領域2bと大きな表示電極を設ける大画素ダミー領域2dとしていることと、下層の繋ぎ合わせ部を大画素ダミー領域2dの下である2cにしている点であり、その他は同じである。図5と同じ符号は同じ物であり、説明は省略する。露光としては、画像表示領域2と画素相当ダミー画素領域2bと大きな表示電極を設ける大画素ダミー領域2dを一つのマスクを使用する1回露光とし、その他は実施例2と同様に露光する。   FIG. 6 is a top view showing a third embodiment of a large LCOS display device according to the present invention. The difference from the second embodiment is that the dummy pixel area is a pixel-equivalent dummy pixel area 2b in which pixels equivalent to the image display area are arranged, and a large pixel dummy area 2d in which a large display electrode is provided. The other point is the same as 2c below the large pixel dummy region 2d. The same reference numerals as those in FIG. As the exposure, the image display area 2, the pixel-equivalent dummy pixel area 2b, and the large pixel dummy area 2d provided with a large display electrode are set as a single exposure using one mask, and the others are exposed in the same manner as in the second embodiment.

本発明により形成された大型LCOS表示素子の上面図Top view of a large LCOS display element formed in accordance with the present invention 表示素子の上面図Top view of display element シリコン基板に表示素子を4分割して露光する例を示す上面図Top view showing an example in which a display element is divided into four parts and exposed on a silicon substrate シリコン基板に表示素子を5分割して露光する例を示す上面図The top view which shows the example which divides a display element into 5 parts and exposes it to a silicon substrate 本発明による大型LCOS表示素子の第2実施例を示す上面図The top view which shows 2nd Example of the large sized LCOS display element by this invention. 本発明による大型LCOS表示素子の第3実施例を示す上面図The top view which shows 3rd Example of the large sized LCOS display element by this invention

符号の説明Explanation of symbols

1 シリコン基板
2 画像表示領域
2a ダミー画素領域
2b 画素相当ダミー画素領域
2c 下層の繋ぎ合わせ部
2d 大画素ダミー領域
3 周辺駆動回路
P0〜P8 露光領域
DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Image display area 2a Dummy pixel area 2b Pixel equivalent dummy pixel area 2c Lower layer joining part 2d Large pixel dummy area 3 Peripheral drive circuit P0 to P8 Exposure area

Claims (7)

画像表示領域と画像表示領域外周に周辺駆動回路領域を有する大型LCOS表示素子であって、画像表示領域は1回の露光で形成することを特徴とする大型LCOS表示素子。   A large LCOS display element having an image display area and a peripheral drive circuit area on an outer periphery of the image display area, wherein the image display area is formed by one exposure. 画像表示領域と周辺行動回路領域の間にダミー画素領域を設け、前記画像表示領域と前記ダミー画素領域は1回の露光で形成することを特徴とする請求項1記載の大型LCOS表示素子。   2. The large LCOS display element according to claim 1, wherein a dummy pixel area is provided between the image display area and the peripheral action circuit area, and the image display area and the dummy pixel area are formed by one exposure. 画像表示領域と周辺駆動回路領域及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)には駆動回路を設けないことを特徴とする請求項1記載の大型LCOS表示素子。   2. The large LCOS display element according to claim 1, wherein no drive circuit is provided in the image display area and the peripheral drive circuit area, and the peripheral drive circuit area and the peripheral drive circuit area connecting portion (overlapping portion). ダミー画素領域と周辺駆動回路領域及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)には駆動回路を設けないことを特徴とする請求項2記載の大型LCOS表示素子。   3. The large LCOS display element according to claim 2, wherein no driving circuit is provided in the dummy pixel area and the peripheral driving circuit area, and the peripheral driving circuit area and the peripheral driving circuit area connecting portion (overlapping portion). 画像表示領域またはダミー画素領域と周辺駆動回路領域、及び周辺駆動回路領域と周辺駆動回路領域繋ぎ部分(重ね合わせ部)の配線が他の部分より太いことを特徴とする請求項1から4のいずれかに記載の大型LCOS表示素子。   5. The wiring of an image display area or dummy pixel area and a peripheral drive circuit area, and a connection part (overlapping part) between the peripheral drive circuit area and the peripheral drive circuit area is thicker than other parts. A large LCOS display element according to any one of the above. 前記ダミー画素領域には、画像表示領域と同等の画素を配列する画素相当ダミー画素領域と大きな表示電極を設ける大画素ダミー領域とを具備することを特徴とする請求項2、4または5のいずれかに記載の大型LCOS表示素子。   6. The dummy pixel region includes a pixel-equivalent dummy pixel region in which pixels equivalent to the image display region are arranged and a large pixel dummy region in which a large display electrode is provided. A large LCOS display element according to any one of the above. 画像表示領域を1回で露光する工程と、画像表示領域外周の周辺駆動回路領域を複数回露光する工程を具備することを特徴とする大型LCOS表示素子の製造方法。   A method for producing a large LCOS display element, comprising: exposing an image display region at a time, and exposing a peripheral drive circuit region on the outer periphery of the image display region a plurality of times.
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Cited By (3)

* Cited by examiner, † Cited by third party
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JP2012147001A (en) * 2012-03-13 2012-08-02 Renesas Electronics Corp Method for manufacturing semiconductor integrated circuit
CN105336762A (en) * 2015-11-17 2016-02-17 深圳典邦科技有限公司 OLED (organic light emitting diode) image display device driven by silicon-based CMOS (complementary metal oxide semiconductor) and manufacture method
WO2023179511A1 (en) * 2022-03-25 2023-09-28 北京字跳网络技术有限公司 Silicon-based micro-display, display module and electronic device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08201853A (en) * 1994-11-24 1996-08-09 Toshiba Electron Eng Corp Electrode substrate and plane display apparatus
JPH1131822A (en) * 1997-07-10 1999-02-02 Seiko Epson Corp Liquid crystal display device and semiconductor device, and their manufacturing method
JP2000208397A (en) * 1999-01-13 2000-07-28 Seiko Epson Corp Production of active matrix substrate, electrooptical device and manufacture thereof
JP2000284492A (en) * 1999-03-30 2000-10-13 Seiko Epson Corp Device and method for exposure and storage medium recording program
JP2002229180A (en) * 2001-02-02 2002-08-14 Kawasaki Microelectronics Kk Reticle for manufacturing semiconductor device and method for manufacturing semiconductor device
JP2005292844A (en) * 2005-04-15 2005-10-20 Hitachi Ltd Image display device
JP2007316119A (en) * 2006-05-23 2007-12-06 Citizen Miyota Co Ltd Liquid crystal display, driving method of liquid crystal display and projection device using the same
JP2008064900A (en) * 2006-09-05 2008-03-21 Victor Co Of Japan Ltd Reflective liquid crystal display device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08201853A (en) * 1994-11-24 1996-08-09 Toshiba Electron Eng Corp Electrode substrate and plane display apparatus
JPH1131822A (en) * 1997-07-10 1999-02-02 Seiko Epson Corp Liquid crystal display device and semiconductor device, and their manufacturing method
JP2000208397A (en) * 1999-01-13 2000-07-28 Seiko Epson Corp Production of active matrix substrate, electrooptical device and manufacture thereof
JP2000284492A (en) * 1999-03-30 2000-10-13 Seiko Epson Corp Device and method for exposure and storage medium recording program
JP2002229180A (en) * 2001-02-02 2002-08-14 Kawasaki Microelectronics Kk Reticle for manufacturing semiconductor device and method for manufacturing semiconductor device
JP2005292844A (en) * 2005-04-15 2005-10-20 Hitachi Ltd Image display device
JP2007316119A (en) * 2006-05-23 2007-12-06 Citizen Miyota Co Ltd Liquid crystal display, driving method of liquid crystal display and projection device using the same
JP2008064900A (en) * 2006-09-05 2008-03-21 Victor Co Of Japan Ltd Reflective liquid crystal display device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012147001A (en) * 2012-03-13 2012-08-02 Renesas Electronics Corp Method for manufacturing semiconductor integrated circuit
CN105336762A (en) * 2015-11-17 2016-02-17 深圳典邦科技有限公司 OLED (organic light emitting diode) image display device driven by silicon-based CMOS (complementary metal oxide semiconductor) and manufacture method
WO2017084398A1 (en) * 2015-11-17 2017-05-26 深圳典邦科技有限公司 Silicon-based cmos driven oled image display device and manufacturing method
US10763318B2 (en) 2015-11-17 2020-09-01 Shenzhen Dianbond Technology Co., Ltd. Organic light-emitting diode (OLED) image display apparatus driven by silicon-based complementary metal oxide semiconductor (CMOS) and manufacturing method
WO2023179511A1 (en) * 2022-03-25 2023-09-28 北京字跳网络技术有限公司 Silicon-based micro-display, display module and electronic device

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