JP2010056499A - Method of manufacturing multilayer circuit board, and multilayer circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer circuit board where metal wiring high in shape accuracy is formed by lamination in manufacturing the multilayer circuit board by laminating metal wiring by a build-up method. <P>SOLUTION: A method of manufacturing this multilayer circuit board includes: a film formation process of forming a resin film 3 on a surface of a conductor column-containing circuit board with an insulation layer 2 formed thereon to embed a conductor column 1b projected on a first electric circuit 1a; a conductor column exposure process of forming circuit grooves 4 and exposing the conductor column 1b by carrying out laser processing from the outer surface side of the resin film; a catalyst sticking process of sticking a plating catalyst 6 to the whole outer surface; a film removal process of removing the resin film 3; and a plating treatment process of forming a second electric circuit 8 by forming an electrodeless plating film in a part with the plating catalyst 6 left, and forming interlayer connection between the first electric circuit 1a and the second electric circuit 8 by the conductor column 1b. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a multilayer wiring board and a multilayer wiring board.

  In recent years, in order to meet the demand for higher density of wiring circuits in the electric and electronic fields, the wiring width has been narrowed and the wiring interval has been narrowed.

  Conventionally, a subtractive method or an additive method is known as a method for forming a metal wiring on an insulating substrate. The subtractive method is a method in which an unnecessary portion of the metal foil deposited on the surface of the insulating base material is removed (subtractive) to leave only a portion of the metal foil where the metal wiring is to be formed. On the other hand, the additive method is a method in which electroless plating is applied only to a portion where metal wiring on the surface of the insulating base material is to be formed.

  The subtractive method is a method in which only a circuit forming portion is left by etching a thick metal foil. According to this method, a portion of the metal to be removed is wasted. On the other hand, the additive method does not waste metal because the electroless plating film can be formed only on the portion where the metal wiring is to be formed.

  An outline of a method of forming a metal wiring by a full additive method, which is a typical representative additive method, will be described with reference to process cross-sectional views of FIGS.

  First, as shown in FIG. 9A, a plating catalyst 102 is attached to the surface of the insulating substrate 100 provided with the through holes 101. Note that the surface of the insulating substrate 100 is roughened in advance. Next, as shown in FIG. 9B, a photoresist layer 103 is formed. Next, as shown in FIG. 9C, exposure is performed through a photomask 110 in which a predetermined circuit pattern is formed on the surface of the photoresist layer 103. Next, as shown in FIG. 9D, the circuit pattern is developed. Then, as shown in FIG. 9E, the metal wiring 104 is formed by applying electroless copper plating to the circuit pattern portion and the through hole formed by development. An electric circuit is formed on the surface of the insulating substrate 100 by such a process.

  According to such a conventional additive method, the following problems have occurred. That is, when the photoresist layer 103 is developed with high accuracy in accordance with the pattern of the photomask, it is possible to accurately form a plating film only on a portion not protected by the photoresist. However, when the photoresist layer 103 is not developed with high accuracy, the plating catalyst 102 is attached to the entire surface of the insulating base material 100, so that an original plating film as shown in FIG. In some cases, an excessive plating film 105 is formed on a portion that is not desired. When such an excessive plating film 105 is formed, a short circuit or migration is likely to occur between adjacent metal wirings. In particular, as the wiring interval is narrowed, such a problem is more likely to occur.

  In order to solve such a problem, the following Patent Document 1 discloses a process of coating a protective film on an insulating base material, and forming a wiring pattern by machining or laser beam irradiation on the insulating base material coated with the protective film. A step of forming a corresponding groove and through hole, a step of forming an activation layer on the entire surface of the insulating base material, a step of removing the protective film and leaving the activation layer only on the inner wall surface of the groove and the through hole, and insulation. A printed wiring board manufacturing method including a step of selectively forming a conductive layer only on an inner wall surface of a through hole and a groove on which an activation layer left on a substrate is attached is described. This method will be described with reference to the process cross-sectional view of FIG.

  First, as shown in FIG. 11A, the surface of the insulating substrate 200 is coated with a protective film 201. Next, as shown in FIG. 11B, a groove 202 and a through hole 203 having a desired wiring pattern are formed on the insulating base material 200 coated with the protective film 201 by laser processing. Next, as shown in FIG. 11C, a plating catalyst 204 is attached to the surfaces of the grooves 202 and the through holes 203 and the surface of the protective film 201. Then, as shown in FIG. 11D, the protective film 201 is peeled off, and the plating catalyst 204 is left only on the surfaces of the groove 202 and the through hole 203. Next, as shown in FIG. 11E, an electroless plating film is selectively formed only on the portion where the plating catalyst 204 is left, so that the conductive layer 205 is formed only on the inner wall surface of the through hole 203 and the groove 202. Is formed.

  By the way, in recent years, as a method of manufacturing a high-density multilayer wiring board, a build-up method is known in which circuits of each layer are sequentially formed one by one and stacked while forming interlayer connection vias. A general build-up method will be described with reference to the process cross-sectional view of FIG.

  In the build-up method, first, as shown in FIG. 12A, the metal wiring 301 is formed on the first-layer insulating substrate 300. Next, as illustrated in FIG. 12B, the insulating resin layer 302 is formed on the surface of the insulating base 300. The insulating resin layer 302 is formed, for example, by applying and curing a liquid resin, or bonding an insulating film. Next, as shown in FIG. 12C, blind via holes (IVH) 304 are formed in the insulating resin layer 302. The IVH 304 is formed by laser processing. As shown in FIG. 12C, a smear 305 that is a resin residue remains on the bottom of the IVH 304 formed by laser processing. Since the metal wiring 301 is a thin film, if the smear 305 is completely removed by laser processing, the metal wiring 301 may become thin or a hole may be formed. Therefore, laser processing must be completed before the insulating resin is completely removed. Thus, it is difficult to completely remove the smear 305 at the bottom of the IVH 304 by laser processing.

The smear 305 remaining at the bottom of the IVH 304 causes a conduction failure. For this reason, the smear 305 must be removed by desmear processing as shown in FIG. The desmear treatment is a treatment for dissolving and removing the smear 305 by dipping in a permanganic acid solution or the like. Note that the desmear process also serves as a process for roughening the surface of the insulating resin layer 302. This roughened surface improves the adhesion between the insulating resin layer 302 and the newly formed second-layer metal wiring 307. Next, as illustrated in FIG. 12E, a photoresist layer 306 is formed on the surface of the insulating resin layer 302. Next, as shown in FIG. 12F, after exposure through a photomask (not shown) having a predetermined circuit pattern formed on the surface of the photoresist layer 306, the circuit pattern is developed. Then, as shown in FIG. 12G, the metal wiring 307 is formed by performing electroless copper plating on the circuit pattern portion and the through hole formed by development.
JP 58-186994 A

  The additive method as described with reference to FIGS. 11A to 11E that can form high-precision metal wiring is applied to the build-up method as described with reference to FIGS. 12A to 12G. When forming a new metal wiring, there are problems as described below. A process when the additive method described in FIGS. 11A to 11E is applied to the build-up method will be described with reference to the process cross-sectional view of FIG.

  First, as shown in FIG. 13A, the metal wiring 301 is formed on the surface of the insulating substrate 300. Next, as illustrated in FIG. 13B, the insulating resin layer 200 is formed on the surface of the insulating substrate 300. Next, as illustrated in FIG. 13C, a protective film 201 is coated over the insulating resin layer 200. Next, as shown in FIG. 13D, grooves 202 and through holes 203 corresponding to the wiring patterns are formed on the insulating resin layer 200 coated with the protective film 201 by laser processing. At this time, a smear 305 remains at the bottom of the through hole 203 formed by laser processing. The smear 305 must be removed to cause poor conduction. However, when the desmear treatment is performed after the protective film 201 is formed, there is a problem that the protective film 201 swells or dissolves together with the smear 305 as shown in FIG. Further, when the desmear treatment is performed after the plating catalyst is attached, there is a problem that the plating catalyst in a portion where the metal wiring is to be formed is liberated. Therefore, in the method in which the additive method as described with reference to FIGS. 12A to 12E is applied to the build-up method, a multilayer wiring board having high-precision metal wiring cannot be obtained.

  The present invention solves the above-described problems, and provides a multilayer wiring board in which metal wirings with high shape accuracy are laminated when a multilayer wiring board is manufactured by stacking metal wirings by a build-up method. With the goal.

  The method of manufacturing a multilayer wiring board according to the present invention includes: a conductor pillar-containing circuit board having an insulating layer formed so as to embed a conductor pillar projecting at a predetermined position of the first electric circuit; A film forming step for forming a resin film on the surface of the insulating layer, and a circuit groove forming for forming a circuit groove having a depth at least equal to the thickness of the resin film by laser processing from the outer surface side of the resin film A step of exposing the conductor column by laser processing from the outer surface side of the resin film, and a plating catalyst on the exposed conductor column, the surface of the circuit groove, and the entire outer surface of the resin film. A second electrode is formed by forming an electroless plating film at a portion where the plating catalyst remains after the catalyst attaching step for attaching the resin film, the film removing step for removing the resin film, and the film removing step. Characterized in that it comprises a plating treatment step of forming an interlayer connection between the second electrical circuit and the first electrical circuit by the conductor posts and forming a tract. According to the above configuration, the resin film formed on the surface of the insulating layer of the conductor pillar-containing circuit board is partially removed by laser processing to form a circuit groove, and the surface of the circuit groove and the resin film that has not been removed are formed. After the plating catalyst is attached to the entire surface, the plating catalyst can be attached only to the surface of the circuit groove by removing the resin film. Then, an electroless plating film is formed only on the portion defined by the portion to which the plating catalyst is attached. As described above, by attaching the plating catalyst only to the portion where the electric circuit is desired to be formed, an electric circuit maintaining a highly accurate contour can be formed. In addition, after the conductor pillar is exposed by laser processing from the outer surface side of the resin film, it is newly formed on the first electric circuit and the insulating layer formed in advance to form an electroless plating film. The second electrical circuit can be connected to the interlayer by a conductor post. In this case, since the conductor column is formed in the lower first electric circuit, even if the conductor column is exposed so as to be dug, the first electric circuit itself is not damaged. Therefore, the smear on the surface of the conductor column can be completely removed by high energy laser processing. For this reason, it is possible to maintain a sufficient interlayer connection between the first electric circuit and the second electric circuit via the conductor pillar without performing a desmear process. Thus, according to this method, since it is possible to make an interlayer connection without requiring a desmear process, the resin film used for forming the second electric circuit is peeled off or dissolved by the desmear process. Can be suppressed. As a result, it is possible to maintain the outline of the newly formed second electric circuit with high accuracy, and to prevent the fragments of the electroless plating film from remaining between the circuit lines. Therefore, even when the second electric circuit having a narrow wiring width or wiring interval is stacked by the build-up method, an electric circuit in which occurrence of short circuit or migration is suppressed is formed. In the present specification, the “conductor column” is a conductive convex portion protruding in a substantially vertical direction on the surface of the electric circuit and having a sufficiently thick thickness compared to the metal foil forming the electric circuit. Well, the shape is not particularly limited. Accordingly, a columnar shape such as a cylinder or a prism, and a conical shape called a conductor bump are also included.

  Moreover, it is preferable that the conductor pillar is exposed such that a part of the top of the conductor pillar is removed by laser processing. The conductor pillar has a sufficient thickness as compared with the metal foil forming the first electric circuit. Therefore, even if a high intensity laser is irradiated to the conductor pillar, the metal foil forming the first electric circuit is not damaged. Therefore, by exposing to the extent that a part of the top of the conductor column is removed by laser processing, it is possible to sufficiently remove smear remaining on the surface of the conductor column without performing a desmear treatment.

  Moreover, it is preferable that the said circuit groove is formed so that the said insulating layer may be dug through the said resin film. In such a case, the formed plating film can be thick, or a circuit can be formed in a deep portion of the insulating layer as shown in FIG.

  In the method for manufacturing a multilayer wiring board, the resin film further includes a fluorescent substance, and after the film removal step, the film removal process is performed by using light emission from the fluorescent substance. It is preferable to provide an inspection process. In the manufacturing method of the multilayer wiring board as described above, when the wiring width and the wiring interval become extremely small, the film of the part that should originally be removed between the adjacent wirings cannot be completely removed, There is a concern that it may remain slightly. In addition, there is a concern that the resin film fragments removed during laser processing may enter and remain in the formed circuit groove. When the resin film remains between the wirings, a plating film is formed at the portion, which may cause migration or short circuit. In addition, if a resin film fragment remains in the formed circuit groove, it may cause poor heat resistance and propagation loss of the electric circuit. In such a case, the resin film is made to contain a fluorescent substance as described above, and after the film removal step, only a portion where the film remains by irradiating a predetermined light-emitting source on the film removal surface. By making it emit light, it is possible to inspect the presence or absence of film removal failure and the location of film removal failure.

  The thickness of the resin film is preferably 10 μm or less from the viewpoint that a fine electric circuit can be formed with higher accuracy.

  The resin film is a swellable resin film that is peeled off from the surface of the insulating layer by being swollen by a predetermined liquid. Specifically, the swelling degree with respect to the liquid is 50% or more. Such a swellable resin film is preferred. By using such a swellable resin film, the resin film can be easily peeled and removed from the surface of the insulating layer.

  The conductor pillar-containing circuit board is a board formed by integrally laminating an insulating layer on a surface of a conductor pillar projecting in advance at a predetermined position of the first electric circuit. Since the pillar can be easily embedded in the insulating layer, it is preferable from the viewpoint of easy manufacture.

  Further, the conductor column-containing circuit board is obtained by applying an insulating layer by applying a resin solution to a formation surface of a conductor column protruding in advance at a predetermined position of the first electric circuit and then curing the resin solution. It is preferable that the thickness of the insulating layer is easy to adjust.

  In addition, after the conductive pillar-containing circuit board forms an insulating layer on the surface of the first electric circuit, the electric circuit is formed by drilling from the opposite surface of the insulating layer to the surface on which the first electric circuit is formed. It is preferable that the substrate is obtained by forming conductor columns in a portion that has been exposed and formed by growing a plating film from the exposed surface of the first electric circuit. In this case, the step of growing and forming a plating film on the drilled portion is a step of growing and forming a plating film by electrolytic plating using the exposed first electric circuit as an electrode after the desmear treatment after the drilling. More preferably. According to this method, the surface of the first electric circuit can be desmeared before the resin film is formed, and then conductive pillars that become interlayer connection portions can be formed by electrolytic plating. Therefore, there is no possibility that the resin film at the time of circuit formation swells or dissolves due to desmear treatment. In this case, since the exposed first electric circuit can be used as an electrode and the plating can be grown and formed by electrolytic plating, the conductive column can be easily formed. Further, when it is difficult to supply power to the first electric circuit, a plating film can be grown and formed by electroless plating using the exposed surface of the first electric circuit as a plating nucleus.

  In addition, as another method for manufacturing a multilayer wiring board according to the present invention, an insulating layer forming step of forming an insulating layer on the surface of the first electric circuit formed on the substrate, and a resin film is formed on the surface of the insulating layer A film forming step for forming a circuit groove having a depth of at least the thickness of the resin film by laser processing from the outer surface side of the resin film, and the circuit groove surface and the resin. A catalyst attaching step for attaching a plating catalyst to the entire outer surface of the coating; a coating removing step for removing the resin coating; and an electroless plating film formed on a portion where the plating catalyst remains after the coating removing step. A plating process for forming a second electric circuit by the above, a drilling process for exposing the surface of the first electric circuit by drilling in a predetermined portion of the second electric circuit, and exposure Further, an interlayer for forming an interlayer connection portion between the first electric circuit and the second electric circuit by forming a conductive pillar in a portion drilled by growing a plating film from the surface of the first electric circuit. And a connecting portion forming step. According to the said structure, the interlayer connection part with a 1st electric circuit can be formed in a desired part after formation of a 2nd electric circuit. In addition, in order to form a conductor pillar that becomes an interlayer connection portion between the first electric circuit and the second electric circuit by forming a hole after the formation of the second electric circuit and growing a plating film, the surface of the first electric circuit is formed. Even if the desmear process is performed to remove smear, the formation of the second electric circuit is not affected. As a result, by the build-up method, even when the second electric circuit with a narrow wiring width or wiring interval is stacked, a second electric circuit in which occurrence of short circuit or migration is suppressed is formed. In this case, since the exposed first electric circuit can be used as an electrode and the plating can be grown and formed by electrolytic plating, the conductive column can be easily formed. Further, when it is difficult to supply power to the first electric circuit, a plating film can be grown and formed by electroless plating using the exposed surface of the electric circuit as a plating nucleus.

  According to the manufacturing method of the present invention, when manufacturing a multilayer wiring board in which a new second electric circuit is laminated on a previously formed first electric circuit, the shape accuracy of the newly formed second electric circuit is obtained. While maintaining the above, it is possible to obtain a multilayer wiring board in which poor conduction with the first electric circuit is suppressed.

[First Embodiment]
FIG. 1 is a process diagram for explaining the present embodiment. In FIG. 1, 1 and 2 are insulating layers (insulating base materials), 1a is a first electric circuit, 3 is a resin film, 4 is a circuit groove, 5 is a through hole, 6 is a plating catalyst, 7 is an electroless plating film, It is. A substantially conical conductor bump (conductor pillar) 1b is formed at a predetermined position on the surface of the first electric circuit 1a.

  In the manufacturing method of the present embodiment, first, as shown in FIG. 1 (A), the first electric circuit 1a formed on the surface of the insulating base material 1 and the insulating base material 2 are superposed to form a first electric circuit 1a. The conductive bumps 1b projecting at predetermined positions are laminated so as to be buried. Thereby, as shown in FIG. 1 (B), the conductor pillar containing circuit board 9 by which lamination | stacking integration was carried out is formed. At this time, the conductor bumps 1 b protruding from the surface of the first electric circuit 1 a are buried by entering the insulating base 2.

  As the insulating base material, various organic substrates that can be used for manufacturing a multilayer wiring board are used. As specific examples of the organic substrate, an epoxy resin sheet, an acrylic resin sheet, a polycarbonate resin sheet, a polyimide resin sheet, and the like can be used without any particular limitation. In addition to the resin sheet, a prepreg obtained by impregnating a fiber substrate with a thermosetting resin can also be preferably used. Although the thickness of the insulating base material 2 is not specifically limited, For example, it is preferable that it is about 10-200 micrometers, Furthermore, about 20-100 micrometers.

  Further, in forming the conductive pillar-containing circuit board 9, the insulating layer 2 may be formed by applying a resin solution to the surface of the insulating layer 1 on the side where the first electric circuit 1a is formed and then curing the resin solution. Good. As a resin solution used in such a method, a resin solution such as an epoxy resin, a polyphenylene ether resin, an acrylic resin, or a polyimide resin, which has been conventionally used for manufacturing a multilayer wiring board, can be used without any particular limitation. .

  In the present embodiment, the first electric circuit 1 a is formed on the surface of the insulating base 1. And the conductor bump 1b is protrudingly provided in the predetermined position of the surface of the 1st electric circuit 1a. The first electric circuit 1a can be formed by a conventionally known circuit forming method such as a subtractive method or an additive method.

  The conductor bump 1b can be formed by screen-printing a conductive paste on the surface of the first electric circuit 1a. Specifically, for example, a conductive paste such as a silver paste is printed at a predetermined position on the surface of the first electric circuit 1a by screen printing. In addition, when a desired height is not obtained by one printing, screen printing may be repeated a plurality of times to add the conductive paste in the height direction. Then, after the conductive paste is placed at a predetermined position, the conductive bump is formed by forming into a conical shape having a sharp top in a semi-cured state and further curing. Further, instead of molding in a semi-cured state, the conductive paste may be placed in a predetermined position, cured, and then molded into a predetermined shape using an etching process. As another method, a relatively thick metal foil may be formed by etching using a photoresist method, or may be formed using a plating process.

  The shape, size, interval, etc. of the conductor bump 1b are not particularly limited. Specifically, for example, a substantially conical shape having a height of about 5 to 200 μm and a bottom surface diameter of about 10 to 500 μm can be mentioned.

  As shown in FIG. 2A, for example, the conductive bump 1b is embedded in the insulating layer 2 on the surface of the first electric circuit 1a. 2B, as shown in FIG. 2B, the insulating bump 2 is pierced so that the conductor bump 1b penetrates, and only the top of the conductor bump 1b is exposed. The form is not particularly limited.

  The insulating layer 2 can be formed, for example, by superposing the insulating base material 2 on the first electric circuit 1a formed on the surface of the insulating layer 1 and performing heat pressing. When using a prepreg as the insulating base material 2, it may be cured by this heating press.

  Next, as shown in FIG. 1C, a resin film 3 is formed on the main surface of the conductor column containing circuit board 9 (the surface of the insulating layer 2 facing the protruding side of the conductor bump 1b) (film forming step). ).

  The resin film 3 is formed by applying a liquid material to the surface of the insulating layer 2 and then drying or bonding a pre-formed resin film to the surface of the insulating layer 2.

  As the resin film 3, a resin film that can be easily removed from the surface of the insulating layer 2 by swelling or dissolving with a predetermined liquid can be preferably used. Specifically, for example, a film made of a soluble resin that can be easily dissolved in an organic solvent or an alkaline solution, or a film made of a swellable resin that can swell with a predetermined solvent (in this specification, a swellable resin) Also referred to as a film). Among these, a swellable resin film is particularly preferable because accurate removal is easy.

  As the swellable resin film, a resin film having a degree of swelling with respect to the swelling liquid of 50% or more, more preferably 100% or more and 1000% or less can be preferably used. When the degree of swelling is too low, the swellable resin film tends to be difficult to peel, and when it is too high, the film strength is reduced, and the film tends to be difficult to peel due to tearing when peeling. There is. Such a swellable resin has a coating formed by applying an elastomer suspension or emulsion on the surface of the insulating layer 2 and then drying, or applying the suspension to the support substrate and then drying the insulating layer 2. It can be formed by transferring to the surface.

  Specific examples of such elastomers include diene elastomers such as styrene-butadiene copolymers, acrylic elastomers such as acrylic ester copolymers, and polyester elastomers. According to such an elastomer, a swellable resin film having a desired swelling degree can be easily formed by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.

  The coating method is not particularly limited, and conventionally known spin coating methods, bar coater methods, and the like can be used without particular limitation.

  The thickness of the resin film 3 is 10 μm or less, further 5 μm or less, preferably 0.1 μm or more, and more preferably 1 μm or more. If the thickness of the resin film 3 is too thick, the accuracy tends to decrease when a fine circuit pattern is formed by laser processing. If the thickness is too thin, a resin film having a uniform film thickness is formed. There is a tendency to become difficult.

  Next, as shown in FIG. 1 (D), laser processing is performed from the outer surface side of the resin film 3 to form a circuit groove 4 having a depth at least equal to the thickness of the resin film (circuit groove forming step). ). By using laser processing in this way, a fine circuit groove having a wiring width of 20 μm or less can be easily formed. By forming such fine metal wiring, an antenna circuit or the like that requires high-precision processing can be easily formed. Further, according to laser processing, the cutting depth and the like can be freely adjusted by changing the intensity of the laser. Further, according to the laser processing, only the resin film of the portion where the electric circuit of the insulating layer 2 is desired to be formed can be selectively removed. Thereby, since the plating catalyst can remain only in a portion where the electric circuit of the insulating layer 2 is to be formed through a catalyst attaching step and a film removing step which will be described later, the second electric circuit maintaining a highly accurate contour. Can be formed.

  And as shown in FIG.1 (D), the conductor bump 1b is exposed by carrying out laser processing from the outer surface side of the resin film 3 (conductor pillar exposure process). At this time, through holes 5 penetrating the insulating layer 2 are formed by exposing the conductor bumps 1b. In order to sufficiently remove the smear on the surface, the conductor bump 1b may be exposed so that the top of the conductor bump 1b is removed and the conductor bump 1b is dug as shown in FIG. preferable. Since the conductor bump 1b has a sufficient thickness as compared with the first electric circuit 1a, no hole is formed even when the conductor bump 1b is irradiated with a high laser intensity. Therefore, even if laser processing is performed with high strength so as to dig out the conductor bumps 1b protruding from the surface of the first electric circuit 1a, the first electric circuit 1a itself is not damaged. Then, by exposing the conductor bump 1b in this way, it is possible to completely remove smear on the surface of the conductor bump 1b. Therefore, sufficient interlayer connection can be maintained between the metal wiring and the conductor bump of the second electric circuit newly formed without performing desmearing. That is, after exposing the conductor bump 1b by laser processing, the exposed conductor bump 1b and the newly formed second electric circuit can be interlayer-connected by the plating film by performing a plating process described later.

  Next, as shown in FIG. 1E, a plating catalyst or a precursor thereof is attached to the entire outer surfaces of the conductor bumps 1b, the circuit grooves 4 and the resin film 3 exposed by laser processing (catalyst attaching step).

  The plating catalyst 6 is a catalyst or precursor thereof that is imparted in order to sufficiently and effectively grow and form an electroless plating film in a plating process described later, and is known as a catalyst for electroless plating. If there is no particular limitation, it can be used. Specific examples thereof include, for example, metallic palladium (Pd), platinum (Pt), silver (Ag), etc., or precursors that generate these.

Examples of the method for attaching the plating catalyst 6 include the following methods. First, in order to remove oil and the like adhering to the surface of the insulating layer 2, the surface is washed with hot water in a surfactant solution for a predetermined time. Next, after immersing in stannous chloride aqueous solution with a concentration of about 0.1% to adsorb stannous chloride, the palladium chloride is further immersed in a palladium chloride aqueous solution with a concentration of about 0.01%. Adsorb. The oxidation-reduction reaction (SnCl ₂ + PdCl ₂ → SnCl ₄ + Pd ↓) between the adsorbed stannous chloride and palladium chloride on the surface of the laser-processed portion and the entire surface of the resin film 3 not laser-processed. ) To form metallic palladium.

  By such a catalyst adhesion treatment, as shown in FIG. 1E, the plating catalyst 6 can be adhered to the surface of the laser-processed portion and the entire surface of the resin film 3 that has not been laser-processed.

  Next, as shown in FIG. 1 (F), the resin film 3 is removed by swelling or dissolving with a predetermined liquid (film removal step). According to this step, the plating catalyst 6 is left only on the surface of the circuit groove 4 and the exposed conductor bump 1b formed by laser processing, and the plating catalyst 6 attached to the other portion (the surface of the resin film 3). Can be removed.

  In the film removal step, the resin film 3 can be removed by immersing it in a predetermined liquid such as an alkaline solution for a predetermined time to dissolve and remove the resin film 3 or swell and peel the resin film 3. A method is mentioned. As the alkaline solution, an alkaline aqueous solution having a predetermined concentration, for example, a sodium hydroxide aqueous solution having a concentration of about 1 to 10% can be used. At this time, in order to increase the removal efficiency, it is preferable to irradiate with ultrasonic waves during the immersion. In addition, when it swells and peels, you may peel off with a light force as needed.

  Next, as shown in FIG. 1G, after the film removal step, an electroless plating film is formed in a portion where the plating catalyst 6 remains (plating process step). By this step, the electroless plating film can be deposited only on the portion where the second electric circuit is to be formed. Also, by this step, the newly formed upper second electric circuit 8 and lower first electric circuit 1a are interlayer-connected via the conductor bumps 1b and the electroless plating film 7.

  The electroless plating film is formed by immersing the conductive column-containing circuit board 9 after the film removal step in an electroless plating solution so that the electroless plating film 7 is deposited only on the portion where the plating catalyst 6 is attached. A method may be used.

  Examples of the metal used for electroless plating include Cu (copper), Ni (nickel), Co (cobalt), and Al (aluminum). Among these, plating containing Cu as a main component is preferable from the viewpoint of excellent conductivity, and when Ni is contained, it is preferable from the viewpoint of excellent corrosion resistance and adhesion to solder or the like.

  The film thickness of the electroless plating film 7 is not particularly limited, but is preferably about 0.1 to 10 μm, more preferably about 1 to 5 μm.

  By such a plating process, the electroless plating film 7 can be deposited only on the laser-processed portion of the surface of the insulating layer 2. Thereby, the second electric circuit 8 is formed on the surface of the insulating layer 2, and the formed second electric circuit 8 and the first electric circuit 1a are connected to each other by the conductor bump 1b.

  Through such steps, the multilayer wiring board 10 having the second electric circuit 8 is formed on the surface of the insulating layer 2 as shown in FIG. In the multilayer wiring board 10, the upper second electric circuit 8 is electrically connected to the lower first electric circuit 1 a through the conductor bump 1 b and the electroless plating film 7.

  In addition, if the manufacturing method of this embodiment is used, as shown in FIG. 4, by adjusting the removal depth by laser processing, the second electric circuit 8a formed in the deep part of the insulating layer 2 and 8a As in 8b, the second electric circuit can be formed at a position where the depths are different from each other. Further, as shown in 8c, a metal wiring having a large cross-sectional area can be easily formed by forming a deep groove and forming a thick plating film. In this case, it is preferable because the electric capacity of the metal wiring can be increased and the strength of the metal wiring can be improved.

  In the manufacturing method of the multilayer wiring board, by adding a fluorescent substance to the resin film 3, the fluorescent substance is irradiated by irradiating the surface to be inspected with ultraviolet light or near ultraviolet light after the film removing step described above. The film removal failure can be inspected using the luminescence. In the method for manufacturing a multilayer wiring board according to the present embodiment, a metal wiring having an extremely small wiring width and wiring interval can be formed. In such a case, as shown as a resin film residue 53 in the enlarged top view of the circuit 50 in FIG. 5, there is a concern that the resin film between the adjacent metal wirings 51 may remain without being completely removed. The When the resin film remains between the metal wirings, a plating film is formed at the portion, which may cause migration or short circuit. In such a case, the resin film 3 is made to contain a fluorescent substance, and after the film removal process, the film removal surface is irradiated with a predetermined light emission source so that only the portion where the film remains is emitted by the fluorescent substance. Thus, it is possible to inspect the presence or absence of film removal failure and the location of film removal failure.

  The fluorescent substance that can be contained in the resin film used in this inspection process is not particularly limited as long as it exhibits light emission characteristics when irradiated with light from a predetermined light source. Specific examples thereof include Fluoresceine, Eosine, Pyroline G, and the like.

  The portion where the light emission from the fluorescent substance is detected by this inspection process is the portion where the resin film 3 remains. Therefore, by removing the portion where light emission is detected, it is possible to suppress the formation of a plating film on that portion. Thereby, generation | occurrence | production of a migration or a short circuit can be suppressed beforehand.

  In the present embodiment, as described above, the first electric circuit 1a formed on the surface of the insulating base 1 is used. However, instead of using an electric circuit, a metal foil with no circuit formed may be used. Good. In this case, a metal foil sheet in which conductor bumps are formed at predetermined portions can be used. Then, after the plating process, an electric circuit may be formed by etching the metal foil laminated and integrated by a subtractive method.

  According to the method for manufacturing a multilayer wiring board described above, when a multilayer wiring board is manufactured by stacking electrical circuits by the build-up method, the conductor bumps formed on the lower first electrical circuit are laser processed. By exposing and forming the electroless plating film, interlayer connection between the newly formed upper second electric circuit and the lower first electric circuit formed in advance can be easily realized. In addition, since the newly formed second electric circuit is formed by attaching the plating catalyst only to the portion where the metal wiring is to be formed, an electric circuit with high shape accuracy can be obtained. Thereby, it is possible to provide a multilayer wiring board on which an electric circuit with high shape accuracy is formed. By using such a multilayer wiring board manufacturing method, it is possible to manufacture a multilayer wiring board used for applications such as an IC substrate having a narrow wiring width and wiring interval, a printed wiring board for a mobile phone, and a three-dimensional wiring board. .

[Second Embodiment]
2nd Embodiment demonstrates the other manufacturing method of a conductor pillar containing circuit board by which an insulating layer is formed so that the conductor pillar protruded in the predetermined position of the 1st electric circuit may be embedded. In addition, since each process other than manufacture of a conductor pillar containing circuit board can use the process similar to 1st Embodiment, detailed description is abbreviate | omitted.

  The manufacturing method of the conductor pillar containing circuit board in 2nd Embodiment is demonstrated with reference to FIG.

  In FIG. 6, 1 and 2 are insulating layers (insulating base materials), 1a is a first electric circuit, 60 is a laser processed hole, 61 is a smear, and 62 is a conductor post.

  In the manufacturing method of the present embodiment, first, as shown in FIGS. 6A and 6B, the insulating layer 2 is formed on the surface of the insulating layer 1 on which the first electric circuit 1a is formed. Then, as shown in FIG. 6C, the surface of the first electric circuit 1a is formed by drilling the insulating layer by laser processing or the like from the surface opposite to the bonding surface of the insulating layer 2 with the first electric circuit 1a. To expose. At this time, a smear 61 that is a resin residue remains on the surface of the first electric circuit 1a at the bottom of the hole 60 formed by laser processing, as shown in FIG. The smear 61 remaining at the bottom of the hole 60 causes poor conduction. For this reason, it is preferable to remove the smear 61 as shown in FIG. In the desmear treatment, a known method for dissolving and removing the smear 61 by being immersed in a permanganic acid solution or the like is used without any particular limitation.

  Then, after the desmear treatment, the plating is grown from the exposed surface of the first electric circuit 1a by electrolytic plating or electroless plating, so that the surface of the first electric circuit 1a is formed as shown in FIG. A conductor column 62 is projected. When electrolytic plating is performed, the first electric circuit 1a functions as an electrode, and when electroless plating is performed, the surface of the first electric circuit 1a functions as a plating nucleus.

  By using the same steps as those described in the first embodiment except that the above-described conductor pillar-containing circuit board 69 is used instead of the conductor pillar-containing circuit board 9 used in the first embodiment, multilayer wiring is achieved. A substrate is obtained. That is, the resin film 3 is formed on the surface of the conductor column-containing circuit board 69 (film forming process). And the circuit groove | channel 4 of the depth more than the thickness of the said resin film is formed at least by the laser processing from the outer surface side of the resin film 3 (circuit groove formation process). And the conductor pillar 62 is exposed by carrying out laser processing from the outer surface side of the resin film 3 (conductor pillar exposing step). And a plating catalyst or its precursor is made to adhere to the whole outer surface of the conductor pillar 62 exposed by laser processing, the circuit groove 4, and the resin film 3 (catalyst attachment process). Then, the resin film 3 is removed by swelling or dissolving with a predetermined liquid (film removal step). Then, after the film removal step, an electroless plating film is formed in a portion where the plating catalyst 6 remains (plating process step). Through such steps, a multilayer wiring board having the second electric circuit 8 is formed on the surface of the insulating layer 2. In the multilayer wiring board, the upper second electric circuit 8 is electrically connected to the lower first electric circuit 1 a through the conductor pillar 62 and the electroless plating film 7.

  According to such a method, it is possible to perform desmear treatment on the surface of the first electric circuit before forming the resin film, and then form conductive columns to be interlayer connection portions by electrolytic plating or electroless plating. Therefore, there is no possibility that a resin film or the like is generated by the desmear treatment. In addition, when the exposed first electric circuit is fed as an electrode, the conductive pillar can be formed more efficiently when the plating is grown by electrolytic plating. Further, when it is difficult to supply power to the first electric circuit, a plating film can be grown and formed by electroless plating using the exposed surface of the electric circuit as a plating nucleus.

[Third Embodiment]
In the third embodiment, as described in the first embodiment and the second embodiment, instead of using the conductive pillar formed before the resin film 3 is formed, the resin film is peeled and the second electric circuit is formed. A method of forming a conductor post that will be an interlayer connection after the formation will be described. Detailed description of the same steps as those described in the first embodiment and the second embodiment will be omitted.

  In the manufacturing method of the present embodiment, first, as shown in FIG. 7A, the insulating layer 2 is laminated on the first electric circuit 1a formed on the surface of the insulating base 1. As a result, as shown in FIG. 7B, a laminated conductor-integrated circuit board 79 is formed.

  Next, as shown in FIG. 7C, a resin film 3 is formed on the surface of the insulating layer 2 (film formation process). Next, as shown in FIG. 7D, the circuit groove 4 having a depth at least equal to the thickness of the resin film 3 is formed by laser processing from the outer surface side of the resin film 3 (circuit groove formation). Process).

  Next, as shown in FIG. 7E, a plating catalyst 6 is attached to the entire outer surface of the circuit groove 4 and the resin film 3 formed by laser processing (catalyst attaching step). By such a catalyst adhesion treatment, the plating catalyst 6 can be adhered to the entire surface of the circuit groove 4 that has been laser processed and the surface of the resin film 3 that has not been laser processed.

  Next, as shown in FIG. 7F, the resin film 3 is removed by swelling or dissolving with a predetermined liquid (film removal step). According to this step, it is possible to leave the plating catalyst 6 only on the surface of the circuit groove 4 formed by laser processing, and to remove the plating catalyst 6 attached to the other surface of the resin film 3.

  Next, as shown in FIG. 7G, after the film removal step, an electroless plating film is formed in a portion where the plating catalyst 6 remains (plating process step). By this step, the electroless plating film can be deposited only on the portion where the second electric circuit 8 is to be formed.

  Next, as shown in FIG. 8 (A), the surface of the first electric circuit 1a is exposed by drilling at a portion where the interlayer connection of the second electric circuit 8 is to be formed (drilling step). As described above, after the second electric circuit 8 is formed, an interlayer connection portion can be formed at a desired portion by drilling the first electric circuit. At this time, a smear 81 that is a resin residue remains on the surface of the first electric circuit 1a at the bottom of the hole 80 formed by laser processing, as shown in FIG. The smear 81 remaining at the bottom of the hole 80 causes conduction failure. For this reason, it is preferable to remove the smear 81 as shown in FIG. 8B by a desmear process.

  Then, after the desmear treatment, the plating is grown from the exposed surface of the first electric circuit 1a by electrolytic plating or electroless plating, so that the surface of the first electric circuit 1a is formed as shown in FIG. Conductor pillars 82 are projected. When electrolytic plating is performed, the first electric circuit 1a functions as an electrode, and when electroless plating is performed, the surface of the first electric circuit 1a functions as a plating nucleus.

  According to such a method, after the resin film 3 is peeled to form the second electric circuit 8, the second electric circuit is formed even if the desmear treatment is performed after the drilling process in order to form the conductor pillar 82 to be the interlayer connection portion. The formation of the circuit 8 is not affected. As a result, by the build-up method, even when the second electric circuit with a narrow wiring width or wiring interval is stacked, a second electric circuit in which occurrence of short circuit or migration is suppressed is formed.

  Hereinafter, the present invention will be described in more detail with reference to examples. The scope of the present invention is not limited by the examples.

  A circuit board having a metal wiring (thickness: 18 μm) formed on the surface is overlaid on a prepreg having a thickness of 100 μm. A conical conductor bump having a height of 50 μm and a bottom surface diameter of 200 μm is formed on the surface of the metal wiring at a predetermined position. This conductor bump is formed of a conductive paste. And this laminated body is heat-press-molded so that a conductor bump may penetrate | invade a prepreg, and the laminated body by which the laminated body was laminated and integrated is obtained.

  Next, a styrene-butadiene copolymer (SBR) methyl ethyl ketone (MEK) suspension (manufactured by Nippon Zeon Co., Ltd., particle size: 200 nm, solid content: 15) is applied to the prepreg side surface of the obtained laminate using a spin coating method. %) And dried at 80 ° C. for 30 minutes to form a 2 μm thick resin film.

  Then, a groove having a substantially rectangular cross section with a width of 20 μm and a depth of 30 μm is formed at a predetermined position by laser processing on the laminate on which the resin film is formed. Further, holes are formed so as to dig and expose the conductor bumps toward the portion where the conductor bumps are formed. For laser processing, MODEL 5330 manufactured by ESI equipped with a UV-YAG laser is used.

  Next, the laser-processed laminate is immersed in a cleaner conditioner (C / N 3320) and then washed with water. And in order to suppress decomposition | disassembly of the tin- palladium colloid adhering, a pre-dip process is performed using PD404 (made by Shipley Far East Co., Ltd.). Then, it is immersed in a catalyst liquid (CAT44, manufactured by Shipley Far East Co., Ltd.), and palladium serving as the core of electroless copper plating is adsorbed to the laminate on which the resin film is formed in a tin-palladium colloid state.

  The laminate on which the tin-palladium colloid is adsorbed is immersed in a 5% aqueous sodium hydroxide solution for 10 minutes while being ultrasonically treated to swell the SBR film on the surface, thereby peeling the resin film.

  Next, the surface of the laminate is irradiated with ultraviolet light. At this time, fluorescence emission is partially recognized by irradiation with ultraviolet light. The part where the fluorescent part is recognized is removed by rubbing with a cloth.

  Next, palladium nuclei are generated by immersing the laminate in an accelerator chemical (ACC19E, manufactured by Shipley Far East Co., Ltd.). Then, the laminate is immersed in an electroless plating solution (CM328A, CM328L, CM328C, manufactured by Shipley Far East Co., Ltd.) to perform an electroless copper plating process. Thereby, an electroless copper plating film having a thickness of 5 μm is deposited. By observing the surface of the laminate subjected to electroless plating as described above with an SEM (scanning microscope), the metal wiring formed of the electroless plating film is formed with high precision in the laser-processed groove portion. Further, it can be confirmed that the surface of the conductor bump and the groove portion are made conductive by the electroless plating film.

  The degree of swelling of the swellable resin film is measured as follows.

On the release paper, the SBR suspension applied to form the swellable resin film on the insulating base material is applied and dried at 80 ° C. for 30 minutes, so that the thickness is the same as the thickness formed on the epoxy resin substrate. A film having a thickness of 2 μm is formed. Then, a sample obtained by forcibly peeling the formed film is used as a sample. Then, about 0.02 g of the obtained sample is weighed. The weight of the sample at this time is defined as a weight m ′ before swelling. Then, the weighed sample is immersed in 10 ml of 5% aqueous sodium hydroxide solution at 20 ± 2 ° C. for 15 minutes. Then, centrifugal separation is performed at 1000 G for about 10 minutes using a centrifuge to remove moisture and the like attached to the sample. Then, the weight of the swollen sample after centrifugation is measured, and the weight after swelling is defined as m. From the obtained weight m ′ before swelling and weight m after swelling,
The degree of swelling is calculated from the formula “swelling degree SW = (m−m ′) / m ′ × 100 (%)”. In addition, other conditions are performed according to JIS L1015 8.27 (measurement method of alkali swelling degree). At this time, the degree of swelling obtained is about 750%.

FIG. 1 is a process sectional view for explaining a first embodiment according to the present invention. FIG. 2 (A) is a form in which conductor bumps are superimposed on the insulating layer so that the head is not exposed, and FIG. 2 (B) is inserted into the insulating layer so as to penetrate the conductor bumps. It is a schematic cross section which shows the form piled up so that a head might be exposed. FIG. 3 is a schematic cross-sectional view showing a form in which the tops of the conductor bumps are removed and exposed so that the conductor bumps themselves are dug. FIG. 4 is a schematic cross-sectional view showing various forms of metal wiring formed in the insulating layer. FIG. 5 is an enlarged top view of a circuit for explaining the inspection process. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing a conductor post-containing circuit board in the second embodiment according to the present invention. FIG. 7 is a process cross-sectional view for explaining the first half of the method for manufacturing a multilayer wiring board according to the third embodiment of the present invention. FIG. 8 is a process cross-sectional view for explaining the latter half of the method for manufacturing a multilayer wiring board according to the third embodiment of the present invention. FIG. 9 is a process cross-sectional view for explaining a metal wiring formation process by a full additive method which is a conventional technique. FIG. 10 is an explanatory diagram for explaining a contour shape of a circuit formed by an additive method which is a conventional technique. FIG. 11 is a process diagram for explaining metal wiring formation by the additive method described in Patent Document 1. FIG. 12 is a process diagram for explaining metal wiring formation by buildup. FIG. 13 is a process diagram for explaining a process when the additive method described in Patent Document 1 is applied to the build-up method.

Explanation of symbols

1,2,100,300 Insulating layer (insulating base material)
1a First electric circuit 8, 8a, 8b, 8c, 51 Second electric circuit 1b, 62, 82 Conductor pillar (conductor bump)
3 Resin film 4, 202 Circuit groove 5, 60, 80, 101, 203, 304 Through hole (through hole)
6, 102, 204 Plating catalyst 7 Electroless plating film 9, 69, 79 Conductor pillar-containing circuit board 10 Multilayer wiring board 50 Circuit 53 Resin film residue 61, 81, 305 Smear 103,306 Photoresist layer 104 Metal wiring 105 Extra Plating film 110 photomask 200, 302 insulating resin layer 201 protective film 205 conductive layer

Claims (15)

A resin film is formed on the surface of the insulating layer on the protruding side of the conductor column of the conductor column-containing circuit board in which the insulating layer is formed so as to embed the conductor column protruding at a predetermined position of the first electric circuit. A film forming process;
A circuit groove forming step of forming a circuit groove having a depth equal to or greater than the thickness of the resin film by laser processing from the outer surface side of the resin film;
Conductor pillar exposing step of exposing the conductor pillar by laser processing from the outer surface side of the resin film,
A catalyst attaching step of attaching a plating catalyst to the exposed conductor pillar, the surface of the circuit groove and the entire outer surface of the resin film;
A film removing step for removing the resin film;
After the film removal step, an electroless plating film is formed on a portion where the plating catalyst remains, thereby forming a second electric circuit and the first electric circuit and the second electric circuit by the conductor column. And a plating process for forming an interlayer connection.   The method for manufacturing a multilayer wiring board according to claim 1, wherein the exposure of the conductor pillar is to remove a part of the top of the conductor pillar by laser processing.   The method for manufacturing a multilayer wiring board according to claim 1, wherein the circuit groove is formed so as to pass through the resin film and dig into the insulating layer.   The said resin film contains a fluorescent substance, The inspection process for test | inspecting a film removal defect using the light emission from the said fluorescent substance is further provided after the said film removal process. The manufacturing method of the multilayer wiring board of any one of Claims 1.   The thickness of the said resin film is 10 micrometers or less, The manufacturing method of the multilayer wiring board of any one of Claims 1-4.   The method for producing a multilayer wiring board according to claim 1, wherein the resin film is a swellable resin film that is peeled off from the surface of the insulating layer by being swollen by a predetermined liquid.   The circuit board containing a conductor pillar is a board obtained by laminating and integrating an insulating layer on a surface of a conductor pillar protruding in advance at a predetermined position of the first electric circuit. The manufacturing method of the multilayer wiring board of any one of Claims 1.   The substrate obtained by forming an insulating layer by applying a resin solution to a formation surface of a conductor column protruding in advance at a predetermined position of the first electric circuit, and then curing the resin column-containing circuit substrate. The manufacturing method of the multilayer wiring board of any one of Claims 1-6.   After the conductive pillar-containing circuit board has formed an insulating layer on the surface of the first electric circuit, the first electric circuit is formed by drilling from the opposite surface of the insulating layer to the surface on which the first electric circuit is formed. 7. The substrate obtained by forming a conductive pillar in a portion that has been exposed and formed by growing a plating film from the exposed first electric circuit to form a hole. Manufacturing method of multilayer wiring board.   The multilayer wiring board according to claim 9, wherein the step of growing and forming the plating film is a step of growing and forming a plating film by electrolytic plating using the exposed first electric circuit as an electrode after the desmear treatment after the drilling process. Production method.   The multilayer wiring according to claim 9, wherein the step of growing and forming a plating film is a step of growing and forming a plating film by electroless plating using the exposed first electric circuit as a plating nucleus after a desmear process after drilling. A method for manufacturing a substrate. An insulating layer forming step of forming an insulating layer on the formation surface of the first electric circuit formed on the substrate;
A film forming step of forming a resin film on the surface of the insulating layer;
A circuit groove forming step of forming a circuit groove having a depth equal to or greater than the thickness of the resin film by laser processing from the outer surface side of the resin film;
A catalyst attaching step for attaching a plating catalyst to the entire surface of the circuit groove and the outer surface of the resin film;
A film removing step for removing the resin film;
A plating treatment step of forming a second electric circuit by forming an electroless plating film in a portion where the plating catalyst remains after the coating removal step;
A drilling step of exposing the first electrical circuit by drilling in a predetermined portion of the second electrical circuit;
An interlayer connection portion between the first electric circuit and the second electric circuit is formed by forming a conductive pillar in a holed portion by growing a plating film from the exposed surface of the first electric circuit. And a step of forming an interlayer connection portion.   13. The multilayer wiring board according to claim 12, wherein the step of growing and forming a plating film is a step of growing and forming a plating film by electrolytic plating using the exposed first electric circuit as an electrode after performing a desmear process after drilling. Production method.   13. The step of growing and forming a plating film is a step of growing and forming a plating film by electroless plating using the exposed surface of the first electric circuit as a plating nucleus after a desmear treatment after drilling. A method for manufacturing a multilayer wiring board.   The multilayer wiring board obtained by the manufacturing method of any one of Claims 1-14.

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