JP2010040675A - Laminated solid-state imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated solid-state imaging apparatus that obtains an output of high picture quality. <P>SOLUTION: The laminated solid-state imaging apparatus includes: a pixel transistor 30 provided for each of pixels 100 arrayed in two dimensions; a photoelectric conversion film 10 laminated on the pixel electrode 31 connected to one diffusion layer of the pixel transistor and photoelectrically converting light received by a light receiving surface positioned on the opposite side from the pixel electrode side to generate signal charge; a transparent electrode 20 provided on the light receiving surface of the photoelectric conversion film; a solid driving portion 80 which selects a pixel to be read by turning on the pixel transistor and supplies a predetermined fixed potential from the pixel electrode to put the photoelectric conversion film back into an initial bias state; and a readout circuit 130 which is connected to the transparent electrode, and detects a current corresponding to the signal charge flowing through the photoelectric conversion film when the photoelectric conversion film is put back into the initial bias state to read out the signal charge generated by the photoelectric conversion film. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a stacked solid-state imaging device, and more particularly to a stacked-side solid-state imaging device in which a photoelectric conversion film is stacked on a pixel electrode of a pixel transistor.

  Conventionally, CCD (Charge Coupled Device) and CMOS (Complementary Metal Oxide Semiconductor) image sensors have been used as solid-state image pickup devices, but these solid-state image pickup devices have a low aperture ratio because of their smaller pixel sizes. Thus, sensitivity and S / N (Signal / Noise) are getting worse. As means for improving this, a stacked solid-state imaging device in which a photoelectric conversion film is stacked on a CMOS image sensor has been proposed (see, for example, Non-Patent Document 1 and Non-Patent Document 2).

According to such a stacked solid-state imaging device, the aperture ratio can be improved to nearly 100%. In particular, when the photoelectric conversion film has a signal amplification function, a higher sensitivity and higher S / N can be achieved by a synergistic effect with an improvement in the aperture ratio. As a photoelectric conversion film applied to such an imaging device, a HARP film-laminated CMOS image sensor employing a HARP (High-gain Avalanche Rushing amorphous Photoconductor) film having an avalanche multiplication effect, or a CMOS image sensor laminated with amorphous silicon Study and trial production are being conducted. In the stacked solid-state imaging device using these photoelectric conversion films, any signal charge generated and multiplied by the photoelectric conversion film is transferred to the CMOS image sensor via the pixel electrode connected to the CMOS diffusion layer. A method of leading to the pixel and reading it as the output of the CMOS image sensor is adopted.
Video Information Media Annual Conference 12-3, P.I. 166-167, 1998 Video Information Media Annual Conference 14-4, 2002

  However, in the configurations described in Non-Patent Document 1 and Non-Patent Document 2 described above, bumps and the like at the junction between the photoelectric conversion film and the readout circuit of the CMOS image sensor vary from pixel to pixel, and the variation from pixel to pixel is a fixed pattern. Appears as noise or traps the signal charge generated and multiplied by the photoelectric conversion film due to the interface state of the junction part, so that the signal voltage is lowered or the afterimage is generated, and the image quality is lowered. There was a problem.

  In view of the above, an object of the present invention is to provide a stacked solid-state imaging device capable of eliminating a deterioration in image quality due to a variation in a joint portion between a photoelectric conversion film and a pixel electrode and obtaining a high-quality output.

In order to achieve the above object, a stacked solid-state imaging device according to a first aspect of the present invention includes a pixel transistor provided for each of two-dimensionally arranged pixels,
A photoelectric conversion film which is stacked on a pixel electrode connected to one diffusion layer of the pixel transistor and photoelectrically converts light received by a light receiving surface located on the side opposite to the pixel electrode side to generate a signal charge. When,
A transparent electrode provided on the light receiving surface of the photoelectric conversion film;
A solid-state drive unit that selects the pixel to be read out of the signal charge by turning on the pixel transistor, and supplies a predetermined fixed potential from the pixel electrode to return the photoelectric conversion film to an initial bias state;
When the photoelectric conversion film connected to the transparent electrode returns to the initial bias state, a current corresponding to the signal charge flowing through the photoelectric conversion film is detected, and the signal charge generated in the photoelectric conversion film is read out. And a circuit.

  As a result, the signal charge can be read from the light receiving surface side of the photoelectric conversion film, and the signal charge can be read without being affected by the variation of the pixel electrode of the pixel transistor and the photoelectric conversion film for each pixel. And high-quality images can be taken.

According to a second aspect of the present invention, in the stacked solid-state imaging device according to the first aspect,
The solid-state driving unit includes a vertical shift register that drives the pixel transistor for each row, a horizontal selection transistor that is provided corresponding to each column of the pixel, and a horizontal shift register that drives the horizontal selection transistor. And
The other diffusion layer that is not connected to the pixel electrode of the pixel transistor is connected to one diffusion layer of the horizontal selection transistor corresponding to each column, and the other diffusion layer of the horizontal selection transistor is It is connected to fixed potential supply means for supplying a fixed potential.

  As a result, a fixed potential can be sequentially supplied to the two-dimensionally arranged pixels to be read and scanned in the row order and the column order, and the fixed image sensor is used only for pixel selection switching and gives noise. Therefore, signal charges can be read out at high speed.

According to a third aspect of the invention, in the stacked solid-state imaging device according to the first or second aspect of the invention,
The fixed potential is a ground potential or a predetermined power supply potential.

  Thus, an appropriate potential can be supplied according to the polarity of the carrier of the photoelectric conversion film, and the circuit configuration can be simplified.

A fourth invention is a multilayer solid-state imaging device according to any one of the first to third inventions,
The photoelectric conversion film is an avalanche multiplication type photoelectric conversion film having an avalanche multiplication function.

  Accordingly, in combination with the avalanche multiplication action and the effect of eliminating the fixed noise pattern at the joint between the imaging electrode and the photoelectric conversion film, a high S / N ratio can be realized, and a high quality image can be obtained. .

According to a fifth aspect of the present invention, in the stacked-side solid-state imaging device according to the fourth aspect,
The avalanche multiplication type photoelectric conversion film is a film containing amorphous selenium, and the fixed potential is a ground potential.

  As a result, a sufficient signal charge multiplication effect can be obtained using the HARP film. When the carrier of the photoelectric conversion film is a hole, the photoelectric conversion film is set to the ground potential and the signal charge is transferred from the transparent electrode on the upper surface. Can be read out.

A sixth invention is the multilayer solid-state imaging device according to the fourth invention, wherein:
The avalanche multiplication type photoelectric conversion film is a film containing amorphous silicon, and the fixed potential is a predetermined power supply potential.

  Thereby, in the case of the photoelectric conversion film to which amorphous silicon is applied, the signal charge can be appropriately read from the transparent electrode on the upper surface by returning the photoelectric conversion film to the initial bias state of the power supply potential.

A seventh invention is a multilayer solid-state imaging device according to any one of the first to sixth inventions,
The readout circuit includes a current-voltage conversion circuit that converts and reads out a current that flows when the photoelectric conversion film returns to an initial bias state.

  As a result, the signal charge can be read by converting the current into a voltage, and the subsequent processing can be facilitated.

  According to the present invention, a captured image can be output with high image quality.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram illustrating an overall configuration of a stacked solid-state imaging device according to a first embodiment to which the present invention is applied. In FIG. 1, the stacked solid-state imaging device according to the first embodiment includes a photoelectric conversion film 10, a pixel 100, and a solid-state driving unit 80. The pixel 100 includes a pixel transistor 30 and a pixel electrode 31 for each pixel. The solid-state driving unit 80 includes a horizontal selection transistor 40, a vertical shift register 50, a horizontal shift resist 60, and a fixed potential supply unit 70.

  The photoelectric conversion film 10 is means for receiving light from an upper light receiving surface and generating a charge signal based on the light. As long as the photoelectric conversion film 10 is a film that receives light and converts it into a charge signal, various photoelectric conversion films 10 can be applied. In Example 1, an HARP film having an avalanche multiplication function is used. An applied example will be described. The HARP film not only converts the received light into an electric signal to generate a signal charge, but also multiplies the signal charge amount in an avalanche manner by an avalanche multiplication action. Since the HARP film has a very high resistance value in the lateral direction and there is little possibility that signal charges are mixed between pixels, there is no need to divide the pixels into pixels. Therefore, the HARP film is laminated on the entire surface of the pixel electrode 31 connected to the pixel transistors 30 arranged in two dimensions.

  The pixel 100 is a unit for capturing an image and is arranged in a two-dimensional manner. Each pixel includes a pixel transistor 30 and a pixel electrode 31 connected to one diffusion layer of the pixel transistor 30.

  The pixel transistor 30 is a transistor provided for each pixel. The pixel transistors 30 are provided corresponding to the respective pixels 100, and a plurality of pixel transistors 30 are two-dimensionally arranged. In the stacked solid-state imaging device according to the present embodiment, one pixel transistor 30 is provided for one pixel. In the stacked solid-state imaging device according to this embodiment, the pixel transistor 30 selects only a pixel to be read without amplifying or reading out signal charges and supplies a predetermined fixed potential to the selected pixel. Take on. The pixel transistor 30 may be, for example, a MOS (Metal Oxide Semiconductor) transistor, and the pixel 100 to be read may be selected by turning on the gate by applying a drive voltage. The pixel transistor 30 may be an N-channel MOS transistor or a P-channel MOS transistor depending on the application, but generally an N-channel MOS transistor is applied.

  The pixel electrode 31 is an electrode connected to one diffusion layer of the pixel transistor 30, and one shape of the pixel electrode 31 constitutes one pixel 100 in plan view. Therefore, a plurality of pixel electrodes 31 are two-dimensionally arranged corresponding to the pixels 100. The pixel electrode 31 is located on the opposite side of the light receiving surface of the photoelectric conversion film 10 and is provided on the lower surface of the photoelectric conversion film 10. It can be said that the photoelectric conversion film 10 is laminated on the pixel electrode 31, and the pixel electrode 31 is provided on the lower surface of the photoelectric conversion film 10 by being bonded to the photoelectric conversion film 10 by, for example, a bump or the like. The pixel electrode 31 supplies a fixed potential to the photoelectric conversion film 10 at a position corresponding to the pixel 100 selected as a reading target when reading signal charges. That is, a predetermined fixed potential is applied from the pixel electrode 31 to the photoelectric conversion film 10 when the pixel transistor 30 of the pixel 100 to be read is turned on. For example, a metal for wiring such as aluminum, copper, or gold may be applied to the pixel electrode 31. In addition, the pixel electrode 31 may be connected to either the drain or the source of the pixel transistor 30 as long as a predetermined fixed potential can be supplied to the photoelectric conversion film 10. When a channel MOS transistor is applied, the pixel electrode 31 may be connected to the drain of the pixel transistor 30.

  The other diffusion layer of the pixel transistor 30 that is not connected to the pixel electrode 31 is connected to the vertical line 35. A diffusion layer that is not connected to the pixel electrode 31 of the pixel transistor 30 forming the vertical column of the pixels 100 is connected to the vertical line 35 in common.

  The solid-state driving unit 80 selects the pixel 100 from which signal charges are to be read, supplies a fixed potential to the photoelectric conversion film 10 corresponding to the pixel 100 to be read, and returns the photoelectric conversion film 10 to the initial bias state. This is means for driving the pixel transistor 30. The solid-state driving unit 80 includes a horizontal selection transistor 40, a vertical shift register 50, a horizontal shift register 60, and a fixed potential supply unit 70.

  The horizontal selection transistor 40 is a switching transistor that selects the pixel transistor 30 of the pixel 100 from which signal charges are to be read out in the horizontal direction (column direction) and supplies a predetermined fixed potential to the selected pixel transistor 30. . As the horizontal selection transistor, for example, a MOS transistor may be applied. Since the horizontal transistor 40 performs selection in the horizontal direction of the pixel transistor 30, one diffusion is applied to the vertical line 36 to which the diffusion layer not connected to the pixel electrode 31 of the pixel transistor 30 is connected in common. Layers are connected. That is, the diffusion layer that is not connected to the pixel electrode 31 of the pixel transistor 30 in the same column is connected to one diffusion layer of the horizontal selection transistor 40 provided in the corresponding column via the vertical line 35. .

  The diffusion layer of the horizontal selection transistor 40 which is not connected to the pixel transistor 30 (vertical line 35) is connected to the fixed potential supply means 70. As a result, when the pixel transistor 30 of the pixel 100 that is the signal charge readout target is turned on and the horizontal selection transistor 40 of the column of the pixel 100 that is the readout target is turned on, the signal is supplied from the fixed potential supply means 70. The fixed potential can be supplied to the pixel electrode 31 of the pixel transistor 30. As the horizontal selection transistor 40, both an N-channel MOS transistor and a P-channel MOS transistor can be applied depending on applications.

  The fixed potential supply means 70 is a means for supplying a fixed potential when one diffusion layer of the horizontal selection transistor 40 is connected and the horizontal selection transistor 40 is turned on and becomes conductive. In the stacked solid-state imaging device according to the first embodiment, the fixed potential supply unit 70 is configured to supply a ground potential. The fixed potential may be set to an appropriate potential for setting the potential state of the photoelectric conversion film 10 to the initial bias state. In the stacked solid-state imaging device according to the first embodiment, carriers are present in the photoelectric conversion film 10. Since the hole HARP film is applied, the fixed potential supply means 70 is in a grounded state.

  The vertical shift register 50 is a vertical scanning circuit for driving the pixel transistor 30 to be read. Therefore, the vertical shift register 50 is connected to the gate of the pixel transistor 30, but the two-dimensionally arranged pixel transistors 30 are commonly connected to the gates of the pixel transistors 30 arranged in the same row. As a result, the pixel transistors 30 that sequentially read out signal charges can be selected and driven in the vertical direction. The vertical shift register 50 selectively drives the pixel transistors 30 of the pixels 100 that sequentially read out signal charges, such as the first row, the second row,... Thus, it is possible to uniquely identify the pixel transistor 30 to be read, and sequentially read out the pixels 100 one by one. As the vertical shift register 50, a commonly used shift register may be applied.

  The horizontal shift register 60 is a horizontal scanning circuit for driving the horizontal direction transistor 40 corresponding to the column of the pixel transistors 30 to be read. Therefore, the horizontal shift register 60 is connected to the gate of the horizontal selection transistor 40 in each column and is configured to drive the horizontal direction transistor 40 in the column to be selected. Also in the horizontal shift register 60, the horizontal selection transistors 40 arranged in each column are sequentially selected and driven, for example, in the first column, the second column,. The reading scan to be moved can be performed. By the vertical shift register 50 and the horizontal shift register 60, the pixel transistors 30 arranged two-dimensionally can be uniquely selected and read out.

  FIG. 2 is a diagram illustrating a configuration in which the readout circuit 130 is added for one pixel 100 and one column of the stacked solid-state imaging device according to the first embodiment. In FIG. 2, a pixel transistor 30 for one pixel and a horizontal selection transistor 40 for one column are shown. The pixel transistor 30 and the horizontal selection transistor 40 are connected in series, and one diffusion layer of the pixel transistor 30 and one diffusion layer of the horizontal selection transistor 40 are connected. The other diffusion layer of the horizontal selection transistor 40 is connected to the fixed potential supply means 70. In the first embodiment, the ground diffusion potential is supplied by being connected to the ground.

  The diffusion layer of the pixel transistor 30 that is not connected to the horizontal transistor 40 is connected to the pixel electrode 31, and the photoelectric conversion film 10 is laminated on the pixel electrode 31. The upper surface of the photoelectric conversion film 10 constitutes a light receiving surface, and the transparent electrode 20 is disposed on the light receiving surface. Similar to the photoelectric conversion film 10, the transparent electrode 20 may be provided as one continuous electrode. A glass substrate 90 is disposed on the upper surface of the transparent electrode 20. The photoelectric conversion film 10 can receive light through the glass substrate 90 and the transparent electrode 20.

  A read circuit 130 is connected to the transparent electrode 20. The readout circuit 130 is not necessarily provided for each pixel 100, and the signal charge of the selected pixel 100 may be sequentially switched and read out by one readout circuit 130. The read circuit 130 includes an initial bias supply circuit 110 and a current-voltage conversion circuit 120.

  When the pixel transistor 30 and the horizontal selection transistor are turned on to form a closed circuit, the initial bias supply circuit 110 applies a voltage V0 from the transparent electrode 20 to the both ends of the photoelectric conversion film 10 via the resistor R1. This is a circuit for applying an initial bias voltage so as to be in a bias state. Therefore, the initial bias circuit 110 may include the resistor R1 and the power source V0. The current-voltage conversion circuit 120 is a circuit for converting an input current into a voltage and outputting it to read out a signal charge, and may be composed of, for example, an operational amplifier Amp and a resistor R2. For example, a large voltage of 1500 [V] is applied to the photoelectric conversion film 10 in the case of 15 [μm] and 2500 [V] in the case of 25 [μm]. Between the current-voltage conversion circuit 120, a safety decoupling capacitor C1 for allowing only an AC component to pass may be provided.

  As described above, the stacked solid-state imaging device according to the present embodiment applies the initial bias voltage V0 from the transparent electrode 20 provided on the upper surface, which is the light receiving surface of the photoelectric conversion film 10, and also reads out the signal charge on the upper surface. The configuration is performed from the transparent electrode 20.

  Next, in the multilayer solid-state imaging device according to the first embodiment having such a configuration, a series of operations from light reception to signal charge readout will be described with reference to FIG. First, before light reception, the vertical shift register 50 (see FIG. 1) and the horizontal shift register 60 (see FIG. 1) define the pixel transistor 30 of the pixel 100 from which signal charges are to be read, and the pixel transistor 30 and the vertical line 35. Then, the horizontal selection transistor 40 connected thereto is turned on, and the voltage applied to both ends of the photoelectric conversion film 10 is set to the initial bias state. Thereby, the initial bias voltage V0 is applied to the photoelectric conversion film 10 via the resistor R1.

  Next, the pixel transistor 30 and the horizontal selection transistor 40 are turned off, and holes generated by the irradiated light and avalanche multiplied are accumulated. The holes travel and accumulate on the pixel electrode 31 side due to the electric field in the photoelectric conversion film 10 that is a HARP film, so that the voltage at both ends of the photoelectric conversion film 10 decreases from the initial bias state.

  When the pixel transistor 30 and the horizontal selection transistor 40 are turned on again after one frame, the voltage flows across the photoelectric conversion film 10 to return to the initial bias state, and thus a current flows. This current is converted into a voltage by the current-voltage conversion circuit 120 and read. If such an operation is performed in each pixel 100, a two-dimensional image signal can be obtained.

  In the process of reading the signal charge, the pixel transistor 30 and the horizontal selection transistor 40 formed of MOS transistors select the pixel 100 to be read and lower the potential of the lower surface of the photoelectric conversion film 10 corresponding to the pixel 100 to the ground potential. Thus, it only plays a role of bringing the photoelectric conversion film 10 into an initial bias state, and does not read out signal charges. Therefore, a variation in contact resistance between the photoelectric conversion film 10 and the solid-state imaging device, which is a problem in the conventional stacked solid-state imaging device, for each pixel 100 appears as fixed pattern noise or depends on the interface state of the joint portion. Problems such as a decrease in signal voltage due to trapping of signal charges generated in the photoelectric conversion film 10 and generation of afterimages can be avoided. As a result, high S / N signal charge readout is possible.

  FIG. 3 is a cross-sectional configuration diagram illustrating a configuration example of one pixel 100 when a HARP film is applied to the photoelectric conversion film 10 of the stacked solid-state imaging device according to the first embodiment. In FIG. 3, a pixel 100 includes a pixel transistor 30 formed on a semiconductor substrate 150, and gate, drain, and source lead wirings 32 are formed by a stacked structure. As described in FIG. 1, the gate is connected to the vertical shift register 50, and the source is connected to the vertical line 35.

The drain is connected to the pixel electrode 31 through the lead wiring 32, and a HARP film is stacked on the pixel electrode 31 as the photoelectric conversion film 10. The HARP film may be composed of, for example, a GeO ₂ layer 11, a CeO ₂ layer 12, a Se and LiF layer 13, an a-Se (amorphous selenium) layer 14, and an Sb ₂ S ₃ layer 15. As shown in FIG. 3, the HARP film is composed mainly of an amorphous selenium layer 14, for example. The HARP film uses holes as carriers, and when light enters from the upper surface (light receiving surface), holes that are signal charges are generated inside, and as the holes travel toward the pixel electrode 31, snow avalanche is generated. The equation has an avalanche multiplication action in which the signal charge amount is multiplied. Thereby, high S / N is realizable.

  Since the carrier of the HARP film is a hole, the drain of the pixel transistor 30 composed of an N channel MOS transistor is connected to the pixel electrode 31.

  A transparent electrode 20 is installed on the upper surface of the HARP film that is the photoelectric conversion film 10, and a glass substrate 90 is installed on the upper surface of the transparent electrode 20, thereby constituting one pixel 100. As described with reference to FIG. 2, the readout circuit 130 is connected to the transparent electrode 20, and signal charges are read out from the transparent electrode 20 side on the upper surface, whereby each pixel 100 at the junction between the photoelectric conversion film 10 and the pixel transistor 30 is read. It is possible to eliminate the influence of variations.

  As described above, according to the multilayer solid-state imaging device according to the first embodiment, a high S / N image signal can be obtained using the HARP film having an avalanche multiplication function as the photoelectric conversion film 10.

  FIG. 4 is a diagram illustrating an overall configuration of a stacked solid-state imaging device according to a second embodiment to which the present invention is applied. The stacked solid-state imaging device according to the second embodiment is the same as the stacked solid-state imaging device according to the first embodiment in that the photoelectric conversion film 10a, the pixel 100a, and the solid-state driving unit 80a are provided. An amorphous silicon film having electrons as carriers is applied to the conversion film 10a. Accordingly, the polarities of various components are different from those of the first embodiment. In addition, about the component similar to the laminated | stacked solid-state imaging device which concerns on Example 1, the same referential mark is attached | subjected and the description is abbreviate | omitted. In addition, components that differ only in polarity from the components according to the first embodiment are appended with “a” after the reference symbol.

  In FIG. 4, the stacked solid-state imaging device according to the second embodiment includes a photoelectric conversion film 10a, a pixel 100a, and a solid-state driving unit 80a.

  As the photoelectric conversion film 10a, an amorphous silicon film is applied, which also has an avalanche multiplication effect. In the amorphous silicon film, when light is received by the light receiving surface, a signal charge is generated according to the luminance of the light, and the signal charge is multiplied as the signal charge travels through the photoelectric conversion film 10a. , Except that the signal charge is not a hole but an electron. As described above, even when the amorphous silicon film is applied to the photoelectric conversion film 10a and the signal charge is an electron, an image signal with a high S / N can be acquired just like the HARP film only with a different polarity.

  As in the first embodiment, each pixel 100a includes a plurality of pixels 100a arranged two-dimensionally, and each pixel 100a includes a pixel transistor 30a. The pixel transistor 30a may be a MOS transistor. For example, when an N-channel MOS transistor is applied, the pixel transistor 30a is configured such that the source is connected to the pixel electrode 31 and the drain is connected to the vertical line 35. The The pixel electrode 31 may be made of a wiring metal such as aluminum, copper, or gold, as in the first embodiment.

  The horizontal selection transistor 40a has one diffusion layer connected to the vertical line 35 to which the pixel transistor 30a is connected, and the other diffusion layer connected to the fixed potential supply means 70a according to the first embodiment. Although it is the same as the stacked solid-state imaging device, it is different from the first embodiment in that the fixed potential supply means 70a supplies a fixed potential of the power supply voltage V0 instead of the ground potential. Note that the polarity of the horizontal selection transistor 40a may be different from that of the first embodiment. For example, when an N-channel MOS transistor is applied, the drain is connected to the fixed potential supply means 70a, and the source May be connected to the vertical line 35.

  As for the vertical shift register 50 and the horizontal shift register 60, the vertical shift register 50 and the horizontal shift register 60 having the same configuration as that of the multilayer imaging apparatus according to the first embodiment may be used. The vertical shift register 50 sequentially drives the pixel transistors 30a whose gates are connected in parallel in the row direction in the row direction, and the horizontal shift register 60 sequentially moves the horizontal selection transistors 40a connected to each column in the column direction. By driving, a driving operation similar to that of the stacked solid-state imaging device according to the first embodiment can be performed.

  As described above, in the plan configuration diagram of the stacked solid-state imaging device according to the second embodiment, the type and polarity of the photoelectric conversion film 10a, the polarity of the pixel transistor 30a, the polarity of the horizontal selection transistor 40a, and the fixed potential supply source 70a are fixed. Only the potential is different.

  FIG. 5 is a diagram illustrating a configuration for one pixel and one column to which the readout circuit 130a of the stacked solid-state imaging device according to the second embodiment is added.

  In FIG. 5, as the amorphous silicon film is applied to the photoelectric conversion film 10a, the fixed potential of the power supply voltage V0 is applied from the fixed potential supply means 70a to the pixel electrode 31 by turning on the horizontal selection transistor 40a and the pixel transistor 30a. 2 is different from FIG. 2 of the first embodiment in that the initial bias supply circuit 110a of the readout circuit 130a is a circuit grounded via the resistor R1 instead of the power supply side. ing.

  An example of the operation in FIG. 5 will be described.

  First, before light reception, the pixel transistor 30a and the horizontal selection transistor 40a are turned on, the pixel electrode 31 side becomes a high potential side, and an initial bias voltage V0 is applied to both ends of the photoelectric conversion film 10a via the resistor R1. Biased.

  Next, the pixel transistor 30a and the horizontal selection transistor 40a are turned off. When the photoelectric conversion film 10a is irradiated with light through the glass substrate 90 and the transparent electrode 20 and light is incident on the light receiving surface, electrons that are signal charges are generated according to the luminance of the light, and the signal charges are photoelectrically converted. The amount of electrons is multiplied as the film 10a travels. In the amorphous silicon film, although the degree of multiplication is lower than that of the HARP film, the amount of electrons as a signal charge can be increased to generate a signal charge with a high S / N. Due to the generation of such electrons, the voltage across the photoelectric conversion film 10a, which is an amorphous silicon film, decreases from the initial bias state.

  In the next frame, when the pixel transistor 30a and the horizontal transistor 40a of the pixel 100 to be read are turned on, the initial bias voltage V0 is applied from the fixed potential supply means 70a, the photoelectric conversion film 10a returns to the initial bias state, A current flows from the transparent electrode 20. By converting such a current into a voltage by the current-voltage conversion circuit 120 of the reading circuit 130a and reading the voltage, the signal charge generated corresponding to the light can be read.

  The read circuit 130a has a point that the current-voltage conversion circuit 120 includes an operational amplifier Amp and a resistor R2, except that the place where the resistor R1 of the initial bias supply circuit 110a is connected is grounded, and the decoupling capacitor C1. May be the same as in the first embodiment.

  As described above, also in the stacked solid-state imaging device according to the second embodiment, the pixel transistor 30a and the horizontal selection transistor 40a only select the pixel 100a to be read, and the signal charge is read out to the transparent electrode 20 side. Using the readout circuit 130a thus formed, it can be performed from the transparent electrode 20 on the upper surface of the photoelectric conversion film 10a. As a result, variation in contact resistance between the photoelectric conversion film 10a and the solid-state imaging device for each pixel occurs as fixed pattern noise, or signal charges generated in the photoelectric conversion film 10a due to the interface state of the bonding part are captured. Thus, the problem that the signal voltage is reduced or an afterimage is generated can be solved.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the present invention. Can be added.

  In particular, in Example 1 and Example 2, although the example which applied the film | membrane which has an avalanche multiplication effect to the photoelectric converting films 10 and 10a was demonstrated, about the photoelectric converting film which does not have such a multiplication effect | action Also, the present invention can be applied. In this case, since the electron-hole pairs generated by the light irradiation travel and accumulate toward both ends of the photoelectric conversion films 10 and 10a by the electric field, the signal charge may be considered as either electrons or holes. .

1 is an overall configuration diagram of a stacked solid-state imaging device according to Embodiment 1. FIG. 1 is a configuration diagram in which a readout circuit 130 of a stacked solid-state imaging device according to Embodiment 1 is added. FIG. 2 is a cross-sectional configuration diagram of a pixel 100 when a HARP film is applied to the photoelectric conversion film 10. FIG. FIG. 6 is a diagram illustrating an overall configuration of a stacked solid-state imaging device according to a second embodiment. FIG. 6 is a configuration diagram in which a readout circuit 130a of a stacked solid-state imaging device according to Embodiment 2 is added.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 10a Photoelectric conversion film 20 Transparent electrode 30, 30a Pixel transistor 31 Pixel electrode 32 Lead-out wiring 35 Vertical line 40, 40a Horizontal selection transistor 50 Vertical shift register 60 Horizontal shift register 70, 70a Fixed potential supply means 80, 80a Solid drive part 90 Glass substrate 100, 100a Pixel 110, 110a Initial bias supply circuit 120 Current-voltage conversion circuit 130, 130a Read circuit 150 Semiconductor substrate

Claims (7)

A pixel transistor provided for each pixel arranged two-dimensionally;
A photoelectric conversion film which is stacked on a pixel electrode connected to one diffusion layer of the pixel transistor and photoelectrically converts light received by a light receiving surface located on the side opposite to the pixel electrode side to generate a signal charge. When,
A transparent electrode provided on the light receiving surface of the photoelectric conversion film;
A solid-state drive unit that selects the pixel to be read out of the signal charge by turning on the pixel transistor, and supplies a predetermined fixed potential from the pixel electrode to return the photoelectric conversion film to an initial bias state;
When the photoelectric conversion film is connected to the transparent electrode and returns to the initial bias state, a current corresponding to the signal charge flowing through the photoelectric conversion film is detected, and the signal charge generated in the photoelectric conversion film is read out. A stacked solid-state imaging device comprising: a readout circuit; The solid-state driving unit includes a vertical shift register that drives the pixel transistor for each row, a horizontal selection transistor that is provided corresponding to each column of the pixel, and a horizontal shift register that drives the horizontal selection transistor. And
The other diffusion layer that is not connected to the pixel electrode of the pixel transistor is connected to one diffusion layer of the horizontal selection transistor corresponding to each column, and the other diffusion layer of the horizontal selection transistor is The stacked solid-state imaging device according to claim 1, wherein the stacked solid-state imaging device is connected to fixed potential supply means for supplying a fixed potential.   The stacked solid-state imaging device according to claim 1, wherein the fixed potential is a ground potential or a predetermined power supply potential.   4. The stacked solid-state imaging device according to claim 1, wherein the photoelectric conversion film is an avalanche multiplication type photoelectric conversion film having an avalanche multiplication function. 5.   The stacked-side solid-state imaging device according to claim 4, wherein the avalanche multiplication type photoelectric conversion film is a film containing amorphous selenium, and the fixed potential is a ground potential.   5. The stacked solid-state imaging device according to claim 4, wherein the avalanche multiplication type photoelectric conversion film is a film containing amorphous silicon, and the fixed potential is a predetermined power supply potential.   7. The read circuit includes a current-voltage conversion circuit that converts a current flowing when the photoelectric conversion film returns to an initial bias state into a voltage and reads the voltage. 8. Multilayer solid-state imaging device.

Images