JP2010036199A - Bonding material, semiconductor device, and manufacturing method thereof - Google Patents

Bonding material, semiconductor device, and manufacturing method thereof Download PDF

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JP2010036199A
JP2010036199A JP2008199791A JP2008199791A JP2010036199A JP 2010036199 A JP2010036199 A JP 2010036199A JP 2008199791 A JP2008199791 A JP 2008199791A JP 2008199791 A JP2008199791 A JP 2008199791A JP 2010036199 A JP2010036199 A JP 2010036199A
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metal
melting point
bonding material
powder
semiconductor device
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JP5292977B2 (en
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Yuji Iizuka
祐二 飯塚
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Abstract

<P>PROBLEM TO BE SOLVED: To suppress brittleness at a boundary face between a bonding material and a bonded material, to increase heat resistance, and to improve mechanical reliability of a semiconductor device. <P>SOLUTION: On an insulating substrate 12, a bonding material 1 is applied in which a metal A powder 2 and a metal B powder 3 having a higher melting point and smaller specific gravity as compared with the metal A powder 2 are dispersed and mixed in flux 4, and a semiconductor chip 11 as a heat-generation source is placed. Then, the semiconductor chip 11 positioned above the bonding material 1 is put in a heating furnace while holding the bonding material 1 between the semiconductor chip 11 and the insulating substrate 12, is heated to a temperature equal to or above the melting point of the metal A powder 2 and eqal to or below the melting point of the metal B powder 3, and then, is heated to a temperature equal to or above the melting point of the metal B powder 3. Thereby, a first reaction layer made of metal A having high ductility and the semiconductor chip 11 is formed in an boundary face between the bonding material 1 and the semiconductor chip 11, and on the semiconductor chip 11 side in a bonding layer, an area is formed where the concentration of metal B having high heat resistance is high. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

この発明は、接合材、この接合材を用いて接合された半導体装置およびその製造方法に関する。   The present invention relates to a bonding material, a semiconductor device bonded using the bonding material, and a manufacturing method thereof.

従来、パワーデバイスは、電力変換用途のスイッチングデバイスとして用いられる。図６は、従来の半導体装置の構造について示す断面図である。図６に示すように、半導体装置１０は、半導体チップ１１と、絶縁基板１２と、アルミワイヤ１３と、ヒートシンク１４と、ケース１５と、を備えている。   Conventionally, power devices are used as switching devices for power conversion applications. FIG. 6 is a cross-sectional view showing the structure of a conventional semiconductor device. As shown in FIG. 6, the semiconductor device 10 includes a semiconductor chip 11, an insulating substrate 12, an aluminum wire 13, a heat sink 14, and a case 15.

絶縁基板１２には、表面に回路パターン１２ａ，１２ｂが形成されており、配線基板となっている。半導体チップ１１の裏面は、図示省略した接合材を介して配線基板の回路パターン１２ａと接合している。半導体チップ１１の表面に設けられた図示省略した電極と回路パターン１２ｂとはアルミワイヤ１３によって電気的に接続されている。配線基板の裏面には金属膜１２ｃが設けられており、この金属膜１２ｃが図示を省略した接合材を介してヒートシンク１４と接合している。   Circuit patterns 12a and 12b are formed on the surface of the insulating substrate 12 to form a wiring substrate. The back surface of the semiconductor chip 11 is bonded to the circuit pattern 12a of the wiring board via a bonding material (not shown). An electrode (not shown) provided on the surface of the semiconductor chip 11 and the circuit pattern 12 b are electrically connected by an aluminum wire 13. A metal film 12c is provided on the back surface of the wiring board, and the metal film 12c is bonded to the heat sink 14 via a bonding material (not shown).

ヒートシンク１４は、良熱伝導体の材質で作られており、ベース部１４ａおよび放熱フィン部１４ｂを有する。ベース部１４ａは、半導体チップ１１で発生し、配線基板を介して伝わる熱を放熱フィン部１４ｂへ伝導する。放熱フィン部１４ｂは、複数の放熱フィンを有し、ベース部１４ａから伝導された熱を放散する。ヒートシンク１４の周縁にはケース１５が接着されている。   The heat sink 14 is made of a good heat conductor material and has a base portion 14a and a heat radiating fin portion 14b. The base portion 14a conducts heat generated in the semiconductor chip 11 and transmitted through the wiring board to the heat radiating fin portion 14b. The radiating fin portion 14b has a plurality of radiating fins and radiates heat conducted from the base portion 14a. A case 15 is bonded to the periphery of the heat sink 14.

上述したモジュール構造の半導体装置１０では、半導体チップ１１と絶縁基板１２の表面に形成された回路パターン１２ａとの接合に、接合材として、比較的低い融点で固着工程をおこなえる半田が用いられている。このように、接合材として用いられる半田材は、実装を容易にすることはできるが、融点が２００〜３００℃程度である。したがって、半導体装置の動作寿命を推定する実機動作試験（パワーサイクル試験）などにより、接合層の内部に発生する亀裂が進展し、半導体装置の機能を喪失させることがある（例えば、下記非特許文献１参照。）。   In the semiconductor device 10 having the above-described module structure, solder capable of fixing with a relatively low melting point is used as a bonding material for bonding the semiconductor chip 11 and the circuit pattern 12a formed on the surface of the insulating substrate 12. . As described above, the solder material used as the bonding material can be easily mounted, but has a melting point of about 200 to 300 ° C. Therefore, cracks generated in the bonding layer may develop due to an actual machine operation test (power cycle test) that estimates the operating life of the semiconductor device, and the function of the semiconductor device may be lost (for example, the following non-patent document). 1).

接合層の内部に発生する亀裂が進展する原因の一つは、半導体チップ１１の素材であるシリコンの熱膨張係数（α≒３．０ｐｐｍ／ｋ）と、回路パターン１２ａの素材である、例えば銅の熱膨張係数（α≒１８．０ｐｐｍ／ｋ）と、が異なることによって熱応力が生じることである。また、特に錫（Ｓｎ）を多く含有し、鉛（Ｐｂ）を含有しない半田（以下、Ｐｂフリー半田とする）においては、半田材の再結晶化によって組織の変化が起こり、接合層の内部に発生する亀裂が進展する。この組織変化の時間的な進行速度は、半田材の高温耐量と強い相関を有することが知られている。   One of the causes of the progress of cracks generated in the bonding layer is the thermal expansion coefficient (α≈3.0 ppm / k) of silicon, which is the material of the semiconductor chip 11, and the material of the circuit pattern 12a, such as copper. Is different from the thermal expansion coefficient (α≈18.0 ppm / k) of the thermal stress. In particular, in a solder containing a large amount of tin (Sn) and not containing lead (Pb) (hereinafter referred to as Pb-free solder), a change in structure occurs due to recrystallization of the solder material, and the inside of the bonding layer The cracks that develop will develop. It is known that the temporal progression rate of this structural change has a strong correlation with the high temperature resistance of the solder material.

図６に示すような積層構造を有する半導体装置の製造工程の接合処理においては、Ｐｂフリー半田を接合材として用いる場合、単一の半田合金から加工された金属粒子にフラックスを融合しペースト状にした接合材を、被接合材に塗布して、加熱炉などに通す。これによって、接合材が溶融して被接合材と一体化するため、接合材と被接合材との接続が熱的にまたは電気的に安定した接続となる。なお、接合材は、単一の半田合金から加工された金属粒子を用いているため、接合層が単一の組成を有する合金となる。   In the joining process of the manufacturing process of the semiconductor device having the laminated structure as shown in FIG. 6, when Pb-free solder is used as a joining material, a flux is fused to metal particles processed from a single solder alloy to form a paste. The bonded material is applied to the material to be bonded and passed through a heating furnace or the like. As a result, the bonding material is melted and integrated with the material to be bonded, so that the connection between the bonding material and the material to be bonded is thermally or electrically stable. Since the bonding material uses metal particles processed from a single solder alloy, the bonding layer is an alloy having a single composition.

実機動作の際には、発熱部分に近い領域が高温となるため、均一な耐熱性を有する接合層では、発熱源となりえる半導体チップ１１の近傍の領域においては、通常、高温耐量が不足している。したがって、接合層における半導体チップ１１の近傍の領域に微細な亀裂が生じ、この微細な亀裂が全体の亀裂の伸展を加速させる要因となることが実機耐久試験などの結果からも明かである。したがって、半導体装置を高温で安定して動作させるためには、接合材のさらなる高温耐量化、すなわち耐熱性の向上が求められている。   During actual machine operation, the region close to the heat generating portion is at a high temperature. Therefore, in the bonding layer having uniform heat resistance, the high temperature resistance is usually insufficient in the region near the semiconductor chip 11 that can be a heat generating source. Yes. Therefore, it is clear from the results of actual machine endurance tests and the like that minute cracks are generated in the region of the bonding layer in the vicinity of the semiconductor chip 11 and this minute cracks accelerate the expansion of the entire cracks. Therefore, in order to stably operate the semiconductor device at a high temperature, it is required to further increase the high temperature resistance of the bonding material, that is, to improve the heat resistance.

Ｐｂが含有されていない接合材としては、融点が２２０℃程度の、Ｓｎを多く含有するＰｂフリー半田が用いられているが、Ｐｂを多く含有する高温半田の代替となる温度領域のものが必要とされている。最近では、融点が２７０℃程度である、ビスマス（Ｂｉ）を含有する接合材が注目されている。また、Ｂｉの脆性を改良するために、ガスアトマイズ法により作製したＣｕＡｌＭｎの粒子を添加した合金材料の接合材が提案されている（例えば、下記非特許文献２参照。）。   As the bonding material not containing Pb, Pb-free solder containing a large amount of Sn having a melting point of about 220 ° C. is used, but a material in a temperature range that can substitute for a high-temperature solder containing a large amount of Pb is required. It is said that. Recently, a bonding material containing bismuth (Bi) having a melting point of about 270 ° C. has attracted attention. In addition, in order to improve the brittleness of Bi, a bonding material of an alloy material to which CuAlMn particles produced by a gas atomization method are added has been proposed (for example, see Non-Patent Document 2 below).

両角 朗、外２名、「パワー半導体モジュールにおける信頼性設計技術」、富士時報、Ｖｏｌ．７４ Ｎｏ．２ ２００１年、ｐ．１４５（４５）−１４８（４８）Akira Ryokaku and two others, “Reliability Design Technology for Power Semiconductor Modules”, Fuji Jiho, Vol. 74 No. 2 2001, p. 145 (45) -148 (48) 山田 靖、外２名、「パワー半導体接合用Ｂｉ系高融点はんだ」、Ｒ＆Ｄ レビュー オブ トヨタＣＲＤＬ、Ｖｏｌ．４１、Ｎｏ．２、２００６年、ｐ．４３−４８Satoshi Yamada and two others, “Bi refractory solder for power semiconductor bonding”, R & D Review of Toyota CRDL, Vol. 41, no. 2, 2006, p. 43-48

しかしながら、通常、被接合材である半導体チップの最表面には、スパッタや蒸着などによるメタライズ層（Ｎｉ−Ａｕ、Ｎｉ−Ａｇ等）が形成されている。このように、被接合材がＮｉ（ニッケル）を含んでおり、かつ接合材にＢｉを含んでいる場合、被接合材と接合材との界面に、脆性傾向の高いＮｉ−Ｂｉ系の反応層が形成され、半導体装置の機械的な信頼性が低下するという問題がある。また、例えば非特許文献２の技術では、ガスアトマイズ法によりＣｕＡｌＭｎを作製するのにコストがかかり、かつスループットが低下するという問題がある。   However, usually, a metallized layer (Ni—Au, Ni—Ag, etc.) is formed on the outermost surface of a semiconductor chip, which is a material to be bonded, by sputtering or vapor deposition. As described above, when the material to be bonded contains Ni (nickel) and the bonding material contains Bi, a Ni-Bi-based reaction layer having a high brittle tendency at the interface between the material to be bonded and the bonding material. There is a problem that the mechanical reliability of the semiconductor device is lowered. Further, for example, the technique of Non-Patent Document 2 has a problem that it takes a cost to produce CuAlMn by a gas atomizing method and throughput is lowered.

この発明は、上述した従来技術による問題点を解消するため、接合材と被接合材との界面の脆性を抑え、かつ耐熱性を高くし、半導体装置の機械的な信頼性を向上させる接合材、この接合材を用いて接合された半導体装置およびその製造方法を提供することを目的とする。   In order to solve the above-described problems caused by the prior art, the present invention suppresses brittleness at the interface between the bonding material and the material to be bonded, increases the heat resistance, and improves the mechanical reliability of the semiconductor device. An object of the present invention is to provide a semiconductor device bonded using this bonding material and a manufacturing method thereof.

上述した課題を解決し、目的を達成するため、請求項１の発明にかかる接合材は少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されている接合材であって、前記金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも小さいことを特徴とする。   In order to solve the above-described problems and achieve the object, the bonding material according to the invention of claim 1 is a bonding material in which at least two kinds of metal powders having different compositions and melting points are mixed in a flux, The specific gravity of the solid phase of the metal powder having the highest melting point among the metal powders is smaller than the specific gravity of the liquid phase of the other metal powder.

また、請求項２の発明にかかる接合材は、少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されている接合材であって、前記金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも大きいことを特徴とする。   Further, the bonding material according to the invention of claim 2 is a bonding material in which at least two kinds of metal powders having different compositions and melting points are mixed in a flux, and has the highest melting point among the metal powders. The specific gravity of the solid phase of the high metal powder is larger than the specific gravity of the liquid phase of the other metal powder.

また、請求項３の発明にかかる接合材は、請求項１または２に記載の発明において、前記金属粉体のうちの少なくとも１種類は、当該金属粉体の内部が中空構造であることを特徴とする。   In addition, the bonding material according to the invention of claim 3 is the invention according to claim 1 or 2, wherein at least one of the metal powders has a hollow structure inside the metal powder. And

また、請求項４の発明にかかる接合材は、請求項１〜３のいずれか一つに記載の発明において、前記金属粉体のうちの少なくとも１種類は、当該金属粉体の内部に少なくとも他の金属粉体よりも比重の小さい心材が設けられていることを特徴とする。   Further, in the invention according to any one of claims 1 to 3, the bonding material according to the invention of claim 4 is characterized in that at least one of the metal powders is at least other inside the metal powder. A core material having a specific gravity smaller than that of the metal powder is provided.

また、請求項５の発明にかかる接合材は、請求項１〜４のいずれか一つに記載の発明において、前記金属粉体のうちの少なくとも１種類は、当該金属粉体の内部に少なくとも他の金属粉体よりも比重の大きい心材が設けられていることを特徴とする。   In addition, the bonding material according to the invention of claim 5 is the invention according to any one of claims 1 to 4, wherein at least one of the metal powders is at least other inside the metal powder. A core material having a specific gravity greater than that of the metal powder is provided.

また、請求項６の発明にかかる接合材は、請求項１〜５のいずれか一つに記載の発明において、前記金属粉体のうちの少なくとも１種類は、表面が電鋳処理による金属膜で被覆された構造であることを特徴とする。   In addition, the bonding material according to the invention of claim 6 is the invention according to any one of claims 1 to 5, wherein at least one of the metal powders is a metal film formed by electroforming. It is a covered structure.

また、請求項７の発明にかかる接合材は、請求項１〜６のいずれか一つに記載の発明において、さらに、前記最も融点の高い金属粉体よりも融点が高く、前記金属粉体よりも粒径の小さい金属微粒子が混合されていることを特徴とする。   In addition, in the invention according to any one of claims 1 to 6, the bonding material according to the invention of claim 7 has a higher melting point than the metal powder having the highest melting point, more than the metal powder. Also, metal fine particles having a small particle diameter are mixed.

また、請求項８の発明にかかる半導体装置は半導体チップと基板とが少なくとも２種類以上の金属を含む接合材によって接合された半導体装置であって、前記半導体チップと前記基板との間に、前記金属のうちの、最も融点の高い金属以外の金属と前記半導体チップの最表面とが反応した第１反応層と、前記金属のうちの前記最も融点の高い金属と前記第１反応層とが反応した第２反応層と、前記最も融点の高い金属の濃度が、前記最も融点の高い金属以外の金属の濃度よりも濃い第１濃化領域と、前記最も融点の高い金属以外の金属の濃度が、前記最も融点の高い金属の濃度よりも濃い第２濃化領域と、をこの順に備えることを特徴とする。   A semiconductor device according to an eighth aspect of the present invention is a semiconductor device in which a semiconductor chip and a substrate are bonded by a bonding material containing at least two kinds of metals, and the semiconductor chip is interposed between the semiconductor chip and the substrate. Of the metals, a first reaction layer in which a metal other than the metal having the highest melting point reacts with the outermost surface of the semiconductor chip, and the metal having the highest melting point in the metal reacts with the first reaction layer. The concentration of the second reaction layer, the concentration of the metal having the highest melting point is higher than the concentration of the metal other than the metal having the highest melting point, and the concentration of the metal other than the metal having the highest melting point. And a second concentrated region having a concentration higher than the concentration of the metal having the highest melting point.

また、請求項９の発明にかかる半導体装置の製造方法は、接合材により半導体チップと基板とが接合された半導体装置の製造方法であって、接合材として、少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されており、当該金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも小さい接合材を用意する工程と、前記半導体チップと前記基板の間に前記接合材を挟み、前記半導体チップを前記接合材の上側にして加熱炉に入れる炉入れ工程と、前記加熱炉内の温度を、前記最も融点の高い金属粉体以外の金属粉体の融点以上、当該最も融点の高い金属粉体の融点未満に加熱する第１加熱工程と、前記加熱炉内の温度を、前記最も融点の高い金属粉体の融点以上に加熱する第２加熱工程と、を含むことを特徴とする。   The method for manufacturing a semiconductor device according to the invention of claim 9 is a method for manufacturing a semiconductor device in which a semiconductor chip and a substrate are bonded to each other by a bonding material, wherein at least two kinds of bonding materials and compositions and melting points are used. The metal powder with different melting point is mixed in the flux, and the specific gravity of the solid phase of the metal powder with the highest melting point of the metal powder is smaller than the specific gravity of the liquid phase of the other metal powder. A step of preparing, a step of placing the bonding material between the semiconductor chip and the substrate, placing the semiconductor chip above the bonding material into a heating furnace, and a temperature in the heating furnace, A first heating step of heating to a temperature higher than the melting point of the metal powder other than the metal powder having a high melting point and less than the melting point of the metal powder having the highest melting point; Heating above the melting point of the body Characterized in that it comprises a heating step.

また、請求項１０の発明にかかる半導体装置の製造方法は、接合材により半導体チップと基板とが接合された半導体装置の製造方法であって、接合材として、少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されており、当該金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも大きい接合材を用意する工程と、前記半導体チップと前記基板の間に前記接合材を挟み、前記半導体チップを前記接合材の下側にして加熱炉に入れる炉入れ工程と、前記加熱炉内の温度を、前記最も融点の高い金属粉体以外の金属粉体の融点以上、当該最も融点の高い金属粉体の融点未満に加熱する第１加熱工程と、前記加熱炉内の温度を、前記最も融点の高い金属粉体の融点以上に加熱する第２加熱工程と、を含むことを特徴とする。   A method for manufacturing a semiconductor device according to the invention of claim 10 is a method for manufacturing a semiconductor device in which a semiconductor chip and a substrate are bonded to each other by a bonding material, wherein at least two kinds of bonding materials and compositions and melting points are used. The metal powder with different melting point is mixed in the flux, and the specific gravity of the solid phase of the metal powder with the highest melting point of the metal powder is larger than the specific gravity of the liquid phase of the other metal powder. A step of preparing, a furnace step of sandwiching the bonding material between the semiconductor chip and the substrate, and placing the semiconductor chip under the bonding material into a heating furnace, and a temperature in the heating furnace, A first heating step of heating to a temperature higher than the melting point of the metal powder other than the metal powder having the highest melting point and less than the melting point of the metal powder having the highest melting point; Heat above the melting point of the powder Characterized in that it comprises a second heating step.

また、請求項１１の発明にかかる半導体装置の製造方法は、請求項９または１０に記載の発明において、前記第２加熱工程において、前記接合材に前記最も融点の高い金属粉体よりも融点が高く、前記金属粉体よりも粒径の小さい金属微粒子が混合されている場合、前記金属微粒子の融点よりも低い温度に加熱することを特徴とする。   The method for manufacturing a semiconductor device according to claim 11 is the method according to claim 9 or 10, wherein, in the second heating step, the bonding material has a melting point higher than that of the metal powder having the highest melting point. When metal fine particles having a particle size higher than that of the metal powder are mixed, the metal particles are heated to a temperature lower than the melting point of the metal fine particles.

また、請求項１２の発明にかかる半導体装置の製造方法は、請求項９〜１１のいずれか一つに記載の発明において、前記第１加熱工程において、前記接合材に３種類以上の金属粉体が混合されている場合、前記最も融点の高い金属粉体以外の少なくとも２種類の金属粉体の融点以上の温度に段階的に加熱することを特徴とする。   According to a twelfth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to any one of the ninth to eleventh aspects, wherein in the first heating step, three or more kinds of metal powders are used as the bonding material. Is mixed stepwise to a temperature equal to or higher than the melting point of at least two types of metal powders other than the metal powder having the highest melting point.

また、請求項１３の発明にかかる半導体装置の製造方法は、請求項９〜１２のいずれか一つに記載の発明において、前記第１加熱工程および前記第２加熱工程においては、加熱された温度を所定時間保持することを特徴とする。   According to a thirteenth aspect of the present invention, there is provided a semiconductor device manufacturing method according to any one of the ninth to twelfth aspects of the present invention, wherein the first heating step and the second heating step are performed at a heated temperature. Is maintained for a predetermined time.

また、請求項１４の発明にかかる半導体装置の製造方法は、請求項９〜１３のいずれか一つに記載の発明において、前記第１加熱工程の後と、前記第２加熱工程の後とに、前記加熱炉内を減圧して、当該加熱炉内を脱気する減圧工程を含むことを特徴とする。   According to a fourteenth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to any one of the ninth to thirteenth aspects, after the first heating step and after the second heating step. The method further includes a depressurizing step of depressurizing the inside of the heating furnace and degassing the inside of the heating furnace.

上述した各請求項の発明によれば、発熱源となる半導体チップと絶縁基板とを接合材によって接合した際に、接合材と半導体チップとの界面に、延性が高い金属によって反応層を形成し、接合層内の半導体チップ側に、耐熱性の高い金属の濃度が濃い領域を形成することができる。また、接合層内の絶縁基板側に、延性の高い金属の濃度が濃い領域を形成し、耐熱性の高い層に生じる歪みを延性の高い領域に分散させることができる。   According to the invention of each claim described above, when the semiconductor chip serving as a heat source and the insulating substrate are bonded together by the bonding material, a reaction layer is formed of a metal having high ductility at the interface between the bonding material and the semiconductor chip. A region having a high heat-resistant metal concentration can be formed on the semiconductor chip side in the bonding layer. In addition, a region having a high concentration of highly ductile metal can be formed on the insulating substrate side in the bonding layer, and strain generated in the layer having high heat resistance can be dispersed in the region having high ductility.

また、請求項７または１１に記載の発明によれば、接合材に金属微粒子が混合されている場合、金属微粒子の融点を超えない温度で接合処理をおこなうことで、接合材に、液相と固相を共存させることができる。これによって、強化構造を形成することができる。   According to the invention of claim 7 or 11, when metal particles are mixed in the bonding material, the bonding material is mixed with the liquid phase by performing bonding treatment at a temperature not exceeding the melting point of the metal particles. A solid phase can coexist. Thereby, a reinforced structure can be formed.

また、請求項１４の発明によれば、接合層内にボイドが生じるのを抑えることができる。   According to the invention of claim 14, it is possible to suppress the generation of voids in the bonding layer.

本発明にかかる接合材、この接合材を用いて接合された半導体装置およびその製造方法によれば、接合材と被接合材との界面の脆性を抑え、かつ耐熱性を高くし、半導体装置の機械的な信頼性を向上させることができるという効果を奏する。   According to the bonding material, the semiconductor device bonded using the bonding material, and the manufacturing method thereof, the brittleness at the interface between the bonding material and the material to be bonded is suppressed, the heat resistance is increased, and the semiconductor device There is an effect that the mechanical reliability can be improved.

以下に添付図面を参照して、この発明にかかる接合材、この接合材を用いて接合された半導体装置およびその製造方法の好適な実施の形態を詳細に説明する。なお、以下の実施の形態の説明およびすべての添付図面において、同様の構成には同一の符号を付し、重複する説明を省略する。   Exemplary embodiments of a bonding material according to the present invention, a semiconductor device bonded using the bonding material, and a method for manufacturing the same will be described below in detail with reference to the accompanying drawings. Note that, in the following description of the embodiments and all the attached drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted.

（実施の形態１）
図１は、実施の形態１にかかる接合材の構造について示す断面図である。実施の形態１にかかる接合材は、融点の異なる２種類以上の組成の金属粉体を主材として、この主材がフラックスに分散して混合されている。そして、金属粉体のうち、最も融点が高い金属粉体の固相の比重が他の金属粉体の液相の比重よりも小さい。 (Embodiment 1)
FIG. 1 is a cross-sectional view illustrating the structure of the bonding material according to the first embodiment. In the bonding material according to the first embodiment, metal powders having two or more kinds of compositions having different melting points are used as the main material, and the main material is dispersed and mixed in the flux. And among the metal powders, the specific gravity of the solid phase of the metal powder having the highest melting point is smaller than the specific gravity of the liquid phase of the other metal powders.

具体的には、例えば、図１に示すように、実施の形態１にかかる接合材１は、金属Ａ粉体２と、金属Ｂ粉体３との２種類の組成の金属粉体が、フラックス４に分散して混合されている。ここで、金属Ｂ粉体３は、金属Ａ粉体２よりも融点が高く、固相の比重が金属Ａ粉体２の液相の比重よりも小さければ良い。   Specifically, for example, as shown in FIG. 1, the bonding material 1 according to the first embodiment includes a metal powder having two compositions of a metal A powder 2 and a metal B powder 3. 4 is dispersed and mixed. Here, the metal B powder 3 only needs to have a higher melting point than the metal A powder 2 and the specific gravity of the solid phase is smaller than the specific gravity of the liquid phase of the metal A powder 2.

したがって、金属Ｂ粉体３の内部を中空構造としたり、金属Ｂ粉体３に比重の小さい樹脂などを心材として用いることで、金属Ｂ粉体３の固相の比重を、金属Ａ粉体２の液相の比重よりも小さくしても良い。また、金属Ａ粉体２に、比重の大きい重金属などを心材として用いることで、金属Ｂ粉体３の固相の比重を、金属Ａ粉体２の液相の比重より小さくしても良い。なお、金属Ａ粉体２または金属Ｂ粉体３は、表面に電鋳処理による被膜処理を施し、断面構造を２層としても良い。ここで、電鋳処理は、電解処理でも良いし、無電解処理でも良い。具体的には、図１に示すように、例えば金属Ｂ粉体３を、金属心材３１がめっき被膜３２で覆われている構造としても良い。   Therefore, the specific gravity of the solid phase of the metal B powder 3 is changed to the metal A powder 2 by using a hollow structure inside the metal B powder 3 or using a resin having a small specific gravity as the core material. It may be smaller than the specific gravity of the liquid phase. Moreover, the specific gravity of the solid phase of the metal B powder 3 may be made smaller than the specific gravity of the liquid phase of the metal A powder 2 by using a heavy metal having a large specific gravity as the core material for the metal A powder 2. In addition, the metal A powder 2 or the metal B powder 3 may be subjected to coating treatment by electroforming on the surface to have a two-layer cross-sectional structure. Here, the electroforming process may be an electrolytic process or an electroless process. Specifically, as shown in FIG. 1, for example, the metal B powder 3 may have a structure in which a metal core material 31 is covered with a plating film 32.

ここで、金属Ａ粉体２と金属Ｂ粉体３の組み合わせは、具体的には、錫（Ｓｎ：融点が約２２９℃、固相の比重が約７．０ｇ／ｃｃ、液相の比重が約６．９ｇ／ｃｃ）、ビスマス（Ｂｉ：融点が２７１℃、固相の比重が約９．８ｇ／ｃｃ、液相の比重が約１０．７ｇ／ｃｃ）や、これらを主成分とする２元合金の組み合わせが良い。また、２元合金は、例えばＳｎ３．５Ａｇ（融点が２２１℃、液相の比重７．１２ｇ／ｃｃ）やＢｉ２．５Ａｇ（融点が２６１℃、液相の比重１０．０８ｇ／ｃｃ）などである。   Here, the combination of the metal A powder 2 and the metal B powder 3 is specifically tin (Sn: melting point: about 229 ° C., solid phase specific gravity: about 7.0 g / cc, liquid phase specific gravity: About 6.9 g / cc), bismuth (Bi: melting point: 271 ° C., solid phase specific gravity: about 9.8 g / cc, liquid phase specific gravity: about 10.7 g / cc) Good combination of original alloys. Examples of the binary alloy include Sn3.5Ag (melting point: 221 ° C., liquid phase specific gravity: 7.12 g / cc) and Bi2.5Ag (melting point: 261 ° C., liquid phase specific gravity: 10.08 g / cc). .

なお、金属Ａ粉体２にはＢｉが含まれていないことが好ましい。その理由は、金属Ｂ粉体３よりも金属Ａ粉体２の融点が低いため、金属Ａ粉体２の方が先に溶融する。このとき、例えば被接合材の最表面がニッケル（Ｎｉ）の場合、被接合材と接合材との界面に脆性傾向の高いＮｉ−Ｂｉ系の反応層（ＮｉＢｉ、ＮｉＢｉ3等）が形成され、半導体装置の機械的な信頼性が低下するからである。 The metal A powder 2 preferably does not contain Bi. The reason is that the melting point of the metal A powder 2 is lower than that of the metal B powder 3, so that the metal A powder 2 is melted first. At this time, for example, when the outermost surface of the material to be bonded is nickel (Ni), a Ni-Bi-based reaction layer (NiBi, NiBi 3 or the like) having a high brittle tendency is formed at the interface between the material to be bonded and the bonding material, This is because the mechanical reliability of the semiconductor device is lowered.

また、接合材１には、さらに金属微粒子が混合されていても良い。金属微粒子としては、粒径が数ｎｍ〜数μｍ程度のものが良く、例えば銀（Ａｇ）、金（Ａｕ）、鉛（Ｐｄ）、ケイ素（Ｓｉ）、テルル（Ｔｅ）、ゲルマニウム（Ｇｅ）、ニッケル（Ｎｉ）、銅（Ｃｕ）、アルミニウム（Ａｌ）、白金（Ｐｔ）などである。また、金属微粒子が混合されている場合、半導体装置の製造方法においては、金属微粒子の融点を超えない温度で接合処理をおこなう。したがって、接合材１には、液相と固相が共存することとなる。このようにすることで、接合層に強化構造を形成することができる。   Further, the bonding material 1 may be further mixed with metal fine particles. As the metal fine particles, those having a particle size of about several nm to several μm are preferable. For example, silver (Ag), gold (Au), lead (Pd), silicon (Si), tellurium (Te), germanium (Ge), Nickel (Ni), copper (Cu), aluminum (Al), platinum (Pt), and the like. When metal fine particles are mixed, in the method for manufacturing a semiconductor device, the bonding process is performed at a temperature that does not exceed the melting point of the metal fine particles. Therefore, the bonding material 1 coexists with the liquid phase and the solid phase. By doing so, a reinforcing structure can be formed in the bonding layer.

上述した実施の形態１によれば、半導体装置の製造方法の接合処理をおこなう際に、接合材に接する被接合材との界面に形成される反応層の脆性を抑え、かつ接合層内の上側の領域に、耐熱性の高い領域を形成することができる。また、接合層内の下側の領域には、延性の高い領域を形成することができる。このため、例えば耐熱性の高い領域が脆性傾向であっても、その歪みを延性の高い領域に分散させることができる。したがって、例えば接合材の上側に接する被接合材が発熱源の場合、接合材と被接合材との界面における反応層の脆性を抑え、かつ耐熱性を高くすることで、半導体装置の機械的な信頼性を向上させることができる。   According to the first embodiment described above, when performing the bonding process of the semiconductor device manufacturing method, the brittleness of the reaction layer formed at the interface with the material to be bonded that contacts the bonding material is suppressed, and the upper side in the bonding layer A region with high heat resistance can be formed in this region. In addition, a highly ductile region can be formed in the lower region in the bonding layer. For this reason, for example, even if a region having high heat resistance tends to be brittle, the strain can be dispersed in a region having high ductility. Therefore, for example, when the material to be bonded that is in contact with the upper side of the bonding material is a heat source, the brittleness of the reaction layer at the interface between the bonding material and the material to be bonded is suppressed, and the heat resistance is increased, thereby improving the mechanical properties of the semiconductor device. Reliability can be improved.

（実施の形態２）
つぎに、実施の形態２にかかる接合材について説明する。実施の形態２にかかる接合材は、金属粉体のうち、最も融点が高い金属粉体の比重が他の金属粉体の融液の比重よりも大きい。 (Embodiment 2)
Next, the bonding material according to the second embodiment will be described. In the bonding material according to the second embodiment, among the metal powders, the specific gravity of the metal powder having the highest melting point is larger than the specific gravity of the melt of the other metal powder.

具体的には、例えば、図１に示すように、実施の形態２にかかる接合材５１において、金属Ｂ粉体３は、金属Ａ粉体２よりも融点が高く、固相の比重が金属Ａ粉体２の液相の比重よりも大きければ良い。したがって、金属Ａ粉体２の内部を中空構造としたり、金属Ａ粉体２に比重の小さい樹脂などを心材として用いることで、金属Ｂ粉体３の固相の比重を、金属Ａ粉体２よりも大きくしても良い。また、金属Ｂ粉体３に、固相の比重の大きい重金属などを心材として用いることで、金属Ｂ粉体３の固相の比重を、金属Ａ粉体２の液相の比重より大きくしても良い。   Specifically, for example, as shown in FIG. 1, in the bonding material 51 according to the second embodiment, the metal B powder 3 has a higher melting point than the metal A powder 2, and the specific gravity of the solid phase is metal A. What is necessary is just to be larger than the specific gravity of the liquid phase of the powder 2. Therefore, the specific gravity of the solid phase of the metal B powder 3 can be set to the metal A powder 2 by using a hollow structure inside the metal A powder 2 or using a resin having a low specific gravity as the core material. It may be larger than. Further, by using a heavy metal having a large specific gravity of the solid phase as the core material for the metal B powder 3, the specific gravity of the solid phase of the metal B powder 3 is made larger than the specific gravity of the liquid phase of the metal A powder 2. Also good.

具体的には、金属Ｂ粉体３を、例えば球状のＣｕ、Ｍｏ、Ｗ等の重金属を心材として用いた構造とし、金属Ａ粉体２をＳｎリッチな組成とする。特に、金属Ｂ粉体３の心材にＣｕを用いた場合、固相の比重が約９．０ｇ／ｃｃとなり、金属Ａ粉体２の融液であるＳｎ融液の液相の比重（約６．９ｇ／ｃｃ）より大きくなる。   Specifically, the metal B powder 3 has a structure using, for example, a spherical heavy metal such as Cu, Mo, W or the like as a core material, and the metal A powder 2 has a Sn-rich composition. In particular, when Cu is used for the core material of the metal B powder 3, the specific gravity of the solid phase is about 9.0 g / cc, and the specific gravity of the liquid phase of the Sn melt that is the melt of the metal A powder 2 (about 6 .9 g / cc).

また、金属Ａ粉体２がＳｎ３．５Ａｇ（融点が約２２１℃）であり、金属Ｂ粉体３がＳｎ１５．０Ｓｂ（融点が約２６０℃）であっても良い。その理由は、このようにすることで、金属Ｂ粉体３が、過包晶組成または過共晶組成となり、β−ＳｎＳｂ、Ｓｎ2Ｓｂ3などの粗大な化合物が存在する合金組成となるからである。これら粗大な化合物を形成する組成の金属Ｂ粉体３では、高融点部分の濃度が濃い状態（濃化状態）を生成しやすくなり、比重が金属Ａ粉体２の液相の比重よりも大きくなる。なお、金属Ａ粉体２がＳｎ３．０Ａｇ０．５Ｃｕ（融点が約２１８℃）であり、金属Ｂ粉体３がＳｎ２０．０Ａｇ（融点が約２６０℃）でも良い。この場合、粗大な化合物として、ε−Ａｇ3Ｓｎなどが存在することとなる。 The metal A powder 2 may be Sn3.5Ag (melting point is about 221 ° C.), and the metal B powder 3 may be Sn15.0Sb (melting point is about 260 ° C.). The reason for this is that, by doing so, the metal B powder 3 has an overperitectic composition or a hypereutectic composition, and an alloy composition in which coarse compounds such as β-SnSb and Sn 2 Sb 3 are present. It is. In the metal B powder 3 having a composition that forms these coarse compounds, it is easy to generate a state where the concentration of the high melting point portion is high (concentrated state), and the specific gravity is larger than the specific gravity of the liquid phase of the metal A powder 2. Become. The metal A powder 2 may be Sn3.0Ag0.5Cu (melting point is about 218 ° C.), and the metal B powder 3 may be Sn20.0Ag (melting point is about 260 ° C.). In this case, ε-Ag 3 Sn and the like exist as a coarse compound.

実施の形態２によれば、発熱源となる被接合材が接合材の下側に接する場合、実施の形態１と同様の効果を得ることができる。   According to the second embodiment, the same effect as that of the first embodiment can be obtained when the material to be bonded that is a heat generation source contacts the lower side of the bonding material.

（実施の形態３）
つぎに、実施の形態３にかかる半導体装置の構造について説明する。実施の形態３にかかる半導体装置は、実施の形態１または実施の形態２にかかる接合材１を用いて接合された半導体装置である。ここでは、実施の形態１にかかる接合材１を用いて接合された半導体装置について説明する。図２は、実施の形態１にかかる接合材を用いて接合された半導体装置の構造について示す断面図である。 (Embodiment 3)
Next, the structure of the semiconductor device according to the third embodiment will be described. The semiconductor device according to the third embodiment is a semiconductor device bonded using the bonding material 1 according to the first or second embodiment. Here, a semiconductor device bonded using the bonding material 1 according to the first embodiment will be described. FIG. 2 is a cross-sectional view illustrating the structure of the semiconductor device bonded using the bonding material according to the first embodiment.

図２に示すように、実施の形態１にかかる接合材１が、被接合材である半導体チップ１１および絶縁基板１２とによって挟まれた状態となっている。実施の形態３においては、接合材１の上側に半導体チップ１１が接し、接合材１の下側に絶縁基板１２が接している。また、接合材１には、複数の組成の金属粉体が混合されているため、被接合材と接合材１との接合の界面付近には、複数の反応層が形成される。   As shown in FIG. 2, the bonding material 1 according to the first embodiment is sandwiched between a semiconductor chip 11 and an insulating substrate 12 which are bonded materials. In the third embodiment, the semiconductor chip 11 is in contact with the upper side of the bonding material 1 and the insulating substrate 12 is in contact with the lower side of the bonding material 1. In addition, since the metal powder having a plurality of compositions is mixed in the bonding material 1, a plurality of reaction layers are formed in the vicinity of the interface of bonding between the material to be bonded and the bonding material 1.

具体的には、図２に示すように、接合材１と半導体チップ１１との界面に、融点の低い金属Ａ粉体２と半導体チップ１１が液相−固相反応によって一体化して形成された第１反応層２２が形成され、さらに融点が高い金属Ｂ粉体３と第１反応層２２とが一体化して形成された第２反応層２３とが、半導体チップ１１側からこの順に設けられている。すなわち、半導体チップ１１と絶縁基板１２との間に、半導体チップ１１側から、第１反応層２２と、第２反応層２３と、金属Ｂ粉体３の濃度が濃い金属Ｂ濃化領域（第１濃化領域）２４と、金属Ａ粉体２の濃度が濃い金属Ａ濃化領域（第２濃化領域）２５とが、この順に設けられている。   Specifically, as shown in FIG. 2, the metal A powder 2 having a low melting point and the semiconductor chip 11 are integrally formed at the interface between the bonding material 1 and the semiconductor chip 11 by a liquid-solid reaction. A first reaction layer 22 is formed, and a metal B powder 3 having a higher melting point and a second reaction layer 23 formed by integrating the first reaction layer 22 are provided in this order from the semiconductor chip 11 side. Yes. In other words, between the semiconductor chip 11 and the insulating substrate 12, from the semiconductor chip 11 side, the first reaction layer 22, the second reaction layer 23, and the metal B enriched region in which the concentration of the metal B powder 3 is high (first 1 concentration region) 24 and a metal A concentration region (second concentration region) 25 in which the concentration of the metal A powder 2 is high are provided in this order.

なお、実施の形態２にかかる接合材を用いて接合された半導体装置は、図２に示す半導体装置と上下が逆になった構成である。すなわち、接合材の上側に絶縁基板１２が接し、接合材の下側に半導体チップ１１が接している。そして、接合材１においては、上から順に、金属Ａ濃化領域２５、金属Ｂ濃化領域２４、第２反応層２３および第１反応層２２となる。その他の構成は、図２に示す半導体装置と同様のため説明を省略する。   Note that the semiconductor device bonded using the bonding material according to the second embodiment has a configuration in which the semiconductor device illustrated in FIG. That is, the insulating substrate 12 is in contact with the upper side of the bonding material, and the semiconductor chip 11 is in contact with the lower side of the bonding material. In the bonding material 1, the metal A concentration region 25, the metal B concentration region 24, the second reaction layer 23, and the first reaction layer 22 are sequentially formed from the top. Since other structures are the same as those of the semiconductor device shown in FIG.

上述した実施の形態３によれば、実施の形態１または実施の形態２と同様の効果を得ることができる。   According to the above-described third embodiment, the same effect as in the first or second embodiment can be obtained.

（実施の形態４）
つぎに、実施の形態４にかかる半導体装置の製造方法について説明する。実施の形態４においては、半導体装置の製造方法の接合処理において、半導体装置を実施の形態１にかかる接合材を用いて接合する方法について説明する。図３および図４は、実施の形態４にかかる半導体装置の製造方法について示す断面図である。また、図５は、実施の形態４にかかる半導体装置の製造方法における接合処理の際の、温度および圧力と、時間との関係を示す特性図である。 (Embodiment 4)
Next, a method for manufacturing the semiconductor device according to the fourth embodiment will be described. In the fourth embodiment, a method for bonding a semiconductor device using the bonding material according to the first embodiment in the bonding process of the manufacturing method of the semiconductor device will be described. 3 and 4 are cross-sectional views illustrating the method of manufacturing the semiconductor device according to the fourth embodiment. FIG. 5 is a characteristic diagram showing a relationship between temperature, pressure, and time during the bonding process in the method of manufacturing a semiconductor device according to the fourth embodiment.

まず、図３に示すように、絶縁基板１２の上側に接合材１を塗布し、その上に半導体チップ１１を載置する。そして、接合材１が半導体チップ１１および絶縁基板１２に挟まれた状態のまま、半導体チップ１１を接合材１の上側にして、加熱炉に入れる。さらに、加熱炉内の温度を、金属Ａ粉体２の融点Ｔ１以上で、金属Ｂ粉体３の融点Ｔ２未満の温度（以下、初段加熱温度とする）に上げる。   First, as shown in FIG. 3, the bonding material 1 is applied on the upper side of the insulating substrate 12, and the semiconductor chip 11 is placed thereon. Then, with the bonding material 1 sandwiched between the semiconductor chip 11 and the insulating substrate 12, the semiconductor chip 11 is placed above the bonding material 1 and placed in a heating furnace. Furthermore, the temperature in the heating furnace is raised to a temperature (hereinafter referred to as the first stage heating temperature) that is equal to or higher than the melting point T1 of the metal A powder 2 and lower than the melting point T2 of the metal B powder 3.

そして、図５に示すように、初段加熱温度になった時刻ｔ１から時刻ｔ３になるまでの所定時間、初段加熱温度を保持し、金属Ａ粉体２を溶融させる。このとき、加熱炉の体積が変化せずに、炉内の温度が上がるため、炉内の圧力が上昇する。したがって、時刻ｔ１後の時刻ｔ２から時刻ｔ３の間に、脱気処理をおこない炉内を減圧する。このように、脱気処理をおこなうことで、接合材１の内部にボイドが生じるのを抑えることができる。   Then, as shown in FIG. 5, the first stage heating temperature is maintained for a predetermined time from time t1 when the first stage heating temperature is reached to time t3, and the metal A powder 2 is melted. At this time, since the temperature in the furnace rises without changing the volume of the heating furnace, the pressure in the furnace rises. Therefore, a deaeration process is performed between time t2 and time t3 after time t1, and the inside of the furnace is decompressed. Thus, by performing the deaeration process, it is possible to suppress the generation of voids in the bonding material 1.

炉内の温度をＴ１以上Ｔ２未満とすることで、金属Ａ粉体２が溶融し、金属Ｂ粉体３が溶融されず固相のまま残る。接合材１においては、金属Ｂ粉体３の固相の比重が、金属Ａ粉体２の液相の比重よりも小さいため、金属Ａ粉体２の融液の上側、すなわち接合材１内の半導体チップ１１側に金属Ｂ粉体３が凝集する。   By setting the temperature in the furnace to T1 or more and less than T2, the metal A powder 2 is melted, and the metal B powder 3 is not melted and remains in a solid phase. In the bonding material 1, since the specific gravity of the solid phase of the metal B powder 3 is smaller than the specific gravity of the liquid phase of the metal A powder 2, the upper side of the melt of the metal A powder 2, that is, in the bonding material 1. The metal B powder 3 agglomerates on the semiconductor chip 11 side.

また、このとき、図４に示すように、被接合材である半導体チップ１１の固相を保った表面と、溶融した金属Ａ粉体２とによって、固相−液相の界面を通して化学反応が起こり、第１反応層２２が生成される。具体的には、金属Ａ粉体２がＳｎを含み、かつＢｉを含まない組成で、半導体チップ１１の最表面がＮｉ膜の場合、第１反応層２２は、Ｎｉ−Ｓｎ系の合金化合物となる。したがって、例えば接合材にＢｉ系の合金のみが含まれる場合に比べて、接合材と被接合材との界面の反応層の脆性を抑えることができる。このように、接合材１に含まれる金属粉体の一部が溶融し被接合材と部分的に接合される。   At this time, as shown in FIG. 4, a chemical reaction is caused through the solid-liquid phase interface between the surface of the semiconductor chip 11 that is the material to be bonded and the molten metal A powder 2 that maintains the solid phase. As a result, the first reaction layer 22 is produced. Specifically, when the metal A powder 2 includes Sn and does not include Bi, and the outermost surface of the semiconductor chip 11 is a Ni film, the first reaction layer 22 includes a Ni—Sn alloy compound and Become. Therefore, for example, the brittleness of the reaction layer at the interface between the bonding material and the material to be bonded can be suppressed as compared with the case where the bonding material contains only a Bi-based alloy. Thus, a part of the metal powder contained in the bonding material 1 is melted and partially bonded to the material to be bonded.

つぎに、図５に示すように、さらに温度を上げていき、金属Ｂ粉体３の融点Ｔ２以上の温度（以下、最終加熱温度とする）にする。そして、最終加熱温度になった時刻ｔ４から時刻ｔ６になるまでの所定時間、最終加熱温度を保持し、金属Ｂ粉体３を溶融させる。これによって、第１反応層２２と、溶融した金属Ｂ粉体３とによって、化学反応が起こり、第２反応層２３が生成される。   Next, as shown in FIG. 5, the temperature is further raised to a temperature equal to or higher than the melting point T2 of the metal B powder 3 (hereinafter referred to as the final heating temperature). Then, the final heating temperature is maintained for a predetermined time from the time t4 when the final heating temperature is reached to the time t6, and the metal B powder 3 is melted. As a result, a chemical reaction occurs between the first reaction layer 22 and the molten metal B powder 3, and a second reaction layer 23 is generated.

また、このとき、金属Ｂ粉体３が、接合材１の上側に凝集された状態で溶融するため、接合材１の上側の領域、すなわち接合材１の半導体チップ１１側の領域では、金属Ｂの濃度が濃くなる。また、それに伴い、金属Ｂ粉体３の少ない接合材１の下側の領域、すなわち接合材１の絶縁基板１２側の領域では、金属Ａの濃度が濃くなる。このように、接合材１に含まれる金属粉体が全て溶融されて被接合材と接合される。   At this time, since the metal B powder 3 is melted in a state of being aggregated on the upper side of the bonding material 1, the metal B in the upper region of the bonding material 1, that is, the region on the semiconductor chip 11 side of the bonding material 1. The concentration of increases. Accordingly, the concentration of the metal A is high in the lower region of the bonding material 1 with a small amount of the metal B powder 3, that is, the region on the insulating substrate 12 side of the bonding material 1. Thus, all the metal powder contained in the bonding material 1 is melted and bonded to the material to be bonded.

また、加熱炉内の温度を初段加熱温度から最終加熱温度に上げることで、炉内の圧力が上昇するため、時刻ｔ４後の時刻ｔ５から時刻ｔ６の間に、脱気処理をおこない炉内を減圧する。つぎに、図２に示すように、半導体装置を冷却することで、半導体チップ１１と絶縁基板１２との間に、半導体チップ１１側から順に、第１反応層２２と、第２反応層２３と、金属Ｂ粉体３の濃度が濃い領域２４と、金属Ａ粉体２の濃度が濃い領域２５とが形成される。   Moreover, since the pressure in the furnace rises by raising the temperature in the heating furnace from the initial stage heating temperature to the final heating temperature, deaeration treatment is performed between time t5 and time t6 after time t4. Reduce pressure. Next, as shown in FIG. 2, by cooling the semiconductor device, the first reaction layer 22, the second reaction layer 23, and the like are sequentially formed between the semiconductor chip 11 and the insulating substrate 12 from the semiconductor chip 11 side. A region 24 where the concentration of the metal B powder 3 is high and a region 25 where the concentration of the metal A powder 2 is high are formed.

なお、実施の形態４においては、例えば接合材１に上述した金属微粒子が含まれている場合、最終加熱温度を、金属微粒子の融点よりも低くする。また、実施の形態４においては、温度を保持する回数を初段加熱温度と最終加熱温度の２回として、２種類の金属粉体をそれぞれ溶融させたが、これに限るものではない。例えば接合材にさらに異なる組成の金属粉体が含まれる場合、それぞれの金属粉体の融点に合わせて、最終加熱温度未満の範囲で温度を保持する回数を増やしても良い。   In the fourth embodiment, for example, when the metal fine particles described above are included in the bonding material 1, the final heating temperature is set lower than the melting point of the metal fine particles. In the fourth embodiment, the number of times of holding the temperature is set to two times of the first stage heating temperature and the final heating temperature, and the two kinds of metal powders are melted. However, the present invention is not limited to this. For example, when the bonding material contains metal powders having different compositions, the number of times of holding the temperature in a range lower than the final heating temperature may be increased in accordance with the melting point of each metal powder.

実施の形態４によれば、実施の形態１〜３と同様の効果を得ることができる。また、加熱炉内の脱気処理をおこなうことで、接合層内にボイドが生じるのを抑えることができる。   According to the fourth embodiment, the same effects as in the first to third embodiments can be obtained. Moreover, it can suppress that a void arises in a joining layer by performing the deaeration process in a heating furnace.

（実施の形態５）
つぎに、実施の形態５にかかる半導体装置の製造方法について説明する。実施の形態５においては、半導体装置の製造方法の接合処理において、半導体装置を実施の形態２にかかる接合材を用いて接合する方法について説明する。実施の形態５においては、図３に示すように、絶縁基板１２の上に接合材５１を塗布し、その上に半導体チップ１１を載置する。つぎに、実施の形態４とは異なり、接合材が半導体チップおよび絶縁基板に挟まれた状態のまま、半導体チップを接合材の下側にして、加熱炉に入れる。その他の方法は実施の形態４と同様のため説明を省略する。 (Embodiment 5)
Next, a method for manufacturing the semiconductor device according to the fifth embodiment will be described. In the fifth embodiment, a method for bonding a semiconductor device using the bonding material according to the second embodiment in the bonding process of the method for manufacturing a semiconductor device will be described. In the fifth embodiment, as shown in FIG. 3, a bonding material 51 is applied on the insulating substrate 12, and the semiconductor chip 11 is placed thereon. Next, unlike the fourth embodiment, the semiconductor chip is placed under the bonding material and placed in a heating furnace while the bonding material is sandwiched between the semiconductor chip and the insulating substrate. Since other methods are the same as those in the fourth embodiment, description thereof is omitted.

実施の形態５によれば、実施の形態４と同様の効果を得ることができる。   According to the fifth embodiment, the same effect as in the fourth embodiment can be obtained.

以上のように、本発明にかかる接合材、半導体装置およびその製造方法は、高温で動作するパワーデバイスに有用であり、特に、電力変換用途のスイッチングデバイスに適している。   As described above, the bonding material, the semiconductor device, and the manufacturing method thereof according to the present invention are useful for power devices that operate at high temperatures, and are particularly suitable for switching devices for power conversion applications.

実施の形態１にかかる接合材の構造について示す断面図である。FIG. 3 is a cross-sectional view showing the structure of the bonding material according to the first embodiment. 実施の形態１にかかる接合材を用いて接合された半導体装置の構造について示す断面図である。1 is a cross-sectional view showing a structure of a semiconductor device bonded using a bonding material according to a first embodiment. 実施の形態４にかかる半導体装置の製造方法について示す断面図である。FIG. 10 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to a fourth embodiment; 実施の形態４にかかる半導体装置の製造方法について示す断面図である。FIG. 10 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to a fourth embodiment; 実施の形態４にかかる半導体装置の製造方法における接合処理の際の、温度および圧力と、時間との関係を示す特性図である。FIG. 10 is a characteristic diagram illustrating a relationship between temperature, pressure, and time during a bonding process in the method for manufacturing a semiconductor device according to the fourth embodiment. 従来の半導体装置の構造について示す断面図である。It is sectional drawing shown about the structure of the conventional semiconductor device.

符号の説明Explanation of symbols

１、５１ 接合材
２ 金属Ａ粉体
３ 金属Ｂ粉体
４ フラックス
１１ 半導体チップ
１２ 絶縁基板 1, 51 Bonding material 2 Metal A powder 3 Metal B powder 4 Flux 11 Semiconductor chip 12 Insulating substrate

Claims (14)

少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されている接合材であって、
前記金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも小さいことを特徴とする接合材。 It is a bonding material in which at least two kinds of metal powders having different compositions and melting points are mixed in a flux,
The bonding material characterized in that the specific gravity of the solid phase of the metal powder having the highest melting point among the metal powders is smaller than the specific gravity of the liquid phase of the other metal powders. 少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されている接合材であって、
前記金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも大きいことを特徴とする接合材。 It is a bonding material in which at least two kinds of metal powders having different compositions and melting points are mixed in a flux,
The bonding material characterized in that the specific gravity of the solid phase of the metal powder having the highest melting point among the metal powders is larger than the specific gravity of the liquid phase of the other metal powders. 前記金属粉体のうちの少なくとも１種類は、当該金属粉体の内部が中空構造であることを特徴とする請求項１または２に記載の接合材。   The bonding material according to claim 1 or 2, wherein at least one of the metal powders has a hollow structure inside the metal powder. 前記金属粉体のうちの少なくとも１種類は、当該金属粉体の内部に少なくとも他の金属粉体よりも比重の小さい心材が設けられていることを特徴とする請求項１〜３のいずれか一つに記載の接合材。   At least one of the metal powders is provided with a core material having a specific gravity smaller than at least other metal powders inside the metal powder. Bonding material described in one. 前記金属粉体のうちの少なくとも１種類は、当該金属粉体の内部に少なくとも他の金属粉体よりも比重の大きい心材が設けられていることを特徴とする請求項１〜４のいずれか一つに記載の接合材。   At least one of the metal powders is provided with a core material having a specific gravity greater than at least other metal powders inside the metal powder. Bonding material described in one. 前記金属粉体のうちの少なくとも１種類は、表面が電鋳処理による金属膜で被覆された構造であることを特徴とする請求項１〜５のいずれか一つに記載の接合材。   The bonding material according to any one of claims 1 to 5, wherein at least one of the metal powders has a structure in which a surface is covered with a metal film formed by electroforming. さらに、前記最も融点の高い金属粉体よりも融点が高く、前記金属粉体よりも粒径の小さい金属微粒子が混合されていることを特徴とする請求項１〜６のいずれか一つに記載の接合材。   Furthermore, metal fine particles having a melting point higher than that of the metal powder having the highest melting point and smaller in particle diameter than that of the metal powder are mixed. Bonding material. 半導体チップと基板とが少なくとも２種類以上の金属を含む接合材によって接合された半導体装置であって、
前記半導体チップと前記基板との間に、
前記金属のうちの、最も融点の高い金属以外の金属と前記半導体チップの最表面とが反応した第１反応層と、
前記金属のうちの前記最も融点の高い金属と前記第１反応層とが反応した第２反応層と、
前記最も融点の高い金属の濃度が、前記最も融点の高い金属以外の金属の濃度よりも濃い第１濃化領域と、
前記最も融点の高い金属以外の金属の濃度が、前記最も融点の高い金属の濃度よりも濃い第２濃化領域と、
をこの順に備えることを特徴とする半導体装置。 A semiconductor device in which a semiconductor chip and a substrate are bonded by a bonding material containing at least two kinds of metals,
Between the semiconductor chip and the substrate,
A first reaction layer in which the metal other than the metal having the highest melting point and the outermost surface of the semiconductor chip react with each other;
A second reaction layer in which the metal having the highest melting point of the metals reacts with the first reaction layer;
A first concentration region in which the concentration of the metal having the highest melting point is higher than the concentration of the metal other than the metal having the highest melting point;
A second concentration region in which the concentration of the metal other than the metal having the highest melting point is higher than the concentration of the metal having the highest melting point;
In this order. 接合材により半導体チップと基板とが接合された半導体装置の製造方法であって、
接合材として、少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されており、当該金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも小さい接合材を用意する工程と、
前記半導体チップと前記基板の間に前記接合材を挟み、前記半導体チップを前記接合材の上側にして加熱炉に入れる炉入れ工程と、
前記加熱炉内の温度を、前記最も融点の高い金属粉体以外の金属粉体の融点以上、当該最も融点の高い金属粉体の融点未満に加熱する第１加熱工程と、
前記加熱炉内の温度を、前記最も融点の高い金属粉体の融点以上に加熱する第２加熱工程と、
を含むことを特徴とする半導体装置の製造方法。 A manufacturing method of a semiconductor device in which a semiconductor chip and a substrate are bonded by a bonding material,
As the bonding material, at least two kinds of metal powders having different compositions and melting points are mixed with the flux, and the specific gravity of the solid phase of the metal powder having the highest melting point among the metal powders is different from that of other metals. Preparing a bonding material smaller than the specific gravity of the liquid phase of the powder;
A furnace step of sandwiching the bonding material between the semiconductor chip and the substrate and placing the semiconductor chip above the bonding material into a heating furnace;
A first heating step of heating the temperature in the heating furnace to a melting point of a metal powder other than the metal powder having the highest melting point, or less than a melting point of the metal powder having the highest melting point;
A second heating step of heating the temperature in the heating furnace to a temperature equal to or higher than the melting point of the highest melting metal powder;
A method for manufacturing a semiconductor device, comprising: 接合材により半導体チップと基板とが接合された半導体装置の製造方法であって、
接合材として、少なくとも２種類以上の、組成および融点の異なる金属粉体がフラックスに混合されており、当該金属粉体のうちの最も融点の高い金属粉体の固相の比重が、他の金属粉体の液相の比重よりも大きい接合材を用意する工程と、
前記半導体チップと前記基板の間に前記接合材を挟み、前記半導体チップを前記接合材の下側にして加熱炉に入れる炉入れ工程と、
前記加熱炉内の温度を、前記最も融点の高い金属粉体以外の金属粉体の融点以上、当該最も融点の高い金属粉体の融点未満に加熱する第１加熱工程と、
前記加熱炉内の温度を、前記最も融点の高い金属粉体の融点以上に加熱する第２加熱工程と、
を含むことを特徴とする半導体装置の製造方法。 A manufacturing method of a semiconductor device in which a semiconductor chip and a substrate are bonded by a bonding material,
As the bonding material, at least two kinds of metal powders having different compositions and melting points are mixed with the flux, and the specific gravity of the solid phase of the metal powder having the highest melting point among the metal powders is different from that of other metals. Preparing a bonding material larger than the specific gravity of the liquid phase of the powder;
A furnace step of sandwiching the bonding material between the semiconductor chip and the substrate and placing the semiconductor chip below the bonding material into a heating furnace;
A first heating step of heating the temperature in the heating furnace to a melting point of a metal powder other than the metal powder having the highest melting point, or less than a melting point of the metal powder having the highest melting point;
A second heating step of heating the temperature in the heating furnace to a temperature equal to or higher than the melting point of the highest melting metal powder;
A method for manufacturing a semiconductor device, comprising: 前記第２加熱工程において、前記接合材に前記最も融点の高い金属粉体よりも融点が高く、前記金属粉体よりも粒径の小さい金属微粒子が混合されている場合、前記金属微粒子の融点よりも低い温度に加熱することを特徴とする請求項９または１０に記載の半導体装置の製造方法。   In the second heating step, when metal particles having a melting point higher than that of the metal powder having the highest melting point and smaller than the metal powder are mixed in the bonding material, the melting point of the metal particles The method for manufacturing a semiconductor device according to claim 9, wherein the semiconductor device is heated to a lower temperature. 前記第１加熱工程において、前記接合材に３種類以上の金属粉体が混合されている場合、前記最も融点の高い金属粉体以外の少なくとも２種類の金属粉体の融点以上の温度に段階的に加熱することを特徴とする請求項９〜１１のいずれか一つに記載の半導体装置の製造方法。   In the first heating step, when three or more types of metal powder are mixed in the bonding material, the temperature is stepped to a temperature equal to or higher than the melting point of at least two types of metal powder other than the metal powder having the highest melting point. The method of manufacturing a semiconductor device according to any one of claims 9 to 11, wherein the semiconductor device is heated. 前記第１加熱工程および前記第２加熱工程においては、加熱された温度を所定時間保持することを特徴とする請求項９〜１２のいずれか一つに記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 9, wherein the heated temperature is maintained for a predetermined time in the first heating step and the second heating step. 前記第１加熱工程の後と、前記第２加熱工程の後とに、
前記加熱炉内を減圧して、当該加熱炉内を脱気する減圧工程を含むことを特徴とする請求項９〜１３のいずれか一つに記載の半導体装置の製造方法。 After the first heating step and after the second heating step,
The method for manufacturing a semiconductor device according to claim 9, further comprising a depressurization step of depressurizing the inside of the heating furnace and degassing the inside of the heating furnace.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2548685A1 (en) * 2011-07-19 2013-01-23 Alstom Technology Ltd Solder for high temperature soldering and method for repairing and producing components using this solder
JP2013525121A (en) * 2010-05-03 2013-06-20 インディウム コーポレーション Mixed alloy solder paste
US8957522B2 (en) 2012-09-19 2015-02-17 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method of semiconductor device
JP2018511482A (en) * 2015-03-10 2018-04-26 インディウム コーポレーション Hybrid alloy solder paste

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002254195A (en) * 2000-12-25 2002-09-10 Tdk Corp Soldering composition and soldering method
JP2003211289A (en) * 2002-01-21 2003-07-29 Fujitsu Ltd Electrically conductive joining material, method of joining by using the same and electronic device
JP2005125408A (en) * 2000-12-25 2005-05-19 Tdk Corp Solder composition
WO2007055308A1 (en) * 2005-11-11 2007-05-18 Senju Metal Industry Co., Ltd. Soldering paste and solder joints
WO2008026761A1 (en) * 2006-09-01 2008-03-06 Senju Metal Industry Co., Ltd. Lid for functional part and process for producing the same
JP2008080396A (en) * 2006-08-28 2008-04-10 Harima Chem Inc Solder paste composite and its application

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002254195A (en) * 2000-12-25 2002-09-10 Tdk Corp Soldering composition and soldering method
JP2005125408A (en) * 2000-12-25 2005-05-19 Tdk Corp Solder composition
JP2003211289A (en) * 2002-01-21 2003-07-29 Fujitsu Ltd Electrically conductive joining material, method of joining by using the same and electronic device
WO2007055308A1 (en) * 2005-11-11 2007-05-18 Senju Metal Industry Co., Ltd. Soldering paste and solder joints
JP2008080396A (en) * 2006-08-28 2008-04-10 Harima Chem Inc Solder paste composite and its application
WO2008026761A1 (en) * 2006-09-01 2008-03-06 Senju Metal Industry Co., Ltd. Lid for functional part and process for producing the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013525121A (en) * 2010-05-03 2013-06-20 インディウム コーポレーション Mixed alloy solder paste
EP2548685A1 (en) * 2011-07-19 2013-01-23 Alstom Technology Ltd Solder for high temperature soldering and method for repairing and producing components using this solder
CH705327A1 (en) * 2011-07-19 2013-01-31 Alstom Technology Ltd Lot for high-temperature soldering and method of repairing or manufacturing components using this solder.
US8881965B2 (en) 2011-07-19 2014-11-11 Alstom Technology Ltd. Braze alloy for high-temperature brazing and methods for repairing or producing components using a braze alloy
KR101613152B1 (en) 2011-07-19 2016-04-18 제네럴 일렉트릭 테크놀러지 게엠베하 Braze alloy for high-temperature brazing and methods for repairing or producing components using said braze alloy
EP2548685B1 (en) 2011-07-19 2017-05-24 General Electric Technology GmbH Solder for high temperature soldering and method of repairing and producing components using this solder
US8957522B2 (en) 2012-09-19 2015-02-17 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method of semiconductor device
JP2018511482A (en) * 2015-03-10 2018-04-26 インディウム コーポレーション Hybrid alloy solder paste

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