JP2010034447A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem that although a powdery resin is casted in a cavity before metal molds are clamped so as to form a sealing body by a compression molding system, the resin casted in the cavity begins to be cured under an influence of heat of the metal molds which are normally heated/held at a temperature for sealing, and the powdery resin also begins to be cured as well even when supplied onto a film in advance. <P>SOLUTION: A method of manufacturing a semiconductor device in which a plurality of semiconductor chips on an organic wiring board are sealed with a resin in a batch sealing manner by a compression molding method using a molding metal mold having upper and lower metal molds, includes supplying a resin material for sealing onto a mold release film in advance, and then setting a part of the mold release film having been supplied with the resin material for sealing in the lower mold in a state where the interval between the upper and lower metal molds is made narrow. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a resin sealing technique in a method for manufacturing a semiconductor device (or a semiconductor integrated circuit device), and more particularly to a technique effective when applied to a compression molding technique.

  In WO 2006/100765 pamphlet (Patent Document 1), a dummy cavity (flow cavity) is provided outside a real cavity of a compression mold mold, and an extra sealing resin is retracted therein. A technique is also disclosed in which a pressing force equivalent to that of the resin in the actual cavity is applied.

  Japanese Patent Application Laid-Open No. 2005-219297 (Patent Document 2) discloses a technique in which a release film and a resin pre-formed according to the shape of a lower mold are set in a lower mold and compression molded. Yes.

International Publication No. 2006/100765 Pamphlet JP 2005-219297 A

  Possible to reduce the manufacturing cost of semiconductor devices by improving the number of products acquired by the method of electrically connecting the chip and the substrate with wires and the MAP (Mold Array Process) mold method (batch sealing method) is doing. As the wire material, an Au-based wire is used because the pad configuration of the chip and the resistance component are low. However, Au has a high material cost, and its thickness greatly affects the manufacturing cost. Therefore, in recent years, there is a tendency to use a thin wire. However, when the wire becomes thin, the wire is easily flown by the resin injection pressure in the subsequent resin sealing step. In particular, this tendency is remarkable in the side gate method.

  Therefore, a compression molding method that can reduce the load on the wire even if the wire diameter is reduced is effective. In the case of the compression molding method, in order to form a sealing body, powder-like resin is put into the cavity before clamping the mold. However, in order to shorten the molding time, the mold is usually heated and maintained at the temperature at the time of sealing. Under the influence of this heat, curing of the resin put into the cavity starts.

  In particular, since the amount of the charged resin powder is small, the curing reaction is easily started when heat is transmitted even a little. Even if the powdery resin is disposed on the film, if the film is in contact with the mold, the heat of the mold is transmitted, and the curing of the resin also starts. Thereby, resin molding becomes difficult.

  The present invention has been made to solve these problems.

  An object of the present invention is to provide a manufacturing process of a highly reliable semiconductor device.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

  That is, the present invention provides a semiconductor device manufacturing method in which a plurality of semiconductor chips on an organic wiring substrate are resin-sealed by a compression molding method using a mold die including upper and lower dies by a collective sealing method. The resin material is supplied on the release film in advance, and then the part of the release film to which the sealing resin material is supplied is set in the lower mold with the space between the upper and lower molds narrowed. A plurality of semiconductor chips are resin-sealed by closing an upper mold with an organic wiring board to which the semiconductor chip is fixed and closing a lower mold and pressurizing a sealing resin material in the cavity. .

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, in a manufacturing method of a semiconductor device in which a plurality of semiconductor chips on an organic wiring substrate are sealed by a compression molding method using a mold including upper and lower molds by a batch sealing method, a sealing resin material is used. Supply in advance on a release film. Then, with the space between the upper and lower molds narrowed, the part of the release film to which the sealing resin material was supplied was set in the lower mold, and the organic wiring board on which a plurality of semiconductor chips were fixed was mounted. The upper mold is closed and the lower mold is closed, and the sealing resin material in the cavity is pressurized. Since a plurality of semiconductor chips are sealed with a resin in this way, the period from the setting of the release film to the lower mold to the closing of the upper and lower molds can be shortened. It is possible to avoid undesirably curing.

[Outline of Embodiment]
First, an outline of a typical embodiment of the invention disclosed in the present application will be described.

1. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a sealing resin material to a substantially horizontal upper surface of the release film;
(C) After the step (b), the release film is placed on the lower mold and the mold so that a portion of the release film to which the sealing resin material is supplied is located above the mold cavity. Moving relative to the space between the upper molds;
(D) After the step (a), a step of reducing a distance between the lower mold and the upper mold to the first distance;
(E) After the step (c), in the state where the distance between the lower mold and the upper mold is equal to or smaller than the first distance, Setting on the upper surface of the mold;
(F) After the step (e), closing the lower mold and the upper mold;
(G) Pressurizing the sealing resin material in the mold cavity in a state where the lower mold and the upper mold are closed;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), the organic wiring board on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.

  2. In the method for manufacturing a semiconductor device according to the item 1, the sealing resin material is in a powder form.

  3. In the method for manufacturing a semiconductor device according to the item 1 or 2, the sealing resin material is flame retardant.

4). 4. The method for manufacturing a semiconductor device according to any one of items 1 to 3, further includes the following steps:
(J) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).

  5. In the method of manufacturing a semiconductor device according to any one of 1 to 4, between a plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and a plurality of leads on the device surface of the organic wiring board, Each is bonded with a bonding wire whose main component is gold having a diameter of 20 micrometers or less.

  6). In the method of manufacturing a semiconductor device according to the item 5, the pitch of the plurality of bonding pads on each semiconductor chip is 50 micrometers or less.

  7). 7. In the method of manufacturing a semiconductor device according to any one of items 1 to 6, in the step (b), the portion to which the sealing resin material is supplied and the release film around the portion are substantially flat.

  8). 8. In the method of manufacturing a semiconductor device according to any one of 1 to 7, in the step (b), the sealing resin material supplied is substantially uniform over a range of dimensions of the mold cavity. Has a thickness.

9. The method for manufacturing a semiconductor device according to any one of 1 to 8 further includes the following steps:
(K) After the step (i), the organic wiring substrate and the resin sealing body thereon are cut in the XY direction at a time so as to form a plurality of semiconductor devices. The process of separating.

  10. In the method for manufacturing a semiconductor device according to the item 9, each of the plurality of semiconductor devices includes a plurality of semiconductor chips.

  11. In the method for manufacturing a semiconductor device according to the item 9 or 10, each of the plurality of semiconductor devices has 350 or more external terminals.

12 12. In the method for manufacturing a semiconductor device as described above in any one of 1 to 11, the step (g) includes the following sub-steps:
(G1) discharging the excess portion of the sealing resin material to the outside of the mold cavity in a state where the lower mold and the upper mold are closed;
(G2) After the substep (g1), after the step, pressurizing the sealing resin material in the mold cavity with the lower mold and the upper mold closed.

13. In the method for manufacturing a semiconductor device according to any one of Items 1 to 12, the step (b) includes the following sub-steps:
(B1) A liquid resin material for sealing, which is a part of the resin material for sealing, is drawn on a substantially horizontal upper surface of the release film so as to draw a figure substantially corresponding to the outline of the mold cavity. Supplying step;
(B2) After the step (b1), the sealing powder which is another part of the sealing resin material inside the figure by the sealing liquid resin material on the upper surface of the release film Supplying a resinous material.

14 In the method of manufacturing a semiconductor device according to the item 13, the step (g) includes the following substeps:
(G1) discharging the sealing liquid resin material to the outside of the mold cavity in a state where the lower mold and the upper mold are closed;
(G2) After the substep (g1), after the step, pressurizing the sealing powdery resin material in the mold cavity in a state where the lower mold and the upper mold are closed .

15. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a sealing resin material to the substantially horizontal upper surface of the substantially flat release film;
(C) After the step (b), the release film is placed on the lower mold and the mold so that a portion of the release film to which the sealing resin material is supplied is located above the mold cavity. Moving relative to the space between the upper molds;
(D) After the step (a), in the state where the distance between the lower mold and the upper mold is equal to or smaller than the first distance, Setting on the upper surface of the mold;
(E) after the step (d), closing the lower mold and the upper mold;
(F) Pressurizing the sealing resin material in the mold cavity with the lower mold and the upper mold closed;
(G) a step of opening the lower mold and the upper mold after the step (f);
(H) After the step (g), the organic wiring substrate on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.

  16. 16. In the method for manufacturing a semiconductor device according to the item 15, the sealing resin material is in a powder form.

  17. In the method for manufacturing a semiconductor device according to 15 or 16, the sealing resin material is flame retardant.

18. 18. The method for manufacturing a semiconductor device as described above in any one of 15 to 17, further includes the following steps:
(J) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).

  19. In the method for manufacturing a semiconductor device according to any one of the items 15 to 18, between a plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and a plurality of leads on the device surface of the organic wiring board, Each is bonded with a bonding wire whose main component is gold having a diameter of 20 micrometers or less.

  20. 20. In the method for manufacturing a semiconductor device according to the item 19, the plurality of bonding pads on each semiconductor chip have a pitch of 50 micrometers or less.

  21. 21. In the method of manufacturing a semiconductor device as described above in any one of 15 to 20, in the step (b), the sealing resin material supplied is substantially uniform over a range of dimensions of the mold cavity. Has a thickness.

22. The method for manufacturing a semiconductor device according to any one of 15 to 21 further includes the following steps:
(K) After the step (i), the organic wiring substrate and the resin sealing body thereon are cut in the XY direction at a time so as to form a plurality of semiconductor devices. The process of separating.

  23. In the method for manufacturing a semiconductor device according to the item 22, each of the plurality of semiconductor devices includes a plurality of semiconductor chips.

  24. 24. In the method for manufacturing a semiconductor device according to the item 22 or 23, each of the plurality of semiconductor devices has 350 or more external terminals.

25. 25. In the method for manufacturing a semiconductor device as described above in any one of 15 to 24, the step (g) includes the following substeps:
(G1) discharging the excess portion of the sealing resin material to the outside of the mold cavity in a state where the lower mold and the upper mold are closed;
(G2) After the substep (g1), after the step, pressurizing the sealing resin material in the mold cavity with the lower mold and the upper mold closed.

26. 26. In the method for manufacturing a semiconductor device as described above in any one of 15 to 25, the step (b) includes the following substeps:
(B1) A liquid resin material for sealing, which is a part of the resin material for sealing, is drawn on a substantially horizontal upper surface of the release film so as to draw a figure substantially corresponding to the outline of the mold cavity. Supplying step;
(B2) After the step (b1), the sealing powder which is another part of the sealing resin material inside the figure by the sealing liquid resin material on the upper surface of the release film Supplying a resinous material.

27. In the method for manufacturing a semiconductor device according to the item 26, the step (g) includes the following substeps:
(G1) discharging the sealing liquid resin material to the outside of the mold cavity in a state where the lower mold and the upper mold are closed;
(G2) After the substep (g1), after the step, pressurizing the sealing powdery resin material in the mold cavity in a state where the lower mold and the upper mold are closed .

28. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) A liquid resin material for sealing, which is a part of the sealing resin material, is supplied on a substantially horizontal upper surface of the release film so as to draw a figure substantially corresponding to the contour of the mold cavity. Process;
(C) After the step (b), inside the figure by the liquid resin material for sealing on the upper surface of the release film, a sealing powder that is another part of the sealing resin material Supplying a resin material;
(D) After the step (c), the release film is placed on the lower mold so that a portion of the release film to which the powdery resin material for sealing is supplied comes above the mold cavity. And relatively moving to a space between the upper mold and the upper mold;
(E) After the step (a), in the state where the distance between the lower mold and the upper mold is equal to or smaller than the first distance, Setting on the upper surface of the mold;
(F) After the step (e), closing the lower mold and the upper mold;
(G) Pressurizing the sealing liquid resin material and the sealing powder resin material in the mold cavity in a state where the lower mold and the upper mold are closed;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), the organic wiring board on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.

  29. 29. The method for manufacturing a semiconductor device according to 28, wherein the sealing resin material is flame retardant.

30. The method for manufacturing a semiconductor device according to the item 28 or 29 further includes the following steps:
(J) Before the step (c), a step of measuring the sealing powdery resin material based on the state of the organic wiring board.

  31. In the method of manufacturing a semiconductor device according to any one of 28 to 30, the gap between the plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and the plurality of leads on the device surface of the organic wiring board is as follows. Each is bonded with a bonding wire whose main component is gold having a diameter of 20 micrometers or less.

  32. 32. In the method of manufacturing a semiconductor device according to the item 31, a plurality of bonding pads on each semiconductor chip have a pitch of 50 micrometers or less.

  33. 33. In the method of manufacturing a semiconductor device according to any one of 28 to 32, in the step (c), the portion to which the sealing powdery resin material is supplied and the release film around the portion are substantially flat. is there.

  34. 34. In the method for manufacturing a semiconductor device according to any one of 28 to 33, in the step (c), the supplied powdery resin material for sealing is substantially in a range of dimensions of the mold cavity. It has a uniform thickness.

35. 35. The method for manufacturing a semiconductor device according to any one of the items 28 to 34, further includes the following steps:
(K) After the step (i), the organic wiring substrate and the resin sealing body thereon are cut in the XY direction at a time so as to form a plurality of semiconductor devices. The process of separating.

  36. 36. In the method of manufacturing a semiconductor device according to 35, each of the plurality of semiconductor devices includes a plurality of semiconductor chips.

  37. 37. In the method of manufacturing a semiconductor device according to 35 or 36, each of the plurality of semiconductor devices has 350 or more external terminals.

38. 38. In the method for manufacturing a semiconductor device according to any one of 28 to 37, the step (g) includes the following substeps:
(G1) discharging the sealing liquid resin material to the outside of the mold cavity in a state where the lower mold and the upper mold are closed;
(G2) After the substep (g1), after the step, pressurizing the sealing powdery resin material in the mold cavity in a state where the lower mold and the upper mold are closed .

39. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a sealing resin material to a substantially horizontal upper surface of the release film;
(C) After the step (b), the release film is placed on the lower mold and the mold so that a portion of the release film to which the sealing resin material is supplied is located above the mold cavity. Moving relative to the space between the upper molds;
(D) After the step (a), in the state where the distance between the lower mold and the upper mold is equal to or smaller than the first distance, Setting on the upper surface of the mold;
(E) after the step (d), closing the lower mold and the upper mold;
(F) discharging the excess portion of the sealing resin material to the outside of the mold cavity with the lower mold and the upper mold closed;
(G) a step of pressurizing the sealing resin material in the mold cavity with the lower die and the upper die closed after the step;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), the organic wiring board on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.

  40. 40. In the method of manufacturing a semiconductor device according to 39, the sealing resin material is in a powder form.

  41. In the method for manufacturing a semiconductor device according to 39 or 40, the sealing resin material is flame retardant.

42. 42. The method for manufacturing a semiconductor device according to any one of 39 to 41, further including the following steps:
(J) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).

  43. In the method for manufacturing a semiconductor device according to any one of Items 39 to 42, between the plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and the plurality of leads on the device surface of the organic wiring board, Each is bonded with a bonding wire whose main component is gold having a diameter of 20 micrometers or less.

  44. 44. In the method for manufacturing a semiconductor device according to the item 43, a plurality of bonding pads on each semiconductor chip have a pitch of 50 micrometers or less.

  45. 45. In the method of manufacturing a semiconductor device according to any one of 39 to 44, in the step (b), the part to which the sealing resin material is supplied and the release film around the part are substantially flat.

  46. 46. In the method of manufacturing a semiconductor device as described above in any one of 39 to 45, in the step (b), the supplied sealing resin material is substantially uniform over a range of dimensions of the mold cavity. Has a thickness.

47. 47. The method for manufacturing a semiconductor device as described above in any one of 39 to 46, further includes the following steps:
(K) After the step (i), the organic wiring substrate and the resin sealing body thereon are cut in the XY direction at a time so as to form a plurality of semiconductor devices. The process of separating.

  48. 48. In the method of manufacturing a semiconductor device according to item 47, each of the plurality of semiconductor devices includes a plurality of semiconductor chips.

  49. 49. In the method of manufacturing a semiconductor device according to 47 or 48, each of the plurality of semiconductor devices has 350 or more external terminals.

50. 50. In the method of manufacturing a semiconductor device according to any one of 1 to 49, the step of setting the release film on the upper surface of the lower mold includes the following sub-steps:
(1) a step of moving the release film relatively downward so as to contact the upper surface of the lower mold;
(2) A step of vacuum adsorbing the release film on the surface of the mold cavity after the substep (1).

  51. 51. In the method of manufacturing a semiconductor device as described above in any one of 15 to 50, the step of setting the release film on the upper surface of the lower mold is such that an interval between the lower mold and the upper mold is It is executed in a state equal to or smaller than the first interval.

52. A semiconductor device manufacturing method including the following steps:
(A) An organic wiring substrate having a device surface in which a plurality of semiconductor chips are fixed to a lower die having a mold cavity on the upper surface and a lower surface of an upper die opposed to each other with a larger interval than the first interval. Setting with the device side facing down;
(B) supplying a powdery resin material for sealing to the substantially horizontal upper surface of the release film;
(C) After the step (b), the release film is placed on the lower mold so that a portion of the release film to which the powdery resin material for sealing is supplied is located above the mold cavity. And relatively moving to a space between the upper mold and the upper mold;
(D) After the step (a), a step of reducing a distance between the lower mold and the upper mold to the first distance;
(E) After the step (c), the release film is sealed in the state where the distance between the lower mold and the upper mold is equal to or narrower than the first distance. Setting on the upper surface of the lower mold heated to a temperature at which the powdery resin material for fixing is cured;
(F) After the step (e), closing the lower mold and the upper mold;
(G) a step of pressurizing the sealing powdery resin material in the mold cavity with the lower mold and the upper mold closed;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), a step of removing the organic wiring board on which the resin sealing body for sealing the plurality of semiconductor chips is formed on the device surface from the lower surface of the upper mold.

53. A semiconductor device manufacturing method including the following steps:
(A) An organic wiring substrate having a device surface in which a plurality of semiconductor chips are fixed to a lower die having a mold cavity on the upper surface and a lower surface of an upper die opposed to each other with a larger interval than the first interval. Setting with the device side facing down;
(B) supplying a powdery resin material for sealing to a substantially horizontal upper surface of a substantially flat release film;
(C) After the step (b), the release film is placed on the lower mold so that a portion of the release film to which the powdery resin material for sealing is supplied is located above the mold cavity. And relatively moving to a space between the upper mold and the upper mold;
(D) after the steps (a) and (c), setting the release film on the upper surface of the lower mold heated to a temperature at which the powder resin material for sealing is cured;
(E) after the step (d), closing the lower mold and the upper mold;
(F) A step of pressurizing the sealing powdery resin material in the mold cavity with the lower mold and the upper mold closed.
(G) a step of opening the lower mold and the upper mold after the step (f);
(H) After the step (g), a step of removing the organic wiring board on which the resin sealing body for sealing the plurality of semiconductor chips is formed on the device surface from the lower surface of the upper mold.

54. A semiconductor device manufacturing method including the following steps:
(A) An organic wiring substrate having a device surface in which a plurality of semiconductor chips are fixed to a lower die having a mold cavity on the upper surface and a lower surface of an upper die opposed to each other with a larger interval than the first interval. Setting with the device side facing down;
(B) supplying a powdery resin material for sealing to a substantially horizontal upper surface of a substantially flat release film;
(C) After the step (b), the release film is placed on the lower mold so that a portion of the release film to which the powdery resin material for sealing is supplied is located above the mold cavity. And relatively moving to a space between the upper mold and the upper mold;
(D) After the step (a), a step of reducing a distance between the lower mold and the upper mold to the first distance;
(E) After the step (c), the release film is sealed in the state where the distance between the lower mold and the upper mold is equal to or narrower than the first distance. Setting on the upper surface of the lower mold heated to a temperature at which the powdery resin material for fixing is cured;
(F) After the step (e), closing the lower mold and the upper mold;
(G) a step of pressurizing the sealing powdery resin material in the mold cavity with the lower mold and the upper mold closed;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), a step of removing the organic wiring board on which the resin sealing body for sealing the plurality of semiconductor chips is formed on the device surface from the lower surface of the upper mold.

55. 55. In the method of manufacturing a semiconductor device according to any one of 52 to 54, the step of setting the release film on the upper surface of the lower mold includes the following sub-steps:
(1) a step of moving the release film relatively downward so as to contact the upper surface of the lower mold;
(2) A step of vacuum adsorbing the release film on the surface of the mold cavity after the substep (1).

  56. 56. In the method for manufacturing a semiconductor device according to any one of 52 to 55, the sealing resin material is in a powder form.

  57. 57. In the method for manufacturing a semiconductor device according to any one of 52 to 56, the sealing resin material is flame retardant.

58. 58. The method for manufacturing a semiconductor device according to any one of 52 to 57, further includes the following steps:
(J) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).

  59. 59. In the method for manufacturing a semiconductor device according to any one of 52 to 58, between the plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and the plurality of leads on the device surface of the organic wiring board, Each is bonded with a bonding wire whose main component is gold having a diameter of 20 micrometers or less.

[Description format, basic terms, usage in this application]
1. In the present application, the description of the embodiment will be divided into a plurality of sections for convenience, if necessary. However, unless otherwise specified, these are not independent from each other. Regardless of the front and rear, each part of a single example, one is a part of the other, or a part or all of the modifications. Moreover, as a general rule, the same part is not repeated. In addition, each component in the embodiment is not indispensable unless specifically stated otherwise, unless it is theoretically limited to the number, and obviously not in context.

  2. Similarly, in the description of the embodiment, etc., regarding the material, composition, etc., “X consisting of A” etc. is an element other than A unless specifically stated otherwise and clearly not in context. It is not excluded that one of the main components. For example, as for the component, it means “X containing A as a main component”. For example, “silicon member” is not limited to pure silicon, but also includes SiGe alloys, other multi-component alloys containing silicon as a main component, and members containing other additives. Needless to say. In addition, the term “gold-plated”, “copper layer”, “nickel-plated”, etc. includes not only pure materials, but also members mainly composed of gold, copper, nickel, etc. unless otherwise specified. Shall be.

  3. Similarly, suitable examples of graphics, positions, attributes, and the like are given, but it is needless to say that the present invention is not strictly limited to those cases unless explicitly stated otherwise, and unless otherwise apparent from the context. For example, the term “rectangular” or “substantially rectangular” includes not only exact squares or rectangles but also those similar to them. For example, a deformed square with four corners chamfered or rounded is a rectangle. Taking a square as an example, when the area of a portion excluded from the ideal square is generally less than 15% of the area of the ideal square due to chamfering or the like, the deformed square is a rectangle.

  4). In addition, when a specific number or quantity is mentioned, a numerical value exceeding that specific number will be used unless specifically stated otherwise, unless theoretically limited to that number, or unless otherwise clearly indicated by the context. There may be a numerical value less than the specific numerical value.

  5. “Wafer” usually refers to a single crystal silicon wafer on which a semiconductor device (same as a semiconductor integrated circuit device and an electronic device) is formed, but is an SOI wafer, an epitaxial wafer, a composite of an insulating substrate and a semiconductor layer, etc. Needless to say, wafers are also included.

  6). The term “semiconductor chip” generally refers to a die or the like on which a semiconductor device or a semiconductor integrated circuit is formed after a wafer dividing process (blade dicing, laser dicing or other pelletizing process). Here, a silicon-based chip (including a glass substrate or the like in which a silicon-based semiconductor layer is formed, the same applies hereinafter) will be described as an example, but a GaAs-based or other device chip may be used.

  7). The term “wiring board” generally refers to an organic wiring board including a flexible wiring board, a ceramic wiring board, a metal lead frame, etc., other chips, a wafer, and other thin film integrated circuit devices. The chip is die-bonded directly or via another chip in a die bonding area provided in a unit device area on the wiring board. The “multilayer” of the “multilayer wiring board” means one having three or more wiring layers. A single-layer substrate (a single-layer substrate includes a single-layer single-sided substrate and a single-layer double-sided substrate) in which wiring layers are formed on both surfaces of one core insulating plate. “Organic wiring board” includes the case where the main component is an organic resin even if it contains a large amount of inorganic material such as glass fiber. For example, a glass epoxy substrate is a typical organic wiring substrate. On the contrary, a ceramic wiring board having a polyimide insulating layer that is an organic substance on the surface is generally not an organic wiring board because the main structure is ceramic.

  8). In the “compression mold” mainly dealt with in the present application, the mold can be formed when the upper mold, the (middle mold) and the lower mold (in the following example, there is no middle mold in a typical sense) are closed. The resin sealing body is formed by melting, filling, and curing the resin using various space regions formed in the space. When explaining this process, the various space regions, that is, a portion related to a mold such as a cavity portion that accommodates a main portion of an object to be sealed, and a sealing body (including a region on a wiring board) by a sealing resin. In some cases, the reference numbers are shared among the corresponding parts of the. In the sealing technology, the metal part of the mold is not meaningful, but the gap part is meaningful. Therefore, when displaying in the figure, the metal part of the mold is partially omitted. In some cases, only the filling member is specified.

  9. When the resin material is referred to as “powdered”, it includes a particulate solid member having a diameter or a passing dimension smaller than the longest passing dimension of a mold cavity such as a powder, granule, or shot.

  10. With respect to the terminology including “upper” or “lower” with respect to the sealing device and the wiring board, some attention is required. When referring to the “lower mold”, it corresponds to the direction of gravity, and its “upper surface” is the direction opposite to the direction of gravity. However, usually when mounting a semiconductor chip on one side of a wiring board, it is customary (because most processes are performed with the top side up), regardless of the direction of gravity. It is called “device surface or top surface”. Therefore, when the wiring board is set on the lower surface (the direction of gravity) of the upper mold, the wiring substrate is usually faced downward, so that the upper surface of the wiring board is directed downward. The same situation occurs during package dicing. In these situations, the upper surface of the wiring board faces downward, but it is also referred to as the “upper surface” unless explicitly stated otherwise.

  11. Unless otherwise specified, “upper and lower mold spacing” is from the top of the cavity block to the top of the wiring board (in the direction of gravity in the state attached to the upper mold, that is, below, for convenience in graph notation) The distance to the surface facing the

  The upper surface of the lower mold and the lower surface of the upper mold are provided with a large number of fine holes for vacuum-adsorbing the substrate or the release film. Not shown above.

[Details of the embodiment]
The embodiment will be further described in detail. In the drawings, the same or similar parts are denoted by the same or similar symbols or reference numerals, and description thereof will not be repeated in principle.

1. Description of Resin Sealing (Compression Mold) Process and Resin Sealing Device Used in the Resin Sealing (Compression Mold) Process in the Semiconductor Device Manufacturing Method of One Embodiment of the Present Invention (Mainly FIGS. 1 to 17 and FIG. 27)
FIG. 1 is a process flow diagram (wiring board mounting & resin material measuring step) of a sealing device & device cross section of a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 2 is a resin sealing (compression molding) process sealing device & device cross-sectional process flow diagram (resin material supply to release film & upper and lower mold spacing in the manufacturing method of the semiconductor device of one embodiment of the present invention) Narrowing step). FIG. 3 is a process flow diagram (resin material transfer process between upper and lower molds) of a sealing apparatus and device cross-section of a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to an embodiment of the present invention. is there. FIG. 4 is a sealing device & device cross-sectional process / flow diagram of the resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to the embodiment of the present invention ). FIG. 5 is a process flow diagram of a sealing device and a device cross-section of a resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to an embodiment of the present invention (step of adsorbing a release film to a lower mold). is there. FIG. 6 is a sealing device & device cross-section process flow diagram (upper and lower mold temporary clamp & decompression process in cavity) of the resin sealing (compression molding) process in the semiconductor device manufacturing method of one embodiment of the present invention. . FIG. 7 is a process flow diagram (upper and lower mold book clamp & resin compression curing process) of a sealing apparatus & device of a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to an embodiment of the present invention. . FIG. 8 is a sealing device & device cross-sectional process flow diagram (upper and lower mold opening & substrate taking-out step) of the resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 9 is a block flow diagram of a resin sealing (compression molding) process in the method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 10 is a time chart of the resin sealing (compression molding) process in the semiconductor device manufacturing method according to the embodiment of the present invention. FIG. 11 is a top view of a molding apparatus used in the method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 12 is a top view of the sieve portion in the sealing resin material supply unit of the molding apparatus used in the method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 13 is a side sectional view (corresponding to FIG. 1) of the sieve portion in the sealing resin material supply unit of the molding apparatus used in the method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 14 is a side sectional view (corresponding to FIG. 2) of the sieve portion in the sealing resin material supply unit of the molding apparatus used in the method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 15 is a top view of the lower mold (upper mold) as seen through the upper mold of the upper mold of the press unit of the press unit of the molding apparatus used in the method of manufacturing a semiconductor device according to the embodiment of the present invention. The O-ring in FIG. 2 is indicated by a dotted line and the outlines of two types of wiring boards are indicated by a one-dot broken line) (YY ′ cross section corresponds to FIGS. 1 to 8). FIG. 16 is a top view of an organic wiring board having a sealing body (corresponding to FIGS. 1 to 8) sealed by a resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to an embodiment of the present invention. (FIG. 16A) and a cross-sectional view corresponding to the XX ′ cross section (FIG. 16B) (details of the structure resulting from the flow gate are not shown in order to avoid complication). FIG. 17 is a top view of an organic wiring board having a sealing body (another example) sealed by a resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 16A is a cross-sectional view corresponding to the cross-section a)) and XX ′ (FIG. 16B) (details of the structure resulting from the flow gate are not shown to avoid complication). FIG. 27 is a top view of the lower mold when the upper mold is viewed through the upper mold of another press unit of the molding apparatus used in the method of manufacturing a semiconductor device according to the embodiment of the present invention (upper) The O-ring in the mold is indicated by a dotted line and the outlines of two types of wiring boards are indicated by a dashed line) (YY ′ cross section corresponds to FIGS. 1 to 8). Based on these drawings, a resin sealing (compression molding) process 154 (FIG. 9) and a resin sealing device used in the method of manufacturing a semiconductor device according to an embodiment of the present invention will be described.

  First, the sealing resin material preparation step 125 in FIG. 9 will be described. The organic wiring board 1 (described in detail in section 2) in the state shown in FIG. 19 is received by the load unit 82 of the consistent compression molding apparatus 81 as shown in FIG. The substrate 1 is inspected by the inspection unit 83 on the upper surface 1a by the optical image observation system, and the locations 11a without the semiconductor chip 2 are counted (chip presence / absence inspection step 110 in FIG. 9). Next, the transfer arm 62 (FIG. 1) of the wiring board transfer unit 84 holds the wiring board 1 downward and moves to the press unit 85, and as shown in FIG. 1, the main body block 52 of the upper mold 51. The wiring board 1 is aligned and set on the lower surface of the substrate. At approximately the same time, evacuation of the lower surface of the main body block 52 is started to hold the board (wiring board mounting step 112 in FIG. 9). In this wiring board mounting step 112, the upper and lower mold intervals M are usually about 200 mm, for example, and are 200% to 600% compared to the maximum interval M2 (for example, about 50 mm) at the time of subsequent narrowing. It is a wide value. This is derived from the thickness of the transfer arm 62 of the wiring board transfer unit 84.

  Here, for convenience of the following description, the structure of the press unit 85 and the molding apparatus 81 in the vicinity thereof will be briefly described. As shown in FIG. 1, the press unit 85 is provided with a lower mold 55 and an upper mold 51 between the press mechanisms, and the release film 4 (for example, 50) stretched approximately horizontally therebetween. A micrometer-thick PET, PEN member, or other heat-resistant resin is preferred). The upper die 51 includes a main body block 52, a frame portion 53, an elastic mechanism 65 that connects the frame portion 53 to the main body block 52, and an O-ring 54 (an upper surface 56a of the lower die 55) And the like) is fixed to the upper press block via the main body block 52. The lower mold 55 includes a cavity block 56, a frame portion 57, a mold cavity 61 that is a recess formed by the cavity block 56 and an upper surface 56a of the cavity block 56, an elastic mechanism 66 that couples the frame portion 57 to the cavity block 56, The flow cavity includes a flow cavity plunger 63 that pressurizes the flow cavity 64, a flow gate 67 between the mold cavity 61 and the flow cavity 64, and the like. The previous cavity block 56 is fixed on the lower press block (FIG. 5), and the frame portion 57 is fixed to the lower press block 50 via an elastic mechanism 66.

  The previous release film 4 is discharged from the delivery roll 4c by the discharge blower 71, and is then sent out almost horizontally and taken up by the take-up roll 4e. This feeding mechanism is also used to transfer the portion 4r of the release film 4 to which the sealing resin material is supplied between the upper and lower molds while being kept substantially horizontal. A sealing resin material supply unit 88 (FIG. 11) is provided in the vicinity of the upper surface 4a and the lower surface 4b of the release film 4 in the vicinity of the delivery roll 4c. The sealing resin material supply unit 88 includes a measuring cup containing the sealing resin material 5, a sieve 60, and a backup board 59 that holds the lower surface 4 b of the release film 4 almost horizontally. In addition, it is suitable for the release film 4 that there is no embossing, an unevenness | corrugation, or a wave, etc., and it is substantially flat. This is in order to achieve uniform resin material deposition (desirably so as to have a uniform initial difference).

  In parallel with the wiring board attachment step 112 of FIG. 9, the sealing resin material supply unit 88 operates. Based on the result of the chip presence / absence inspection step 110 of FIG. 9 (instead of this, it may be based on the inspection information of the wiring board inspection step 151 which is a separate preceding process, It may be based on both of the results of the inspection step 110. If it is based on only one, either inspection can be omitted, and improvement in accuracy can be expected when referring to both data), as shown in FIG. The measuring cup 58 uniformly distributes a desired amount of the sealing resin material 5 (for example, a sealing powdery resin material) on the lower sieve 60 (resin material measuring step 111). This is because the required amount of resin is accurately measured to keep the package thickness constant. Here, the chip presence / absence inspection step 110 and the resin material measurement step 111 can be omitted when a certain amount of the sealing resin material is supplied. For example, the case where the thickness of the package may be slightly changed or the case where the thickness of the package does not depend on the supply amount of the sealing resin material due to the use of a flow cavity or the like as described below. .

  Next, as shown in FIG. 2, the sealing resin material 5 on the sieve 60 (usually a powdered resin, such as a thermosetting resin such as an epoxy resin of a B stage, a curing agent, a catalyst, silica powder, etc. A composition such as a filler, a flexible agent such as silicone, a coupling agent, an internal mold release agent, a flame retardant, and a colorant) is supplied to the upper surface 4a of the release film 4 (resin in FIG. 9). Material supply step 113). The supply amount is, for example, about 5 grams. When this supply is finished, the sieve 60 and the backup board are separated from the release film 4. The operation of the sealing resin material supply unit in the resin material supply step 113 will be described in detail. As shown in FIG. 12, the planar structure of the sieve 60 is composed of a peripheral frame and an internal mesh 60a. As shown in FIG. 13, the sealing powdery resin material 5 is deposited on the mesh 60a so as to be distributed almost uniformly. At this time, since the shutter 60b is provided below the mesh 60a and is closed, the sealing powdery resin material 5 is held on the sieve 60. Next, as shown in FIG. 14, when the shutter 60b is opened, the sealing powdery resin material 5 moves to the upper surface 4a of the release film 4, and then the sieve 60 retracts.

  9 and FIG. 9, after the wiring board mounting step 112, the upper mold 51 is raised between t <b> 1 and t <b> 2 (for example, about 7 seconds) as shown in FIGS. 2 and 10. Then, the mold interval M is narrowed to M2 or less (the lower mold interval narrowing step 115 in FIG. 9). Subsequently, as shown in FIG. 3, during the period t2 to t3 in FIG. 10 (for example, about 10 seconds), the rollers 4c and 4e rotate, and the portion 4r to which the sealing resin material of the release film 4 is supplied. Is moved above the cavity 61 (moving step 114 above the cavity in FIG. 9). This completes the sealing resin material preparation 125. As shown in FIG. 9 or FIG. 10, the upper and lower mold interval narrowing step 115 is not limited to being performed before the moving step 114 above the cavity, but may be performed after the moving step 114 above the cavity. May be performed simultaneously. However, the implementation before the step 114 of moving to the sky of the cavity has an advantage that the overall time can be easily shortened. Further, it is desirable that the wiring board mounting step 112 is executed before the step 115 for narrowing the space between the upper and lower molds. This is because the thickness of the transfer arm 62 and the like of the wiring board transfer unit 84 is about 150 mm. However, if the thickness is reduced to about 45 mm, the wiring board mounting step after the upper and lower mold space narrowing step 115 is performed. 112 can be performed. In this case, it is also possible to set the upper and lower mold intervals from the beginning to the maximum interval M2 when the upper and lower mold intervals are narrowed or less.

  Next, as shown in FIG. 4, between t2 and t3 in FIG. 10, the release film 4 is lowered toward the lower mold 55 and landed on the upper surface 57a of the frame portion 57 (release film in FIG. 9). Landing step 116). Next, as shown in FIG. 5, during the period from t2 to t3 in FIG. 10, the release film 4 is evacuated from the vacuum suction holes on the upper surface a of the cavity block 56 and the upper surface 57a of the frame portion 57. Suction into the mold 55 (lower mold vacuum suction step 117 in FIG. 9). This completes the setting step 118 of the release film shown in FIG. The completion of the step 118 for setting the release film to the lower mold is not limited to this timing, and may be performed at the latest before the completion of the temporary clamping of the mold (119 in FIG. 9) described below. However, it is desirable to perform the lower mold vacuum suction step 117 as much as possible. That is, at the earliest, it should be performed after the upper and lower mold interval narrowing step 115 (in this case, the case where the upper and lower mold interval is equal to or less than M2). In general, during operation, the upper and lower mold surfaces are always heated to about 175 degrees Celsius (for example, 170 degrees to 180 degrees Celsius). If contact is made at an early stage, the descent reaction of the sealing resin material 5 is early. This is because the necessary movement does not occur well even in the cavity.

  Next, as shown in FIG. 10 and FIG. 6, during the period from t3 to t4 in FIG. 10 (for example, about 3 seconds), it is pushed up by the lower press block 50, and the lower mold 55 is lifted to lower the lower mold. When the upper surface 4a of the release film 4 on the upper surface 57a of the frame portion 57 of the mold 55 hits the O-ring 54 on the lower surface of the frame portion 53 of the upper mold 51 (die interval M3 in FIG. 10), (Upper and lower mold closing step 119 in FIG. 9). That is, the closed space 61 (mold cavity or actual cavity) is created by the lower surface O-ring 54 and the side surface O-ring 69. Subsequently, as shown in FIG. 10, during the time t4 to t5 in FIG. 10 (for example, about 1 second), the intracavity decompression is started through the cavity decompression hole 68 in the state of FIG. 6 (intracavity decompression step of FIG. 120). This is to suppress the generation of voids. When the intracavity decompression step 120 is completed, during the period from t5 to t6 in FIG. 10 (for example, about 4 seconds), the lower press block 50 is pushed up again, and the lower die 55 is raised. Then, when the upper surface 4a of the release film 4 in the portion of the upper surface 57a of the frame portion 57 of the lower mold 55 hits the upper surface 1a of the organic wiring board 1 set on the lower surface of the main body block 52 of the upper mold 51, The raising of the frame part 55a of the lower mold 55 stops. After that, as shown in FIGS. 7 and 10, it is pushed up by the lower press block 50 between t6 and t7 in FIG. 10 (for example, about 6 seconds), and only the cavity block 56 of the lower mold 55 is moved. Ascending (see the broken line at the bottom of FIG. 10), the resin is filled (resin filling step 121 in FIG. 9).

  At this time, as shown in FIG. 10, the surplus resin 3d flows from the mold cavity 61 to the flow cavity 64 almost simultaneously, and the resin pressure rises from the base value P1 to the intermediate value P2. Along with this, the flow cavity plunger 63 is temporarily lowered from the base position N1 toward the lower position N2 (the flow cavity 64 is enlarged by this drop). The flow cavity plunger 63 is driven by an actuator that receives a signal from a sensor that senses the resin pressure in the mold cavity 61, and the resin pressure in the flow cavity 64 becomes the resin pressure in the mold cavity 61. To be equal. In other words, this prevents the resin pressure in the mold cavity 61 from becoming uneven due to the presence of the flow cavity 64 (that is, preventing the generation of voids in the package periphery).

Next, as shown in FIGS. 7 and 10, during the period from t7 to t8 in FIG. 10 (for example, about 90 seconds), the cavity block 56 is made to be sealed with the resin sealing body 3 (by the pressure from the lower press block 50). Resin material 5) is compressed (resin pressure is, for example, about 4.8 MPa to 7.7 MPa, clamp pressure is, for example, 2 to 3 kg weight / mm ² ) (the rise of the cavity block 56 is filled at t7) The resin curing proceeds (the resin compression / curing step 122 in FIG. 9).

  At this time, the position of the flow cavity plunger 63 converges to N2 so that the resin pressure in the flow cavity 64 follows the resin pressure in the mold cavity 61 almost simultaneously and becomes the resin pressure P3 at the time of sealing. Retained. Since the cavity block 56 is fixed on the lower press block 50 in this way, the final package thickness accuracy can be about 10 micrometers or less.

  Next, as shown in FIGS. 8 and 10, when the lower press block starts to descend between t8 and t9 in FIG. 10 (for example, about 5 seconds), first, the cavity block 50 is moved to the reference position (frame Relative position when the release film is set). Subsequently, the entire lower mold 55 is lowered and the mold opening is completed (step 123 for opening the upper and lower molds in FIG. 9). On the other hand, the flow cavity plunger 63 returns to the reference position N1 immediately after time t8, and the resin pressurization of the flow cavity 64 returns to the reference pressure P1 almost simultaneously.

  Thereafter, the upper mold body block 52 is released from the vacuum state while being held by the transfer arm 62 (FIG. 1), and the wiring board 1 is transferred to the transfer arm 62 and carried out between the upper and lower molds. Then, the sheet is discharged from the unload unit 87 to the outside of the molding apparatus 81 (wiring board removal step 124 in FIG. 9).

  Next, the interrelationship between the main part of the lower mold 55 described above, the wiring substrate 1, the lower surface O-ring 54, and the like will be described with reference to FIGS. 15 to 17 and FIG. As shown in FIG. 15, a cavity block 56 is a lower moving part of the lower mold 55 at the center, and the upper part is just a mold cavity 61 (actual cavity). As the mold structure, the outside of the cavity block 56 is a frame portion 57. Flow cavities 64 (dummy cavities) are provided on both sides of the mold cavity 61 via a plurality of flow gates 67. Further, the flow cavity 64 can be provided on four sides as shown in FIG. However, the mold structure is complicated. The positional relationship between these and the wiring boards 1 and 1 ′ is classified into two forms. The first form is a wiring board 1 that is arranged to cover the entire flow cavity 64. On the other hand, the second form is a wiring board 1 'in which the flow cavity 64 is located outside. In the first embodiment, since the unnecessary resin 3d (see FIG. 16) may be removed by the dicing process, it is not necessary to perform the unnecessary resin removing process in the molding process, but it is necessary to increase the width of the wiring board 1. . Moreover, since there is no protrusion of the surplus resin 3d, there is also an advantage that the subsequent conveyance of the wiring board 1 is easy.

  On the other hand, the second embodiment has a merit that it is not necessary to increase the width of the wiring board 1 ′, although it is necessary to perform a process of removing the unnecessary resin 3 d (see FIG. 17) in the molding process. And in the outermost periphery part, there exists the lower surface O-ring 54 installed in the frame part 53 of the upper metal mold | die 51 so that these may be enclosed.

  If the flow cavity 64 is present, excess resin material is discharged out of the mold cavity 61. Therefore, even if the measured sealing resin material 5 slightly deviates from the desired amount, the deviation is absorbed. Therefore, there is an advantage that the package thickness can be made uniform. Therefore, when the flow cavity 64 is used, it is possible to perform a relatively simple metering operation in the resin material metering step 111 (FIG. 9). For example, it may be a fixed amount corresponding to the product type. Usually, the incidence of defective sites 2f is considered to be about 5% to 20% due to defects in the wiring board.

  It goes without saying that the flow cavity 64 need not be used if the package thickness may vary slightly or if it can be accurately metered sufficiently. In this case, there is an advantage that the mold can be easily processed and the specification resin material can be saved.

2. Description of main assembly process in manufacturing method of semiconductor device of one embodiment of the present invention (mainly FIGS. 18 to 23)
FIG. 18 is a block flow diagram of the main part of the assembly process in the method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 19 is a top view showing the state of the organic wiring substrate before the resin sealing step in the method for manufacturing a semiconductor device according to the embodiment of the present invention (FIG. 19A) and a partial cross section corresponding to the BB ′ cross section. It is a figure (Fig.19 (a)) (The outline of the part in which a sealing body should be formed is shown with a dashed-dotted line). FIG. 20 is a side view showing the state of the organic wiring board after the bump electrodes are attached in the method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 21 is a side view showing the state of the organic wiring substrate during the package dicing step in the method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 22 is a device perspective view showing the state of the (substantially completed) semiconductor device after the package dicing step in the method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 23 is a device sectional view showing a state of the (substantially completed) semiconductor device after the package dicing step in the method of manufacturing a semiconductor device according to one embodiment of the present invention. Based on these drawings, an assembly main process in the method of manufacturing a semiconductor device according to an embodiment of the present invention will be described.

  As shown in FIGS. 18 and 19, first, the organic wiring board 1 is optically inspected for defects (wiring board inspection step 151). Here, the organic wiring substrate 1 usually includes glass / epoxy as a main component, but may be one using BT resin, an aramid nonwoven fabric, other resin, or the like. As the dimensions of the organic wiring board 1, those having a width of 40 to 70 mm and a length of 50 to 160 mm are often used.

  Next, based on the defect site data obtained as a result of the wiring board inspection step 151 (hereinafter also the same in the wire bonding step and the resin sealing step. However, it is possible to use or substitute with image recognition in the step. A semiconductor chip 2 is die-bonded in a matrix through an adhesive layer such as DAF (Die Attach Film) in a unit device region 11 in the device surface 1a (upper surface) of the organic wiring substrate 1 which is free of wiring defects. (Die bonding step 152). Next, bonding pads 8 (see FIG. 23, for example, the pad pitch is about 50 μm or less) on the upper surface 1a of the semiconductor chip 2 and the leads 9 on the upper surface 1a of the wiring board 1 Between the gold wires 7 (bonding wire mainly composed of gold, the diameter thereof is 20 micrometers, for example, about 18 micrometers (usually 20 micrometers, 17 micrometers, 15 micrometers) (A wire having a diameter smaller than that is used. Of course, a wire having a diameter other than that, that is, a wire having a diameter exceeding 20 micrometers may be used) (wire bonding step 153). The state of the organic wiring board at this time will be described with reference to FIG. Since the unit device region 11a (defective site) having no semiconductor chip is included in the unit device region 11 in a considerable ratio, when a certain amount of resin material is supplied and sealing is performed, the defective site 11a When there are many, the thickness of the sealing body 3 becomes thinner than a regulation value, and when there are few defective sites 11a, the thickness of the sealing body 3 becomes thicker than a regulation value. Therefore, generally, in the next resin sealing step described in section 1, it is necessary to increase or decrease the amount of sealing resin material to be supplied in accordance with the number of defective sites 11a.

  When the next resin sealing step 154 described in section 1 is completed, bump electrodes 6 (lead-free solder bumps are preferable) are attached to the lower surface 1b of the wiring board 1 as shown in FIG. Attachment step 155). Next, as shown in FIG. 21, the rotating blade 91 is moved along the X direction dicing line 21 and the Y direction dicing line 22 in FIG. (Dicing with a so-called rotating blade, but dicing with a laser or the like is possible. However, at present, mechanical dicing is more reliable in the process), the individual semiconductors as shown in FIG. The apparatus 10 is divided (package dicing step 156). A cross section of the semiconductor device 10 at this time will be described with reference to FIG. As shown in FIG. 23, a device in SOP (System on Package) format or SIP (System in Package) format usually has a chip stacked structure (usually a multiple structure). For example, chip 2y is mounted on chip 2x. It is fixed. Of course, it is needless to say that a non-stacked structure (single chip or multi-chip planar arrangement) may be used. Wire bonding is usually connected between the bonding pads 8 on the chips 1x and y and the leads 9 on the upper surface 1a of the wiring board 1. However, in a stacked structure or a multi-chip planar arrangement, different chips are connected. The bonding pads 8 may be connected to each other. The process shown here is mainly applied to devices having a package thickness of about 1 millimeter or less, but it goes without saying that it may be applied to devices having other dimensions. Usually, an SOP or SIP type device often has 350 or more external terminals in order to increase the number of chips. The process shown here is mainly applied to a device having the number of external terminals (the number of bumps or pins) of about 350 or more, but may be applied to a device having the number of external terminals less than that. Needless to say.

3. Description of other sealing resin material supplying steps in the resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to an embodiment of the present invention (mainly FIGS. 24 to 26)
As described in section 1, in the compression mold, the sealing resin material 5 includes performance (liquid resin is not flame retardant), price (liquid resin has a single digit price) and easy handling. In view of this aspect (liquid resin needs to be frozen and stored), a powdery resin material 5a for sealing which is advantageous is used. However, the powdered resin 5a is easily affected by static electricity, and it is not always easy to distribute the powdered resin 5a thinly and uniformly on the release film 4 depending on the situation. The following is a modified example of the resin supply step 113 of FIG. 9 effective in such a case.

  FIG. 24 is a top view of a release film of a resin sealing (compression molding) process in a method for manufacturing a semiconductor device according to another embodiment of the present invention (corresponding to a liquid resin dam forming step, FIGS. 1 and 2). . FIG. 25 is a top view of a release film of a resin sealing (compression molding) process in a method for manufacturing a semiconductor device according to another embodiment of the present invention (a step of supplying a powdery resin material for sealing to the release film, FIG. And corresponding to FIG. FIG. 26 is a cross-sectional view corresponding to FIG. Based on these, another sealing resin material supplying step in the resin sealing (compression molding) process in the manufacturing method of the semiconductor device according to the embodiment of the present invention will be described.

  As shown in FIG. 24, a contour of a figure substantially corresponding to the contour of the mold cavity 61 is drawn on the upper surface 4 a of the release film 4 with the liquid resin material 5 b for sealing. Next, as shown in FIG. 25, the sealing powdery resin material 5a is supplied into the figure. At this time, since the sealing liquid resin material 5b and the sealing powdery resin material 5a match the required amount, the measurement of the sealing resin material 5 takes into account the length of the contour of the figure in advance. Thus, it is necessary to measure the required sealing powdery resin material 5a. In this case, as shown in FIG. 26, the dam of the sealing liquid resin material 5b is formed around the deposition region of the sealing powdery resin material 5a. It is possible to prevent the deposition region of the powder resin material 5a for use from undesirably diffusing. It is difficult to make the liquid resin material 5b for sealing flame-retardant compared with the powdered resin material 5a for sealing, but a mold having a flow cavity 64 as shown in FIGS. 15 and 27 is used. If used, most of the sealing liquid resin material 5b moves to the flow cavity 64, and the sealing body 3 is molded only from the substantially flame-retardant sealing powdery resin material 5a. In particular, as shown in FIG. 27, when a mold provided with flow cavities 64 on four sides is used, the liquid resin material 5b for sealing can be almost completely excluded from the mold cavity 61.

4). Summary The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited thereto, and it goes without saying that various changes can be made without departing from the scope of the invention.

  For example, in the above-described embodiment, an example in which a semiconductor chip (including a multilayer chip) is mainly mounted on a multilayer organic wiring board has been specifically described. However, the present invention is not limited thereto, and a single-layer organic wiring board ( Needless to say, the present invention can be applied to a semiconductor chip mounted on a single-layer or multilayer ceramic wiring board (including a wiring board on a film).

  In the above embodiment, the MAP sealing method has been specifically described. However, the present invention is not limited to this, and it goes without saying that the present invention can also be applied to an individual sealing method.

It is a sealing apparatus & device cross-section process flowchart (wiring board attachment & resin material measurement process) of the resin sealing (compression molding) process in the manufacturing method of the semiconductor device of one embodiment of this invention. Resin sealing (compression molding) process sealing device & device cross-section process flow diagram (resin material supply to release film & upper and lower mold interval narrowing step) in semiconductor device manufacturing method according to one embodiment of the present invention ). It is a sealing apparatus & device cross-section process flowchart (resin material transfer process between upper and lower molds) of a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to an embodiment of the present invention. It is a sealing apparatus & device cross-section process flow diagram (lowering of mold release film to lower mold & landing process) in a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to an embodiment of the present invention. . It is the sealing apparatus & device cross-section process flow figure (adsorption process to the lower metal mold | die of a release film) of the resin sealing (compression mold) process in the manufacturing method of the semiconductor device of one embodiment of this invention. It is the sealing apparatus & device cross-section process flow figure (upper and lower metal mold temporary clamp & pressure reduction process in cavity) of the resin sealing (compression molding) process in the manufacturing method of the semiconductor device of one embodiment of this invention. It is the sealing apparatus & device cross-section process flow figure (upper and lower metal mold clamp & resin compression curing process) of the resin sealing (compression molding) process in the manufacturing method of the semiconductor device of one embodiment of this invention. It is a sealing apparatus & device cross-section process flow diagram (upper and lower mold opening & substrate taking-out step) of a resin sealing (compression molding) process in the method of manufacturing a semiconductor device according to an embodiment of the present invention. It is a block flow diagram of a resin sealing (compression molding) process in a method for manufacturing a semiconductor device according to an embodiment of the present invention. It is a time chart of the resin sealing (compression mold) process in the manufacturing method of the semiconductor device of one embodiment of this invention. It is a top view of the mold apparatus used for the manufacturing method of the semiconductor device of one embodiment of this invention. It is a top view of the sieve part in the resin material supply unit for sealing of the molding apparatus used for the manufacturing method of the semiconductor device of one embodiment of this invention. It is a sectional side view (corresponding to FIG. 1) of the sieving portion in the sealing resin material supply unit of the molding apparatus used in the method for manufacturing a semiconductor device of one embodiment of the present invention. It is a sectional side view (corresponding to Drawing 2) of a sieve part in a resin material supply unit for closure of a mold device used for a manufacturing method of a semiconductor device of one embodiment of the invention of this application. Lower mold top view (O in upper mold) of upper surface of lower mold of press unit of molding apparatus used in manufacturing method of semiconductor device of one embodiment of present invention seen through upper mold The ring is indicated by a dotted line, and the outlines of two types of wiring boards are indicated by a dashed line) (the YY ′ cross section corresponds to FIGS. 1 to 8). FIG. 16 is a top view of an organic wiring board having a sealing body (corresponding to FIGS. 1 to 8) sealed by a resin sealing (compression molding) process in the method for manufacturing a semiconductor device according to an embodiment of the present invention. It is sectional drawing (FIG.16 (b)) corresponding to (a)) and XX 'cross section (In order to avoid complexity, the detail of the structure resulting from a flow gate is not displayed). FIG. 16A is a top view of an organic wiring substrate having a sealing body (another example) sealed by a resin sealing (compression molding) process in the method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 16B is a sectional view corresponding to the section XX ′ (FIG. 16B) (details of the structure due to the flow gate are not shown in order to avoid complication). It is a block flow diagram of the main part of an assembly process in the manufacturing method of the semiconductor device of one embodiment of this invention. The top view (Drawing 19 (a)) and the partial sectional view corresponding to the BB 'section (Drawing) showing the mode of the organic wiring board before the resin sealing process in the manufacturing method of the semiconductor device of one embodiment of the invention of this application 19 (a)) (the outline of the portion where the sealing body is to be formed is indicated by a one-dot broken line). It is a side view which shows the mode of the organic wiring board after bump electrode attachment in the manufacturing method of the semiconductor device of one embodiment of this invention. It is a side view which shows the mode of the organic wiring board in the package dicing process in the manufacturing method of the semiconductor device of one embodiment of this invention. It is a device perspective view which shows the mode of the (substantially completed) semiconductor device after the package dicing process in the manufacturing method of the semiconductor device of one embodiment of this invention. It is device sectional drawing which shows the mode of the semiconductor device after the package dicing process in the manufacturing method of the semiconductor device of one embodiment of this invention. FIG. 10 is a top view of a release film (corresponding to a liquid resin dam forming step, corresponding to FIGS. 1 and 2) of a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to another embodiment of the present invention. FIG. 2 is a top view of a release film of a resin sealing (compression molding) process in a method of manufacturing a semiconductor device according to another embodiment of the present invention (a step of supplying a sealing resin powder material to the release film, FIG. 1 and FIG. 2); Corresponding). FIG. 26 is a cross-sectional view corresponding to FIG. 25. Lower mold top view (upper mold) of upper surface of lower mold of other press unit of mold apparatus used in manufacturing method of semiconductor device of one embodiment of present invention as seen through upper mold The O-ring in FIG. 2 is indicated by a dotted line and the outlines of two types of wiring boards are indicated by a one-dot broken line) (YY ′ cross section corresponds to FIGS. 1 to 8).

Explanation of symbols

1, 1 'Organic wiring board 1a (Organic wiring board) upper surface (downward when set in a mold) or device surface 1b (Organic wiring board) lower surface (Upward when set in a mold) or bump surface 2 Semiconductor chip 2a Upper surface (semiconductor chip) or device surface 2b Lower surface or back surface (semiconductor chip) 2f Die bonding site to which no semiconductor chip is attached 2x Lower semiconductor chip 2y Upper semiconductor chip 3 Sealed body (or sealing) Area to be done)
3d surplus resin or sealed body 4 release film 4a (release film) upper surface 4b (release film) lower surface 4c (release film) delivery roll 4e (release film) take-up roll 4r ( Part supplied with sealing resin material of release film 5 Sealing resin material 5a Powdered resin material for sealing 5b Liquid resin material for sealing 6 Bump electrode (solder bump)
7 Bonding wire 8 Bonding pad 9 Lead 10 Semiconductor device 11 Unit device area 11a Unit device area without semiconductor chip 12 Dicing tape 21 X direction dicing line 22 Y direction dicing line 50 Lower press block 51 Upper metal Mold 52 (top mold) top plate or body block 53 (upper mold) frame section 54 lower surface O-ring 55 lower mold 56 (lower mold) lower moving section (cavity block)
56a Top surface of lower mold lower part or bottom of cavity 57 Frame part of lower mold 57a Upper surface of lower mold frame 58 Measuring cup 59 Backup board 60 Sieve 60a Sieve mesh 60b Sieve shutter 61 Mold cavity (actual cavity)
62 Transfer arm (of substrate transfer unit) 63 Flow cavity plunger 64 Flow cavity (dummy cavity)
65 Elastic mechanism (of upper mold) 66 Elastic mechanism of (lower mold) 67 Flow gate 68 Cavity decompression hole 69 Side O-ring 71 Static discharge blow device 81 Mold device 82 Load unit 83 Inspection unit 84 Wiring board transport unit 85 Press unit 86 Unnecessary resin removal unit 87 Unload unit 88 Resin material supply unit for sealing 89 Optical image observation system 91 Dicing blade 110 Chip presence inspection 111 Resin material measurement 112 Organic wiring board attachment 113 onto release film 114 Resin material supply 114 Transport of release film 115 Narrowing between upper and lower mold 116 Contact with lower mold of release film 117 Vacuum adsorption to lower mold of release film 118 Setting of release film to lower mold 119 Upper and lower mold closure (temporary clamp)
120 Depressurization in cavity 121 Resin filling (this clamp & cavity block rise)
122 Resin compression / curing 123 Opening of upper and lower molds 124 Wiring board removal 125 Preparation of resin material for sealing 151 Wiring board inspection 152 Die bonding 153 Wire bonding 154 Resin sealing 155 Bump mounting 156 Package dicing M Upper and lower mold spacing ( General)
M2 Maximum distance when the upper and lower mold intervals are narrowed M3 Upper and lower mold intervals during temporary clamping M4 Upper and lower mold intervals when clamped N1 Base position of the flow cavity plunger N2 Position when sealing the flow cavity plunger P1 Base flow / cavity / plunger pressure P2 Resin pressure during filling P3 Sealing resin pressure t1 When the lower mold starts to rise initially t2 When narrowing is completed (when the upper and lower mold spacing reaches M2)
t3 When the lower mold starts to rise again toward the temporary clamp t4 When the pressure reduction in the cavity starts t5 When the lower mold starts to rise again toward the clamp t6 The lower mold frame stops rising Time point t7 When the cavity block of the lower mold stops rising t8 When mold opening starts t9 When mold opening is completed

Claims (20)

A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a sealing resin material to a substantially horizontal upper surface of the release film;
(C) After the step (b), the release film is placed on the lower mold and the mold so that a portion of the release film to which the sealing resin material is supplied is located above the mold cavity. Moving relative to the space between the upper molds;
(D) After the step (a), a step of reducing a distance between the lower mold and the upper mold to the first distance;
(E) After the step (c), in the state where the distance between the lower mold and the upper mold is equal to or smaller than the first distance, Setting on the upper surface of the mold;
(F) After the step (e), closing the lower mold and the upper mold;
(G) Pressurizing the sealing resin material in the mold cavity in a state where the lower mold and the upper mold are closed;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), the organic wiring board on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.     In the method for manufacturing a semiconductor device according to the item 1, the sealing resin material is in a powder form.     In the method for manufacturing a semiconductor device according to the item 1, the sealing resin material is flame retardant. The method for manufacturing a semiconductor device according to the item 1, further includes the following steps:
(J) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).     In the method of manufacturing a semiconductor device according to the item 1, a distance between a plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and a plurality of leads on the device surface of the organic wiring board is 20 μm in diameter. Bonded with bonding wires whose main component is gold below 1 meter. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a sealing resin material to the substantially horizontal upper surface of the substantially flat release film;
(C) After the step (b), the release film is placed on the lower mold and the mold so that a portion of the release film to which the sealing resin material is supplied is located above the mold cavity. Moving relative to the space between the upper molds;
(D) a step of setting the release film on the upper surface of the lower mold after the steps (a) and (c);
(E) after the step (d), closing the lower mold and the upper mold;
(F) Pressurizing the sealing resin material in the mold cavity with the lower mold and the upper mold closed;
(G) a step of opening the lower mold and the upper mold after the step (f);
(H) After the step (g), the organic wiring substrate on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.     In the method of manufacturing a semiconductor device according to the item 6, the sealing resin material is in a powder form.     In the method for manufacturing a semiconductor device according to item 6, the sealing resin material is flame retardant. The method for manufacturing a semiconductor device according to the item 6, further includes the following steps:
(I) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).     In the method of manufacturing a semiconductor device according to the above item 6, a gap between a plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and a plurality of leads on the device surface of the organic wiring board is 20 μm in diameter. Bonded with bonding wires whose main component is gold below 1 meter. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a liquid resin material for sealing so as to draw a figure substantially corresponding to the outline of the mold cavity on the substantially horizontally stretched upper surface of the release film;
(C) After the step (b), supplying a sealing powdery resin material into the figure made of the sealing liquid resin material on the upper surface of the release film;
(D) After the step (c), the release film is placed on the lower mold so that a portion of the release film to which the powdery resin material for sealing is supplied comes above the mold cavity. And relatively moving to a space between the upper mold and the upper mold;
(E) after the steps (a) and (d), setting the release film on the upper surface of the lower mold;
(F) After the step (e), closing the lower mold and the upper mold;
(G) Pressurizing the sealing liquid resin material and the sealing powder resin material in the mold cavity in a state where the lower mold and the upper mold are closed;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), the organic wiring board on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process. In the method for manufacturing a semiconductor device according to the item 11, the step (g) includes the following substeps:
(G1) discharging the sealing liquid resin material to the outside of the mold cavity in a state where the lower mold and the upper mold are closed;
(G2) After the substep (g1), after the step, pressurizing the sealing powdery resin material in the mold cavity in a state where the lower mold and the upper mold are closed .     12. In the method of manufacturing a semiconductor device according to the item 11, the sealing liquid resin material is not flame retardant, and the sealing powder resin material is flame retardant. The method for manufacturing a semiconductor device according to the item 11, further includes the following steps:
(J) Before the step (c), a step of measuring the sealing powdery resin material based on the state of the organic wiring board.     12. In the method of manufacturing a semiconductor device according to the item 11, the gap between the plurality of bonding pads on each semiconductor chip of the plurality of semiconductor chips and the plurality of leads on the device surface of the organic wiring board is 20 μm in diameter, respectively. Bonded with bonding wires whose main component is gold below 1 meter. A semiconductor device manufacturing method including the following steps:
(A) A device in which a plurality of semiconductor chips arranged in a matrix are fixed to a lower mold having a mold cavity on the upper surface and a lower mold opposed to each other with an interval larger than the first interval. Setting an organic wiring board having a surface with its device surface facing down;
(B) supplying a sealing resin material to a substantially horizontal upper surface of the release film;
(C) After the step (b), the release film is placed on the lower mold and the mold so that a portion of the release film to which the sealing resin material is supplied is located above the mold cavity. Moving relative to the space between the upper molds;
(D) a step of setting the release film on the upper surface of the lower mold after the steps (a) and (c);
(E) after the step (d), closing the lower mold and the upper mold;
(F) discharging the excess portion of the sealing resin material to the outside of the mold cavity with the lower mold and the upper mold closed;
(G) a step of pressurizing the sealing resin material in the mold cavity with the lower die and the upper die closed after the step;
(H) a step of opening the lower mold and the upper mold after the step (g);
(I) After the step (h), the organic wiring board on which the resin sealing body that collectively seals the plurality of semiconductor chips is formed on the device surface is removed from the lower surface of the upper mold. Process.     In the method for manufacturing a semiconductor device according to the item 16, the sealing resin material is in a powder form.     In the method for manufacturing a semiconductor device according to the item 16, the sealing resin material is flame retardant. The method for manufacturing a semiconductor device according to the item 16, further includes the following steps:
(J) A step of measuring the sealing resin material based on the state of the organic wiring substrate before the step (b).     In the method for manufacturing a semiconductor device according to the item 16, in the step (b), the portion to which the sealing resin material is supplied and the release film around the portion are substantially flat.

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