JP2010034260A - Wiring substrate, method of manufacturing the same, and mounting structure - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring substrate having superior electrical reliability, and to provide a method of manufacturing the same and a mounting structure. <P>SOLUTION: A wiring substrate has a via conductor 10 consisting of: one insulating layer 7, made of the same type of resin material; a first conductor part 10a embedded in the insulating layer 7 and having a lower part of the width which is narrower than that of an upper part; and a second conductor part 10b, formed immediately under the first conductor part 10a and connected to the first conductor part 10a and having a lower end of the width which is larger than the width of the first conductor part 10a. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a wiring board used for electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices, and peripheral devices.

  Conventionally, wiring boards capable of mounting semiconductor elements such as IC (Integrated Circuit) or LSI (Large Scale Integration) are known.

In recent years, a build-up wiring board in which a fine wiring layer is formed on the front and back of the wiring board has been widespread for the purpose of downsizing electronic devices. (See Patent Document 1 below). In the technique disclosed in Patent Document 1, in order to connect the wiring layers having different vertical positions, the wiring layers are connected to each other via via conductors. However, such a via conductor is narrower from one end to the other end, and the contact area between the end portion of the narrowed via conductor and the wiring layer is small, and there is a possibility that both of them are peeled off.
JP 2007-294708 A

  An object of this invention is to provide the wiring board excellent in electrical reliability, its manufacturing method, and a mounting structure.

  A wiring board according to an embodiment of the present invention includes a single insulating layer made of the same type of resin material, a first conductor portion embedded in the insulating layer and having a lower width than an upper portion, and the first A via conductor formed immediately below the conductor portion and connected to the first conductor portion and having a second conductor portion whose lower end width is wider than the width of the first conductor portion;

  In the wiring board according to an embodiment of the present invention, the second conductor portion is formed wide from the top to the bottom.

  In the wiring board according to the embodiment of the present invention, the lower end width of the second conductor portion is wider than the width of the first conductor portion at the height position of the upper surface of the insulating layer.

  In the wiring board according to the embodiment of the present invention, the side surface of the second conductor portion is curved.

  A mounting structure according to an embodiment of the present invention includes the wiring board and a semiconductor element flip-chip mounted on the wiring board.

  The method for manufacturing a wiring board according to an embodiment of the present invention includes a step of preparing a substrate in which an insulating layer and a conductive layer are laminated, and a pressure for pressing the surface of the insulating layer by providing the substrate in a reduced-pressure atmosphere. Reducing the thermal decomposition temperature of the insulating layer, and irradiating a part of the insulating layer located immediately above the conductive layer with a laser beam in a reduced-pressure atmosphere, Forming a through hole that exposes a part thereof, and forming a via conductor in contact with a part of the conductive layer exposed in the through hole.

  In addition, in the method for manufacturing a wiring board according to an embodiment of the present invention, the insulating layer is in contact with the conductive layer in the through hole after the through hole is formed and before the via conductor is formed. Etching the lower end of the conductive layer to widen the exposed region of the conductive layer.

  Also, in the method for manufacturing a wiring board according to an embodiment of the present invention, the etching solution is allowed to flow along a part of the surface of the conductive layer exposed in the through hole and is in contact with the conductive layer in the through hole. The lower end of the insulating layer is etched.

  In the method for manufacturing a wiring board according to an embodiment of the present invention, the laser beam passes through the fθ lens and is perpendicularly incident on the upper surface of the insulating layer and is positioned immediately above the conductive layer. Part of the insulating layer is removed.

In the method for manufacturing a wiring board according to an embodiment of the present invention, the reduced-pressure atmosphere is an atmospheric pressure of 0.8 × 10 ⁵ Pa or less.

  In the method for manufacturing a wiring board according to an embodiment of the present invention, the laser beam applied to a part of the insulating layer located immediately above the conductive layer has an output of 0.2 μJ or more and 300 μJ or less.

  The present invention can provide a wiring board with excellent electrical reliability, a method for manufacturing the wiring board, and a mounting structure.

  Hereinafter, a mounting structure including a wiring board according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a plan view of the mounting structure, and FIG. 2 is a cross-sectional view of the mounting structure. FIG. 3 is an enlarged cross-sectional view of the via conductor embedded in the insulating layer.

  The mounting structure 1 includes a wiring board 2 and a semiconductor element 4 such as an IC or LSI that is flip-chip mounted on the wiring board 2 via bumps 3 made of solder.

  The wiring substrate 2 includes a core substrate 5, conductive layers 6 that are alternately stacked on one main surface and the other main surface of the core substrate 5, and an insulating layer 7. The core substrate 5 is made of, for example, a thermosetting resin such as an epoxy resin, a bismaleimide triazine resin, or a cyanate resin on a base material in which glass fiber, polyparaphenylene benzbisoxazole resin, wholly aromatic polyamide resin, or the like is woven vertically and horizontally. It is produced by impregnating and solidifying.

  The core substrate 5 can also be made from a low thermal expansion resin without using a base material. As the low thermal expansion resin, for example, polyparaphenylene benzbisoxazole resin, wholly aromatic polyamide resin, wholly aromatic polyester resin, polyimide resin or liquid crystal polymer resin can be used. Among these, it is desirable to use a polyparaphenylene benzbisoxazole resin. The polyparaphenylene benzbisoxazole resin has a low coefficient of thermal expansion of −5 ppm / ° C. to 5 ppm / ° C. By using such a low thermal expansion resin, the thermal expansion of the core substrate 5 itself can be suppressed. As a result, the core substrate 5 can be brought close to the thermal expansion of the semiconductor element 4, and since the difference between the thermal expansions of both is small, even if the core substrate 5 undergoes thermal expansion, the connection between the two can be maintained well. it can. In addition, a thermal expansion coefficient applies to JISK7197.

  The core substrate 5 includes a through hole S penetrating in the vertical direction, a through hole conductor 8 formed along the inner wall surface of the through hole S, and an insulator 9 filled in a region surrounded by the through hole conductor 8. Is formed. The through-hole conductor 8 is made of a conductive material such as copper, silver, gold, aluminum, nickel, or chromium. The insulator 9 is for filling the remaining space surrounded by the through hole S. The insulator 9 is made of, for example, polyimide resin, acrylic resin, epoxy resin, cyanate resin, fluorine resin, silicon resin, polyphenylene ether resin, or bismaleimide triazine resin. By filling the remaining space surrounded by the through hole S with the insulator 9, a via conductor 10 to be described later can be formed immediately above the insulator 9, and the distance of the wiring routed from the through hole conductor 8 to the conductive layer 6 can be increased. Thus, the wiring board 2 can be reduced in size. In addition, by shortening the distance of the wiring, the wiring resistance can be reduced and the power consumption can be reduced.

  The conductive layer 6 and the insulating layer 7 will be described. The conductive layer 6 includes a line-shaped signal line 6a having a function of transmitting a predetermined electric signal and a flat ground layer 6b having a function of bringing the mounting element 4 to a common potential, for example, a ground potential. It is out. The signal line 6a is disposed so as to face the ground layer 6b with the insulating layer 7 interposed therebetween. The conductive layer 6 is made of a metal material such as copper, silver, gold, aluminum, nickel, or chromium.

  The insulating layer 7 is made of a thermosetting resin or a thermoplastic resin. As such a thermosetting resin, for example, a polyimide resin, an acrylic resin, an epoxy resin, a urethane resin, a cyanate resin, a silicon resin, or a bismaleimide triazine resin can be used. As the thermoplastic resin, since it is necessary to have heat resistance that can withstand heating during solder reflow, the softening temperature of the constituent material is desirably 200 ° C. or higher. For example, a liquid crystal polymer can be used. The insulating layer 7 is set so that the thickness after drying is, for example, 1 μm or more and 15 μm or less.

  The insulating layer 7 may contain a large number of fillers. By containing the filler in the insulating layer 7, the viscosity before hardening of the insulating layer 7 can be adjusted, and the thickness dimension of the insulating layer 7 can be brought close to a desired value. The filler is spherical, the filler diameter is set to, for example, 0.05 μm to 6 μm, and the thermal expansion coefficient of the filler is, for example, −5 ppm / ° C. to 5 ppm / ° C. The filler is made of, for example, silicon oxide (silica), silicon carbide, aluminum oxide, aluminum nitride, or aluminum hydroxide.

  As shown in FIG. 3, a through hole P is formed in the insulating layer 7, and a via conductor 10 is formed in the through hole P. The via conductor 10 can electrically connect conductive layers 6 having different vertical positions. The via conductor 10 is formed immediately below the first conductor portion 10a having a lower width than the upper portion and the first conductor portion 10a, and is connected to the first conductor portion 10a and has a lower end width of the first conductor portion 10a. The second conductor portion 10b is wider than the second conductor portion 10b. The via conductor 10 is made of, for example, a conductive material such as copper, silver, gold, platinum, aluminum, nickel, or chromium.

  The first conductor portion 10a is formed so as to gradually become narrower from the top to the bottom. Further, the second conductor portion 10b is formed to be wide from the upper part to the lower part. The connection portion between the first conductor portion 10 a and the second conductor portion 10 b is formed to be the narrowest in the via conductor 10. Since the via conductor 10 is embedded in the insulating layer 7, when an external force is applied to the via conductor 10 in the vertical direction and the via conductor 10 attempts to move in the vertical direction, the first conductor portion 10a and the second conductor portion 10a Stress can be applied to the via conductor 10 from the insulating layer 7 that covers the periphery of the connection portion with the conductor portion 10b, and the via conductor 10 can be prevented from moving in the vertical direction. Can be maintained well.

  The second conductor portion 10b is formed so as to become wider from the upper part to the lower part. Therefore, the contact area between the second conductor portion 10b and the conductive layer 6 can be increased, and the via conductor 10 can be made difficult to peel from the conductive layer 6. Further, the side surface of the second conductor portion 10b is formed to be curved, and a part of the second conductor portion 10b enters and is formed in the gap between the insulating layer 7 and the ground layer 6b. The connection between the via conductor 10 and the ground layer 6b can be strengthened, and cracks can be prevented from entering at the connection location between the via conductor 10 and the electrical reliability can be improved.

  Since the via conductor 10 has a wide upper end and lower end of the via conductor 10, the contact area between the upper and lower conductive layers 6 of the via conductor 10 can be increased, and the conductive layers 6 having different vertical positions can be obtained. Adhesive force between each other and the via conductor 10 can be increased. As a result, the via conductor 10 can be made difficult to peel from the conductive layer 6.

  The semiconductor element 4 is made of a material that approximates the coefficient of thermal expansion of the insulating layer 7. For example, silicon, germanium, gallium arsenide, gallium arsenide phosphorus, gallium nitride, or silicon carbide can be used. In addition, the thickness dimension of the semiconductor element 4 can use the thing of 0.1 mm to 1 mm, for example.

  According to the mounting structure including the wiring board according to the above-described embodiment, the upper end and the lower end of the via conductor are formed wide to increase the contact area with the conductive layer, and the adhesive force between the via conductor and the conductive layer is increased. It can be enlarged. As a result, it is possible to provide a wiring board and a mounting structure with excellent electrical reliability.

  Next, a method for manufacturing the mounting structure described above will be described with reference to FIGS. First, a plurality of sheets prepared by impregnating a base material made of parisparaphenylene benzbisoxazole resin with a thermosetting resin made of polyimide are prepared, and these sheets are laminated. And the core board | substrate 5 can be produced by heat-pressing and hardening the laminated | stacked lamination sheet. The thickness of the core substrate 5 is set to, for example, 0.3 mm or more and 1.5 mm or less.

  And the through-hole S which penetrates an up-down direction is formed with respect to the core board | substrate 5 using a conventionally well-known drill process. A plurality of through holes S are formed, and the diameter is set to, for example, 0.1 mm or more and 1 mm or less. Next, plating is applied to the surface of the core substrate 5 using an electroless plating method, and the through-hole conductor 8 is formed on the inner peripheral surface of the through-hole S. Further, an insulator 9 is formed by filling an area surrounded by the through-hole conductor 8 with, for example, an epoxy resin or a polyimide resin using a printing method. Then, a material constituting the conductive layer 6 is deposited immediately above and directly below the insulator 9 by using a conventionally known vapor deposition method, CVD method, sputtering method, or the like so as to cover directly above and immediately below the insulator 9. . Further, the plating applied to the main surface of the core substrate 5 is patterned to form a ground layer 6b on the main surface of the core substrate 5 as shown in FIG.

  Next, as shown in FIG. 4B, a polyimide resin or the like is deposited on the ground layer 6b. And the insulating layer 7 is formed on the ground layer 6b by heating and pressurizing using, for example, a heating press. In this way, a substrate on which the insulating layer 7 and the conductive layer 6 are stacked can be prepared.

  Next, the prepared substrate is provided in a reduced-pressure atmosphere. Here, the decompression container capable of providing the substrate in the decompressed atmosphere includes a laser light oscillation mechanism, a laser light refining mechanism, and a laser light irradiation position adjusting mechanism as the laser device L.

  The laser light oscillation mechanism has a mechanism for oscillating laser light using a gas such as carbon dioxide or a solid such as YAG as an oscillation source. The laser beam refining mechanism has a mechanism for adjusting the energy distribution of the oscillated laser beam, narrowing the laser beam, and converting the wavelength of the laser beam. Further, the laser light irradiation position request mechanism has a mechanism for arbitrarily changing the direction of the laser light by a galvano mirror and irradiating a predetermined position.

  An fθ lens is attached to the decompression container as a window for introducing laser light into the container. Inside the fθ lens, there is a mechanism for preventing the scattered matter scattered by being irradiated with laser light from the irradiated object such as a wiring board from adhering to the fθ lens. This prevention mechanism covers the fθ lens with a transparent resin film, and periodically winds the resin film to take out a new resin film to cover the fθ lens. Further, an XY table for moving an object to be irradiated such as a wiring board is provided in the decompression container. The XY table moves in synchronization with the galvanometer mirror in order to irradiate a predetermined portion of the irradiated object such as a wiring board with a laser beam.

The substrate is placed in such a vacuum container. And the pressure in a pressure-reduced container is set to 0.8 * 10 < ⁵ > Pa or less, and a board | substrate is provided in a pressure-reduced atmosphere. The pressure in the decompression vessel is about 0.5 × 10 ⁵ Pa, and the effect of laser processing becomes remarkable. The lower the pressure, the more the effect of laser processing is recognized, but at 1 × 10 ² Pa or less, XY There is a tendency that damage is likely to occur in movable parts such as tables. Therefore, the pressure in the container is suitably from 0.5 × 10 ⁴ Pa to 0.5 × 10 ⁵ Pa.

  Then, as shown in FIG. 5, a laser beam is irradiated from the laser device L to a part of the insulating layer 7 located immediately above the conductive layer 6 while maintaining the reduced pressure atmosphere, and one part of the insulating layer 7 is irradiated. A portion of the conductive layer 6 is exposed by removing the portion. The laser light is reflected by the galvanometer mirror M and irradiated onto the substrate via the fθ lens. The galvanometer mirror M has a function for irradiating the substrate with laser light with high positional accuracy. The reflection surface of the galvanometer mirror M can finely adjust the reflection angle of the laser beam by a drive mechanism such as a step motor. The fθ lens has a function of causing the laser light reflected by the galvanometer mirror M to enter perpendicularly to the surface of the substrate. By irradiating the substrate with laser light through the fθ lens, it is possible to form the through-hole Px whose inner wall surface is substantially vertical. As shown in FIG. 7B, when the through hole Px is viewed in cross section in the thickness direction of the substrate, the inclination angle AN of the inner wall surface of the through hole Px is set to 80 ° or more and 100 ° or less.

  The output of the laser beam is set to 0.01 μJ or more and 300 μJ or less per pulse. Further, the output of the laser beam is 100 μJ or less per pulse, and preferably 0.2 μJ or more and 10 μJ or less.

  Further, the integrated output of the laser light obtained by integrating the outputs per pulse of the laser light irradiated per second is 50 W or less, and preferably 0.1 W or more and 10 W or less. As described above, since the atmosphere is under reduced pressure, the thermal decomposition temperature of the insulating layer 7 made of a resin material can be reduced even if the output of the laser beam is small, and a part of the insulating layer 7 can be sufficiently removed. Can do. Then, the through hole Px can be formed by exposing the conductive layer 6.

  Then, as shown in FIG. 6, in order to remove another portion of the insulating layer 7 and to expose the conductive layer 6 separately, the angle of the galvanometer mirror M is finely adjusted, and laser light is emitted from the laser device L. To do. As a result, a part of the insulating layer 7 can be removed, and a through hole Px can be formed separately to expose the conductive layer 6. As a result, the step of dissolving and removing the remaining resin with a chemical such as permanganic acid can be reduced, and the core substrate 5 can be prevented from being contaminated by these chemicals. In this manner, as shown in FIG. 7A, a plurality of through holes Px whose inner wall surfaces are substantially vertical can be formed in the insulating layer 7. As shown in FIG. 7B, the through hole Px is a hole in which the inner wall surface is inclined and the lower part is narrower than the upper part.

  The resin material constituting the insulating layer 7 is decomposed and evaporated by laser heat, but the resin is disposed by placing the substrate inside the decompression vessel, compared to the case where the substrate is placed outside the decompression vessel under atmospheric pressure. The decomposition evaporation temperature of the material decreases. If the substrate is irradiated with laser light outside the decompression vessel, the resin heated by the irradiation of the laser light becomes a coal tar-like carbide and is deposited on the surface of the conductive layer 6. Since this deposit is difficult to etch, the lower end of the insulating layer 7 is difficult to etch. As in this embodiment, when the substrate is placed in a reduced-pressure atmosphere and the resin is heated by laser light irradiation, decomposition and evaporation proceed rapidly, and coal tar-like carbides are not generated. Further, when the drilling of the insulating layer 7 by laser light proceeds and the laser light reaches the surface of the conductive layer 6, the conductive layer 6 is heated by laser heat. When the heat of the conductive layer 6 is conducted to the lower surface of the insulating layer 7 in contact with the conductive layer 6, the resin at the contact portion with the conductive layer 6 decomposes and evaporates at a relatively low temperature in a reduced pressure atmosphere. Decomposition and evaporation occurs at the interface portion of the insulating layer 7. Etching proceeds at the lower end of the insulating layer 7 due to decomposition evaporation occurring in this portion.

  Next, the substrate is taken out from the decompression container. Then, as shown in FIG. 8A, after the through hole Px is formed and before the via conductor 10 is formed, for example, permanganic acid, sodium hydroxide, or these are formed on the through hole Px. Then, the lower end of the insulating layer 7 in contact with the conductive layer 6 in the through hole Px is etched to widen the exposed region of the conductive layer 6. Here, the reason why the exposed region of the conductive layer 6 becomes wider as shown in FIG. 8B will be described.

  In advance, in a reduced-pressure atmosphere, many connection portions between the conductive layer 6 and the insulating layer 7 are etched by laser heat. Then, in the center of the through hole Px in plan view, an etching solution is flowed from the upper side to the lower side of the through hole Px. The etching liquid hits the vicinity of the center of the exposed conductive layer 6 and flows along the surface of the exposed conductive layer 6 to collide with the inner wall surface of the through hole Px. By irradiating the laser beam in a reduced pressure atmosphere, not in the atmospheric pressure, the inclination accuracy AN of the through hole Px can be brought close to 90 °, and the etching solution flowing along the surface of the conductive layer 6 is passed through the through hole Px. Can be strongly applied to the lower side of the inner wall. Therefore, many of the etched portions of the insulating layer 7 are concentrated in the lower part of the insulating layer 7 in contact with the conductive layer 6 in the through hole Px. Further, by flowing an etching solution to the center of the through hole Px, the etching solution that hits the conductive layer 6 is dispersed substantially evenly, and the insulating layer 7 positioned on the inner wall surface of the through hole Px along the surface of the conductive layer 6. collide. Therefore, the portion of the insulating layer 7 to be etched is etched substantially uniformly along the periphery of the lower portion of the inner wall surface of the through hole Px. As a result, the through hole P obtained by etching the inner wall surface of the through hole Px can be formed. Note that a fine nozzle may be used for inflow of the etching solution. By using the nozzle, it is possible to more accurately adjust the location where the etching solution flows, and to effectively apply the etching solution to the vicinity of the center of the through hole Px.

  Further, as shown in FIG. 9A, the via conductor 10 is formed by performing a conventionally well-known plating process on the through hole P and filling a conductive material. In addition, the via conductor 10 can be formed and plating can be formed on the insulating layer 7.

  As shown in FIG. 9B, the via conductor 10 is formed by filling the through hole P with a conductive material. A part of the via conductor 10 enters the gap between the insulating layer 7 and the conductive layer 6 in the through hole P. As a result, a part of the via conductor 10 that has entered the gap between the insulating layer 7 and the conductive layer 6 has an anchor effect on the insulating layer 7 and can be made difficult to escape from the insulating layer 7. The electrical connection between 10 and the conductive layer 6 can be maintained well. In addition, the contact area with the exposed conductive layer 6 can be increased, the adhesive force of the via conductor 10 to the conductive layer 6 can be increased, and the electrical connection between the via conductor 10 and the conductive layer 6 can be increased. Reliability can be improved.

  Next, as shown in FIG. 10A, a resist is applied to the surface of the plating, and after exposure and development, the plating is etched to form a signal line 6a. In this way, the signal line 6 a as a conductive layer can be formed on the terminal portion 12.

  By using the above-described method, a multilayer substrate wiring substrate can be manufactured as shown in FIG. 10B by repeating the lamination process of the insulating layer 7 and the conductive layer 6 on the lower surface side of the core substrate 5. it can. Then, the mounting structure 1 can be manufactured by flip-chip mounting the semiconductor element 4 on the wiring board 2 via the bumps 3.

  In the embodiment described above, a part of the insulating layer 7 can be removed using a low-power laser beam that does not destroy the conductive layer 6 in order to expose the conductive layer 6. Therefore, the electrical reliability of the conductive layer 6 can be maintained satisfactorily. Further, the contact area between the lower end of the via conductor 10 and the conductive layer 6 can be increased by efficiently etching the resin constituting the insulating layer 7 in a reduced pressure atmosphere in which the insulating layer 7 is easily decomposed and evaporated. The connection between the conductive layer 6 and the via conductor 10 can be strengthened, and the mechanical reliability can be improved.

  In addition, this invention is not limited to the above-mentioned form, A various change, improvement, etc. are possible in the range which does not deviate from the summary of this invention.

It is a top view of the mounting structure concerning one embodiment of the present invention. It is sectional drawing of the mounting structure which concerns on one Embodiment of this invention. It is an expanded sectional view of the via conductor of the mounting structure concerning one embodiment of the present invention. 4A and 4B are cross-sectional views illustrating a manufacturing process of the mounting structure according to one embodiment of the present invention. FIG. 5 is a cross-sectional view illustrating a manufacturing process of the mounting structure according to the embodiment of the present invention. FIG. 6 is a cross-sectional view illustrating the manufacturing process of the mounting structure according to the embodiment of the present invention. FIG. 7A and FIG. 7B are cross-sectional views illustrating a manufacturing process of the mounting structure according to one embodiment of the present invention. FIGS. 8A and 8B are cross-sectional views illustrating a manufacturing process of the mounting structure according to one embodiment of the present invention. 9A and 9B are cross-sectional views illustrating the manufacturing process of the mounting structure according to one embodiment of the present invention. FIGS. 10A and 10B are cross-sectional views illustrating a manufacturing process of the mounting structure according to one embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Mounting structure 2 Wiring board 3 Bump 4 Semiconductor element 5 Core board 6 Conductive layer 6a Signal line 6b Ground layer 7 Insulating layer 8 Through-hole conductor 9 Insulator 10 Via conductor 10a 1st conductor part 10b 2nd conductor part S Through hole P Through hole AN Inclination accuracy

Claims (11)

A single insulating layer made of the same kind of resin material;
A first conductor part embedded in the insulating layer and having a lower part lower than the upper part and formed immediately below the first conductor part, connected to the first conductor part, and having a lower end width of the first conductor part. A via conductor comprising a second conductor portion wider than the width of one conductor portion;
A wiring board comprising: The wiring board according to claim 1,
The wiring board, wherein the second conductor portion is formed wide from the upper part to the lower part. The wiring board according to claim 1,
The wiring board according to claim 1, wherein a lower end width of the second conductor portion is wider than a width of the first conductor portion at a height position of an upper surface of the insulating layer. The wiring board according to claim 2,
A wiring board, wherein a side surface of the second conductor portion is curved.   5. A mounting structure comprising: the wiring substrate according to claim 1; and a semiconductor element flip-chip mounted on the wiring substrate. Preparing a substrate on which an insulating layer and a conductive layer are laminated;
Providing the substrate in a reduced-pressure atmosphere, reducing the pressure for pressing the surface of the insulating layer and lowering the thermal decomposition temperature of the insulating layer;
Irradiating a part of the insulating layer located immediately above the conductive layer with laser light in a reduced pressure atmosphere to form a through hole exposing a part of the conductive layer in the insulating layer;
Forming a via conductor in contact with a part of the conductive layer exposed in the through hole;
A method of manufacturing a wiring board, comprising: In the manufacturing method of the wiring board according to claim 6,
After forming the through hole and before forming the via conductor,
Etching the lower end of the insulating layer in contact with the conductive layer in the through hole to widen the exposed region of the conductive layer;
A method of manufacturing a wiring board, comprising: In the manufacturing method of the wiring board according to claim 7,
A method of manufacturing a wiring board, comprising: flowing an etching solution along a part of the surface of the conductive layer exposed in the through hole, and etching the lower end of the insulating layer in contact with the conductive layer in the through hole. . In the manufacturing method of the wiring board according to claim 6,
The laser beam passes through an fθ lens, enters perpendicularly to the upper surface of the insulating layer, and removes a part of the insulating layer located immediately above the conductive layer. Method. In the manufacturing method of the wiring board according to claim 6,
The method for manufacturing a wiring board, wherein the reduced-pressure atmosphere is an air pressure of 0.8 × 10 ⁵ Pa or less. In the manufacturing method of the wiring board according to claim 6,
A method of manufacturing a wiring board, wherein the laser beam applied to a part of the insulating layer located immediately above the conductive layer has an output of 0.2 μJ or more and 300 μJ or less.

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