JP2010034248A - Spiral inductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the Q value of a spiral inductor by optimizing a linewidth directional position where a plurality of vias are in contact with a conductive wire. <P>SOLUTION: The spiral inductor has a primary conductive wire 11a arranged on a primary conductive layer, which has a helical shape, a secondary conductive wire 12 arranged on a secondary conductive layer, having a helical shape approximately identical to that of the primary conductive wire 11a, an insulating film arranged between the primary and secondary conductive layers, and the plurality of vias 21 arranged in the length direction of the secondary conductive wire 12 and penetrating the insulating film, thus electrically connecting the primary conductive wire 11a and the secondary conductive wire 12, wherein the plurality of vias 21 include an exterior via 21a making contact with the secondary conductive wire 12 at the outer side of the linewidth directional center of the secondary conductive wire 12 and an interior via 21b making contact with the secondary conductive wire 12 at the inner side of the center. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a spiral inductor in which two or more spiral conductor wires arranged in different conductor layers are connected by vias.

  With advances in technology for manufacturing semiconductor elements by finely processing semiconductors, etc., circuit elements such as various types of transistors, diodes, resistors, and capacitors have been reduced in size. Many challenges remain.

  For example, a spiral inductor made of a spiral metal wiring formed on a metal wiring layer above a semiconductor substrate has been conventionally known. However, since the resistance of the spiral metal wiring is large, the Q value of the spiral inductor decreases. End up.

Therefore, by arranging two metal wirings having the same spiral shape through an insulating film and connecting the two metal wirings in parallel by a plurality of vias penetrating the insulating film, the area occupied by the spiral inductor is increased. There has been proposed a spiral inductor in which the resistance of a metal wiring is reduced and the Q value is improved (see, for example, Patent Documents 1 and 2).
Japanese Patent No. 2986081 JP 2006-173145 A

  However, in any of the patent documents, all vias are connected at substantially the center in the line width direction of the metal wiring, and the relationship between the position in the line width direction of the metal wiring that each via contacts and the Q value of the inductor. There is no description which shows.

  The inventor of the present invention has found that the position in the line width direction of the metal wiring where the via contacts the metal wiring affects the Q value of the inductor.

  A feature of the present invention is that a first conductor wire having a spiral shape disposed in the first conductor layer and a first conductor wire disposed in the second conductor layer and having a spiral shape substantially the same as the first conductor wire. Two conductor wires, an insulating film disposed between the first conductor layer and the second conductor layer, and arranged along the length direction of the second conductor wire, penetrating the insulating film to the first A spiral inductor comprising a plurality of vias that electrically connect between the first conductor line and the second conductor line, respectively, wherein the plurality of vias are located more than the center of the second conductor line in the line width direction. An outer via that contacts the second conductor line on the outer side and an inner via that contacts the second conductor line on the inner side than the center described above are included.

  According to the present invention, the plurality of vias arranged along the length direction of the second conductor line have an outer side in contact with the first conductor line outside the center in the line width direction of the second conductor line. Since the via and the inner via that contacts the second conductor line inside the center in the line width direction of the second conductor line are included, the position in the line width direction where the plurality of vias contact the conductor line is thereby included Is optimized, and the Q value of the spiral inductor can be improved.

  Embodiments of the present invention will be described below with reference to the drawings. In the description of the drawings, the same parts are denoted by the same reference numerals.

  First, with reference to FIG. 1A to FIG. 1C, a description will be given of the conductor lines constituting the spiral inductor according to the embodiment of the present invention and vias connecting different conductor layers.

  A spiral inductor according to an embodiment of the present invention includes two or more spiral conductor wires stacked on an upper side of a semiconductor substrate such as a silicon substrate and an insulating film. And vias that electrically connect each other. In the embodiment of the present invention, as an example, the conductor wires 10, 11a, 11b, 12 arranged in three conductor layers and the via 21, which electrically connects the conductor wires 10, 11a, 11b, 12, A spiral inductor including 14a and 14b will be described.

  FIG. 1A shows a base conductor line 10 arranged in a base conductor layer. The base conductor layer is one of a plurality of conductor layers stacked above the semiconductor substrate via an insulating film. The base conductor line 10 is a wiring that connects an inner end portion of a first conductor line 11a, which will be described later, and a pad portion 11b via vias 14a and 14b. The base conductor line 10 is made of, for example, a conductor including a metal added with a metal such as aluminum or copper or a high-concentration impurity.

  FIG. 1B shows the first conductor wire 11a and the pad portion 11b arranged in the first conductor layer. The first conductor layer is a conductor layer disposed above the base conductor layer, that is, in a direction away from the semiconductor substrate, among the plurality of conductor layers stacked above the semiconductor substrate via an insulating film. The first conductor wire 11a has a spiral shape. Here, the “spiral (spiral) shape” indicates a shape of a plane curve created by a point that constantly moves away from or approaches a fixed point around a fixed point. The end portion of the first conductor wire 11a located on the inner side of the spiral shape (hereinafter referred to as “inner end portion”) contacts the via 14b and is electrically connected to one end portion of the base conductor wire 10 via the via 14b. Connected. An end portion (hereinafter referred to as “outer end portion”) of the first conductor wire 11a located outside the spiral shape is extended to a position adjacent to the pad portion 11b in a direction away from the above-described fixed point.

The first conductor wire 11a further has a shape approximating a regular octagon. Specifically, “a shape that approximates a regular octagon” means that the outermost periphery of the first conductor wire 11a has eight sides P ₁ , P ₂ , P ₃ , P ₄ , P, each consisting of a line segment having substantially the same length. _{5, P 6,} P 7, has spliced the shape _{P 8,} and the outermost of each round inside, is arranged inside the side _P 1 to P ₈ along the side _P 1 to P ₈ It has a shape in which eight sides are connected.

  The pad portion 11b is an electrode that serves as one input / output terminal of the spiral inductor. The pad portion 11b contacts the via 14a and is electrically connected to the other end of the base conductor line 10 through the via 14a. The material of the first conductor wire 11a and the pad portion 11b is, for example, a conductor including a metal such as aluminum or copper or a semiconductor to which a high concentration impurity is added. The line width of the first conductor wire 11a shown in FIG. 1B is 10 μm, the number of turns is 3, the inner diameter is 180 μm, and the film thickness is 0.57 μm.

  FIG. 1C shows the second conductor wire 12 arranged in the second conductor layer. The second conductor layer is a conductor layer disposed above the first conductor layer among the plurality of conductor layers formed above the semiconductor substrate via an insulating film. The second conductor wire 12 has a spiral shape substantially the same as that of the first conductor wire 11a. Specifically, the “substantially the same spiral shape” means that the positions and shapes of both end portions of the second conductor wire 12 are different from those of the first conductor wire 11a. The line width, the number of turns, the inner diameter, the outer diameter, and the film thickness are the same as those of the first conductor wire 11a. As will be described later with reference to FIG. 8, “substantially the same spiral shape” has an inner diameter and an outer diameter of the second conductor wire 12 that are only several times the gap between the second conductor wires 12. The case where it differs from the 1st conductor wire 11a is also included.

  The first conductor line 11 a and the second conductor line 12 are electrically connected by a plurality of vias 21. FIG. 1B and FIG. 1C show locations where each via 21 contacts the first conductor line 11a and the second conductor line 12, respectively. Each via 21 penetrates through an insulating film disposed between the first conductor layer and the second conductor layer, and electrically connects the first conductor line 11a and the second conductor line 12. To do. The plurality of vias 21 are arranged along the length direction of the first conductor line 11 a and the second conductor line 12. The outer diameter of each via 21 shown in FIGS. 1B and 1C is 0.28 μm.

  The plurality of vias 21 are arranged outside the center of the second conductor line 12 in the line width direction and outside vias 21a contacting the second conductor line 12 and from the center of the second conductor line 12 in the line width direction. The inner via 21b is in contact with the second conductor wire 12 on the inner side. The outer vias 21 a and the inner vias 21 b are alternately arranged along the length direction of the second conductor line 12. In the spiral inductor shown in FIG. 1, four vias 21a or vias 21b are arranged on each side of the regular octagon, and the outer vias 21a and the inner vias 21b are alternately arranged on each side of the regular octagon. Four outer vias 21a and four inner vias 21b are arranged alternately.

  FIG. 2 shows the overall configuration of the spiral inductor according to the embodiment of the present invention. The spiral inductor is configured by sequentially superposing the base conductor line 10, the first conductor line 11a, the pad portion 11b, and the second conductor line 12 shown in FIGS. . As described above, the base conductor layer, the first conductor layer, and the second conductor layer are stacked via the insulating film in order from the semiconductor substrate side. Accordingly, when the spiral inductor is viewed from the opposite side of the semiconductor substrate, the second conductor wire 12 appears on the outermost surface as shown in FIG. 2, and the first conductor wire 11a and the pad are behind the second conductor wire 12. The part 11b appears, and the base conductor line 10 appears behind the first conductor line 11a and the pad part 11b.

  As described above, the position and shape of both ends of the second conductor wire 12 are different from those of the first conductor wire 11a, but the line width, number of turns, inner diameter, outer diameter of the second conductor wire 12 excluding both ends. Since the first conductor wire 11a has the same thickness as the first conductor wire 11a, only the both ends of the first conductor wire 11a appear in FIG. 2, and the portions other than the both ends of the first conductor wire 11a are the second conductor. Hidden by line 12.

  The inner end of the first conductor line 11a is connected to one end of the base conductor line 10 via the via 14b, and the other end of the base conductor line 10 is connected to the pad part 11b via the via 14a.

3A is a cross-sectional view of the spiral inductor taken along the line AA in FIG. 2, and FIG. 3B is a cross-sectional view of the spiral inductor taken along the line BB in FIG. is there. As shown in FIG. 3A, the spiral inductor is disposed above the semiconductor substrate 1 via the silicon oxide film 2. Specifically, the silicon oxide film 2 is disposed on the semiconductor substrate 1, the first conductor line 11a is disposed on the silicon oxide film 2, and the insulating film 15 is disposed on the first conductor line 11a. Then, the second conductor line 12 is disposed on the insulating film 15. A protective film 3 made of a laminated film such as a silicon oxide film or a silicon nitride film is further disposed on the second conductor line 12. For example, silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ O ₄ ) can be used as the material of the insulating film 15.

As shown in FIG. 3 (a), the A-A cutting plane in Figure 2, the outer vias 21a has appeared arranged in side P ₁ of the second conductor line 12. The outer via 21 a is in contact with the second conductor line 12 outside the center of the second conductor line 12 in the line width direction. As described above, the second conductor wire 12 and the first conductor wire 11a have substantially the same spiral shape, and the outer via 21a is an insulating film substantially parallel to the stacking direction of the first and second conductor layers. 15 is penetrated. Therefore, the outer via 21a is in contact with the first conductor line 11a outside the center of the first conductor line 11a in the line width direction.

As shown in FIG. 3B, the inner via 21b arranged on the side P2 of the _second conductor line 12 appears on the BB cut surface of FIG. The inner via 21 b is in contact with the second conductor line 12 inside the center of the second conductor line 12 in the line width direction. The inner via 21b penetrates the insulating film 15 substantially parallel to the stacking direction of the first and second conductor layers. Therefore, the inner via 21b is also in contact with the first conductor line 11a inside the center of the first conductor line 11a in the line width direction.

The FIGS. 3 (a) and 3 (b), the second outer vias 21a arranged in side _{P 1} of the conductor line 12, a second inner vias 21b arranged in side _{P 2} of the conductor lines 12 Of course, the outer via 21a and the inner via 21b connected to the other side of the second conductor wire 12 are also shown in FIGS. 3A and 3B. It has the same cross-sectional configuration as the via 21b.

  Although the base conductor line 10 does not appear in FIGS. 3A and 3B, the base conductor line 10 is not shown in the figure, but the base conductor line 10 is interposed between the semiconductor substrate 1, the second conductor line 11a, and the pad portion 11b. The vias 14a and 14b pass through a part of the silicon oxide film 2 and are connected to the base conductor line 10 and the second conductor line 11a and the pad portion 11b.

  The spiral inductor shown in FIGS. 1 to 3 can be manufactured using a known semiconductor manufacturing technique. For example, semiconductors described in JN Burghartz, M. Soyuer, and KA Jenkins, “Integrated RF and Microwave Components in BiCMOS Technology,” IEEE Trans. Electron Devices, vol. 43, no. 9, pp. 1559-1570. It can be manufactured using manufacturing techniques. A specific example of the manufacturing method of the spiral inductor is shown below.

  (A) First, a silicon substrate 1 is prepared, and a silicon oxide film is laminated on the silicon substrate 1 by a chemical vapor deposition method (CVD method). A metal film of an alloy of aluminum and copper (AlCu) is deposited on the silicon oxide film 2 by sputtering. A resist pattern corresponding to the shape of the base conductor line 10 is formed by photolithography, and the metal film is selectively etched using an anisotropic etching method such as reactive ion etching (RIE) using the resist pattern as a mask. Thus, the base conductor line 10 is formed.

  (B) Then, a silicon oxide film is laminated by a CVD method, and a resist pattern having openings corresponding to the shapes of the vias 14a and 14b is formed by a photolithography method. Using this resist pattern as a mask, the silicon oxide film is selectively etched using RIE to form contact holes in the silicon oxide film. Tungsten is buried in the contact hole by sputtering and RIE to form vias 14a and 14b.

  (C) Thereafter, a metal film is deposited again by sputtering. The metal film is etched using photolithography and RIE to form the first conductor line 11a and the pad portion 11b. Then, an insulating film 15 made of a silicon oxide film is stacked by CVD, and a contact hole corresponding to the shape of the via 21 is formed in the insulating film 15 by photolithography and RIE. Tungsten is buried in the contact hole by sputtering and RIE to form a via 21.

  (D) Thereafter, the second conductor wire 12 is formed in the same manner as the first conductor wire 11a and the pad portion 11b, and the protective film 3 is formed on the second conductor wire 12 by the CVD method. To do. Through the above semiconductor manufacturing process, the spiral inductor shown in FIGS. 1 to 3 is completed.

  Next, the configuration of the spiral inductor according to the first to third comparative examples will be described with reference to FIGS. 4 (a) to 4 (c). As shown in FIG. 4A, the spiral inductor according to the first comparative example has a plurality of vias 21 all having a line width of the second conductor line 62ce as compared with the spiral inductor shown in FIGS. The difference is that the central via is in contact with the second conductor line 62ce at the center of the direction. As shown in FIG. 4B, the spiral inductor according to the second comparative example has a plurality of vias 21 all having a line width of the second conductor line 62out as compared with the spiral inductor shown in FIGS. The difference is that the outer via is in contact with the second conductor line 62out outside the center of the direction. As shown in FIG. 4C, the spiral inductor according to the third comparative example has a plurality of vias 21 all having a line width of the second conductor wire 62in, as compared with the spiral inductor shown in FIGS. The difference is that the inner via is in contact with the second conductor wire 62in on the inner side of the direction center.

  Other spiral inductor configurations, for example, the first conductor wire and the second conductor wire having substantially the same spiral shape are laminated via an insulating film, the first conductor wire and the second conductor The line width, the number of turns, the inner diameter, the outer diameter, and the film thickness of the line are the same as those of the spiral inductor shown in FIGS.

  FIG. 5 shows a distribution of Q values of the spiral inductor shown in FIGS. 1 to 3 and the spiral inductor shown in FIGS. 4A to 4C in a frequency band of 2.00 GHz to 5.00 GHz. It is a graph and shows the result of the simulation which the inventor performed using the computer. A “solid line” in FIG. 5 indicates the Q value of the spiral inductor illustrated in FIGS. 1 to 3 in which the outer vias and the inner vias are alternately arranged. A “dashed line” in FIG. 5 indicates the Q value of the spiral inductor shown in FIG. 4A in which the plurality of vias 21 are formed only of the central via. A “dotted line” in FIG. 5 indicates the Q value of the spiral inductor shown in FIG. 4B in which the plurality of vias 21 are formed only of the outer vias. A “two-dot chain line” in FIG. 5 indicates the Q value of the spiral inductor shown in FIG. 4C in which the plurality of vias are formed only of the inner vias.

  As shown in FIG. 5, the spiral inductor shown in FIGS. 1 to 3 has the highest Q value of the spiral inductor in the frequency band of 2.00 GHz to 5.00 GHz, and the spiral inductor shown in FIG. The Q value of the spiral inductor decreases in the order of the spiral inductor shown in FIG. 4B and the spiral inductor shown in FIG.

  Here, the Q value is defined by the following equation (1). In the equation (1), ω represents a frequency (Hz), L represents a self-inductance (H) of the spiral inductor, and R represents a resistance value (Ω) parasitic on the spiral inductor.

Q = ωL / R (1)
It is known that an eddy current is generated on a conductor wire of a spiral inductor in a high frequency band including 2.00 GHz to 5.00 GHz, and this eddy current contributes to a resistance component of the spiral inductor. As shown in FIGS. 1 to 3, the occurrence of this eddy current is suppressed by alternately arranging the outer vias 21 a and the inner vias 21 b. In this way, the position in the line width direction where the plurality of vias contact the conductor line is optimized, and the Q value of the spiral inductor can be improved.

  As described above, by including the outer via 21a and the inner via 21b in the plurality of vias 21, the position in the line width direction where the plurality of vias contact the conductor line is optimized, and the Q value of the spiral inductor is improved. Can be made. Note that the Q value of the spiral inductor can also be improved by alternately arranging the outer vias and the inner vias.

  The 1st conductor wire 11a and the 2nd conductor wire 12 may have the shape approximated to the same polygon. Thereby, the data amount of the pattern data of the first conductor line 11a and the second conductor line 12 can be reduced. Further, the polygon may be a regular octagon. Thereby, the parasitic resistance of the first conductor line 11a and the second conductor line 12 is reduced, and at the same time, the data amount of the pattern data of the first conductor line 11a and the second conductor line 12 can be reduced.

When the first conductor line 11a and the second conductor line 12 have shapes that approximate the same polygon, the outer vias 21a and the inner vias 21b may be alternately arranged for each side of the polygon. The replacement unit of the outer via 21a and the inner via 21b becomes clear, and the design of the spiral inductor becomes easy.
(First modification)
1 to 3 show a spiral inductor in which outer vias 21a and inner vias 21b are alternately arranged, but the present invention is not limited to this. As a first modification of the embodiment of the present invention, a spiral inductor in which the positions in the line width direction of the second conductor lines of a plurality of vias gradually change will be described.

  The spiral inductor according to the first modification includes two or more outer vias 21a and two or more inner vias 21b. The two or more outer vias 21a are connected to the outer via 21a from the center in the line width direction of the second conductor line 22 according to the distance from the one end 22out of the second conductor line 22 to each outer via 21a. It arrange | positions so that the distance to the location which contacts the conductor wire 22 may become short. The two or more inner vias 21b are connected to each inner via 21b from the center in the line width direction of the second conductor line 22 according to the distance from the other end 22in of the second conductor line 22 to each inner via 21b. It arranges so that the distance to the part which contacts the 2nd conductor wire 22 may become short.

  Further, the two or more outer vias 21 a are arranged in a range from one end 22 out of the second conductor line 22 to an approximately middle point of the second conductor line 22. The two or more inner vias 21 b are arranged in a range from the other end 22 in of the second conductor line 22 to an approximately middle point of the second conductor line 22.

  Therefore, the outer via 21 a farthest from the center of the second conductor line 22 in the line width direction is disposed at one end 22 out of the second conductor line 22. Then, the outer via 21 a gradually approaches the center of the second conductor line 22 in the line width direction as it approaches the middle point of the second conductor line 22. On the other hand, the inner via 21b farthest from the center of the second conductor line 22 in the line width direction is disposed at the other end 22in of the second conductor line 22. The inner via 21 b gradually approaches the center of the second conductor line 22 in the line width direction as it approaches the middle point of the second conductor line 22.

  The line width of the second conductor wire 22 shown in FIG. 6 is 15 μm, the number of turns is 4, the inner diameter is 110 μm, the film thickness is 0.57 μm, and the outer diameter of the via 21 is 0.28 μm.

  The configuration of other spiral inductors, for example, the point that the first conductor wire and the second conductor wire having substantially the same spiral shape are laminated via an insulating film, etc., is the spiral shown in FIGS. Same as inductor.

  FIG. 7 shows the distribution of Q values of the spiral inductor shown in FIG. 6, the spiral inductor in which outer vias and inner vias are arranged alternately, and the spiral inductor consisting only of the central via in the frequency band of 2.00 GHz to 5.00 GHz. It is a graph which shows this, and shows the result of the simulation which the inventor performed using the computer. The spiral inductor composed only of the center via and the spiral inductor in which the outer vias and the inner vias are arranged alternately is the first conductor having substantially the same spiral shape except that the position of the via is different from the spiral inductor shown in FIG. The points where the wires and the second conductor wires are laminated via the insulating film, and the line width, number of turns, inner diameter, outer diameter and film thickness of the first conductor wires and the second conductor wires are shown in FIG. Same as spiral inductor.

  A “solid line” in FIG. 7 indicates the Q value of a spiral inductor in which outer vias and inner vias are alternately arranged. The “dotted line” in FIG. 7 indicates the Q value of the spiral inductor shown in FIG. A “dashed line” in FIG. 7 indicates the Q value of the spiral inductor in which the plurality of vias 21 are formed only of the central via.

  As shown in FIG. 7, in the frequency band of 2.00 GHz to 4.50 GHz, each of the Q values of the spiral inductor shown in FIG. 6 and the spiral inductor in which the outer vias and the inner vias are alternately arranged are only from the central via. The Q value of the spiral inductor becomes larger.

As described above, the distance from the center in the line width direction of the second conductor wire 22 to the outer via 21a and the inner via 21b is not limited to the spiral inductor in which the outer via 21a and the inner via 21b are alternately arranged. Even in the spiral inductors arranged so as to change, the position in the line width direction where the plurality of vias 21 contact the conductor lines is optimized, and the Q value of the spiral inductor can be improved.
(Second modification)
In the embodiment of the present invention and the first modification thereof, the line width, the number of turns, the inner diameter, and the outer diameter of the first conductor wire 11a and the second conductor wire 12 except for the positions and shapes of both ends of the conductor wire. Although the spiral inductors having the same film thickness have been described, the present invention is not limited to this. For example, the gap between the adjacent first conductor lines 11a and the gap between the adjacent second conductor lines 12 may be arranged at different positions when viewed from the stacking direction of the first and second conductor layers. .

As shown in FIG. 8, the spiral inductor according to the second modification is disposed between the first conductor wire 11a, the second conductor wire 12, and the first conductor layer and the second conductor layer. And an insulating film 15. The first of the second conductor line 12 between the clearance W ₁₂ of an adjacent gap W ₁₁ of the conductor line 11a adjacent to each other are arranged at different positions as viewed in the stacking direction of the first and second conductive layers . In addition, the line width, the number of turns, and the film thickness of the first conductor wire 11a and the second conductor wire 12 are all equal. Its width and gap _{W 11} and a gap _{W 12} are equal.

Internal diameter _{RI 12} of the second conductor line 12 is longer than the inner diameter _{RI 11} of the first conductor line 11a, the outer diameter _{RO 12} of the second conductor line 12 than the outer diameter _{RO 11} of the first conductor line 11a long. Difference inside diameter _{RI 12} and the inner diameter _{RI 11} is twice the gap _{W 12.} Similarly, the difference between the outer diameter of _{RO 12} and the outer diameter _{RO 11} is twice the gap _{W 12.}

  In addition, the first conductor wire 11a and the second conductor wire 12 have substantially the same spiral shape, and the first conductor wire 11a and the second conductor wire 12 are electrically connected by a plurality of vias. The point is the same as that of the spiral inductor according to the embodiment of the present invention and the first modification thereof.

As described above, the gap between the adjacent first conductor wires 11a and the gap between the adjacent second conductor wires 12 are arranged at different positions when viewed from the stacking direction of the first and second conductor layers. As a result, the electrostatic capacitance between the first conductor wire 11a and the second conductor wire 12 can be lowered, so that the Q value of the spiral inductor can be improved.
(Other embodiments)
As mentioned above, although this invention was described by one embodiment and its modification, it should not be understood that the statement and drawing which form a part of this indication limit this invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  1 to 3 show a spiral inductor in which a plurality of vias 21 are constituted only by an outer via 21a and an inner via 21b. However, if the outer via 21a and the inner via 21b are included in a part of the plurality of vias 21, the remaining part of the plurality of vias 21 includes a via other than the outer via 21a and the inner via 21b, for example, a second one. A central via that contacts the second conductor line 12 at the center in the line width direction of the conductor line 12 may be included.

  The number of vias formed on each side of the regular octagon is not limited to four, and may be a number other than four. Further, the switching unit between the outer via 21a and the inner via 21b is not limited to each side of the regular octagon or every four sides, for example, every 0.5 side of the regular octagon or an integer of 1 to 3 or 5 or more. May be.

  Although the case where the first conductor wire 11a and the second conductor wire 12 have a shape approximated to a regular octagon has been described, even if it is a shape approximated to another polygon such as a hexagon or a shape made of a curve I do not care.

  The number of conductor wires having substantially the same spiral shape is not limited to two, and may be three or more. By connecting three or more conductor wires in parallel by vias, the parasitic resistance is further reduced, so that the Q value is further improved.

  In the first modified example, one end of the second conductor wire 22 is an outer end portion of the second conductor wire 22, and the other end of the second conductor wire 22 is an inner end portion of the second conductor wire 22. Although a case has been described, the reverse may be possible. That is, one end of the second conductor wire 22 may be the inner end portion of the second conductor wire 22, and the other end of the second conductor wire 22 may be the outer end portion of the second conductor wire 22.

  Furthermore, you may combine the Example shown in FIGS. 1-3, and the 1st modification shown in FIG. For example, the distance from the center in the line width direction of the second conductor line 12 to each outer via 21a gradually changes in the range from the one end 22out to the half circumference at the outermost periphery of the second conductor line 22. The outer vias 21a are arranged, and the inner vias 21b are arranged in the range of the remaining half circumference so that the distance from the center in the line width direction of the second conductor line 12 to each inner via 21b gradually changes. The arrangement of the outer vias 21 a and the inner vias 21 b may be repeated for every round located inside the outermost circumference of the second conductor wire 22.

  Thus, it should be understood that the present invention includes various embodiments and the like not described herein. Therefore, the present invention is limited only by the invention specifying matters according to the scope of claims reasonable from this disclosure.

FIGS. 1A and 1B are top views showing conductor wires constituting a spiral inductor according to an embodiment of the present invention. FIG. 1A shows a base conductor wire 10 disposed in a base conductor layer, and FIG. The first conductor line 11a and the pad portion 11b arranged in one conductor layer are shown, and FIG. 1 (c) shows the second conductor line 12 arranged in the second conductor layer. It is a top view which shows the whole structure of the spiral inductor concerning embodiment of this invention. 3A is a cross-sectional view of the spiral inductor taken along the line AA in FIG. 2, and FIG. 3B is a cross-sectional view of the spiral inductor taken along the line BB in FIG. FIGS. 4A to 4C are top views showing the configurations of spiral inductors according to the first to third comparative examples. It is a graph which shows distribution of Q value of the spiral inductor concerning the Example of this invention and the spiral inductor concerning the 1st thru | or 3rd comparative example in the frequency band of 2.00 GHz-5.00 GHz. It is a top view which shows the structure of the 2nd conductor wire 22 with which the spiral inductor concerning the 1st modification of embodiment of this invention is provided. FIG. 7 is a graph showing the distribution of Q values of the spiral inductor shown in FIG. 6, the spiral inductor in which outer vias and inner vias are arranged alternately, and the spiral inductor consisting only of the central via in the frequency band of 2.00 GHz to 5.00 GHz. is there. It is sectional drawing which shows typically the cross-sectional structure of the spiral inductor concerning the 2nd modification of embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Silicon oxide film 3 ... Protective film 10 ... Base conductor wire 11a ... 1st conductor wire 11b ... Pad part 12, 22, 62ce, 62in, 62out ... 2nd conductor wire 14a, 14b, 21 ... via 15 ... insulating film 21a ... outer vias 21b ... inner vias 22in ... other end 22 out ... end P ₁ to P 8 _... side W _11, W _{12 ...} clearance

Claims (7)

A first conductor wire having a spiral shape disposed in the first conductor layer;
A second conductor wire disposed in a second conductor layer and having a spiral shape substantially the same as the first conductor wire;
An insulating film disposed between the first conductor layer and the second conductor layer;
A plurality of vias arranged along the length direction of the second conductor line and penetrating the insulating film to electrically connect the first conductor line and the second conductor line, respectively; Prepared,
The plurality of vias include an outer via that contacts the second conductor line outside the center in the line width direction of the second conductor line, and a contact with the second conductor line inside the center. A spiral inductor characterized by including an inner via.   The spiral inductor according to claim 1, wherein the outer vias and the inner vias are alternately arranged.   3. The spiral inductor according to claim 1, wherein the first conductor wire and the second conductor wire have a shape that approximates the same polygon. 4.   The spiral inductor according to claim 3, wherein the outer via and the inner via are alternately arranged for each side of the polygon.   The spiral inductor according to claim 3, wherein the first conductor wire and the second conductor wire have a shape approximated to a regular octagon. Two or more outer vias are connected to the second conductor line from the center in the line width direction of the second conductor line according to the distance from one end of the second conductor line to each outer via. Is arranged so that the distance to the point of contact with the
Two or more inner vias are connected to the second conductor from the center in the line width direction of the second conductor line according to the distance from the other end of the second conductor line to each inner via. The spiral inductor according to claim 1, wherein the spiral inductor is arranged so that a distance to a portion in contact with the wire is shortened.   The gap between the adjacent first conductor lines and the gap between the adjacent second conductor lines are arranged at different positions when viewed from the stacking direction of the first and second conductor layers. The spiral inductor according to any one of claims 1 to 6, characterized in that:

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