JP2010026878A - Memory controller, flash memory system equipped with memory controller, and control method of flash memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve reliability of file management data included in user data provided from a host system side, in a flash memory system storing system data in a flash memory. <P>SOLUTION: The flash memory system stores the system data in a physical block (system block) reserved in advance. When a memory controller in the flash memory system cannot detect an empty block allocated to any logical block, whether the logical block corresponds to a predetermined logical block is determined. Only when determining that the logical block corresponds to the predetermined logical block, the memory controller allocates a system block storing no valid system data, to the logical block. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a memory controller, a flash memory system including the memory controller, and a flash memory control method.

  In a storage device using a flash memory as a storage medium, as described in Patent Document 1, in addition to user data provided from a host system, management information for managing storage data such as an address conversion table Are written into the flash memory. Therefore, an area for storing such management information is secured in the flash memory.

JP 2001-142774 A

  In a flash memory system using a flash memory as a storage medium, an area for storing management information can be appropriately set in the flash memory. Therefore, an arbitrary physical block may be used as a management information storage destination or a user data storage destination without fixing the management information storage destination physical block. However, if the physical block of the management information storage destination is not fixed in this way, management of the management information storage destination becomes complicated.

  Therefore, in a flash memory system, a physical block to be used as a storage destination for management information is reserved and management information is often stored in the physical block. Also, in the case where firmware for controlling access to the flash memory is stored in the flash memory, it is preferable to reserve the physical block of the storage destination.

  Reservation of a physical block used as a storage location for system data such as management information and firmware is performed at the time of formatting (initialization). Since only the system data is stored in the reserved physical block, if the reserved physical block is not used as the storage destination of the system data (valid system data is not stored in the reserved physical block) ), It is not used as a storage location for user data. Therefore, in such a flash memory system, even when it is not possible to secure a physical block as a storage destination of user data, user data is not stored in a physical block reserved as a storage destination of system data.

  In a flash memory system, user data is written or read based on a logical address given from a host system. The flash memory system uses system data when controlling writing or reading of the user data. For example, the correspondence between a logical address associated with user data and a physical address in a flash memory in which the user data is stored is managed by system data.

  The user data provided from the host system includes file data and information for managing the file data (hereinafter referred to as “file management data”). Accordingly, not only file data but also file management data is stored in the flash memory system. Since the file data is normally managed by a file system such as a FAT (File Allocation Table) file system or NT file system, for example, in the case of a FAT file system, information including a root directory and a file are used. A cluster number or the like is stored as file management data. In the case of the NT file system, a file name, an index, or the like is stored as file management data.

  As described above, the system data is used in the flash memory system when user data including file data and file management data is written to the flash memory or read from the flash memory. On the other hand, the file management data included in the user data is used on the host system side in order to manage the file data included in the user data.

  Therefore, when system data is damaged or lost, user data including file data and file management data cannot be read from the host system side. Even if the system data is stored normally, if the file management data is damaged or lost, the management of the file data on the host system side will be hindered. Considering these, it is necessary to improve the reliability of the file management data in the flash memory system as well as the system data.

  Therefore, the present invention provides a flash memory system that can improve the reliability of file management data included in user data given from the host system side in a flash memory system that stores system data in the flash memory. With the goal.

A memory controller according to a first aspect of the present invention is a memory controller that controls access to a flash memory to be erased in physical block units in accordance with an access instruction given from a host system,
Reserving means for reserving a physical block in the flash memory as a system block used as a storage destination of system data for controlling or managing access to the flash memory;
System data writing means for writing the system data to the system block reserved by the reservation means;
A free block search means for searching for a free block in the flash memory that is not reserved as the system block and in which valid data is not stored;
Physical block allocation means for allocating the free block detected by the free block search means to a logical block including a plurality of sector unit areas to which the logical address specified by the access instruction is assigned;
Data writing means for writing data given together with the access instruction to a physical block corresponding to the logical block to which the logical address specified by the access instruction belongs;
Determining means for determining whether the logical block to which the logical address specified by the access instruction belongs corresponds to the predetermined logical block;
With
When the physical block allocating unit allocates the vacant block to any of the logical blocks, and the vacant block searching unit cannot detect the vacant block, the determination unit is Only when it is determined that the logical block corresponds to the predetermined logical block, the system block in which valid system data is not stored is assigned to any of the logical blocks.

  In a preferred embodiment, there is provided a first setting means for setting the predetermined logical block based on setting information given from the host system. The setting information includes information specifying the range of the logical address. The first setting means sets the logical block to which the range of the logical address included in the setting information belongs as the predetermined logical block.

  In a preferred embodiment, a second setting means is provided. The second setting means, based on the number of times specified by the access instruction, to write data specifying an area having a capacity smaller than a predetermined number of sectors in each logical block. Set a logical block. The second setting means sets the logical block having the predetermined number of times or more as the predetermined logical block.

  In a preferred embodiment, there are a plurality of the flash memories. Correspondence between a logical block including a plurality of sector unit areas to which an address specified by the access instruction is allocated and a physical block group including a plurality of physical blocks having the same address included in different flash memories Block management means for managing the relationship is further provided. The data writing means writes data given together with the access instruction to the physical block group corresponding to the logical block to which the logical address designated by the access instruction belongs. The reservation means reserves a non-defective block in the physical block group including a defective block as the system block preferentially over a physical block in the physical block group not including a defective block.

  A flash memory system according to a second aspect of the present invention includes the memory controller of any one of the first aspect and the plurality of embodiments described above, and a flash memory that is access-controlled by the memory controller.

A method according to a third aspect of the present invention is a flash memory control method for controlling access to a flash memory to be erased in physical block units in accordance with an access instruction given from a host system,
A reservation step of reserving a physical block in the flash memory as a system block used as a storage destination of system data for controlling or managing access to the flash memory;
A system data writing step of writing the system data to the system block reserved by the reservation step;
A free block search step for searching for a free block in the flash memory that is not reserved as the system block and in which valid data is not stored;
A physical block allocation step for allocating the empty block detected by the empty block search step to a logical block including a plurality of sector unit areas to which a logical address specified by the access instruction is allocated;
A data writing step of writing data given together with the access instruction to a physical block corresponding to the logical block to which the logical address specified by the access instruction belongs;
A determination step of determining whether the logical block to which the logical address specified by the access instruction belongs corresponds to the predetermined logical block;
Is provided. In the physical block allocating step, when the vacant block cannot be detected by the vacant block search step when allocating the vacant block to any of the logical blocks, the determination step determines any of the above Only when it is determined that the logical block corresponds to the predetermined logical block, the system block in which valid system data is not stored is assigned to any of the logical blocks.

  In a preferred embodiment, a first setting step of setting the predetermined logical block based on setting information given from the host system is provided. The setting information includes information specifying the range of the logical address.

  In the first setting step, the logical block to which the range of the logical address included in the setting information belongs is set as the predetermined logical block.

  In a preferred embodiment, a second setting step is provided. In the second setting step, based on the number of times instructed by the access instruction, the data write specifying the area having a capacity smaller than the predetermined number of sectors to the area in each of the logical blocks is performed. A logical block is set. In the second setting step, the logical block having the predetermined number of times or more is set as the predetermined logical block.

  In a preferred embodiment, there are a plurality of the flash memories. Correspondence between a logical block including a plurality of sector unit areas to which an address specified by the access instruction is allocated and a physical block group including a plurality of physical blocks having the same address included in different flash memories A block management step for managing the relationship is further provided. In the data writing means, data given together with the access instruction is written into the physical block group corresponding to the logical block to which the logical address designated by the access instruction belongs. In the reservation step, a non-defective block in the physical block group including a defective block is reserved as the system block preferentially over a physical block in the physical block group including no defective block.

  According to the present invention, in a flash memory system that stores system data in a flash memory, when an empty block for storing file management data cannot be secured, the system data is stored as a file management data storage destination. You can substitute physical blocks reserved for storage. For this reason, the reliability of the file management data stored in the flash memory system can be improved. Furthermore, the capacity of user data written according to the access instruction given from the host system (capacity of the write destination area), that is, the number of sectors of data specified by the access instruction instructing writing (the number of sectors of the write destination area) If the logical address range (logical block) to which the file management data is assigned is specified based on the above, the present invention is applied without setting the logical address to which the file management data is assigned in advance. be able to.

  FIG. 1 is a block diagram schematically showing a flash memory system 1 according to an embodiment of the present invention. In the present embodiment, a case will be described where the present invention is applied to a flash memory system in which a virtual block is formed by two physical blocks belonging to different flash memories 2A and 2B. The configuration of the virtual block will be described later.

  As shown in FIG. 1, the flash memory system 1 is composed of two flash memories 2A and 2B and a memory controller 3 for controlling the flash memories 2A and 2B. In the following description, the two flash memories 2A and 2B may be collectively referred to as “flash memory 2”.

  The flash memory system 1 is connected to the host system 4 via the external bus 13. The host system 4 is composed of a CPU (Central Processing Unit) for controlling the entire operation of the host system 4, a companion chip for transferring information to and from the flash memory system 1, and the like. The host system 4 may be various information processing apparatuses such as a personal computer and a digital still camera that process various types of information such as characters, sounds, and image information.

  As shown in FIG. 1, the memory controller 3 includes a microprocessor 6, a host interface block 7, an SRAM 8, a buffer 9, a flash memory interface block 10, an ECC (Error-Correcting Code) block 11, a ROM ( Read Only Memory) 12. The memory controller 3 is connected to the flash memory 2 via the internal bus 14. The memory controller 3 constituted by these functional blocks is integrated on one semiconductor chip. Hereinafter, each functional block will be described.

  The host interface block 7 exchanges data, address information, status information, external commands and the like with the host system 4. The external command is a command for the host system 4 to instruct the flash memory system 1 to execute processing. Data or the like supplied from the host system 4 to the flash memory system 1 is taken into the flash memory system 1 (for example, the buffer 9) using the host interface block 7 as an entrance. Data supplied from the flash memory system 1 to the host system 4 is supplied to the host system 4 through the host interface block 7 as an exit.

  An SRAM (Static Random Access Memory) 8 is a volatile storage element, and is used for temporarily storing data necessary for controlling the flash memory 2. In the present embodiment, the bad block table, the address conversion table, and the empty block table are system data (system data for controlling or managing access to the flash memory 2 and includes management information and data such as firmware). It is stored in the flash memory 2. The defective block table, the address conversion table, and the empty block table are read from the flash memory 2 and held in the SRAM 8 when necessary. Here, the bad block table is a table that holds information indicating a bad block. The address conversion table is a table showing the correspondence between logical blocks and physical blocks. The empty block table is a table for searching for an erased physical block (or a physical block to which valid data is not written). When firmware is stored in the flash memory 2, the firmware is read from the flash memory 2 and stored in the SRAM 8 after activation or when necessary.

  The ROM 12 is a nonvolatile storage element. Firmware required for controlling the flash memory 2 is written in the ROM 12. When the firmware is stored in the flash memory 2, the ROM 12 stores only the minimum firmware necessary for activation (hereinafter referred to as “activation firmware”).

  The buffer 9 temporarily holds data given from the host system 4 or data read from the flash memory 2. For example, data written to the flash memory 2 is held in the buffer 9 until the flash memory 2 is in a writable state. The data read from the flash memory 2 is held in the buffer 9 until the host system 4 can receive the data.

  The flash memory interface block 10 reads sequence codes defining various processes stored as firmware in the ROM 12 or the SRAM 8 and executes various processes for the flash memory 2 according to the read sequence codes. This sequence code is a code set set for each sequence process executed by the flash memory interface block 10, and each code set includes a plurality of codes. In processing executed based on this sequence code, data, address information, status information, internal commands, etc. are exchanged between the flash memory interface block 10 and the flash memory 2 via the internal bus 14. Here, the internal command is a command for the memory controller 3 to instruct the flash memory 2 to execute processing, and the flash memory 2 operates in accordance with the internal command given from the memory controller 3.

  The ECC block 11 generates an error correction code (ECC) added to the data to be written to the flash memory 2 and reads the read data based on the error correction code added to the read data. Detect and correct errors contained in.

  The microprocessor 6 reads a program code stored as firmware on the ROM 12 or the SRAM 8 and controls the overall operation of the memory controller 3 according to the read program code. This program code is a program that defines the operation of the microprocessor 6, and the microprocessor 6 controls access to the flash memory 2 based on the read program code.

  Each of the flash memories 2A and 2B is a NAND flash memory. The NAND flash memory includes a register and a memory cell array in which a plurality of memory cells are two-dimensionally arranged. The memory cell array includes a plurality of memory cell groups and word lines. Here, the memory cell group is a group in which a plurality of memory cells are connected in series. Each word line is for selecting a specific memory cell in the memory cell group. Data is written from the register to the selected memory cell or data is read from the selected memory cell to the register between the selected memory cell and the register via the word line.

  In the NAND flash memory, data reading and writing are performed in units of pages (physical pages), and data erasing is performed in units of blocks (physical blocks). A physical block is composed of a plurality of pages (physical pages). For example, one physical page is composed of a user area of a predetermined number of sectors (for example, an area of 4 sectors (2048 bytes)) and a redundant area of a predetermined number of bytes (for example, an area of 64 bytes). A block is composed of a predetermined number (for example, 64) of physical pages. The user area is an area in which user data given mainly by the host system is written, and the redundant area is additional data such as error correction code (ECC), logical address information, block status (flag), etc. Is an area in which is stored.

  The logical address information is information indicating the logical block assigned to the physical block, and the correspondence between the physical block and the logical block is determined based on this information. The block status (flag) is a flag indicating whether the physical block is good or bad. Based on the block status (flag), a defective block that is a physical block to which data cannot be normally written is determined. The defective block includes an initial defective physical block that is defective from the time of shipment (hereinafter referred to as “initial defective block”) and a late defective physical block that has deteriorated to become a defective block after the start of use (hereinafter referred to as “failure block”). For the initial defective block, a block status (flag) indicating that it is a defective block is written by the manufacturer. There is also a manufacturer that writes a block status (flag) indicating the initial defective block in the user area. The criteria for determining the late defective block can be appropriately set by the designer at the time of designing. For example, when the processing status output from the flash memory when writing or erasing is “fail”, when the read data includes an error exceeding a predetermined threshold, or a combination thereof Thus, it may be determined that the block is a late failure reason block.

  In this embodiment, as shown in FIG. 2, a virtual block is formed by two physical blocks belonging to different flash memories 2A and 2B, and one logical block is allocated to this virtual block. Accordingly, when an access instruction for instructing writing is given from the host system 4, the memory controller 3 identifies a virtual block corresponding to the logical block to which the area to be accessed designated by the access instruction belongs, Data corresponding to the access instruction is written into the two physical blocks forming the virtual block. In this data writing process, the memory controller 3 may perform the writing of data to the physical block belonging to the flash memory 2A and the writing of data to the physical block belonging to the flash memory 2B in parallel, or belong to the flash memory 2A. Data writing to the physical block and data writing to the physical block belonging to the flash memory 2B may be alternately performed. The latter is a so-called interleaving method. In this method, when one flash memory is busy (when writing is executed in the flash memory), it is not busy (writing is executed within the flash memory). No) Data is written to the other flash memory.

  The address space on the host system 4 side is managed by an LBA (Logical Block Address) which is a serial number assigned to an area (hereinafter referred to as “logical sector area”) divided in units of sectors (512 bytes). In address management performed in the memory controller 3, a logical block is formed by a plurality of logical sector areas, and a virtual block is assigned to the logical block. In this embodiment, one physical block is configured by a 256-sector user area, and one virtual block is formed by two physical blocks. For this reason, as shown in FIG. 3, a group of 512 logical sector areas with continuous LBAs is a logical block, and a serial number is assigned to this logical block. Hereinafter, the serial number assigned to the logical block is referred to as “logical block number (LBN)”. For example, 512 logical sector areas LBA # 0 to # 511 correspond to logical blocks of LBN # 0.

  In this embodiment, as shown in FIG. 2, a virtual block is formed by two physical blocks having the same physical block address (PBA). That is, the virtual block is formed of the same physical block with PBAs belonging to different flash memories 2A and 2B. By doing so, the management of the virtual block becomes easier as compared with the case where the virtual block is formed by two physical blocks having different PBAs. That is, when a virtual block is not formed by two physical blocks having the same PBA, the memory controller 3 sets the correspondence relationship between the logical block and the physical block (correspondence relationship between LBN and PBA) to the flash memory 2A and the flash memory. 2B must be managed separately. On the other hand, when a virtual block is formed by two physical blocks having the same PBA as in the present embodiment, a physical block having the same PBA is always assigned to each logical block. May manage the correspondence between logical blocks and physical blocks (correspondence between LBN and PBA) for one of the two flash memories 2A and 2B.

  As shown in FIG. 2, the virtual block does not include a bad block (physical block described as “NG” in FIG. 2) (hereinafter referred to as “non-defective virtual block”), and a bad block. There are two types of virtual blocks (hereinafter referred to as “bad virtual blocks”). That is, the non-defective virtual block is a virtual block in which both two physical blocks forming the virtual block are non-defective, and the defective virtual block is either one or both of the two physical blocks forming the virtual block. This block is a defective virtual block.

  A non-defective virtual block (for example, a virtual block composed of two physical blocks of PBA # 2) is a virtual block that can be used by the memory controller 3 as a user data write destination. In other words, the non-defective virtual block is a virtual block that can be assigned to a logical block (for example, a logical block of LBN # 0).

  On the other hand, a defective virtual block (for example, a virtual block composed of two physical blocks of PBA # 6) is a virtual block that the memory controller 3 cannot use as a user data write destination. In other words, a bad virtual block is a virtual block that is not assigned to a logical block.

  In this embodiment, a non-defective physical block (non-defective physical block) in a defective virtual block is preferentially reserved as a physical block (hereinafter referred to as “system block”) used as a system data write destination. The In other words, the non-defective physical block included in the defective virtual block is reserved as a system block preferentially over the physical block included in the non-defective virtual block. By doing so, a good physical block included in the defective virtual block can be effectively used.

  The reservation of the system block is preferably performed at the time of formatting (initialization). In the present embodiment, a defective block is detected by the memory controller 3 during formatting (initialization), and a non-defective physical block in the defective virtual block including the detected defective block is included in the non-defective virtual block. Reserved as a system block in preference to a physical block. The number of physical blocks reserved as system blocks is determined in consideration of the capacity of system data. Furthermore, when determining the number of physical blocks, it is also considered that the system data update process, a physical block reserved as a system block becomes a late defective block, and the like. At the time of formatting (initialization), a predetermined number of physical blocks determined in consideration of these matters are reserved as system blocks.

  Here, if it is not possible to reserve a predetermined number of physical blocks as system blocks only with good physical blocks in the defective virtual block, that is, the total number of good physical blocks in the defective virtual block becomes the predetermined number. If not, the physical block in the non-defective virtual block is reserved as a system block.

  In the present embodiment, PBAs belonging to different flash memories 2A and 2B form a virtual block with the same physical block, and a logical block is assigned to this virtual block. Therefore, only one physical block included in the virtual block is not used as a user data write destination. In consideration of this point, in this embodiment, reservation of system blocks is performed in units of virtual blocks. That is, when one physical block in the non-defective virtual block is reserved as a system block, the other physical block is also reserved as a system block. Thus, by reserving system blocks in units of virtual blocks, a number of physical blocks exceeding a predetermined number may be reserved as system blocks.

  System block reservation is performed at the time of formatting (initialization), but when a physical block (non-defective block) used as a user data write destination deteriorates and becomes a late defective block, it is issued later. A non-defective block in the defective virtual block including the defective block is additionally reserved as a system block. When the number of system blocks increases due to such additional reservation, the reservation of the system block for the physical block in the non-defective virtual block may be canceled.

  In other words, if the number of system blocks increases due to such additional reservation, and the physical block in the non-defective virtual block does not need to be reserved as a system block, the system block for the physical block in the good virtual block is not necessary. The reservation may be canceled. In this embodiment, since the non-defective block in the defective virtual block is not used as the user data write destination, the reservation of the system block needs to be canceled for the good block in the defective virtual block. Absent. Therefore, even when the number of physical blocks reserved as system blocks is larger than the predetermined number, when all the physical blocks reserved as system blocks are non-defective blocks in the defective virtual block, the system Block reservation is not released.

  Further, in this embodiment, a virtual block is formed by two physical blocks belonging to different flash memories 2A and 2B, and one logical block is allocated to this virtual block, so a virtual block is formed. Even if the reservation of the system block for one of the two physical blocks is canceled, the physical block is not used as the user data write destination. Accordingly, system block reservation cancellation is also performed in units of virtual blocks. When the reservation of the system block is canceled in units of virtual blocks, the non-defective virtual block whose reservation has been canceled becomes usable as a user data write destination.

  Next, three types of tables, that is, a defective block table, an address conversion table, and an empty block table stored in the flash memory 2 as system data will be described.

  FIG. 3 shows a bad block table.

  The bad block table is a table that holds information indicating a bad block (physical block of initial failure or late failure). In the defective block table, for example, a chip number for determining the flash memory 2A, 2B to which the defective block belongs and the PBA of the defective block are written as information indicating the defective block.

  The bad block table is created at the time of formatting (initialization). For example, a bad block search is performed at the time of formatting (initialization), and the chip number of the flash memory 2A, 2B to which the detected bad block belongs and the PBA of the bad block are secured on the SRAM 8. Written in the creation area. After the defective block table is created in this way, the above-described system block reservation is made based on the created bad block table. Then, the bad block table created on the SRAM 8 is written into a system block reserved as a write destination of the bad block table. Thereafter, when a new defective block is newly detected, the defective block table is updated on the SRAM 8 (the chip number and PBA corresponding to the newly detected subsequent defective block are added to the defective block table), and after the update The defective block table is written again to the system block reserved as the write destination of the defective block table.

  FIG. 4 shows the correspondence between logical groups and address conversion tables.

  A logical group is a group formed by collecting a plurality of logical blocks. Hereinafter, a serial number assigned to a logical group is referred to as a “logical group number (LGN)”. In the example of FIG. 4, logical groups are formed such that logical blocks having consecutive LBNs are sequentially distributed to different logical groups. For example, the logical block of LBN # 0 is in the logical group of LGN # 0, the logical block of LBN # 1 is in the logical group of LGN # 1, the logical block of LBN # 2 is in the logical group of LGN # 2, The logical blocks of LBN # 0- # 7 are sequentially allocated to the logical groups of LGN # 0- # 7. Similarly, the logical block of LBN # 8 is assigned to the logical group of LGN # 0, the logical block of LBN # 9 is assigned to the logical group of LGN # 1, and the logical block of LBN # 10 is assigned to the logical group of LGN # 2. It will be. In this way, eight logical groups are formed.

  As shown in FIG. 4, the logical group is simply a unit for creating an address translation table, and the physical block to which each logical block is assigned does not depend on the logical group to which the physical block belongs. That is, which logical block may be assigned to which physical block. This address conversion table is a table that describes the correspondence between logical blocks and physical blocks. In the example shown in FIG. 4, the address conversion table is divided into eight tables corresponding to each logical group. Creation, update, and storage), but it may be a single table including the correspondence between all logical blocks and physical blocks, that is, an address conversion table in which eight tables are combined into one. .

  As an example of the address conversion table, FIG. 5 shows an address conversion table # 0 corresponding to a logical group of LGN # 0. As can be seen from FIG. 5, the PBA of the physical block corresponding to each logical block is written in the address translation table # 0 for the logical block belonging to the logical group of LGN # 0. If this address conversion table # 0 is not stored in the system block, the address conversion table # 0 is created on the SRAM 8 and then stored in the system block reserved as the writing destination of the table. When the address conversion table # 0 is stored in the system block, it is read out to the SRAM 8 when necessary. When the correspondence between the logical block and the physical block relating to the address translation table # 0 changes, the table is updated on the SRAM 8, and the updated address translation table # 0 is reserved again as the writing destination of the table. Is written to the current system block.

  FIG. 6 shows an empty block table.

  The empty block table is a table indicating whether each physical block is an empty block. The free block table is, for example, a logical value of each bit and indicates whether or not a physical block assigned to each bit is a free block. In other words, in this empty block table, one of the logical values of 0 ”or“ 1 ”indicates an empty block (a physical block from which data has been erased or a physical block from which data has been invalidated), and the other logical value. A physical block whose value is not a free block (for example, a physical block, a system block, or a bad block in which valid user data is written) This free block table is also created or updated on the SRAM 8, and this table is written to Saved in the system block reserved as.

  In the empty block table shown in FIG. 6, two consecutive bits in each row (8 bits) correspond to two physical blocks forming one virtual block. That is, the physical blocks belonging to the flash memory 2A and the physical blocks belonging to the flash memory 2B are alternately assigned to the bits of each row (8 bits) in the order of PBA. This physical block allocation is performed from the upper row to the lower row, and in each row, from the lower bit side to the upper bit side. Thus, it is preferable that information regarding whether or not each physical block constituting a virtual block is a free block is managed on one free block table. When a virtual block is formed by physical blocks having the same PBA and a logical block is allocated to the virtual block as in this embodiment, a unit of virtual block (unit of two physical blocks having the same PBA) is used. Therefore, the empty block table in this embodiment may be a table indicating whether or not it is an empty block on a virtual block basis. That is, in the free block table in the present embodiment, a virtual block is assigned to each bit, and a virtual block (two physical blocks having the same PBA) in which the logical value of each bit is assigned to that bit is a free block. It may be a table indicating whether or not. Thus, if a virtual block (two physical blocks having the same PBA) is allocated to each bit, the capacity of the free block table can be reduced. For example, when a virtual block is formed by two physical blocks as in this embodiment, if the virtual block is assigned to each bit, the capacity of the free block table is halved.

  The capacity of each of the bad block table, the address conversion table, and the empty block table may be a capacity that can be stored in one sector area (one physical sector area) or one physical page. preferable. That is, it is preferable that each table is divided into one sector unit or one page table, and is stored in the system block in that unit.

  This completes the description of the defective block table, the address conversion table, and the empty block table. Information indicating a system block reserved as a writing destination of these tables (hereinafter referred to as “system block information”) is created, for example, at the time of formatting (initialization), and is stored in the flash memory 2A and / or 2B. Saved in the first block. In this embodiment, as shown in FIGS. 7A to 7C, the chip number and PBA for specifying the system block reserved as the write destination of the bad block table, the address conversion table, and the empty block table are managed as system block information. Is done. The information shown in FIG. 7A is bad block table storage area information indicating a chip number and PBA for specifying a system block reserved as a write destination of the bad block table. The information shown in FIG. 7B is address conversion table storage area information for each address conversion table indicating a chip number and PBA for specifying a system block reserved as a write destination of the address conversion table. The information shown in FIG. 7C is empty block table storage area information for each empty block table indicating a chip number and PBA for specifying a system block reserved as a write destination of the empty block table. As described above, the reservation of the system block in the present embodiment is managed by the system block information including the defective block table storage area information, the address conversion table storage area information, and the free block table storage area information.

  If each table is stored in one physical page, the updated table is stored in the next physical page in the physical block (system block) every time the table is updated. Become. Therefore, the latest table is stored in the last physical page in which data (table data) in the physical block (system block) is written.

  In the case of a flash memory in which data can be written to each physical page in units of physical sector areas, the capacity of each table can be stored in one physical sector area (for example, the same capacity as the physical sector area). ). In this way, one table is stored in one physical sector area, and the latest table is the last physical sector area in which data (table data) in the physical block (system block) is written. Will be saved.

  In this embodiment, two system blocks are reserved for each table. Therefore, one of the two system blocks is a system block used as a table write destination (hereinafter referred to as “current block”), and the other is not used as a table write destination. It is a reserved system block (hereinafter referred to as “reserved block”). When there is no free area (physical page or physical sector area in which data is not written) for writing the table in the current block, the reserved block becomes the current block, and the current block becomes the reserved block. That is, the two system blocks reserved for each table alternately become the current block (or reserved block).

  The system block information is read from the head block of the flash memory 2A and / or 2B at the time of activation and is held in the SRAM 8. When the system block reserved as the table write destination is changed, the system block information is updated on the SRAM 8. When the system block information is updated, the updated system block information is written in the first block of the flash memory 2A and / or 2B. In the present embodiment, the first block of the flash memory 2A and / or 2B is set as the writing destination of the system block information. Generally, the manufacturer guarantees that the first block is not a defective block. Because it is. For this reason, usually, attribute information (for example, information indicating what the flash memory system 1 is and how many flash memories are mounted) is written in the first block. User data (data given from the host system) is hardly written to the block.

  In the present embodiment, two system blocks are assigned to each table, and these system blocks alternately become current blocks. That is, two system blocks are alternately used as storage destinations for each table. Therefore, when at least one of the two system blocks assigned to any table becomes a late defective block, another system block is newly assigned to that table. There is a need.

  In the present embodiment, when a system block needs to be newly allocated in this way, a system block is not reserved additionally, but a spare system block (hereinafter referred to as a “spare block”) is secured in advance. Has been. If a system block assigned to any table becomes a late defective block, a spare block reserved in advance is used instead of the system block that has become a late defective block. A new allocation is made for the table. That is, in this embodiment, a spare block is also reserved as a system block at the time of formatting (initialization).

  Therefore, in the present embodiment, information for specifying a system block reserved as a spare block (hereinafter referred to as “spare block information”) is also stored as system block information. The information shown in FIG. 8 is spare block information indicating a chip number and PBA for specifying a system block reserved as a spare block. This spare block information is also stored as system block information in the same manner as the defective block table storage area information, the address conversion table storage area information, and the free block table storage area information. The spare block information is also updated on the SRAM 8 like the other system block information, and the updated spare block information is stored in the first block of the flash memory 2A and / or 2B.

  In the present embodiment, two system blocks are reserved for the bad block table, and there are eight address conversion tables # 0 to # 7 for the address conversion table (see FIG. 7B), so that 8 × 2 = Since 16 system blocks are reserved and there are two empty block tables # 0 and # 1 (see FIG. 7C), 2 × 2 = 4 system blocks are reserved. The number of spare blocks is set as appropriate. However, when the number of system blocks for spare blocks is three, the predetermined number of physical blocks reserved as system blocks described above is 2 + 16 + 4 + 3 = 25.

  Next, a description will be given of new allocation of system blocks that is performed when any one of the system blocks reserved for the bad block table, the address conversion table, or the empty block table becomes a late defective block. To do. Whether or not the block is a late defective block is normally determined when data is written or read in the current block, or when stored data is erased in the backup block. Therefore, when it is determined that the block is a late defective block, the system block may be a current block or a reserved block.

  If the system block determined to be a late defective block is the current block, the latest table is written to the system block that is replenished instead of the system block (the system block reserved as a spare block). At the same time, the system block information is updated. On the other hand, when the system block determined to have become a late defective block is a reserved block, only the system block information is updated.

  In the update of the system block information, the chip number and PBA of the system block that has become the late defective block are written in the defective block table. This bad block table is updated on the SRAM 8, and the updated bad block table is stored in a system block reserved as a writing destination of the table.

  Of the system block chip number and PBA described in the bad block table storage area information, the address translation table storage area information, and the free block table storage area information, the chip number of the system block determined to have become the late defective block, and The PBA is deleted, and the chip number and PBA of the system block (system block reserved as a spare block) allocated instead of the system block are newly written instead of the deleted chip number and PBA.

  Subsequently, the system block (the system block reserved as the spare block) to be assigned instead of the system block determined to have become the late defective block from the chip number and PBA of the system block described in the spare block information The chip number and PBA are deleted. This update is performed on the SRAM 8, and the updated system block information is stored in the first block of the flash memory 2A and / or 2B.

  If any of the system blocks reserved for the bad block table, address translation table, or empty block table becomes a late defective block, the spare block will replenish it. The number of system blocks for blocks is reduced. Therefore, when the number of system blocks for spare blocks decreases, it is preferable to supplement spare blocks as appropriate. For example, it is preferable to reserve a system block for a spare block (additional reservation) when the number of spare blocks becomes zero, or when the number of spare blocks falls below a preset minimum number.

  Even if the number of system blocks for spare blocks is not reduced in this way, when a physical block in a non-defective virtual block deteriorates to become a subsequent defective block, a virtual block including the subsequent defective block is included. The non-defective block is additionally reserved as a system block for a spare block. When this additional reservation is made, the chip number and PBA of the good block are written in the spare block information.

  In addition, if the number of spare blocks increases due to this additional reservation of system blocks, and it is no longer necessary to reserve physical blocks in good virtual blocks as system blocks, reservations for good blocks in good virtual blocks will be made. Canceled. The chip number and PBA of the physical block whose reservation has been canceled are deleted from the spare block information.

  Here, “when it is no longer necessary to reserve physical blocks in good virtual blocks as system blocks” means that the total number of spare blocks is the number of system blocks for spare blocks (hereinafter, It means more than “predetermined spare number”. Since system block reservation cancellation is performed in units of virtual blocks, system block reservation cancellation requires that the number of system blocks for spare blocks exceeding a predetermined number of spare blocks be equal to or greater than the number of physical blocks forming the virtual block. This is performed when it becomes (that is, two or more in this embodiment).

  Hereinafter, the operation of the memory controller 3 relating to reservation and release of the system block will be described.

  During formatting (initialization), a defective block is detected, and a chip number and PBA corresponding to the detected defective block are written in the defective block table. The defective block detected here may be an initial defective block or a late defective block. For example, when the format (initialization) process is performed after the flash memory system 1 is once used, there may be a late defective block. In such a case, not only the initial defective block but also the subsequent defective block are detected as defective blocks.

  Next, a non-defective block included in the defective virtual block is reserved as a system block based on the generated defective block table. If a predetermined number of system blocks cannot be secured with only the non-defective blocks included in the defective virtual block, the non-defective blocks included in the good virtual block are reserved as system blocks. This system block reservation is performed in units of virtual blocks.

  In the reservation of the system block, first, the chip number and PBA corresponding to the non-defective block in the defective virtual block are written in the system block information. Next, when a predetermined number of system blocks are not secured with only the non-defective blocks in the defective virtual block, the non-defective virtual block is appropriately selected, and the chip number and PBA of the physical block included in the selected good virtual block are Written in the system block information.

  As described above, a predetermined number or more of system blocks are reserved at the time of formatting (initialization).

  When the bad block table, the address conversion table, and the empty block table are stored in the system block, the system block as the storage destination of each table is specified based on the system block information.

  Thereafter, when a late defective block is detected, the chip number and PBA corresponding to the subsequent defective block are added to the bad block table. The defective block table is updated on the SRAM 8, and the defective block table after the additional writing is written in the system block (current block) corresponding to the table.

  Subsequently, the non-defective block in the virtual block including the subsequent defective block is additionally reserved as a system block for the spare block. In this additional reservation, the chip number and PBA of the good block are written in the spare block information. When the number of system blocks for spare blocks exceeds the predetermined spare number due to this additional reservation, the system block reservation for the physical block in the non-defective virtual block reserved as the system block for the spare block is the virtual block. Canceled in units. In this reservation cancellation, the chip number and PBA of the physical block in the non-defective virtual block whose system block reservation is canceled are deleted from the spare block information.

  In addition, when a physical block in a non-defective virtual block is assigned as a storage block system block for a bad block table, an address conversion table, or an empty block table, the physical block in the good virtual block is used as a spare block. It is preferably exchanged for a physical block in a bad virtual block reserved as a system block. In order to smoothly cancel the reservation of the system block as described above, it is preferable that such replacement of the system block is appropriately performed. It should be noted that such system block replacement is preferably performed when the system block to be replaced becomes a reserve block.

  Next, a process for writing user data given from the host system 4 will be described. The user data writing process is executed in accordance with an access instruction given from the host system 4.

  In the case of the writing process, the access instruction given from the host system 4 includes a logical address indicating the area where the user data is written. When the address space on the host system 4 side is managed by an LBA attached to a sector (512 bytes) unit area, the user data write destination area is indicated by this LBA. For example, the user data write destination area is indicated by the LBA of the user data write destination head area (first logical sector area) and the number of sectors (capacity) of the write destination area.

  The memory controller 3 specifies the LBA or LBA range corresponding to the user data write destination area according to the access instruction given from the host system 4, and further specifies the logical block to which the LBA or LBA range belongs. . If user data can be written to the physical block corresponding to the identified logical block, the user data is written to the physical block.

  On the other hand, when the user data cannot be written to the physical block corresponding to the specified logical block, for example, when there is no free area for writing the user data, the free block search using the free block table is performed. Done. When an empty block is detected by this empty block search, user data is written to the empty block. Similarly, when there is no physical block corresponding to the specified logical block, a search for a free block using the free block table is performed, and user data is written to the detected free block.

  If no empty block is detected in this empty block search, the memory controller 3 did not write user data, and the writing process to the register accessible from the host system 4 side was not executed normally. Set the error status to notify.

  In the search for the empty block using this empty block table, the system block is excluded from the search target, so that the spare block and the reserved block are not detected as the empty block.

  In this embodiment, an LBA range (hereinafter referred to as “predetermined LBA range”) corresponding to important data is set in advance, and for a logical block to which the LBA range belongs, an empty block search is performed. When the detection cannot be performed, a system block (for example, a spare block or a copy block) is used as a user data write destination. That is, when an empty block cannot be detected by searching for an empty block, the specified logical block (the logical block to which the write destination area belongs) corresponds to the logical block corresponding to the predetermined LBA range (the logical in the predetermined LBA range). It is determined whether or not it matches the logical block to which the sector area belongs. Here, if both logical blocks match, a system block (for example, a spare block or a copy block) is used as a user data write destination. On the other hand, when both logical blocks do not match, a system block (for example, a spare block or a copy block) is not used as a user data write destination.

  For example, when the range of LBA # 512- # 1023 is set as the predetermined LBA range, the 512 logical sector areas of LBA # 512- # 1023 become logical blocks of LBN # 1 as shown in FIG. belong to. Therefore, if a free block cannot be detected when searching for a free block newly allocated to the logical block of LBN # 1, a system block (for example, a spare block) is detected for the logical block of LBN # 1. Block or copy block). Note that the PBAs of the two system blocks allocated to the logical block of LBN # 1 need not be the same address.

  Here, the user data given from the host system includes file data and file management data for managing the file data. The LBA range corresponding to the file management data is set as a predetermined LBA range. If so, the reliability of the file management data can be improved.

  The user data stored in the system block is transferred to the empty block when the empty block can be secured.

  Next, the memory controller 3 identifies the logical block to which the logical address range corresponding to the file management data belongs based on the number of sectors in the area specified by the access instruction that instructs writing, and the identified logical block is A case will be described in which a logical block corresponding to a predetermined LBA range (a logical block to which a logical sector area within a predetermined LBA range belongs) is set.

  The host interface block 7 of the memory controller 3 includes various registers accessible from the host system 4 (hereinafter referred to as “host interface registers”). An access instruction given from the host system 4 to the memory controller 3 is written in the host interface register. When the host system 4 instructs the memory controller 3 to write data, “external command for instructing data writing”, “LBA for instructing writing of head data”, and “number of sectors in the data writing area” (The number of sectors corresponding to the capacity of data to be written) "is written to the host interface register.

  In the present embodiment, the user data given together with the access instruction is file data based on “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” written in the host interface register, or It is determined whether it is file management data. In order to make this determination, a threshold value (hereinafter referred to as “sector number setting value”) is set for “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” written in the host interface register. Is done. The memory controller 3 determines that the user data provided from the host system is file data when “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” is equal to or larger than the sector number setting value. If it is smaller than the sector number setting value, it is determined that the user data given together with the access instruction is file management data.

  Here, if the user data given together with the access instruction is file data, the data is written in units of clusters, so the sector number setting value is preferably set in accordance with the number of sectors in the cluster. However, the sector number setting value may be smaller than the cluster sector number. For example, when the number of sectors in the cluster is 8, the sector number setting value may be “4”.

  Next, a table used for specifying a logical block to which a logical address range corresponding to file management data belongs (hereinafter referred to as “small capacity write management table”) will be described with reference to FIG. The small capacity write management table shown in FIG. 9 includes a setting flag indicating whether each logical block is a logical block to which a logical address range corresponding to file management data belongs, and a sector smaller than the sector number setting value. The number of times data writing is instructed (hereinafter referred to as “small capacity writing instructing frequency”) is written. The setting flag written to the small-capacity write management table and the small-capacity write instruction count are associated with each LBN. The setting flag “0” indicates that the logical block is not the logical block to which the logical address range corresponding to the file management data belongs, and the setting flag “1” indicates that the logical block corresponds to the file management data. It indicates that the logical block belongs to the address range.

  This small-capacity write management table is also created or updated on the SRAM 8, and is stored in the system block assigned to this small-capacity write management table, as with other tables. Therefore, when this small-capacity write management table is not stored in the system block, the small-capacity write management table (FIG. 9A) in which the setting flag is set to “0” and the small-capacity write instruction count is set to “0”. )) Is created on the SRAM 8 and the created small capacity write management table is stored in the system block.

  When an access instruction for instructing writing is given from the host system 4, that is, when an "external command for instructing data writing" is written in the host interface register, the memory controller 3 sends the host interface register together with the external command. It is determined whether or not “the number of sectors in the area in which data is written (the number of sectors corresponding to the capacity of the data to be written)” written in is smaller than the sector number setting value. If it is determined that the value is smaller than the sector number setting value, the memory controller 3 further specifies the logical block to which the data write destination area corresponding to the external command belongs. That is, in this process, the logical block to which the area instructed to write the data having the sector number smaller than the sector number setting value belongs is specified. For example, when the sector number setting value is “4”, “512” is set as the LBA for instructing the writing of the head data together with the external command for instructing the host interface register to write the data. When “1” is written as the number of sectors corresponding to the capacity of the data to be written), the logical block of LBN # 2 is the logical block to which the area instructed to write the data with the sector number smaller than the sector number setting value belongs. Identified.

  The small-capacity write management table is updated when a logical block to which an area instructed to write data having a sector number smaller than the sector number set value belongs is specified. In this update process, the small-capacity write instruction count associated with the LBN of the logical block to which the area instructed to write data having a sector number smaller than the sector count setting value on the small-capacity write management table is increased by one. It is. For example, if the logical block to which the area instructed to write data with a sector number smaller than the sector number setting value belongs is the logical block of LBN # 2, the small block associated with LBN # 2 on the small-capacity write management table. If the capacity write instruction count is “10”, the small capacity write instruction count is rewritten to “11”.

In the present embodiment, a threshold value (hereinafter referred to as “write count setting value”) is also provided for the small-capacity write instruction count on the small-capacity write management table. When any of the small-capacity write instruction counts on the small-capacity write management table becomes equal to or larger than the write count setting value, the LBN logical block associated with the small-capacity write instruction count corresponds to the predetermined LBA range. To a logical block (a logical block to which a logical sector area within a predetermined LBA range belongs). In addition, the setting flag associated with the LBN of the logical block is rewritten from “0” to “1”. For example, when the write count setting value is set to “128” and the small capacity write instruction count associated with LBN # 2 reaches “128”, the logical block of LBN # 2 A logical block corresponding to a range (a logical block to which a logical sector area in a predetermined LBA range belongs) is set. Also, the setting flag associated with LBN # 2 is rewritten from “0” to “1” (see FIG. 9B).

  Next, a case where the LBA range corresponding to the file management data is changed on the host system 4 side will be described. When such a change is made, the logical block including the LBA range corresponding to the file management data may become a different logical block. In such a case, the memory controller 3 needs to reset the logical block corresponding to the predetermined LBA range (the logical block to which the logical sector area in the predetermined LBA range belongs).

  Therefore, the memory controller 3 identifies the logical block that no longer includes the logical sector area corresponding to the LBA range corresponding to the file management data, and cancels the setting for the logical block (the logical block corresponding to the predetermined LBA range). It is necessary to cancel the setting as a block (a logical block to which a logical sector area within a predetermined LBA range belongs).

  Next, using the small-capacity write management table as shown in FIG. 9, the memory controller 3 identifies the logical block that no longer includes the LBA range corresponding to the file management data, and sets the logical block. Will be described (the setting as a logical block corresponding to a predetermined LBA range (a logical block to which a logical sector area in the predetermined LBA range belongs)) is released.

  In this example, the memory controller 3 sets all the small-capacity write instruction counts on the small-capacity write management table to “0” every predetermined period (for example, every time a data write instruction is given from the host system). A reset process for returning is executed (see FIG. 9C). Therefore, when this reset process is executed, the number of small capacity write instructions associated with each LBN corresponds to the number of times of writing data having a sector number smaller than the sector number set value during a predetermined period.

  When the memory controller 3 executes this reset process, the memory controller 3 refers to the small capacity write instruction count associated with the LBN whose setting flag is set to “1”, and the small capacity write instruction count is “0”. If there is, the write setting flag of the LBN is changed to “0”. That is, the setting of the logical block of the LBN as the logical block corresponding to the predetermined LBA range (the logical block to which the logical sector area of the predetermined LBA range belongs) is released.

  As a result of the memory controller 3 operating in this manner, a logical block corresponding to a predetermined LBA range (predetermined LBA range) for a logical block that is not instructed to write data having a sector number smaller than the sector number set value during a predetermined period. The setting as the logical block to which the logical sector area belongs is released.

  When executing the reset process, if the number of small-capacity write instructions associated with the LBN for which the setting flag is set to “1” is less than a predetermined number, the write of the LBN is performed. The setting flag may be changed to “0”. In this case, a logical block corresponding to a predetermined LBA range (predetermined for a logical block in which the number of times of writing data of a sector number smaller than the sector number setting value is instructed during the predetermined period is less than the predetermined number of times. The setting as the logical block to which the logical sector area in the LBA range belongs is canceled.

  Note that it is preferable that a setting flag and a small-capacity write instruction count regarding the logical block corresponding to the physical block are written in the redundant area in the physical block to which any logical block is allocated.

  As mentioned above, although embodiment of this invention was described, this is an illustration for description of this invention, Comprising: It is not the meaning which limits the scope of the present invention only to this embodiment. Of course, various modifications can be made without departing from the scope of the present invention. For example, the system data stored in the system block may be information other than various tables and firmware. Also, a logical block including an LBA range corresponding to important data other than file management data may be set as a logical block corresponding to a predetermined LBA range (a logical block to which a logical sector area within a predetermined LBA range belongs). . Further, the present invention can be implemented even when a virtual block is not configured.

1 is a block diagram showing a schematic configuration of a flash memory system according to an embodiment of the present invention. It is a figure which shows the correspondence of a logical block and a physical block group. It is a figure which shows the structural example of a bad block table. It is a figure which shows the correspondence of a logical group and an address conversion table. It is a figure which shows the structural example of address conversion table # 0. It is a figure which shows the structural example of an empty block table. FIG. 7A is a diagram illustrating a configuration example of bad block table storage area information. FIG. 7B is a diagram illustrating a configuration example of address conversion table storage area information. FIG. 7C is a diagram illustrating a configuration example of empty block table storage area information. It is a figure which shows the structural example of spare block information. It is a figure for demonstrating a small capacity write management table.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Flash memory system, 2A, 2B ... Flash memory, 3 ... Memory controller, 6 ... Microprocessor

Claims (9)

A memory controller that controls access to a flash memory that is erased in physical block units according to an access instruction given from a host system,
Reserving means for reserving a physical block in the flash memory as a system block used as a storage destination of system data for controlling or managing access to the flash memory;
System data writing means for writing the system data to the system block reserved by the reservation means;
A free block search means for searching for a free block in the flash memory that is not reserved as the system block and in which valid data is not stored;
Physical block allocating means for allocating the empty block detected by the empty block searching means to a logical block including a plurality of sector unit areas to which the logical address specified by the access instruction is allocated;
Data writing means for writing data given together with the access instruction to a physical block corresponding to the logical block to which the logical address specified by the access instruction belongs;
Determining means for determining whether the logical block to which the logical address specified by the access instruction belongs corresponds to the predetermined logical block;
With
When the physical block allocating unit allocates the vacant block to any of the logical blocks, and the vacant block searching unit cannot detect the vacant block, the determination unit is The system block in which valid system data is not stored is allocated to any one of the logical blocks only when it is determined that the logical block corresponds to the predetermined logical block. Memory controller. First setting means for setting the predetermined logical block based on setting information given from the host system;
The setting information includes information specifying a range of the logical address,
2. The memory controller according to claim 1, wherein the first setting unit sets the logical block to which the range of the logical address included in the setting information belongs as the predetermined logical block. The second logical block is configured to set the predetermined logical block based on the number of times the data specifying the area having a capacity smaller than the predetermined number of sectors to the area in each logical block is instructed by the access instruction. Comprising setting means,
The memory controller according to claim 1, wherein the second setting unit sets the logical block having the number of times equal to or greater than a predetermined number as the predetermined logical block. There are a plurality of the flash memories,
Correspondence between a logical block including a plurality of sector unit areas to which an address specified by the access instruction is allocated and a physical block group including a plurality of physical blocks having the same address included in different flash memories Block management means to manage the relationship,
Further comprising
The data writing means writes data given together with the access instruction to the physical block group corresponding to the logical block to which the logical address specified by the access instruction belongs;
The reservation means reserves a non-defective block in the physical block group including a defective block as the system block preferentially over a physical block in the physical block group that does not include a defective block.
The memory controller according to claim 1, wherein the memory controller is a memory controller. A memory controller according to any one of claims 1 to 4,
A flash memory whose access is controlled by the memory controller;
A flash memory system. A flash memory control method for controlling access to a flash memory to be erased in units of physical blocks in accordance with an access instruction given from a host system,
A reservation step of reserving a physical block in the flash memory as a system block used as a storage destination of system data for controlling or managing access to the flash memory;
A system data writing step of writing the system data to the system block reserved by the reservation step;
A free block search step for searching for a free block in the flash memory that is not reserved as the system block and in which valid data is not stored;
A physical block allocation step for allocating the empty block detected by the empty block search step to a logical block including a plurality of sector unit areas to which a logical address specified by the access instruction is allocated;
A data writing step of writing data given together with the access instruction to a physical block corresponding to the logical block to which the logical address specified by the access instruction belongs;
A determination step of determining whether the logical block to which the logical address specified by the access instruction belongs corresponds to the predetermined logical block;
With
In the physical block allocation step, when the free block cannot be detected by the free block search step when the free block is allocated to any of the logical blocks, the determination step determines any of the above Only when it is determined that the logical block of the system corresponds to the predetermined logical block, the system block in which valid system data is not stored is allocated to any of the logical blocks. A flash memory control method. A first setting step of setting the predetermined logical block based on setting information given from the host system;
The setting information includes information specifying a range of the logical address,
7. The flash memory control according to claim 6, wherein, in the first setting step, the logical block to which the range of the logical address included in the setting information belongs is set as the predetermined logical block. Method. The second logical block is configured to set the predetermined logical block based on the number of times the data specifying the area having a capacity smaller than the predetermined number of sectors to the area in each logical block is instructed by the access instruction. With setup steps,
7. The flash memory control method according to claim 6, wherein, in the second setting step, the logical block having the predetermined number of times or more is set as the predetermined logical block. There are a plurality of the flash memories,
Correspondence between a logical block including a plurality of sector unit areas to which an address specified by the access instruction is allocated and a physical block group including a plurality of physical blocks having the same address included in different flash memories Block management steps to manage relationships,
Further comprising
In the data writing step, data given together with the access instruction is written to the physical block group corresponding to the logical block to which the logical address specified by the access instruction belongs,
In the reservation step, a non-defective block in the physical block group including a defective block is reserved as the system block preferentially over a physical block in the physical block group not including a defective block.
The memory controller according to claim 6, wherein the memory controller is a memory controller.

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