JP2010026789A - Sales data processor and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To immediately restore a state before the interruption of a main power source when the main power source is supplied during hibernation processing in a sales data processor. <P>SOLUTION: When an AC power source is interrupted, a CPU saves data showing the operating state of a system in a main memory by suspend processing, and saves the data stored in the main memory by hibernation processing in a memory 14 for hibernation, and turns off a backup power source. During hibernation processing, the CPU monitors the state of the AC power source, and when it is detected that the AC power source is put in a supply state during the hibernation processing, the CPU interrupts the hibernation processing, and restores the system to the state just before the interruption of the power source based on data showing the operating state of the system stored in the main memory. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a sales data processing apparatus and a program.

  Conventionally, in sales data processing devices such as ECR (electronic registers), data indicating the operating state of the system when the main power supply is shut down is stored in a volatile memory backed up by a battery, which can be used mainly when a power failure occurs. Even when the power is cut off, it can be started immediately in the operating state before the power is cut off. In recent years, however, sales data processing devices have become more sophisticated, and the memory has also increased in capacity. Therefore, a large-capacity backup battery is required in case the main power supply is shut off for a long time due to a summer holiday of the store.

  On the other hand, in the personal computer, as described above, a suspend function that saves data indicating the operation state of the system when the main power supply is shut down to a volatile memory backed up by a battery, and a data saved in the volatile memory to a hard disk or the like A hibernation function for performing a hibernation process for saving in the nonvolatile storage means is known. The hibernation function eliminates the need for a large-capacity battery for data backup even when the main power supply is shut off for a long time.

  For example, Patent Document 1 describes a technique for shifting a system from a suspend state to a hibernation state after a predetermined time has elapsed after the system is shifted to a suspend state when the power is turned off. Here, the suspended state refers to a state in which the system state is maintained by continuing to supply power to the main memory when the computer operation is stopped. The hibernation state refers to a nonvolatile storage means such as a hard disk. In this state, the system state is maintained by writing the contents of the main memory.

Further, for example, Patent Literature 2 describes a technique for immediately shifting from a suspended state to a hibernation state when the apparatus main body moves in a suspended state.
JP-A-9-237128 JP 2008-33436 A

  By the way, in the conventional technique, when the hibernation process for saving the contents of the main memory to the nonvolatile storage means is started, the next activation cannot be performed until the hibernation process is completed. However, if an unintentional power failure occurs in a sales data processing device such as ECR or if the main power connector is accidentally disconnected, it is often the case that the customer is waiting. It must be possible to quickly return to the operating state before the main power supply was shut off.

  SUMMARY OF THE INVENTION An object of the present invention is to enable a sales data processing apparatus to immediately return to an operation state before shutting down the main power supply when main power is supplied during hibernation processing.

In order to solve the above-mentioned problem, the sales data processing device of the invention described in claim 1
First saving processing means for saving data indicating an operating state of the system to the volatile storage means when the main power supply is shut off;
Second save processing means for saving data indicating the operating state of the system saved in the volatile storage means by the first save processing means to the nonvolatile storage means;
Power monitoring means for monitoring the power state of the main power supply;
When the power supply monitoring unit detects that the main power supply is being supplied during the saving process by the second saving processing unit, the saving process by the second saving processing unit is interrupted, and the volatile Control means for returning the system to the state before the main power supply is shut off based on data indicating the operating state of the system saved in the storage device;
Is provided.

The invention according to claim 2 is the invention according to claim 1,
The saving process by the second saving processing unit includes an erasing process of data stored in the non-volatile storage unit.

The invention according to claim 3 is the invention according to claim 1,
The saving process by the second saving processing unit includes a writing process for writing data indicating an operation state of the system to the nonvolatile storage unit.

The invention according to claim 4 is the invention according to claim 1,
The evacuation process by the second evacuation processing unit is for confirming the consistency between the data to be evacuated to the nonvolatile storage unit in the volatile storage unit and the data evacuated to the nonvolatile storage unit. Including processing.

The invention according to claim 5 is the invention according to any one of claims 1 to 4,
The nonvolatile storage means is provided separately from storage means for storing a program for operating the system.

The invention according to claim 6 is the invention according to any one of claims 1 to 5,
Notifying means for notifying that the second saving processing means is in process.

The invention according to claim 7 is the invention according to any one of claims 1 to 6,
A plurality of the nonvolatile storage means are provided.

The invention according to claim 8 is the invention according to claim 1,
Connection means for connecting external storage means;
Selection means for selecting whether to save the data indicating the operating state of the system saved in the volatile storage means as the nonvolatile storage means or the external storage means connected by the connection means Prepared,
The second save processing means saves data indicating the operating state of the system to the save destination selected by the selection means.

The program of the invention according to claim 9 is:
A computer used in a sales data processing device
First evacuation processing means for evacuating data indicating the operating state of the system to the volatile storage means when the main power supply is shut off;
Second save processing means for saving data indicating the operating state of the system saved in the volatile storage means by the first save processing means to the nonvolatile storage means;
When it is detected by the power supply monitoring means that the main power supply has been supplied during the saving process by the second saving processing means, the saving process by the second saving processing means is interrupted, and the volatility Control means for returning the system to a state before the main power supply is shut off based on data indicating the operating state of the system saved in the storage means;
To function as.

  According to the present invention, in the sales data processing apparatus, when the main power is supplied during the hibernation process, it is possible to immediately return to the operation state before the main power is shut off.

(Embodiment 1)
First, Embodiment 1 of the present invention will be described.
FIG. 1 shows a functional configuration example of the ECR 1 in the first embodiment.
ECR1 is provided in the store, and a product transaction registration process (transaction date and time, product name, sales number of products, sales data such as sales amount, registration process of a person in charge, etc.) and an inspection process based on an operator's operation This is a sales data processing device that performs checkout processing, total sales in a store, and the like. As ECR1, for example, an electronic register or the like is applicable.

  As shown in FIG. 1, the ECR 1 includes a CPU 10, an RTC 11, a program storage memory 12, a main memory 13, a hibernation memory 14, a main display device 151, a sub display device 152, an LED 16, and a printing device. 17, an input device 18, a storage I / F 19, and a communication unit 20, and each unit is configured to be connected via a bus 21.

  A CPU (Central Processing Unit) 10 is control means for centrally controlling each part of the ECR 1. Further, the CPU 10 expands various programs stored in the program storage memory 12 in the main memory 13 and executes various processes in cooperation with the programs expanded in the main memory 13.

  For example, when a signal for notifying AC power supply is input from the AC power supply state monitoring circuit 34 (see FIG. 3), the CPU 10 stores the start processing program and the end processing program stored in the program storage memory 12 into the main memory 13. The startup process / end process work area 131 (see FIG. 2) is read and the startup process described later is executed in cooperation with the read startup process program. Further, when a signal for notifying AC power supply interruption is input from the AC power supply state monitoring circuit 34 during the operation, the CPU 10 performs a suspend process (first process) in cooperation with the termination process program stored in the main memory 13. Ending process) and a hibernation process (second saving process) are executed.

  Here, in the present embodiment, the suspend process refers to volatile data (program counter (PC), stack pointer (SP), register, system data, etc.) indicating the system operation state of the CPU 10 when the AC power supply 31 is shut off. This is a process of saving to the main memory 13. The hibernation process is a process of saving data indicating the system operation state stored in the main memory 13 to the nonvolatile hibernation memory 14.

  When a signal for notifying the AC power supply is input from the AC power state monitoring circuit 34 during the hibernation process, the CPU 10 interrupts the hibernation process, executes the start process, and saves the system operation state saved in the main memory 13. The system is returned to the state before the AC power supply is cut off based on the data indicating.

  In addition, the CPU 10 activates a program according to the operation of the input device 18 by the operator, and performs merchandise transaction registration processing, inspection processing, settlement processing, in-store sales aggregation processing, and the like.

  An RTC (Real Time Clock) 11 has a built-in clock circuit, clocks the current time and the current date, and outputs them to the CPU 10. The RTC 11 includes an RTC backup power supply 111 (see FIG. 3), and can operate even when no power is supplied from either the AC power supply 31 or the backup power supply 32.

  The program storage memory 12 is configured by a nonvolatile ROM (Read Only Memory) or the like, and as shown in FIG. 2, various programs that can be executed by the ECR1 and unique data of the ECR1 (for example, the MAC address of the ECR1, touch panel calibration) Data).

The main memory 13 is volatile storage means for storing various programs executed by the CPU 10 and various data related to these programs.
As shown in FIG. 2, the main memory 13 has a work area 131 for start processing / end processing, a suspend area 132, a copy area 133, a system data area 134, a setting data area 135, and a user data area 136. .
The start process / end process work area 131 stores a start process program and an end process program (including subroutine processing) read from the program storage memory 12 by the CPU 10 when the AC power is turned on, and these programs operate. It is a work area to do.
The suspend area 132 is an area for saving data indicating the system operation state of the CPU 10 (program counter (PC), stack pointer (SP), register, system data, etc.) in the suspend process.
The copy area 133 is an area for writing a copy of the program stored in the program storage memory 12.
The system data area 134 is an area for storing stack, variables, and OS system data.
The setting data area 135 is an area for storing various setting data related to peripheral devices (main display device 151, sub display device 152, printing device 17, input device 18, etc.) set via the input device 18.
The user data area 136 is an area for storing user data such as sales data input via the input device 18, display data being displayed on the main display device 151, and print data to be printed on the printing device 17.

  The hibernation memory 14 is constituted by a nonvolatile memory such as a flash memory, and is a nonvolatile storage means for saving data stored in the main memory 13 when the AC power supply 31 is shut off. In the present embodiment, the hibernation memory 14 includes a hibernation memory 14a for storing the upper bit of data instructed to be written by the CPU 10, and a hibernation memory for storing the lower bit of data instructed to be written by the CPU 10. 14b. This is to improve the data writing speed in the hibernation process.

  As shown in FIG. 2, the hibernation memory 14 includes a header area 141, a backup area 142, and a checksum storage area 143. The header area 141 is an area having a hibernation completion flag area 141a for setting a hibernation completion flag indicating that the hibernation process has been completed. The backup area 142 is an area for saving data in an area other than the start / end process work area 131 of the main memory 13 in the hibernation process. The checksum storage area 143 is an area for writing the checksum calculated in the hibernation process.

  The main display device 151 and the sub display device 152 are configured by an LCD (Liquid Crystal Display), an organic EL (Electro-Luminescence) display, or the like, and display various screens according to instructions of a display signal input from the CPU 10. The main display device 151 is a display device provided toward the operator side, and the sub display device 152 is a display device provided toward the customer side.

  An LED (Light Emitting Diode) 16 is driven in response to an instruction signal input from the CPU 10 and is lit and blinks.

  The printing device 17 is, for example, a thermal printer (thermal printer), and has receipt and journal roll paper (thermal paper), and according to an instruction signal input from the CPU 10, the amount of money for each roll paper, etc. Print out the data.

  The input device 18 includes a cash register keyboard having power keys, cursor keys, characters, numeric input keys, and various function keys such as an INIT key and an FC key. Output to. The input device 18 includes a touch panel provided on the screen of the main display device 151. The touch panel is installed so as to cover the upper surface of the main display device 151, detects a desired input position pressed by an operation using an operator's finger or the like, and outputs a detection signal to the CPU 10. The input device 18 includes a barcode reader, a barcode scanner, or the like that reads a barcode provided on a product.

  The storage I / F 19 can be connected to an external storage 19a such as a CF (CompactFlash) card or an SD card (Secure Digital Card), and is a connection means for inputting / outputting data to / from the external storage 19a.

  The communication unit 20 includes a LAN (Local Area Network) adapter, a router, and the like, and performs data transmission / reception with an external device such as the server 100 via a communication network such as a LAN or the Internet.

FIG. 3 shows a configuration example of a main part of the power supply system in ECR1.
The power generation circuit 33 shown in FIG. 3 is connected to an AC power source (main power source) 31 and a backup power source (rechargeable battery) 32 via a switch 35. The power source generation circuit 33 converts AC (alternating current) power source power input from the AC power source 31 into DC (direct current) power source power and supplies it to each unit shown in FIG. The power supply generation circuit 33 supplies the power supply power input from the backup power supply 32 via the switch 35 to the CPU 10, RTC 11, program storage memory 12, main memory 13, and hibernation memories 14 a and 14 b and the LED 16.
The AC power supply state monitoring circuit 34 is a power supply monitoring unit that monitors the power supply state of the AC power supply 31. While power is supplied from the AC power supply 31, a signal (HIGH signal) for notifying the supply of AC power is sent to the CPU 10. While the power is being cut off from the AC power supply 31, a signal (LOW signal) for notifying the AC power cut is outputted to the CPU 10.
The switch 35 switches ON / OFF of the backup power source 32 based on the backup power ON / OFF switch switching control signal from the CPU 10.

  As described above, when the power supply from the AC power supply 31 is in the supply state, the power supply generation circuit 33 supplies the power supply from the AC power supply 31 to each part of the ECR1. When the AC power supply 31 is shut off, the power from the backup power supply 32 is supplied only to the CPU 10, RTC 11, program storage memory 12, main memory 13, hibernation memories 14 a and 14 b, and LED 16 based on the control from the CPU 10. The With this configuration, the consumption of the backup power supply 32 can be minimized. Note that the power supply is held in a circuit for a certain time T after the AC power supply 31 is cut off. Within this predetermined time, the CPU 10 switches on the backup power source 32 and maintains the CPU operating power source and the memory operating power source.

  Next, main operations of the ECR 1 in the first embodiment will be described in detail with reference to flowcharts.

  FIG. 4 shows a flow of end processing executed by the CPU 10 when a signal for notifying AC power supply interruption is input by the AC power supply monitoring circuit 34. This processing is realized by software processing by cooperation between the CPU 10 and the end processing program.

  First, a suspend process (first save process) is executed, and the stack pointer, program counter, register, system data, etc. stored in the CPU 10 are saved in the suspend area 132 of the main memory 13 (step S1).

  Next, the backup power supply 32 is turned on by the switch 35 being turned on by the backup power supply ON / OFF switch switching control signal (step S2).

  Next, hibernation processing (second saving processing) is executed, and data in an area other than the activation / termination processing work area 131 in the main memory 13 is saved (backed up) in the hibernation memory 14 (step S3). When a signal for notifying the AC power supply is input by the AC power supply monitoring circuit 34 during execution of the hibernation process, the process is interrupted by the CPU 10 and the startup process shown in FIGS. 9a to 9b is executed.

  FIG. 5 shows a flow of hibernation processing executed by the CPU 10 in step S3 of FIG. This processing is realized by software processing by cooperation between the CPU 10 and the hibernation processing program.

In the hibernation process, first, the blinking of the LED 16 as a notification means indicating that the hibernation process is being performed is started (step S201). Next, a write area erasing process is executed (step S202).
FIG. 6 shows a flow of the write area erasing process.
As shown in FIG. 6, in the write area erasing process, first, it is determined whether or not the data in all areas of the hibernation memories 14a and 14b has been erased (step S1001). If it is determined that the data in all areas has been erased (step S1001; YES), the process proceeds to step S203 in FIG.

  If it is determined that the data in all the areas of the hibernation memories 14a and 14b has not been erased (step S1001; NO), one block of data erase is instructed to the hibernation memories 14a and 14b (step S1002). Here, one block indicates a data size that can be erased at one time.

  Next, the signal input from the AC power supply state monitoring circuit 34 is monitored to determine the power supply state of the AC power supply 31 (step S1003). If it is determined that the AC power supply 31 is in the cut-off state (step S1003; AC power supply cut-off state), it is determined whether or not erasure of one block is completed in the hibernation memories 14a and 14b. Here, in the hibernation memories 14a and 14b, when the data erase for one block is completed, the CPU 10 is notified of the completion of the block erase. If it is determined that erasure of one block has not been completed (step S1004; NO), the process returns to step S1003.

  If it is determined that the erasure of one block has been completed (step S1004; YES), it is determined whether or not the erasure of all areas of the hibernation memories 14a and 14b has been completed, and if it is determined that the erasure has not been completed ( In step S1005; NO), the process returns to step S1002, and the next block is erased. If it is determined that all the areas in the hibernation memories 14a and 14b have been erased (step S1005; YES), the process proceeds to step S203 in FIG.

  On the other hand, when it is determined in step S1003 that the AC power supply 31 is in the supply state (step S1003; AC power supply state), the backup power supply 32 is switched off by the switch 35 (step S1006), and this process is interrupted. Then, the process proceeds to the startup process (hibernation interruption restart) shown in FIGS. 9a to 9b.

In step S203 of FIG. 5, a writing process is executed.
FIG. 7 shows a flow of the writing process.
As shown in FIG. 7, in the writing process, first, data to be saved, that is, data stored in an area other than the start / end process work area 131 of the main memory 13 is stored in the hibernation memories 14a and 14b. Are transferred one block at a time, and data writing for one block is instructed. Here, one block indicates a data size that can be written at a time in the hibernation memories 14a and 14b. Further, the upper bit of data (for example, the upper 4 bits for 8 bit data) is transferred to the hibernation memory 14a by one block, and the lower bit of the data (for example, 8 bit data for example) is transferred to the hibernation memory 14b. Lower 4 bits) are transferred for one block.

  Next, the signal input from the AC power supply state monitoring circuit 34 is monitored, and the power supply state of the AC power supply 31 is determined (step S2002). When it is determined that the AC power supply 31 is in the cut-off state (step S2002; AC power supply cut-off state), it is determined whether or not writing of one block is completed in the hibernation memories 14a and 14b (step S2003). Here, in the hibernation memories 14a and 14b, when the data writing for one block is completed, the CPU 10 is notified of the completion of the block writing. If it is determined that writing of one block has not been completed (step S2003; NO), the process returns to step S2002.

  If it is determined that writing of one block is completed (step S2003; YES), it is determined whether writing of data in all areas other than the activation / end processing work area 131 of the main memory 13 is completed, If it is determined that it has not been completed (step S2004; NO), the process returns to step S2001, and writing for the next block is executed. If it is determined that the writing of data in all the areas other than the work area 131 for start processing / end processing in the main memory 13 has been completed (step S2004; YES), the process proceeds to step S204 in FIG. The data written to the hibernation memories 14a and 14b by the above writing process is called backup data.

  On the other hand, when it is determined in step S2002 that the AC power supply 31 is in the supply state (step S2002; AC power supply state), the backup power supply 32 is turned off by the switch 35 (step S2005), and this process is interrupted. Then, the process proceeds to the startup process (hibernation interruption restart) shown in FIGS. 9a to 9b.

In step S204 of FIG. 5, a write content guarantee process is executed.
The written content guarantee process is a process for confirming the consistency between the data to be saved in the main memory 13 and the data saved in the hibernation memory 14.

FIG. 8 shows a flow of the write content guarantee process.
As shown in FIG. 8, in the write content guarantee process, first, the data to be saved in the hibernation memories 14a and 14b stored in the main memory 13, specifically, the start process / end process A verification process (error check) is performed on the data written in the area other than the work area 131 and the data saved in the hibernation memories 14a and 14b (step S3001). If there is an error in the verify process, it is preferable to re-execute the hibernation process.

  Next, a checksum (total value) of data to be saved on the main memory 13 is calculated (step S3002), and the calculated checksum is written to the checksum storage area 143 of the hibernation memories 14a and 14b. (Step S3003). Then, the hibernation completion flag ON is set in the hibernation completion flag area 141a of the hibernation memories 14a and 14b (step S3004), and the process proceeds to step S205 in FIG.

  In step S205 of FIG. 5, the blinking of the LED 16 is stopped (step S205), the hibernation process ends, and the process proceeds to step S4 of FIG.

  In step S4 of FIG. 4, the backup power source 32 is switched off by the switch 35, and the end process ends.

  After the backup power supply 32 is switched off, when the AC power supply 31 is switched from the shut-off state to the supply state, the CPU 10 starts the start processing program and the end processing program in the program storage memory 12 for the start processing and end processing in the main memory 13. Read to work area 131. And the starting process shown to FIG. 9 a-FIG. 9 b is performed.

  9a to 9b show a flow of activation processing. This processing is realized by software processing through cooperation between the CPU 10 and the activation processing program. Here, the starting process is started from the position of “reset start” shown in FIGS. 9A to 9B. When the hibernation process is interrupted, the hibernation process program moves to the position of “hibernation interruption restart” shown in FIG. 9A. Since the shift is instructed, the processing is started from the position of “hibernation interruption restart”.

When the process is started from “reset start”, first, a system initialization process is executed (step S10). The system initialization process is a process for the CPU 10 to recognize a system environment to be used and establish a system. For example, a process in which the CPU 10 recognizes what kind of memory is connected can be cited.
Next, start information indicating a reset start is set in the work area 131 for start processing / end processing of the main memory 13 (step S11), and the process proceeds to step S14.

When the process is started from “hibernation interruption restart”, a hibernation system initialization process is first executed (step S12). When the hibernation process is interrupted and the startup process is started, the CPU 10 is operating, and therefore it is not necessary to perform all the system initialization processes. Therefore, in step S12, for example, a part of initialization processing such as initialization of cache information in the CPU 10 is performed.
Next, start information indicating that the hibernation interruption restart is set in the work area 131 for start processing / end processing of the main memory 13 (step S13), and the processing proceeds to step S14.

  In step S14, drivers for peripheral devices such as the main display device 151, the sub display device 152, the printing device 17, and the input device 18 are initialized (step S14).

  Next, it is determined whether or not the INIT key of the input device 18 has been pressed (step S15). Here, the INIT key (initial key) is a key used by the dealer when the ECR 1 is installed, and data in an area other than the start / end processing work area 131 on the main memory 13, that is, setting data, This is a key for instructing to initialize all data including user data. After the power key of the input device 18 is turned off, the INIT key becomes valid when the power key is switched on while pressing the INIT key. That is, at the timing when the INIT key is pressed, in most cases, the restart occurs after the hibernation process is interrupted.

  When the INIT key is pressed (step S15; YES), the process proceeds to step S35 in FIG. 9b, and a check is made to see if there is an error in the program in the program storage memory 12. If the check result is OK (step S35; OK), the program in the program storage memory 12 is copied to the copy area 133 of the main memory 13 (step S36), and ECR1 is started in the INIT state (step S37). The process ends. Activation in the INIT state means that data in the area other than the activation / end process work area 131 from the main memory 13, that is, data in the suspend area 132, the system data area 134, the setting data area 135, and the user data area 136. Means that it will be activated after it is erased. When the check result is NG (step S35; NG), a system error message indicating that a system error has occurred, for example, a character string “system error” is displayed on the main display device 151 (step S38). finish.

  If the INIT key has not been pressed (step S15; NO), it is determined whether or not the FC key has been pressed (step S16). Here, the FC key (flag clear key) is a key for instructing to leave the setting data among the data other than the work area 131 for start processing / end processing on the main memory 13 to initialize. After the power key of the input device 18 is turned off, when the power key is switched on while pressing the FC key, the FC key becomes valid. That is, in most cases, the timing at which the FC key is pressed is a restart after the hibernation process is interrupted. If the FC key has not been pressed (step S16; NO), the process proceeds to step S18. If the FC key has been pressed (step S16; YES), a flag indicating that the FC key has been detected is set in the work area 131 for start processing / end processing on the main memory 13 (step S17), and the processing proceeds to step S18. Transition.

  In step S18, it is determined whether or not the restart is after the hibernation process is interrupted. Specifically, when the start information set in the work area 131 for start processing / end processing is referred to and the set start information is information indicating that the hibernation interruption restart is performed, the hibernation interruption restart is performed. It is judged that. If the set start information is information indicating a reset start, it is determined that the hibernation interrupted restart is not performed. If it is determined that the restart is after the hibernation process is interrupted (step S18; YES), the process proceeds to step S23 in FIG. 9b. That is, the processes in steps S19 to S22 are skipped. In the case of restart after interruption of the hibernation process, the data on the main memory 13 before the AC power supply 31 is cut off remains in the main memory 13, so that it is not necessary to restore the data from the hibernation memory 14.

  If it is determined that the restart is not after the hibernation process is interrupted (step S18; NO), the hibernation completion flag area 141a of the hibernation memory 14 is referred to. If the hibernation completion flag is set to ON (step S19; YES), checksum verification is performed (step S20). That is, it is verified whether or not the checksum stored in the checksum storage area 143 matches the total value of the data stored in the backup area 142. If the checksum verification result is OK (step S20; OK), the backup data stored in the backup area 142 of the hibernation memory 14 is written back to the main memory 13 (step S21).

  Next, it is checked whether or not there is an error in the program written back to the main memory 13 (step S22). If the check result is OK (step S22; OK), it is determined whether or not the FC key has been detected (step S23 in FIG. 9b). If it is determined that the FC key has not been detected (step S23; NO), the program counter, stack pointer, register, system data, etc. on the suspend area 132 are written back to the CPU 10 (step S24). Further, the peripheral device is returned to the state before the AC power supply is cut off (step S25). For example, the display data included in the user data in the main memory 13 is transmitted to the main display device 151, and the display state before the AC power cut-off is restored. Then, the system is restored in a state before the AC power supply is shut off (step S26), and this process ends.

  On the other hand, if it is determined that the FC key has been detected (step S23; YES), the process proceeds to step S27 in FIG. 9b, and a check is made as to whether there is an error in the program in the program storage memory 12. If the check result is OK (step S27; OK), the program in the program storage memory 12 is copied to the copy area 133 of the main memory 13 (step S28), and ECR1 is activated in the FC state (step S29). The process ends. Activation in the FC state means activation after data in the suspend area 132, the system data area 134, and the user data area 136 of the main memory 13 are erased. If the check result is NG (step S27; NG), a system error message indicating that a system error has occurred, for example, a character string “system error” is displayed on the main display device 151 (step S30). finish.

  On the other hand, if it is determined in step S19 that the hibernation completion flag is not ON (step S19; NO), if it is determined in step S20 that checksum verification is NG (step S20; NG), or step S22. If the result of the program check in the main memory 13 is NG (step S22; NG), the process proceeds to step S31 in FIG. 9b to check whether there is an error in the program in the program storage memory 12. If the check result is OK (step S31; OK), the program in the program storage memory 12 is copied to the copy area 133 of the main memory 13 (step S32), and ECR1 is activated in a backup error state (step S33). This process ends. Starting in the backup error state means that a message such as “A backup error has occurred” is displayed on the main display device 151, and data in an area other than the work area 131 for start processing / end processing from the main memory 13, that is, This means that after the data in the suspend area 132, the system data area 134, the setting data area 135, and the user data area 136 are deleted, the data is activated. When the check result of the program is NG (step S31; NG), a system error message indicating that a system error has occurred, for example, a character string “system error” is displayed on the main display device 151 (step S34). The process ends.

  Note that it is preferable to erase the data stored in the hibernation memory 14 after activation. Since the hibernation memory 14 is composed of a different non-volatile memory different from the program storage memory 12, it is possible to erase the data in the entire area of the hibernation memory 14 without having to select data at the time of erasure. . Therefore, it is possible to erase data in the hibernation memory 14 in parallel with the execution of other processes without imposing a load on the system.

  FIG. 10 shows screen display examples of the main display device 151 before the AC power supply 31 is turned off and the main display device 151 after the AC power supply 31 is supplied with power. FIG. 10 shows a case where the AC power supply 31 is shut off due to a power failure or the like during the sales data registration process. As described above, in the termination process, data indicating the operating state of the system such as the program counter, stack pointer, register, and system data of the CPU 10 is saved in the main memory 13 and further stored in the nonvolatile memory before the backup power source 32 is turned off. It is saved in a certain hibernation memory 14. When the AC power supply 31 is turned on again, the program counter, stack pointer, register, system data, etc. are read out from the main memory 13 (or the hibernation memory 14) to the CPU 10. Therefore, the execution position of the interrupted processing of the registration processing program can be returned to the state before the AC power supply is cut off, and the same screen as before the AC power supply is cut off is displayed on the main display device 151 as shown in FIG. The user can continue the registration process without redoing the registration performed before the AC power supply is shut off.

  In addition, since the data on the main memory 13 is saved in the hibernation memory 14 which is a nonvolatile memory before the backup power source 32 is turned off, the power source is not shut off after the AC power source is shut down for a long time without mounting a large-capacity backup power source. It becomes possible to return the system to the state.

  Further, the state of the main memory 13 at the time of AC power interruption is maintained until the hibernation process is completed. During the hibernation process, the power state of the AC power supply 31 is monitored by the CPU 10 and the AC power supply 31 is in the supply state. In such a case, the hibernation process is interrupted and the process proceeds to the start-up process, and data indicating the system operation state stored in the main memory 13 is written back to the CPU 10 so that the operation is returned to the state before the AC power supply is shut off. Is called. Specifically, the hibernation process includes a write area erasure process, a write process, and a write content guarantee process. The CPU 10 uses the AC power supply during data erasure and writing for each block in the hibernation memory 14. When the state is monitored and the AC power supply 31 is in the supply state, control is performed to interrupt the hibernation process and shift to the hibernation interruption restart position of the activation process. Therefore, when the AC power supply 31 is in a supply state during the hibernation process, it is possible to immediately return to the system state before the AC power supply cut-off without waiting for the completion of the hibernation process.

  In the write content guarantee process, a data verify process for checking the consistency between the save target data in the main memory 13 and the data saved in the hibernation memory 14 is performed, the checksum of the written backup data is written, and hibernation is performed. Since the completion flag ON is set, it is possible to guarantee the consistency between the data saved in the hibernation memory 14 and the data written back to the main memory 13 from the hibernation memory 14.

  Further, since the hibernation memory 14 is provided separately from the program storage memory 12, it is possible to erase the data in the entire area of the hibernation memory 14 without having to select data at the time of erasure. Therefore, it is possible to erase data in the hibernation memory 14 in parallel with the execution of other processes without imposing a load on the system.

  Further, since the LED 16 blinks during the hibernation process, the user can recognize the end of the hibernation process, and the work should be started after the data is surely saved to the hibernation memory 14 at the time of repair or the like. Is possible.

(Embodiment 2)
Next, Embodiment 2 of the present invention will be described.
In the second embodiment, the ECR 1 includes a scheduler function that transmits various data including sales data stored in the main memory 13 to the server 100 and backs up once a day at a predetermined time. The predetermined time at which the scheduler function should be executed can be set by the user by operating the input device 18, and the set time is stored in the user data area 136 of the main memory 13. In the scheduler function, sales data and the like during the period from the execution of the previous day's scheduler function to the execution of the current day's scheduler function are targeted for transmission. Conventionally, when a predetermined time arrives during the AC power supply cut-off period, this scheduler function is executed in a batch when the AC power supply is resumed. However, if there is a long vacation such as a blackout or summer vacation, there is no possibility of transactions (sales) during that period. Therefore, in the second embodiment, when the scheduler function is executed after the AC power supply is resumed, the data transmission during the AC power supply cutoff period is skipped, that is, only the data during the startup period is transmitted.

In the second embodiment, in the program storage memory 12, in addition to the above-described startup process program, an end process B program for executing the end process (referred to as end process B) shown in FIG. 11 and the scheduler function execution shown in FIG. A scheduler function execution processing program for executing processing is stored. The sales data includes information on the date and time when the sales were made.
Other configurations of the ECR 1 are the same as those described in the first embodiment with reference to FIGS. 1 to 3, so that the description is used and the operation of the second embodiment will be described below.

  FIG. 11 shows a flow of end processing B in the second embodiment. This process is realized by a software process in cooperation with the CPU 10 and the end process B program.

In the termination process B, first, the current date and time are acquired from the RTC 11 and written as the current date and time in the system data area 134 (step S41).
The processing in steps S42 to S45 is the same as that in steps S1 to S4 in FIG.
That is, the current date / time written in the system data area 134 of the main memory 13 in step S41 is written in the hibernation memory 14 unless the supply of the AC power supply 31 is resumed during the hibernation process.

  After the end process B is executed and both the AC power supply 31 and the backup power supply 32 are cut off, when the AC power supply 31 is supplied again, the CPU 10 executes a start-up process. The activation process is the same as that described with reference to FIGS. 9A to 9B in the first embodiment. The data saved in the hibernation memory 14 by the execution of the start process is written back to the main memory 13. The hibernation memory 14 retains the data in the main memory 13 saved when the AC power supply is shut off.

  When ECR1 is activated by the activation process, a scheduler function execution process shown in FIG. 12 is performed. This processing is realized by software processing by cooperation between the CPU 10 and the scheduler function execution processing program.

  First, the current date and time are acquired from the RTC 11, and the current date and time are stored in the system data area 134 of the main memory 13 (step S51). Next, the arrival of the time to execute the scheduler function is waited (step S52). In step S52, the current time acquired from the RTC 11 is compared with the time at which the scheduler function stored in the user data area 136 is to be executed, and it is determined that the time at which the scheduler function is to be executed has come when they match. Is done.

  If it is determined that the time to execute the scheduler function has come (step S52; YES), the previous scheduler function execution date and time is acquired from the system data area 134 of the main memory 13 (step S53), and the previous AC The date / time when the power is shut off, that is, the current date / time stored in the hibernation memory 14 is acquired (step S54). Then, the activation period after the previous scheduler function execution date and time is calculated (step S55). Specifically, the period from the previous scheduler function execution date and time to the current date and time stored in the hibernation memory 14, and the period from the date and time acquired in step S51 to the current date and time are the startup period. Is calculated as

  Next, the main memory 13 is referred to, and it is determined whether or not there is sales data or the like within the startup period and there is untransmitted data in a period not to be transmitted by the current scheduler function. (Step S56; YES), the corresponding data and the current transmission target data are transmitted to the server 100 via the communication unit 20 (Step S57), and the process proceeds to Step S59. On the other hand, if it is determined that there is no unsent data in the period not covered by the current scheduler function, such as sales data within the startup period (step S56; NO), the data to be transmitted by the current scheduler function Is transmitted to the server 100 via the communication unit 20 (step S58), and the process proceeds to step S59.

  In step S59, the AC power supply cutoff period is notified to the server 100 via the communication unit 20 (step S59). Then, the current date and time are acquired from the RTC 11 and stored in the system data area 134 of the main memory 13 as the current scheduler function execution date and time (step S60), and this process ends.

  As described above, in the second embodiment, the ECR 1 performs the operation of transmitting only the data during the startup period and notifies the server of the AC power cut-off period when executing the scheduler function after restarting the AC power supply. Thus, it is possible to prevent unnecessary execution of the scheduler function and prevent trouble in data management on the server 100 side.

(Embodiment 3)
Next, a third embodiment of the present invention will be described.
In the first and second embodiments, the data save destination in the hibernation process is the hibernation memory 14, but in the third embodiment, whether the backup destination (save destination) is the hibernation memory 14 or the external storage 19a. User selectable.

In the third embodiment, the program storage memory 12 includes a backup destination setting program for executing the backup destination setting process shown in FIG. 13, an end process C program for executing the end process C shown in FIG. 14, and FIGS. A startup process B program for executing the startup process B shown in FIG. 15B is stored. Although not shown in particular, the program storage memory 12 has a backup destination setting information storage area for storing backup destination setting information to be described later.
Other configurations of the ECR 1 are the same as those described in the first embodiment with reference to FIGS. 1 and 2, so that the description is used and the operation of the second embodiment will be described below.

  The backup destination setting process will be described with reference to FIG. This processing is realized by software processing by the cooperation of the CPU 10 and the backup destination setting program when a backup destination setting instruction is input from the input device 18.

  First, the main display device 151 selects whether the backup destination of data when the AC power is cut off is only the hibernation memory 14 (normal type), or is selected from the hibernation memory 14 or the external storage 19a (selection type). Is displayed on the main display device 151, and when the normal type is selected by the input device 18 (step S71; NO), backup destination setting information indicating that “normal type” has been selected is displayed. It is stored in the backup destination setting information storage area of the program storage memory 12 (step S76), and this process ends.

  On the other hand, when the selection type is selected (step S71; YES), the backup destination setting information indicating that the “selection type” is selected is stored in the backup destination setting information storage area of the program storage memory 12 (step S72). ). In addition, a list of backup destination candidates is displayed on the main display device 151 (step S73). Here, the external storage 19a connected via the hibernation memory 14 or the storage I / F 19 as a backup destination is displayed as a backup destination candidate.

  Next, the selection of the backup destination by the input device 18 is awaited, and when the backup destination is selected (step S74; YES), the backup destination setting in which the information of the selected backup destination is stored in the backup destination setting information storage area The information is added (step S75), and the process ends.

  Next, the termination process C will be described with reference to FIG. This processing is realized by software processing by cooperation between the CPU 10 and the termination processing C program when the power supply of the AC power supply 31 is shut off.

  First, the suspend process is executed, and the program counter, stack pointer, register, system data, etc. stored in the CPU 10 are saved (stored) in the suspend area 132 of the main memory 13 (step S81).

  Next, the switch 35 is turned on by the backup power ON / OFF switch switching control signal, whereby the backup power supply 32 is turned on (step S82).

  Next, the current date / time is acquired by the RTC 11, and stored in the system data area 134 of the main memory 13 (step S83). Next, the backup destination setting information is read from the backup setting information storage area of the program storage memory 12 (step S84), and the backup destination is determined based on the read backup destination setting information (step S85). When the backup destination is the hibernation memory 14 (step S85; hibernation memory), the hibernation process to the hibernation memory 14 is executed (step S86). The hibernation process in step S86 is the same as that described in the first embodiment with reference to FIGS.

  When the backup destination is the external storage 19a (step S85; external storage), hibernation processing to the external storage 19a is executed (step S87). The process of step S87 is substantially the same as that described in the first embodiment with reference to FIGS. 5 to 8 except that the process performed on the hibernation memory 14 is performed on the external storage 19a. The backup data written in the external storage 19a is saved as a file with an identifier indicating that it is backup data and a file name indicating the date and time acquired in step S83. Hereinafter, the backup data file is referred to as a backup file.

  When the hibernation process is completed, the backup power supply 32 is switched off by the switch 35 (step S88), and the termination process C is terminated. If the AC power supply 31 is in a supply state during the hibernation process, the process proceeds to a start process B (hibernation interruption restart) shown in FIG. 15a.

  Next, the activation process B will be described with reference to FIGS. 15a to 15b. This process is realized by a software process in cooperation with the CPU 10 and the startup process B program when the AC power supply 31 is in a power supply state after the end process C.

  First, steps S90 to S98 are executed. The processing in steps S90 to S98 is the same as the processing in steps S10 to S18 in FIG.

In step S99, the return data selection process shown in FIG. 16 is executed.
In the return data selection process, first, the backup destination setting information is read from the backup setting information storage area of the program storage memory 12, and the selection type setting of the backup destination is made based on the read backup destination setting information. It is determined whether or not there is (step S401). If it is determined that the selection type setting has not been made (step S401; NO), the process proceeds to step S100 in FIG. 15a. If it is determined that the selection type setting has been made (step S401; YES), the backup data is searched (step S402). Specifically, the backup data stored in the hibernation memory 14 and the backup file stored in the external storage 19a are searched.

  If one or more backup data is searched as a result of the search (step S403; YES), a list of backup data dates is displayed on the main display device 151 (step S404). When the user selects backup data to be used for system restoration from the displayed list via the input device 18 (step S405), the process proceeds to step S100 in FIG. 15a.

15a to 15b, the processes in steps S100 to S119 are the same as those in steps S100 to S119 except that the backup data selected when the backup data is selected in the return data selection process is written back to the main memory 13. Since it is the same as steps S19 to S38 in FIG.
On the other hand, when backup data is not searched in step S403 (step S403; NO), the process proceeds to step S117 in FIG. 15b, is started in the INIT state, and the process ends.

  As described above, according to the ECR 1 in the third embodiment, the user can select and set the data backup destination (save destination) when the AC power is shut down from the hibernation memory 14 or the external storage 19a. Since the hibernation process is executed for the selected backup destination, the backup data can be written to the external storage 19a removable from the ECR1. In addition, when restoring data, a list of backup data is displayed, and the user can select backup data to be used for restoration, so that the user desires not only the state immediately before the previous AC power shutdown. It becomes possible to restore the system operation state to the state before the AC power supply cutoff at the time.

In addition, the description content in the said Embodiment 1-3 is a suitable example of ECR1 which concerns on this invention, and is not limited to this.
For example, the data stored in the main memory 13 is an example and is not limited to this.
In addition, the detailed configuration and detailed operation of each device constituting the ECR 1 can be appropriately changed without departing from the spirit of the invention.

It is a block diagram which shows the function structural example of ECR in embodiment of this invention. FIG. 2 is a diagram illustrating a data storage example and a data flow of the CPU, program storage memory, main memory, and hibernation memory of FIG. 1. It is a figure which shows the principal part structural example of the power supply system of ECR of FIG. It is a flowchart which shows the completion | finish process performed by CPU of FIG. It is a flowchart which shows the hibernation process performed by CPU of FIG. 3 is a flowchart showing a write area erasing process executed by a CPU of FIG. 1. It is a flowchart which shows the write-in process performed by CPU of FIG. It is a flowchart which shows the written content guarantee process performed by CPU of FIG. It is a flowchart which shows the starting process performed by CPU of FIG. It is a flowchart which shows the starting process performed by CPU of FIG. It is a figure which shows the example of a display before and after AC power supply interruption | blocking of the main display apparatus of FIG. It is a flowchart which shows the completion | finish process B performed by CPU of FIG. It is a flowchart which shows the scheduler function execution process performed by CPU of FIG. It is a flowchart which shows the backup destination setting process performed by CPU of FIG. It is a flowchart which shows the completion | finish process C performed by CPU of FIG. It is a flowchart which shows the starting process B performed by CPU of FIG. It is a flowchart which shows the starting process B performed by CPU of FIG. It is a flowchart which shows the return data selection process performed by CPU of FIG.

Explanation of symbols

1 ECR
10 CPU
11 RTC
12 Program storage memory 13 Main memory 131 Work area for start / end processing 132 Suspend area 133 Copy area 134 System data area 135 Setting data area 136 User data area 14 Hibernation memory 141 Header area 142 Backup area 143 Checksum storage area 151 Main display device 152 Sub display device 16 LED
17 Printing device 18 Input device 19 Storage I / F
19a External storage 20 Communication unit

Claims (9)

First saving processing means for saving data indicating an operating state of the system to the volatile storage means when the main power supply is shut off;
Second save processing means for saving data indicating the operating state of the system saved in the volatile storage means by the first save processing means to the nonvolatile storage means;
Power monitoring means for monitoring the power state of the main power supply;
When the power supply monitoring unit detects that the main power supply is being supplied during the saving process by the second saving processing unit, the saving process by the second saving processing unit is interrupted, and the volatile Control means for returning the system to the state before the main power supply is shut off based on data indicating the operating state of the system saved in the storage device;
A sales data processing apparatus.   The sales data processing apparatus according to claim 1, wherein the saving processing by the second saving processing unit includes an erasing process of data stored in the nonvolatile storage unit.   The sales data processing apparatus according to claim 1, wherein the saving process by the second saving processing unit includes a writing process for writing data indicating an operation state of the system to the nonvolatile storage unit.   The evacuation process by the second evacuation processing unit is for confirming the consistency between the data to be evacuated to the nonvolatile storage unit in the volatile storage unit and the data evacuated to the nonvolatile storage unit. The sales data processing apparatus according to claim 1, comprising:   The sales data processing apparatus according to any one of claims 1 to 4, wherein the nonvolatile storage means is provided separately from a storage means for storing a program for operating the system.   The sales data processing apparatus according to any one of claims 1 to 5, further comprising notification means for notifying that the second saving processing means is processing.   The sales data processing apparatus according to claim 1, wherein a plurality of the nonvolatile storage units are provided. Connection means for connecting external storage means;
Selection means for selecting whether to save the data indicating the operating state of the system saved in the volatile storage means as the nonvolatile storage means or the external storage means connected by the connection means Prepared,
The sales data processing apparatus according to claim 1, wherein the second save processing unit saves data indicating an operation state of the system to a save destination selected by the selection unit. A computer used in a sales data processing device
First evacuation processing means for evacuating data indicating the operating state of the system to the volatile storage means when the main power supply is shut off;
Second save processing means for saving data indicating the operating state of the system saved in the volatile storage means by the first save processing means to the nonvolatile storage means;
When it is detected by the power supply monitoring means that the main power supply has been supplied during the saving process by the second saving processing means, the saving process by the second saving processing means is interrupted, and the volatility Control means for returning the system to a state before the main power supply is shut off based on data indicating the operating state of the system saved in the storage means;
Program to function as.

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