JP2010014828A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device suppressing the flicker caused by a change in parasitic capacity between a source electrode and a drain electrode, and gate electrode, and improving the operation speed of a thin-film transistor. <P>SOLUTION: The gate electrode 31 of the thin-film transistor 1 of the display device 100 is so formed as to protrude from a gate line 3, and to extend in a Y direction, when flatly viewed. A source electrode 6 and a drain electrode 7 also extend approximately parallel to each other in the same direction as the extending longitudinal direction (Y direction) of the gate electrode 31 when flatly viewed, and are disposed on the side inner than the external edge along the longitudinal direction (Y direction) of the gate electrode 31 of the region where the gate electrode 31 and the semiconductor layer 5 overlap. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display device.

  Conventionally, display devices are known (see, for example, Patent Document 1). The thin film transistor of the display device disclosed in Patent Document 1 includes a gate electrode, a semiconductor layer disposed so as to overlap with the gate electrode, and a source electrode and a drain electrode disposed so as to overlap with the gate electrode and the semiconductor layer. It is configured. The source electrode and the drain electrode of this thin film transistor are branched electrodes in which the portion in the region of the semiconductor layer is branched into a plurality, and each branched electrode extends in a direction orthogonal to the direction in which the gate electrode extends. It is comprised from the elongate shape part formed. The elongated portion of the source electrode and the elongated portion of the drain electrode are arranged in parallel, and a channel region is formed in the region of the semiconductor layer corresponding to the elongated portion.

  In Patent Document 1, the elongated portion of the source electrode and the distal end portion of the elongated portion of the drain electrode are formed so as to protrude from the semiconductor layer when seen in a plan view. As a result, even when the source electrode (drain electrode) is formed so as to be shifted in the direction in which the elongated shape portion extends in a plan view with respect to the semiconductor layer and the gate electrode, the magnitude of this shift is determined by the source electrode (drain electrode). The area of the portion where the source electrode (drain electrode) overlaps the semiconductor layer and the gate electrode when viewed in plan if the elongated shape portion of the electrode is less than the length of the portion protruding from the semiconductor layer when viewed in plan (Overlapping area) does not change. Thereby, it is possible to suppress the occurrence of flicker due to a change in parasitic capacitance between the source electrode (drain electrode) and the gate electrode. Further, even when the source electrode (drain electrode) is formed in a direction perpendicular to the direction in which the elongated portion extends as viewed in plan with respect to the semiconductor layer and the gate electrode, the source electrode (drain electrode) and the semiconductor are formed. Since the overlapping area between the layer and the gate electrode does not change, it is possible to suppress the occurrence of flicker due to the change in parasitic capacitance.

JP 2008-28404 A

  However, in the thin film transistor of the display device described in Patent Document 1, the source electrode and the drain electrode are formed so as to extend in a direction orthogonal to the direction in which the gate electrode extends (the short direction of the gate electrode). The channel width of the semiconductor layer corresponding to the region between the electrode and the drain electrode is at most the length in the short direction of the gate electrode. For this reason, since the channel width is reduced, the current drive capability is reduced correspondingly, and as a result, it is difficult to improve the operation speed.

  The present invention has been made to solve the above-described problems, and one object of the present invention is to suppress flicker caused by a change in parasitic capacitance between the source electrode, the drain electrode, and the gate electrode. At the same time, it is an object to provide a display device capable of improving the operation speed of a thin film transistor.

Means for Solving the Problems and Effects of the Invention

  A display device according to one aspect of the present invention includes a gate line including a gate electrode, a semiconductor layer formed so as to overlap with the gate electrode in plan view, and overlaps with the gate electrode and the semiconductor layer in plan view. The gate electrode is formed so as to protrude from the gate line and to extend in a predetermined direction when viewed in a plan view, and includes a source electrode and a drain electrode that are electrically connected to the semiconductor layer. The electrode and the drain electrode extend in parallel with each other in the same direction as the longitudinal direction of the gate electrode when viewed in plan, and extend along the longitudinal direction of the gate electrode in the region where the gate electrode and the semiconductor layer overlap. It arrange | positions inside an outer edge part.

  In the display device according to the one aspect, as described above, the source electrode and the drain electrode extend substantially parallel to each other in the same direction as the longitudinal direction of the gate electrode when viewed in plan, The source electrode (drain electrode) was formed slightly shifted in the X and Y directions when viewed in plan by being arranged inside the outer edge portion along the longitudinal direction of the gate electrode in the region overlapping with the semiconductor layer. Even in this case, the source electrode and the drain electrode are not formed so as to protrude from the overlapping portion of the gate electrode and the semiconductor layer, and the change in the overlapping area of the source electrode (drain electrode) and the gate electrode can be suppressed. Therefore, for example, even if the source electrode (drain electrode) is displaced from the gate electrode and the semiconductor layer, the channel width does not vary. As a result, flicker caused by a change in parasitic capacitance between the source electrode (drain electrode) and the gate electrode can be suppressed, and the writing of the switching element is not affected. Can be provided. Further, the source electrode and the drain electrode are formed so as to extend in parallel with each other in the same direction as the longitudinal direction of the gate electrode when viewed in plan, so that the source electrode and the drain electrode extend in the direction of the gate electrode. Unlike the case where it is arranged so as to extend in a direction orthogonal to the direction, the channel width corresponding to two sides extending in the longitudinal direction of the source electrode and the drain electrode on the gate electrode can be increased. The current driving capability of the thin film transistor can be increased. Thereby, the operation speed of the thin film transistor can be improved.

  In the display device according to the above aspect, the channel region formed by the source electrode and the drain electrode on the semiconductor layer is preferably provided with a source in the semiconductor layer region sandwiched between the source electrode and the drain electrode in a plan view. It is formed so as to extend substantially parallel to the longitudinal direction of the electrode and drain electrode. With this configuration, the channel width of the channel region can be increased.

  In the display device according to the above aspect, the gate electrode is preferably formed to extend in the same direction as the direction in which the gate electrode protrudes, and the source electrode and the drain electrode extend in the same direction as the direction in which the gate electrode protrudes. It is formed as follows. With this configuration, since the source electrode and the drain electrode can be formed to extend in the same direction as the direction in which the gate electrode protrudes, the channel width corresponding to the source electrode and the drain electrode on the gate electrode is increased. be able to.

  In the display device according to the above aspect, the source electrode and the drain electrode are preferably formed so as to extend in a direction substantially parallel to the signal line. With this configuration, the channel region can be formed to extend in a direction substantially parallel to the signal line.

  In the display device according to the above aspect, it is preferable that the distal end portion in the extending direction of the source electrode and the drain electrode is formed so as to protrude from the end portion of the semiconductor layer by a predetermined length when seen in a plan view. . According to this structure, in the manufacturing process of the display device, even if the source electrode and the drain electrode are shifted from the predetermined position with respect to the semiconductor layer in the Y direction, the leading ends of the source electrode and the drain electrode are not connected to the end of the semiconductor layer. Since it is formed so as to protrude by a predetermined length from the portion, it is possible to suppress fluctuations in the overlapping area of the source electrode and the drain electrode with respect to the gate electrode and the semiconductor layer. Thereby, the fluctuation of the parasitic capacitance between the source electrode (drain electrode) and the gate electrode can be suppressed, so that the occurrence of flicker can be suppressed.

  In this case, it is preferable that the front end portion in the extending direction of the source electrode and the drain electrode is disposed in the region where the gate line is formed while projecting a predetermined length from the end portion of the semiconductor layer in plan view. It may be.

  In the display device according to the above aspect, the source electrode and the drain electrode are preferably formed so as to extend from one end side to the other end side in the longitudinal direction of the gate electrode. With this configuration, the channel region can be formed so as to extend in the longitudinal direction of the gate electrode, so that the channel width can be increased accordingly.

  In the display device according to the above aspect, the drain electrode preferably includes a contact portion connected to the pixel electrode, and the contact portion is disposed in the vicinity of the gate line. With such a configuration, it is possible to suppress an increase in the length of the wiring of the drain electrode, so that a high aperture ratio can be realized.

  In the display device according to the above aspect, the length of the source electrode and the drain electrode in the short direction is preferably ½ or less of the length of the gate electrode in the short direction. If comprised in this way, even if it arranges a source electrode and a drain electrode side by side, it can suppress that a source electrode and a drain electrode protrude from a gate electrode.

  In the display device according to the above aspect, the length of the source electrode and the drain electrode in the longitudinal direction is preferably 2/3 or more of the length of the gate electrode in the longitudinal direction. With this configuration, even when the source electrode is formed from one end side in the longitudinal direction of the gate electrode and the drain electrode is formed from the other end side in the longitudinal direction of the gate electrode, the source electrode and the drain electrode face each other. Therefore, a channel region can be formed in the semiconductor layer between the source electrode and the drain electrode.

  In the display device according to the above aspect, the source electrode and the drain electrode are preferably formed to be bent or curved in a region that does not overlap the gate electrode and the semiconductor layer when seen in a plan view. According to this structure, the first elongated portion and the drain electrode of the source electrode are compared with the case where the source electrode and the drain electrode are formed to be bent or curved in a region overlapping the gate electrode and the semiconductor layer in plan view. Since the length of the portion extending in parallel with each other in the second elongated portion of the channel can be increased, the channel of the channel region formed along the portion extending in parallel with each other of the source electrode and the drain electrode The width can be increased.

  In this case, the source electrode and the drain electrode are preferably formed in a substantially L shape. If comprised in this way, it arrange | positions so that it may mutually extend on a gate electrode and a semiconductor layer as a part which the longer linear part of L shape extends as a part which mutually opposes a source electrode and a drain electrode Can do. Thereby, the channel width of the channel region formed along the portions of the source electrode and the drain electrode that extend opposite to each other can be increased.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is an overall configuration diagram of a display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a thin film transistor of the display device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view taken along line 200-200 in FIG. First, with reference to FIGS. 1-3, the structure of the display apparatus 100 by 1st Embodiment of this invention is demonstrated.

  As shown in FIG. 1, the display device 100 according to the first embodiment includes a plurality of pixels 101. Each pixel 101 is formed with a bottom gate type thin film transistor (TFT) 1.

As shown in FIGS. 2 and 3, the gate line 3 including the gate electrode 31 is provided on the glass substrate 2. As shown in FIG. 2, the gate electrode 31 is formed so as to protrude from the gate line 3 to the arrow Y1 direction side and to extend to the arrow Y1 direction side when viewed in a plan view. Further, as shown in FIG. 3, an amorphous a-Si layer 51 and n-type conductivity are formed on the gate electrode 31 so as to overlap the gate electrode 31 in a plan view via the gate insulating film 4. A semiconductor layer 5 made of an n ⁺ Si layer 52 having n is formed.

  In addition, the gate electrode 31 and the semiconductor layer 5 overlap each other in plan view, and a source electrode 6 and a drain electrode 7 that are electrically connected to each other are formed on the semiconductor layer 5. A channel region 5 a is formed in a region between the source electrode 6 and the drain electrode 7 of the semiconductor layer 5. The width of the channel region 5a in the Y direction is the channel width W1, and the length of the channel region 5a in the X direction is the channel length L1.

  As shown in FIG. 2, a signal line 8 is provided so as to intersect with the gate line 3. Here, in the first embodiment, the source electrode 6 is formed so as to overlap the gate electrode 31. The source electrode 6 is connected to the signal line 8 through a bent portion 6a. In the first embodiment, the source electrode 6 extends in parallel to each other in the same direction as the direction in which the gate electrode 31 extends (Y direction), and two sides 61 a extending in the longitudinal direction (Y direction) of the source electrode 6 and The side 61b is formed so as to overlap the gate electrode 31 on the inner side (arrow X2 direction side) of the outer edge of the region where the gate electrode 31 and the semiconductor layer 5 overlap. That is, the source electrode 6 is arranged with a gap D from the outer edge (the long side of the gate electrode 31 on the source electrode 6 side) to the inside (arrow X2 direction side) of the overlapping portion of the semiconductor layer 5 and the gate electrode 31. ing. The bent portion 6a is formed in a region that does not overlap with the gate electrode 31 and the semiconductor layer 5 in plan view.

  The source electrode 6 is formed to extend in a direction (Y direction) orthogonal to the direction (X direction) in which the gate line 3 extends, that is, in a direction substantially parallel to the signal line 8 (Y direction). ing. The source electrode 6 is formed so as to extend from the one end 31a side (arrow Y1 direction side) in the longitudinal direction (Y direction) of the gate electrode 31 to the other end 31b side (arrow Y2 direction side).

  In the first embodiment, the tip 61c in the direction in which the source electrode 6 extends (arrow Y2 direction side) is a predetermined length L2 from the end 5c of the semiconductor layer 5 in the arrow Y2 direction side when seen in a plan view. It is formed so as to protrude and extend. Further, the length L3 of the source electrode 6 in the short direction (X direction) is formed to be equal to or less than ½ of the length L4 of the gate electrode 31 in the short direction (X direction). The length L5 in the longitudinal direction (Y direction) of the source electrode 6 is formed to be 2/3 or more of the length L6 in the longitudinal direction (Y direction) of the gate electrode 31.

  Here, in the first embodiment, the drain region 52b is formed on the surface where the semiconductor layer 5 and the drain electrode 7 are in contact with each other. Note that the drain electrode 7 is a portion overlapping the gate electrode 31 in plan view. The drain electrode 7 extends in the same direction (Y direction) as the direction in which the gate electrode 31 extends (Y direction), and is located on the inner side (the arrow X1 direction side) of the outer edge portion of the region where the gate electrode 31 and the semiconductor layer 5 overlap. ), The drain electrode 7 extending in the longitudinal direction (Y direction) is formed to overlap the gate electrode 31. That is, the drain electrode 7 is arranged with a gap D from the outer edge (the long side of the gate electrode 31 on the drain electrode 7 side) to the inner side (arrow X1 direction side) of the overlapping portion of the semiconductor layer 5 and the gate electrode 31. ing. The drain electrode 7 is formed to extend in a direction (Y direction) orthogonal to the direction (X direction) in which the gate line 3 extends, that is, in a direction substantially parallel to the signal line 8 (Y direction). ing. The drain electrode 7 extends together with the source electrode 6 from the one end 31a side (arrow Y1 direction side) in the longitudinal direction (Y direction) of the gate electrode 31 to the other end 31b side (arrow Y2 direction side). Is formed.

  Further, in the first embodiment, the tip 71c in the direction in which the drain electrode 7 extends (arrow Y2 direction side) is on the arrow Y2 direction side by a predetermined length L2 from the end 5c of the semiconductor layer 5 in plan view. It is formed to project and extend. Further, the length L3 in the short direction (X direction) of the drain electrode 7 is formed to be ½ or less of the length L4 in the short direction (X direction) of the gate electrode 31. Further, the length L5 in the longitudinal direction (Y direction) of the drain electrode 7 is formed to be 2/3 or more of the length L6 in the longitudinal direction (Y direction) of the gate electrode 31. A contact portion 7b is formed on the drain electrode 7 in the direction of the arrow X2. Further, the bent portion 7a formed at 90 degrees (right angle) when viewed in a plan view is formed in a region that does not overlap with the gate electrode 31 and the semiconductor layer 5 when viewed in a plan view.

  As shown in FIG. 3, a pixel electrode 11 made of a transparent electrode is formed on the source electrode 6 and the drain electrode 7 with an insulating film 9 and an interlayer film 10 interposed therebetween. Further, the drain electrode 7 is formed with a contact portion 7b (see FIG. 2) connected to the pixel electrode 11. This contact portion 7 b is disposed in the vicinity of the gate line 3. Specifically, the contact portion 7 b is disposed on the arrow X2 direction side with respect to the gate electrode 31 of the drain electrode 7. Thus, by forming the contact portion 7b on the gate line 3 side, the effective area of the pixel region can be widened and a high aperture ratio can be realized.

  4 and 5 are views for explaining misalignment in the manufacturing process of the thin film transistor of the display device according to the first embodiment of the present invention. Next, a case where the source electrode 6 and the drain electrode 7 of the thin film transistor 1 are displaced from predetermined positions with respect to the gate electrode 31 and the semiconductor layer 5 will be described with reference to FIGS. 2, 4, and 5.

  The source electrode 6 and the drain electrode 7 indicated by the solid lines in FIG. 4 represent a case where the length is shifted by a length L7 from the predetermined position shown in FIG. 2 (the two-dot chain line in FIG. 4) in the direction of the arrow X2. When the source electrode 6 and the drain electrode 7 are shifted from the predetermined position by the length L7 relative to the gate electrode 31 and the semiconductor layer 5, the source electrode 6 and the drain electrode 7 are not shifted from the predetermined position. The overlapping area of the overlapping portion of the drain electrode 7 with respect to the gate electrode 31 and the semiconductor layer 5 does not change.

  Next, the source electrode 6 and the drain electrode 7 shown by the solid line in FIG. 5 represent a case where the length is shifted by a length L8 from the predetermined position shown in FIG. 2 (two-dot chain line in FIG. 5) in the direction of arrow Y1. Yes. When the source electrode 6 and the drain electrode 7 are shifted from the predetermined position by the length L8 in the direction of the arrow Y1 with respect to the gate electrode 31 and the semiconductor layer 5, the source electrode 6 and the drain electrode 7 are not shifted from the predetermined position. 6 and the overlapping area of the overlapping portion of the drain electrode 7 with respect to the gate electrode 31 and the semiconductor layer 5 do not change.

  In the first embodiment, as described above, the source electrode 6 and the drain electrode 7 are opposed in parallel to each other in the same direction (Y direction) as the direction in which the gate electrode 31 extends (arrow Y1 direction side) in plan view. In addition, the source electrode 6 is seen in a plan view by being disposed inside the outer edge portion along the longitudinal direction (Y direction) of the gate electrode 31 in the region where the gate electrode 31 and the semiconductor layer 5 overlap. Even when the (drain electrode 7) is formed slightly shifted in the X and Y directions, the source electrode 6 and the drain electrode 7 do not protrude from the overlapping portion of the gate electrode 31 and the semiconductor layer 5, and the source electrode 6 (drain electrode 7) and the gate electrode 31 can be prevented from changing in area, for example, the source electrode 6 (drain electrode 7) is connected to the gate electrode 31 and the gate electrode 31. It is not the channel width W1 varies even offset with respect to the semiconductor layer 5. As a result, flicker caused by a change in parasitic capacitance between the source electrode 6 (drain electrode 7) and the gate electrode 31 can be suppressed, and the writing of the switching element is not affected. A display device can be provided. In addition, the source electrode 6 and the drain electrode 7 are formed so as to extend so as to face each other in substantially the same direction as the longitudinal direction (Y direction) in which the gate electrode 31 extends when viewed in a plan view. Unlike the case where the drain electrode 7 and the drain electrode 7 are arranged so as to extend in the direction (X direction) orthogonal to the direction in which the gate electrode 31 extends (arrow Y1 direction side), each of the source electrode 6 and the drain electrode 7 on the gate electrode 31 Since the channel width W1 corresponding to the two sides 61a and 71a extending in the longitudinal direction (Y direction) can be increased, the current driving capability of the thin film transistor 1 can be increased accordingly. Thereby, the operation speed of the thin film transistor 1 can be improved.

  In the first embodiment, as described above, the channel region 5 a formed by the source electrode 6 and the drain electrode 7 on the semiconductor layer 5 is sandwiched between the source electrode 6 and the drain electrode 7 when viewed in plan. The channel width W1 of the channel region 5a can be increased by forming it in the semiconductor layer 5 region so as to extend substantially parallel to the longitudinal direction (Y direction) of the source electrode 6 and the drain electrode 7.

  In the first embodiment, as described above, the gate electrode 31 is formed so as to extend in the same direction (Y direction) as the direction in which the gate electrode 31 projects (Y direction), and the source electrode 6 and the drain electrode 7. Are formed to extend in the same direction (Y direction) as the direction in which the gate electrode 31 projects (Y direction), so that the source electrode 6 and the drain electrode 7 are the same as the direction in which the gate electrode 31 projects (Y direction). Since it can be formed to extend in the direction (Y direction), the channel width W1 corresponding to the source electrode 6 and the drain electrode 7 on the gate electrode 31 can be increased.

  In the first embodiment, as described above, the source electrode 6 and the drain region 7 are formed so as to extend in a direction substantially parallel to the signal line 8 (Y direction), whereby the channel region 5a is signaled. It can be formed to extend in a direction substantially parallel to the line 8 (Y direction).

  Further, in the first embodiment, as described above, the front end portion 61c of the source electrode 6 and the front end portion 71c of the drain region 7 are viewed from the end portion 5c of the semiconductor layer 5 by a predetermined length L2 in plan view. By forming so as to protrude, even if the source electrode 6 and the drain electrode 7 are shifted from the predetermined position with respect to the semiconductor layer 5 in the Y direction in the manufacturing process of the display device 100, the front end portion 61 c of the source electrode 6 Since the tip 71c of the drain electrode 7 extends so as to protrude from the end 5c of the semiconductor layer 5 by a predetermined length L2, the source electrode 6 and the drain electrode 7 with respect to the gate electrode 31 and the semiconductor layer 5 are formed. Variation in the overlapping area can be suppressed. Thereby, since the fluctuation | variation of the parasitic capacitance between the source electrode 6 (drain electrode 7) and the gate electrode 31 can be suppressed, generation | occurrence | production of flicker can be suppressed.

  In the first embodiment, as described above, the source electrode 6 and the drain region 7 are both formed so as to extend from the one end portion 31a side in the longitudinal direction (Y direction) of the gate electrode 31 to the other end portion 31b side. By doing so, the channel region 5a can be formed to extend in the longitudinal direction (Y direction) of the gate electrode 31, so that the channel width W1 can be increased accordingly. As a result, carrier mobility is increased, writing characteristics are improved, and a high-quality display device can be provided.

  In the first embodiment, as described above, the contact portion 7b is arranged in the vicinity of the gate line 3, thereby suppressing an increase in the length of the wiring of the drain electrode 7, and the aperture ratio of the display region. Can be suppressed. Thereby, a high-definition display device with a high aperture ratio can be provided.

  In the first embodiment, as described above, the length L3 of the source electrode 6 and the drain region 7 in the short direction (X direction) is set to the length L4 of the gate electrode 31 in the short direction (X direction). By setting it to ½ or less, even if the source electrode 6 and the drain electrode 7 are arranged side by side, the source electrode 6 and the drain electrode 7 can be prevented from protruding from the gate electrode 31.

  In the first embodiment, as described above, the length L5 in the longitudinal direction (Y direction) of the source electrode 6 and the drain region 7 is set to 2 / of the length L6 in the longitudinal direction (Y direction) of the gate electrode 31. By setting the number to 3 or more, the source electrode 6 is formed from one end portion 31a in the longitudinal direction (Y direction) of the gate electrode 31, and the drain electrode 7 is formed in the other end portion 31b in the longitudinal direction (Y direction) of the gate electrode 31. Even when formed from the side, since the source electrode 6 and the drain electrode 7 face each other, the channel region 5 a can be formed in the semiconductor layer 5 between the source electrode 6 and the drain electrode 7.

  In the first embodiment, as described above, the bent portion 6a and the bent portion 7a are formed in a region where the source electrode 6 and the drain electrode 7 do not overlap with each other when the gate electrode 31 and the semiconductor layer 5 are viewed in a plan view. As a result, the source electrode 6 and the drain electrode 7 face each other in parallel with each other as compared with the case where the source electrode 6 and the drain electrode 7 are bent in a region overlapping the gate electrode 31 and the semiconductor layer 5 in plan view. Since the length of the portion extending in the Y direction can be increased, the channel width W1 of the channel region 5a formed along the portion extending in the Y direction so as to face each other in parallel with the source electrode 6 and the drain electrode 7 is increased. Therefore, carrier mobility is increased, writing characteristics are improved, and a high-quality display device can be provided.

  In the first embodiment, as described above, by forming the source electrode 6 and the drain electrode 7 in an L shape, the gate electrode 31 and the source electrode 6 and the drain electrode 7 are formed as portions extending opposite to each other. The semiconductor layers 5 can be disposed so as to extend opposite to each other. As a result, the channel width W1 of the channel region 5a formed along the portions of the source electrode 6 and the drain electrode 7 that extend opposite to each other can be increased.

(Second Embodiment)
FIG. 6 is a plan view showing a thin film transistor of the display device according to the second embodiment of the present invention. Next, referring to FIG. 6, in the second embodiment of the present invention, unlike the first embodiment described above, the drain electrode 7 is located on the one end 31 a side in the longitudinal direction (Y direction) of the gate electrode 31 ( While extending from the arrow Y1 direction side to the other end 31b side (arrow Y2 direction side), the source electrode 6 is one end from the other end 31b side (arrow Y2 direction side) in the longitudinal direction (Y direction) of the gate electrode 31. The case where it forms so that it may extend in the part 31a side (arrow Y1 direction side) is demonstrated.

  In the second embodiment, as shown in FIG. 6, the source electrode 6 has a substantially L shape. The bent portion 6a is formed in a region where the gate electrode 31 and the semiconductor layer 5 do not overlap in plan view. The source electrode 6 extends from the other end portion 31b (arrow Y2 direction side) in the longitudinal direction (Y direction) of the gate electrode 31 to the one end portion 31a side (arrow Y1 direction side) and is a gate as viewed in plan view. It is formed so as to overlap the electrode 31 and the semiconductor layer 5. Further, the front end portion 61c in the extending direction of the source electrode 6 (arrow Y1 direction side) is projected and extended from the end portion 5c of the semiconductor layer 5 to the arrow Y1 direction side by a predetermined length L2 in plan view. Is formed.

  In addition, the other structure of 2nd Embodiment is the same as that of the said 1st Embodiment.

  In the second embodiment, when the source electrode 6 and the drain electrode 7 are shifted from the gate electrode 31 and the semiconductor layer 5 by a length larger than the protruding length L2 on the arrow Y1 direction side or the arrow Y2 direction side, In the first embodiment, the overlapping area of the source electrode 6 (drain electrode 7) and the gate electrode 31 varies in both the source electrode 6 and the drain electrode 7, while in the second embodiment, the source electrode 6 (drain electrode). 7) and the gate electrode 31 can be changed only in one of the source electrode 6 and the drain electrode 7.

  The effect of the second embodiment is the same as the effect of the first embodiment.

(Third embodiment)
FIG. 7 is a plan view illustrating a thin film transistor of a display device according to a third embodiment of the present invention. Next, referring to FIG. 7, in the third embodiment of the present invention, in the configuration of the first embodiment described above, the tip portion 61 c of the source electrode 6 and the tip portion 71 c of the drain electrode 7 of the thin film transistor 1 b are connected to the semiconductor layer. 5 will be described.

  In the third embodiment, as shown in FIG. 7, the source electrode 6 of the source electrode 6 extends from one end 31 a (arrow Y 1 direction side) in the longitudinal direction (Y direction) of the gate electrode 31 to the other end 31 b (arrow). Y2 direction side). Further, the front end portion 61 c of the source electrode 6 is disposed on the semiconductor layer 5 so as not to protrude from the end portion 5 c of the semiconductor layer 5 toward the arrow Y2 direction.

  In the third embodiment, as shown in FIG. 7, the drain electrode 7 is arranged in parallel with the source electrode 6 at one end 31 a (the arrow Y1 direction side) in the longitudinal direction (Y direction) of the gate electrode 31. ) To the other end 31b (arrow Y2 direction side). Further, the distal end portion 71 c of the drain electrode 7 is disposed on the semiconductor layer 5 so as not to protrude from the end portion 5 c of the semiconductor layer 5 toward the arrow Y2 direction side. In the third embodiment, the length L5 in the longitudinal direction (Y direction) of the source electrode 6 and the drain electrode 7 is not less than 2/3 of the length L6 in the longitudinal direction (Y direction) of the gate electrode 31. Is formed.

  In addition, the other structure of 3rd Embodiment is the same as that of the structure of 1st Embodiment mentioned above.

  8 and 9 are views for explaining misalignment in the manufacturing process of the thin film transistor of the display device according to the third embodiment of the present invention. Next, a case where the source electrode 6 and the drain electrode 7 of the thin film transistor 1b are displaced from predetermined positions with respect to the gate electrode 31 and the semiconductor layer 5 will be described with reference to FIGS.

  The source electrode 6 and the drain electrode 7 shown by the solid lines in FIG. 8 represent a case where the length is shifted by the length L9 from the predetermined position shown in FIG. 2 (two-dot chain line in FIG. 8) in the arrow X2 direction side. When the source electrode 6 and the drain electrode 7 are shifted from the predetermined position by the length L9 in the arrow X2 direction side with respect to the gate electrode 31 and the semiconductor layer 5, the source electrode 6 and the drain electrode 7 are not shifted from the predetermined position. 6 and the overlapping area of the overlapping portion of the drain electrode 7 with respect to the gate electrode 31 and the semiconductor layer 5 do not change.

  Next, the source electrode 6 and the drain electrode 7 shown by the solid lines in FIG. 9 represent a case where the length is shifted by the length L10 from the predetermined position shown in FIG. 2 (the two-dot chain line in FIG. 8) in the direction of the arrow Y1. ing. When the source electrode 6 and the drain electrode 7 are shifted from the predetermined position by the length L10 in the direction of the arrow Y1 with respect to the gate electrode 31 and the semiconductor layer 5, the source electrode 6 and the drain electrode 7 are not shifted from the predetermined position. The overlapping area of the overlapping portions of the source electrode 6 and the drain electrode 7 with respect to the gate electrode 31 and the semiconductor layer 5 is different from the length L3 of the source electrode 6 and the drain electrode 7 in the lateral direction (X direction) and the longitudinal direction (Y direction). It fluctuates by the product of the length L10 of the quantity. Also in this case, since the source electrode 6 and the drain electrode 7 are formed in an elongated shape, the variation in area can be reduced. Even when the gate electrode 31 is displaced in the length direction (Y direction), the channel width W1 varies greatly because the source electrode 6 and the drain electrode 7 are formed with a length of 2/3 or more of the gate electrode. Therefore, display quality is not adversely affected.

  In the third embodiment, the effect when the source electrode 6 and the drain electrode 7 are displaced in the X direction with respect to the gate electrode 31 and the semiconductor layer 5 is the same as the effect of the first embodiment.

(Fourth embodiment)
FIG. 10 is a plan view showing a thin film transistor of a display device according to the fourth embodiment of the present invention. Next, referring to FIG. 10, in the fourth embodiment of the present invention, in the configuration of the second embodiment described above, the distal end portion 61c of the source electrode 6 and the distal end portion 71c of the drain electrode 7 of the thin film transistor 1a are connected to the semiconductor layer. 5 will be described.

  In the fourth embodiment, as shown in FIG. 10, the source electrode 6 extends from the other end 31 b side (arrow Y 2 direction side) in the longitudinal direction (Y direction) of the gate electrode 31 to the one end 31 a side (arrow Y 1 direction). Side). Further, the front end portion 61 c of the source electrode 6 is disposed on the semiconductor layer 5 so as not to protrude from the end portion 5 c of the semiconductor layer 5 toward the arrow Y1 direction.

  Further, when the source electrode 6 and the drain electrode 7 are displaced in the X direction with respect to the gate electrode 31 and the semiconductor layer 5, the area does not change as in the second embodiment. For example, when the source electrode 6 and the drain electrode 7 are shifted from the gate electrode 31 and the semiconductor layer 5 in the direction of the arrow Y1, the length L3 of the drain electrode 7 in the short direction (X direction) and the arrow Y1 The area of the product of the length of the displacement amount on the direction side decreases and the area of the product of the length L3 of the source electrode 6 in the short direction (X direction) and the length of the displacement amount on the arrow Y1 direction side is reduced. To increase. In this case, the reduced area of the drain electrode 7 and the increased area of the source electrode 6 cancel each other. As a result, the gate electrode 31 of the source electrode 6 and the drain electrode 7 and the semiconductor layer 5 The overlapping area does not change.

  In addition, the other structure of 4th Embodiment is the same as that of the above-mentioned 2nd Embodiment.

  In the fourth embodiment, the effect when the source electrode 6 and the drain electrode 7 are shifted in the X direction with respect to the gate electrode 31 and the semiconductor layer 5 is the same as the effect of the second embodiment.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the first to fourth embodiments, the example in which the gate electrode is formed so as to protrude in the Y direction from the gate line when viewed in plan and to extend in the Y direction has been shown, but the present invention is not limited thereto. Alternatively, the gate electrode may be formed so as to protrude in the Y direction from the gate line when viewed in plan and to extend in the X direction. Then, by arranging the source electrode and the drain electrode in the same direction (X direction) as the direction in which the gate electrode on the gate electrode extends (X direction), it is possible to suppress the channel width from being reduced.

  In the first to fourth embodiments, the source electrode bent portion 6a and the drain electrode bent portion 7a are formed in a region where the source electrode, the drain electrode, the gate electrode, and the semiconductor layer do not overlap in plan view. However, the present invention is not limited to this, and as shown in FIG. 11, the source electrode and drain electrode of the thin film transistor 1 d, the gate electrode, and the semiconductor layer are disposed in a region where they do not overlap in plan view. The bending portion 6b and the bending portion 7c may be formed so that the drain electrode is bent.

It is a figure which shows the whole structure of the display apparatus by 1st Embodiment of this invention. 1 is a plan view showing a thin film transistor of a display device according to a first embodiment of the present invention. FIG. 3 is a cross-sectional view taken along line 200-200 in FIG. 2. It is a figure for demonstrating the position shift in the manufacturing process of the thin-film transistor of the display apparatus by 1st Embodiment of this invention. It is a figure for demonstrating the position shift in the manufacturing process of the thin-film transistor of the display apparatus by 1st Embodiment of this invention. It is a top view which shows the thin-film transistor of the display apparatus by 2nd Embodiment of this invention. It is a top view which shows the thin-film transistor of the display apparatus by 3rd Embodiment of this invention. It is a figure for demonstrating the position shift in the manufacturing process of the thin-film transistor of the display apparatus by 3rd Embodiment of this invention. It is a figure for demonstrating the position shift in the manufacturing process of the thin-film transistor of the display apparatus by 3rd Embodiment of this invention. It is a top view which shows the thin-film transistor of the display apparatus by 4th Embodiment of this invention. It is a top view which shows the modification of 1st Embodiment of this invention.

Explanation of symbols

1, 1a, 1b, 1c, 1d Thin film transistor 3 Gate line 5 Semiconductor layer 5c End portion 6 Source electrode 7 Drain electrode 7b Contact portion 8 Signal line 11 Pixel electrode 31 Gate electrode 31a One end portion 31b Other end portion 61c Tip portion 71c Tip Part 100 display device

Claims (12)

A gate line including a gate electrode;
A semiconductor layer formed to overlap the gate electrode in plan view;
A source electrode and a drain electrode, which are formed so as to overlap the gate electrode and the semiconductor layer in plan view and are electrically connected to the semiconductor layer, respectively;
The gate electrode is formed so as to protrude from the gate line and extend in a predetermined direction when seen in a plan view.
The source electrode and the drain electrode extend in parallel with each other in the same direction as the longitudinal direction of the gate electrode in plan view, and the gate electrode in a region where the gate electrode and the semiconductor layer overlap A display device disposed inside an outer edge portion along the longitudinal direction of the electrode.   The channel region formed by the source electrode and the drain electrode on the semiconductor layer has the source electrode and the drain electrode in the semiconductor layer region sandwiched between the source electrode and the drain electrode when seen in a plan view. The display device according to claim 1, wherein the display device is formed so as to extend substantially parallel to the longitudinal direction. The gate electrode is formed to extend in the same direction as the direction in which the gate electrode protrudes,
The display device according to claim 1, wherein the source electrode and the drain electrode are formed to extend in the same direction as a direction in which the gate electrode protrudes.   The display device according to claim 1, wherein the source electrode and the drain electrode are formed to extend in a direction substantially parallel to the signal line.   5. The front end portion in the extending direction of the source electrode and the drain electrode is formed so as to protrude a predetermined length from the end portion of the semiconductor layer in a plan view. Item 1. A display device according to item 1.   A front end portion of the source electrode and the drain electrode in the extending direction is disposed in a region where the gate line is formed while projecting a predetermined length from the end portion of the semiconductor layer in a plan view. The display device according to claim 5.   The display device according to claim 1, wherein both the source electrode and the drain electrode are formed to extend from one end side in the longitudinal direction of the gate electrode to the other end side. . The drain electrode includes a contact portion connected to the pixel electrode,
The display device according to claim 1, wherein the contact portion is disposed in the vicinity of the gate line.   9. The display device according to claim 1, wherein a length of the source electrode and the drain electrode in a short direction is not more than ½ of a length of the gate electrode in a short direction.   10. The display device according to claim 1, wherein a length in a longitudinal direction of the source electrode and the drain electrode is 2/3 or more of a length in a longitudinal direction of the gate electrode.   The said source electrode and the said drain electrode are formed so that it may be bent or curved in the area | region which does not overlap with the said gate electrode and the said semiconductor layer planarly. Display device.   The display device according to claim 11, wherein the source electrode and the drain electrode are formed in a substantially L shape.

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