JP2009537055A5

JP2009537055A5 -

Info

Publication number: JP2009537055A5
Application number: JP2009508668A
Authority: JP
Filing date: 2007-05-10
Publication date: 2010-06-03
Anticipated expiration: 2027-05-10

Claims

A method of storing data in a single memory having a plurality of analog memory cells, the method comprising:
Estimating the reachable storage capacity of each said analog memory cell;
Based on the estimated reachable volume, the storage configuration that defines the amount of data to be stored in said memory cell, the steps of assigning to each of said memory cells,
Based on the allocated memory structure, a step of storing the data in each of said memory cells,
Wherein one memory is incorporated into a single host system, the data after being used for storing in said host system, a step of re-estimating reachable storage capacity of each of the analog memory cells ,
Modifying the storage configuration in response to the re-estimated reachable capacity ;
A method characterized by comprising :

Storing the data comprises :
A step of encoding the data using one error correction code (ECC),
And converting the encoded data into an analog value selected from a set of nominal analog value,
Writing the analog value to each of the memory cells;
Consists of
Each of the storage arrangement is used to store the data, one ECC code rate and a set of one size nominal analog value, to identify the,
The method according to claim 1.

The step of storing the data for each of the analog memory cells,
And converting the data into an analog value selected from a set of nominal analog value,
A step of writing the selected analog values to the memory cell consists,
Each of the storage configuration, identifying the nominal analog value that is used to store the data into the analog memory cell,
The method according to claim 1.

Storing the data comprises :
And converting the data into an analog value,
And writing the analog value in each of the memory cells consists,
Estimating the reachable storage capacity comprises:
A step of estimating the level of the respective distortion affecting the analog value to be written in said memory cell,
Determining the reachable storage capacity in response to the level of distortion;
The method according to claim 1, characterized in that it consists of.

Estimating the distortion level comprises :
A step of reading the analog values from the memory cell,
A step of estimating the strain level on the basis of the analog value read from the memory cell,
The method according to claim 1, comprising:

Estimating the distortion level comprises :
A step of reconstructing the data from the analog value read from the memory cell,
A step of calculating the distortion levels based on the reconstructed data,
It consists method of claim 5, characterized in that.

The step of calculating the distortion level includes:
The method of claim 5, wherein said read from the memory cell comprises the step of summing the scalar function of an analog value, characterized in that.

The step of summing the scalar functions includes:
And the analog value read from the memory cell, in response to the data comprises the step of summing the squares of the differences amount between the predicted value of each of said data stored in said memory cell, and wherein the The method according to claim 7.

The step of calculating the distortion level includes:
And the analog value read from the memory cell, the number of differences worth memory cell more than one predetermined value between the predicted value of each of said data stored in said memory cell in response to the data 7. A method according to claim 6, comprising the step of counting.

Storing the data comprises :
And writing the analog value into the memory cell,
Using one iteration programming and verification (P & V) process, a step of verifying the written analog values consist,
Estimating the distortion level comprises :
Based on the analog value which has been validated by the P & V process, comprising the step of calculating the distortion level, A method according to claim 4, characterized in that.

Storing the data comprises :
And writing the analog value into the memory cell,
Using one iteration programming and verification (P & V) process to increment the analog values iteratively by one program Musuteppu, a step of verifying the written analog values consist,
The method of claim 4 wherein the storage configuration, defining one of the size of the program Musuteppu used by the iterative P & V process, characterized in that.

Storing the data comprises :
The data to be stored in said memory cells of one group, and the step of encoding by using one error correction code (ECC),
The encoded data, a step of converting an analog value to be stored in each of the analog memory cells of the first group, composed,
Estimating the reachable storage capacity comprises:
A step of reading the analog values from the memory cell in the memory cell of the first group,
Consists step of finding the analog value read, one of the distance values between the code word closest one valid ECC to said analog value,
The step of correcting the storage configuration includes:
Said storage configuration of said first group of memory cells, comprising the step of adapting in response to said determined distance values,
A method according to any of claims 1 to 4 , characterized in that

Re-estimating the reachable storage capacity comprises:
Consists step of reading the data stored in said memory cell,
The step of correcting the storage configuration includes:
In response to the detection of errors in the read data, comprising the step of adapting the storage configuration,
A method according to any of claims 1 to 4 , characterized in that

Storing the data comprises :
Consists step of encoding the data using one error correction code (ECC),
Adapting the storage configuration comprises :
Comprising the step of modifying one code rate of ECC,
The method according to claim 13.

Estimating the reachable capacity of the memory cell comprises :
A step of tracking the past programming and erase operations performed for each of the memory cells,
In response to the tracked the previous programming and erase operations, a step of estimating the reachable volume,
The method according to claim 1, comprising:

Estimating the reachable capacity comprises:
The method of claim 15, wherein in response to the length of time elapsed from past programming and erase operations, characterized by comprising the step of calculating the reachable volume.

Storing the data comprises :
A step of converting one portion at the beginning of the data to an analog value,
Writing the analog value into each of the memory cells;
Following this, a step of storing the analog value written in the memory cell by Rukoto increased without erasing the cell, one additional portion of the data to at least some of said memory cells ,
The method according to claim 1, comprising:

Storing the data comprises :
A step of encoding the data using one error correction code adding redundant bits to the data (ECC),
A step of storing the redundant bits in some of the analog memory cells consists,
The step of correcting the storage configuration includes:
Some of the redundant bits added by the ECC, comprising the step of modifying without erasing the cell,
A method according to any of claims 1 to 4 , characterized in that

The step of storing the redundant bits A method according to claim 18, characterized by comprising the step of separately storing the redundant bits to the data.

Assigning the storage configuration comprises :
Consists step of pre-defining the set of possible storage configuration,
The step of correcting the storage configuration includes:
Comprising the step of selecting an updated storage configuration from the predefined set of storage configurations ,
A method according to any of claims 1 to 4 , characterized in that

The amount of the data defined by at least one of said storage structure, the method according to any one of the preceding claims, characterized in that that identifies the number of cells per bit of one non-integers.

Storing the data comprises :
Consists step of compressing the data before writing the data to the memory cell,
The storage configuration A method according to claim 1, wherein the data defines respective compression rate that is compressed, it is characterized.

Step of assigning the storage configuration, the method according to claim 1 to said memory cells of each of the first group, characterized by comprising the step of defining the storage configuration.

Storing the data in the memory cell comprises :
A step of receiving one of the data items for storage in said memory,
A step of selecting the allocated in response to a storage configuration, one sub-group of the memory cells for storing said data item,
A step of storing the data item in one sub-set of said memory cell said selected
The method according to claim 1, comprising:

The step of re-estimating the reachable storage capacity, The method according to claim 1, characterized in that it is performed in the data is not stored, and reading Risa are not idle periods.

Step of modifying the assign to process, and the storage configuration of the storage structure, the method according to any one of claims 1 to 4, characterized in that comprising the step of storing the storage structure into one configuration table.

Before the memory is incorporated into the host system, The method according to claim 26, characterized by further comprising the step of storing the initial value of the storage configuration to the configuration table.

Step of modifying the assign to process, and the storage configuration of the storage structure, the amount of the data stored in said memory cell, one of the default margin between the reachable volume that each said estimated The method according to claim 1 , further comprising the step of maintaining

The strain, at least in part, caused by leakage current in the analog memory cell, the step of estimating the distortion, either of the preceding claims, characterized by comprising the step of estimating the leakage current The method of crab.

An interface arranged to communicate with a memory having a plurality of analog memory cells;
The estimated reachable storage capacity of each memory cell, on the basis of the estimated reachable volume, allocates a memory structure that defines the amount of data to be stored in said memory cells in each memory cell , based on the respective storage configuration in which the assigned, storing the data in said memory cell, said memory is used to store the data are incorporated into a single host system in said host system after the re-estimate each reachable storage capacity of the analog memory cells, wherein one memory signal processor arranged to modify the stored configuration in response to the re-estimated reachable volume (MSP) When,
A data storage device comprising: