JP2009524167A5 - - Google Patents
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- Publication number
- JP2009524167A5 JP2009524167A5 JP2008551563A JP2008551563A JP2009524167A5 JP 2009524167 A5 JP2009524167 A5 JP 2009524167A5 JP 2008551563 A JP2008551563 A JP 2008551563A JP 2008551563 A JP2008551563 A JP 2008551563A JP 2009524167 A5 JP2009524167 A5 JP 2009524167A5
- Authority
- JP
- Japan
- Prior art keywords
- operand
- instruction
- stage
- execution
- pipeline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012545 processing Methods 0.000 description 32
- 238000000034 method Methods 0.000 description 16
- 230000008569 process Effects 0.000 description 12
- 230000006870 function Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 7
- 238000004891 communication Methods 0.000 description 6
- 238000012360 testing method Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 238000013459 approach Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000003190 augmentative effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000001343 mnemonic effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/336,357 US9710269B2 (en) | 2006-01-20 | 2006-01-20 | Early conditional selection of an operand |
| US11/336,357 | 2006-01-20 | ||
| PCT/US2007/060814 WO2007085010A2 (en) | 2006-01-20 | 2007-01-22 | Early conditional selection of an operand |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009524167A JP2009524167A (ja) | 2009-06-25 |
| JP2009524167A5 true JP2009524167A5 (https=) | 2012-03-01 |
| JP5335440B2 JP5335440B2 (ja) | 2013-11-06 |
Family
ID=38286963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008551563A Expired - Fee Related JP5335440B2 (ja) | 2006-01-20 | 2007-01-22 | オペランドの早期の条件付き選択 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9710269B2 (https=) |
| EP (2) | EP2461246B1 (https=) |
| JP (1) | JP5335440B2 (https=) |
| KR (1) | KR100986375B1 (https=) |
| CN (1) | CN101371223B (https=) |
| WO (1) | WO2007085010A2 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107608716B (zh) | 2011-04-01 | 2020-12-15 | 英特尔公司 | 向量友好指令格式及其执行 |
| CN104011670B (zh) | 2011-12-22 | 2016-12-28 | 英特尔公司 | 用于基于向量写掩码的内容而在通用寄存器中存储两个标量常数之一的指令 |
| US9280344B2 (en) * | 2012-09-27 | 2016-03-08 | Texas Instruments Incorporated | Repeated execution of instruction with field indicating trigger event, additional instruction, or trigger signal destination |
| KR101711388B1 (ko) | 2013-01-28 | 2017-03-02 | 삼성전자주식회사 | 파이프라인에서 블럭을 스케줄하는 컴파일 방법 및 장치 |
| US10592252B2 (en) | 2015-12-31 | 2020-03-17 | Microsoft Technology Licensing, Llc | Efficient instruction processing for sparse data |
| US10459727B2 (en) | 2015-12-31 | 2019-10-29 | Microsoft Technology Licensing, Llc | Loop code processor optimizations |
| US11385897B2 (en) * | 2019-10-01 | 2022-07-12 | Marvell Asia Pte, Ltd. | Merge execution unit for microinstructions |
| US12430127B1 (en) | 2024-03-27 | 2025-09-30 | International Business Machines Corporation | Vector test decimal instruction for validity testing |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5150469A (en) | 1988-12-12 | 1992-09-22 | Digital Equipment Corporation | System and method for processor pipeline control by selective signal deassertion |
| GB2228597A (en) | 1989-02-27 | 1990-08-29 | Ibm | Data processor with conditional instructions |
| JP3082944B2 (ja) | 1990-12-20 | 2000-09-04 | 富士通株式会社 | パイプライン処理装置 |
| GB2291515B (en) | 1994-07-14 | 1998-11-18 | Advanced Risc Mach Ltd | Data processing using multiply-accumulate instructions |
| US5699537A (en) * | 1995-12-22 | 1997-12-16 | Intel Corporation | Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions |
| GB2317466B (en) | 1996-09-23 | 2000-11-08 | Advanced Risc Mach Ltd | Data processing condition code flags |
| TW325552B (en) | 1996-09-23 | 1998-01-21 | Advanced Risc Mach Ltd | Data processing condition code flags |
| GB2317464A (en) | 1996-09-23 | 1998-03-25 | Advanced Risc Mach Ltd | Register addressing in a data processing apparatus |
| TW343318B (en) | 1996-09-23 | 1998-10-21 | Advanced Risc Mach Ltd | Register addressing in a data processing apparatus |
| US6173393B1 (en) | 1998-03-31 | 2001-01-09 | Intel Corporation | System for writing select non-contiguous bytes of data with single instruction having operand identifying byte mask corresponding to respective blocks of packed data |
| JP2000020309A (ja) | 1998-06-30 | 2000-01-21 | Toshiba Microelectronics Corp | デジタルシグナルプロセッサ |
| JP2001051845A (ja) | 1999-08-12 | 2001-02-23 | Hitachi Ltd | アウトオブオーダー実行方式 |
| US6633971B2 (en) * | 1999-10-01 | 2003-10-14 | Hitachi, Ltd. | Mechanism for forward data in a processor pipeline using a single pipefile connected to the pipeline |
| US20050188182A1 (en) * | 1999-12-30 | 2005-08-25 | Texas Instruments Incorporated | Microprocessor having a set of byte intermingling instructions |
| US6604192B1 (en) | 2000-01-24 | 2003-08-05 | Hewlett-Packard Development Company, L.P. | System and method for utilizing instruction attributes to detect data hazards |
| JP2001216275A (ja) | 2000-02-01 | 2001-08-10 | Sony Corp | 画像処理装置および画像処理方法 |
| EP1340142A2 (en) | 2000-11-27 | 2003-09-03 | Koninklijke Philips Electronics N.V. | Data processing apparatus with many-operand instruction |
| JP4220722B2 (ja) | 2001-05-02 | 2009-02-04 | パイオニア株式会社 | 情報記録媒体および情報読取装置 |
| US7028171B2 (en) * | 2002-03-28 | 2006-04-11 | Intel Corporation | Multi-way select instructions using accumulated condition codes |
| JP2004062401A (ja) | 2002-07-26 | 2004-02-26 | Matsushita Electric Ind Co Ltd | 演算プロセッサおよび当該演算プロセッサを用いたカメラ装置 |
| US6944747B2 (en) * | 2002-12-09 | 2005-09-13 | Gemtech Systems, Llc | Apparatus and method for matrix data processing |
| US7636837B2 (en) * | 2003-05-28 | 2009-12-22 | Fujitsu Limited | Apparatus and method for controlling instructions at time of failure of branch prediction |
| GB2409063B (en) | 2003-12-09 | 2006-07-12 | Advanced Risc Mach Ltd | Vector by scalar operations |
-
2006
- 2006-01-20 US US11/336,357 patent/US9710269B2/en not_active Expired - Fee Related
-
2007
- 2007-01-22 CN CN200780002416.5A patent/CN101371223B/zh not_active Expired - Fee Related
- 2007-01-22 KR KR1020087020385A patent/KR100986375B1/ko not_active Expired - Fee Related
- 2007-01-22 WO PCT/US2007/060814 patent/WO2007085010A2/en not_active Ceased
- 2007-01-22 EP EP11196175.1A patent/EP2461246B1/en not_active Not-in-force
- 2007-01-22 EP EP07717333A patent/EP1974254B1/en not_active Not-in-force
- 2007-01-22 JP JP2008551563A patent/JP5335440B2/ja not_active Expired - Fee Related
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