JP2009510910A5 - - Google Patents

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Publication number
JP2009510910A5
JP2009510910A5 JP2008533422A JP2008533422A JP2009510910A5 JP 2009510910 A5 JP2009510910 A5 JP 2009510910A5 JP 2008533422 A JP2008533422 A JP 2008533422A JP 2008533422 A JP2008533422 A JP 2008533422A JP 2009510910 A5 JP2009510910 A5 JP 2009510910A5
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JP
Japan
Prior art keywords
sample
hold
pixels
array
sent
Prior art date
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Application number
JP2008533422A
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English (en)
Japanese (ja)
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JP4770926B2 (ja
JP2009510910A (ja
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Publication date
Priority claimed from US11/240,746 external-priority patent/US7465934B2/en
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Publication of JP2009510910A publication Critical patent/JP2009510910A/ja
Publication of JP2009510910A5 publication Critical patent/JP2009510910A5/ja
Application granted granted Critical
Publication of JP4770926B2 publication Critical patent/JP4770926B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008533422A 2005-09-30 2006-09-18 Cmosイメージセンサの出力ルーティング構造 Active JP4770926B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/240,746 2005-09-30
US11/240,746 US7465934B2 (en) 2005-09-30 2005-09-30 Pixel array output routing structure for multi-channel CMOS imager sensors
PCT/US2006/036252 WO2007040965A1 (en) 2005-09-30 2006-09-18 Output routing structure for cmos image sensors

Publications (3)

Publication Number Publication Date
JP2009510910A JP2009510910A (ja) 2009-03-12
JP2009510910A5 true JP2009510910A5 (https=) 2009-06-04
JP4770926B2 JP4770926B2 (ja) 2011-09-14

Family

ID=37632496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008533422A Active JP4770926B2 (ja) 2005-09-30 2006-09-18 Cmosイメージセンサの出力ルーティング構造

Country Status (7)

Country Link
US (1) US7465934B2 (https=)
EP (1) EP1929789B1 (https=)
JP (1) JP4770926B2 (https=)
KR (1) KR101293385B1 (https=)
CN (1) CN101273642B (https=)
TW (1) TWI379597B (https=)
WO (1) WO2007040965A1 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7593050B2 (en) * 2006-02-27 2009-09-22 Eastman Kodak Company Delay management circuit for reading out large S/H arrays
US8977578B1 (en) 2012-06-27 2015-03-10 Hrl Laboratories, Llc Synaptic time multiplexing neuromorphic network that forms subsets of connections during different time slots
TWI497997B (zh) * 2013-05-17 2015-08-21 Novatek Microelectronics Corp 影像感測器
FR3091115B1 (fr) * 2018-12-21 2021-02-19 Trixell Détecteur matriciel à regroupement rapide
WO2020215050A1 (en) 2019-04-19 2020-10-22 Arizona Board Of Regents On Behalf Of The University Of Arizona All-in-focus imager and associated method
WO2020215046A1 (en) * 2019-04-19 2020-10-22 Arizona Board Of Regents On Behalf Of The University Of Arizona On-chip signal processing method and pixel-array sensor
US11428792B2 (en) 2020-06-08 2022-08-30 Stmicroelectronics (Research & Development) Limited Routing for DTOF sensors

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3432051B2 (ja) 1995-08-02 2003-07-28 キヤノン株式会社 光電変換装置
US6606122B1 (en) * 1997-09-29 2003-08-12 California Institute Of Technology Single chip camera active pixel sensor
JP3150098B2 (ja) * 1998-01-05 2001-03-26 日本電気アイシーマイコンシステム株式会社 液晶駆動装置
US6721008B2 (en) * 1998-01-22 2004-04-13 Eastman Kodak Company Integrated CMOS active pixel digital camera
US7098952B2 (en) * 1998-04-16 2006-08-29 Intel Corporation Imager having multiple storage locations for each pixel sensor
US6466265B1 (en) * 1998-06-22 2002-10-15 Eastman Kodak Company Parallel output architectures for CMOS active pixel sensors
US7068319B2 (en) * 2002-02-01 2006-06-27 Micron Technology, Inc. CMOS image sensor with a low-power architecture
US20030183829A1 (en) 2002-03-27 2003-10-02 Matsushita Electric Industrial Co., Ltd. Solid-state imaging device and camera
JP2003284086A (ja) * 2002-03-27 2003-10-03 Matsushita Electric Ind Co Ltd 固体撮像装置およびカメラ
US7619669B2 (en) * 2003-12-29 2009-11-17 Micron Technologies, Inc. Power savings with multiple readout circuits

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