JP2009284689A - Overvoltage protecting circuit and electronic apparatus using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a rush-in current from flowing through an overvoltage protecting circuit. <P>SOLUTION: The overvoltage protecting circuit includes an external input terminal and an external output terminal, and when an input voltage supplied to the external input terminal exceeds a predetermined threshold voltage, turns off switch transistors of the external input terminal and the external output terminal. A charge pump circuit 10 boosts an input voltage Vdc, and outputs it to the gate of the switch transistor. A soft start resistor R20 is provided on a route that runs from a second input terminal Pi2 to an output capacitor Co, taking a detour around flying capacitors Cf1 and Cf2. A bypass switch SW20 is provided parallel to the soft start resistor R20. Prior to start of boosting operation, it turns on switches SW1, SW4, and SW7 for a predetermined period, and turns off the bypass switch SW20. Then, it turns on the bypass switch SW20 to start operation of a charge pump. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an overvoltage protection circuit.

An overvoltage protection circuit is used to protect the circuit from overvoltage. There are various types of overvoltage protection circuits. For example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is provided as a switch element between a terminal (input terminal) where overvoltage can occur and the circuit to be protected. A type of turning off the switching element when the voltage exceeds a threshold value is known.
JP 2007-37370 A JP 2007-74840 A JP 2007-181347 A JP 2003-244940 A

  In the overvoltage protection circuit of the above type, if the switch element is suddenly switched from off to on, an inrush current may flow through the circuit to be protected.

  The present invention has been made in view of such a problem, and an object thereof is to provide an overvoltage protection circuit having an inrush current prevention function.

  An aspect of the present invention has an external input terminal and an external output terminal, and when the input voltage input to the external input terminal exceeds a predetermined threshold voltage, the external input terminal and the external output terminal are disconnected. The present invention relates to an overvoltage protection circuit. This overvoltage protection circuit includes an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) switch transistor provided between an external input terminal and an external output terminal, and a charge pump that boosts the input voltage and outputs it to the gate of the switch transistor. A circuit, and an overvoltage monitoring unit that compares the input voltage with a threshold voltage and instructs the charge pump circuit to perform a boost operation when the input voltage is lower than the threshold voltage. The charge pump circuit generates at least one flying capacitor, an output capacitor, a plurality of switches connecting the flying capacitor and the output capacitor, and a plurality of control signals for controlling on / off of the plurality of switches, and outputs the control signal to the output capacitor. A control unit for level-shifting a plurality of control signals using the generated output voltage of the charge pump circuit and outputting the level to a plurality of switches, and a path extending from the input terminal of the charge pump circuit to the output capacitor without passing through the flying capacitor And a bypass switch provided in parallel with the impedance element and controlled by the control unit. Prior to the start of the boosting operation of the charge pump circuit, the control unit predetermines all of the switches provided in series on the path from the input terminal of the charge pump circuit to the output capacitor without passing through the flying capacitor. While the time is on, the bypass switch is turned off, and after a predetermined time has elapsed, the bypass switch is turned on and on / off switching of a plurality of switches is started.

  According to this aspect, the output capacitor is charged by the input voltage applied to the external input terminal for a predetermined time, and the output voltage of the charge pump circuit rises to near the input voltage. After that, by starting the switching operation of each switch by the control circuit, the charge pump circuit can be reliably started even in a reduced voltage state where the input voltage is low. The output capacitor is charged via the impedance element for a predetermined time. Therefore, the gate voltage of the switch transistor rises gently, and the switch transistor can be gradually switched from the off state to the on state, and the inrush current can be suppressed.

  The impedance element may be provided on the most output capacitor side on the path from the input terminal of the charge pump circuit to the output capacitor without passing through the flying capacitor. The bypass switch may be a P-channel MOSFET. The control unit may include a level shift circuit that shifts the level of the bypass control signal using the potential of the terminal on the high potential side of the impedance element and outputs it to the gate of the bypass switch.

  The charge pump circuit may perform a boosting operation using the gate capacitance of the switch transistor as an output capacitor.

All the switches provided in series on the path from the input terminal of the charge pump circuit to the output capacitor without passing through the flying capacitor may be constituted by P-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).
In this case, since it is only necessary to apply the ground voltage as a low level to the gates of all MOSFETs at the time of activation, the activation can be performed more reliably.

  Another embodiment of the present invention is also an overvoltage protection circuit. This overvoltage protection circuit has an external input terminal and an external output terminal. When the input voltage input to the external input terminal exceeds a predetermined threshold voltage, the overvoltage that shuts off the external input terminal and the external output terminal A protection circuit, an N channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) switch transistor provided between an external input terminal and an external output terminal, and a charge pump that boosts the input voltage and outputs it to the gate of the switch transistor A circuit, and an overvoltage monitoring unit that compares the input voltage with a threshold voltage and instructs the charge pump circuit to perform a boost operation when the input voltage is lower than the threshold voltage. The charge pump circuit includes a plurality of input terminals, an output terminal that outputs a boosted output voltage, n (n is a natural number) flying capacitors, a first terminal connected to the output terminal, and a second terminal fixed. An output capacitor connected to the voltage terminal, a first series switch provided between any one of the input terminals and the first terminal of the first flying capacitor, and i (i is an integer of 2 ≦ i ≦ n) th (N-1) second to n-th series switches provided between the first terminal of the flying capacitor and the first terminal of the (i-1) th flying capacitor, the first terminal of the output capacitor, , A (n + 1) th series switch provided between the first terminals of the nth flying capacitor and a second terminal of the corresponding flying capacitor provided for each of the flying capacitors. First to n-th input switches provided between the terminals, first to n-th ground switches provided for each flying capacitor and provided between the second terminal and the fixed voltage terminal of the corresponding flying capacitor, A control unit that generates a control signal for controlling on / off of the series switch, the input switch, and the ground switch, shifts the level of the control signal using the output voltage of the charge pump circuit generated in the output capacitor, and outputs the control signal to each switch And an impedance element provided on a path formed by the series switch, and a bypass switch provided in parallel with the impedance element and controlled by the control unit. Prior to the start of the boosting operation of the charge pump circuit, the controller turns on the series switch for a predetermined time and turns off the bypass switch, and turns on the bypass switch after the lapse of the predetermined time, and turns on the series switch, the input switch, and the ground switch. Start on-off switching.

According to this aspect, the output capacitor is charged by the input voltage applied to the input terminal for a predetermined time, and the output voltage of the charge pump circuit rises to near the input voltage. Thereafter, the switching operation of each switch is started by the control circuit, so that it can be surely started.
Further, the output capacitor is charged via the impedance element for a predetermined time. Therefore, the gate voltage of the switch transistor rises gently, and the switch transistor can be gradually switched from the off state to the on state, and the inrush current can be suppressed.

  The series switch may be composed of a P-channel MOSFET. In this case, since it is only necessary to apply the ground voltage as a low level to the gates of all MOSFETs at the time of activation, the activation can be performed more reliably.

  The overvoltage protection circuit may further include a clamp circuit that is provided before the charge pump circuit and clamps the input voltage below a predetermined clamp voltage. The charge pump circuit may include first and second input terminals, and may receive an input voltage at the first input terminal and an output voltage of the clamp circuit at the second input terminal.

  The first series switch may be an N-channel MOSFET, and may be provided between the first input terminal and the first terminal of the first flying capacitor.

  The overvoltage protection circuit may be integrated on a single semiconductor substrate. “Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate.

  Yet another embodiment of the present invention is an electronic device. This electronic device has a connector that can be attached and detached from an external power source, a secondary battery, an overvoltage protection circuit in which the connector is connected to an external input terminal, and charging that uses the output voltage of the overvoltage protection circuit to charge the secondary battery. A circuit.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, etc. are also effective as an aspect of the present invention.

  According to the present invention, the charge pump circuit can be reliably started in a reduced voltage state, and an inrush current can be prevented.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

  In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are physically directly connected, or the member A and the member B are in an electrically connected state. Including the case of being indirectly connected through other members that do not affect the above. Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as an electrical condition. It includes the case of being indirectly connected through another member that does not affect the connection state.

  FIG. 1 is a block diagram illustrating a configuration of an electronic device 1000 that includes an overvoltage protection circuit 100 according to an embodiment. The electronic device 1000 is a battery-driven information terminal device such as a mobile phone terminal, PDA, or notebook PC. Electronic device 1000 includes overvoltage protection circuit 100, charging circuit 112, and battery 114. In addition, the electronic device 1000 includes a CPU (Central Processing Unit), a DSP (Digital Signal Processor), a digital circuit including a liquid crystal panel, and an analog circuit, which are omitted here.

  The battery 114 is a secondary battery such as a lithium ion or NiCd (nickel cadmium) battery, and the battery voltage Vbat is supplied to other circuit blocks of the electronic device 1000.

  The electronic device 1000 includes a connector 202 to which the external power supply 110 can be attached and detached. The external power source 110 is an emergency power source using, for example, an AC adapter that converts a commercial AC voltage into a DC voltage, a DC / DC converter that steps down a voltage of an in-vehicle battery, a USB power source, or a dry battery. The external power supply 110 supplies a DC power supply voltage Vdc to the battery 114.

  The overvoltage protection circuit 100 includes an external input terminal 102, an external output terminal 104, a switch transistor M1, an overvoltage monitoring unit 20, a charge pump circuit 10, and a clamp circuit 40, and is integrated on a single semiconductor substrate. When the input voltage Vdc is greater than a predetermined overvoltage threshold voltage Vovp, the overvoltage protection circuit 100 cuts off the connection between the external output terminal 104 and the external input terminal 102 and supplies voltage to the charging circuit 112 that is a load to be protected. Stop.

  The switch transistor M1 is an N-channel MOSFET and is provided between the external input terminal 102 and the external output terminal 104. Here, for convenience, the terminal on the external output terminal 104 side of the switch transistor M1 is referred to as a source, and the terminal on the external input terminal 102 side is referred to as a drain. The back gate of the switch transistor M1 is connected to the source. In order to turn on the switch transistor M1, the gate-source voltage needs to be higher than the on / off threshold voltage Vt of the MOSFET. Since Vout≈Vdc when the switch transistor M1 is fully turned on, it is necessary to apply a voltage higher than Vdc + Vt to the gate of the switch transistor M1.

  The charge pump circuit 10 generates a gate voltage Vg necessary for turning on the switch transistor M1. A clamp circuit 40 is provided in the previous stage of the charge pump circuit 10.

  The clamp circuit 40 clamps the input voltage Vdc below a predetermined clamp voltage Vcl. The configuration of the clamp circuit is not particularly limited. Hereinafter, the output voltage of the clamp circuit 40 is referred to as a clamp output voltage Vdc2.

  The clamp voltage Vcl is set lower than (α−1) × Vgst, where Vgst is the gate-source breakdown voltage of the switch transistor M1 and α is the step-up rate of the charge pump circuit 10.

The charge pump circuit 10 boosts the output voltage Vdc2 of the clamp circuit 40 and outputs it to the gate of the switch transistor M1. The step-up rate α of the charge pump circuit 10 is set so that the switch transistor M1 is fully turned on. The condition that the switch transistor M1 is fully turned on is that the threshold voltage Vt between the gate and source of the switch transistor M1 is used.
α × Vdc2−Vdc ≧ Vt
It is. If approximated to Vdc2≈Vdc,
α ≧ Vt / Vdc + 1
Get. For example, when the input voltage Vdc is input at 5 V or more with respect to Vt = 5 V, a charge pump circuit of a double boosting rate or a 2-input addition type may be used. However, the boosting rate of the charge pump circuit 10 is arbitrary, and the boosting rate may be switched.

  The charge pump circuit 10 may perform a boost operation using the gate capacitance of the switch transistor M1 as an output capacitor Co.

  The overvoltage monitoring unit 20 compares the input voltage Vdc with a predetermined overvoltage threshold voltage Vovp, and outputs a control signal S1 according to the comparison result. The overvoltage monitoring unit 20 instructs the charge pump circuit 10 to perform a boosting operation when the input voltage Vdc is lower than the overvoltage threshold voltage Vovp. Conversely, when the input voltage Vdc is higher than the overvoltage threshold voltage Vovp, the charge pump circuit 10 is instructed to stop the boosting operation.

  The above is the configuration of the overvoltage protection circuit 100. When the switch transistor M1 of the overvoltage protection circuit 100 switches suddenly from off to on, an inrush current flows from the external power supply 110 to the charging circuit 112. In order to solve this problem, the charge pump circuit 10 has a soft start function that gently increases its output voltage, that is, the gate voltage of the switch transistor M1.

  Hereinafter, a specific configuration of the charge pump circuit 10 will be described. FIG. 2 is a circuit diagram showing a configuration of the charge pump circuit 10. In the following, a case where the boosting rate of the charge pump circuit 10 is 3 times will be described for easy understanding, but the present invention can be applied to any boosting rate.

  The charge pump circuit 10 includes a first input terminal Pi1, a second input terminal Pi2, and an output terminal Po. The first input voltage Vi1 and the second input voltage Vi2 input to the first input terminal Pi1 and the second input terminal Pi2. And the output voltage Vo is output from the output terminal Po. The gate of the switch transistor M1 in FIG. 1 is connected to the output terminal Po.

  The charge pump circuit 10 includes a first flying capacitor Cf1, a second flying capacitor Cf2, an output capacitor Co, a first switch SW1 to a seventh switch SW7, a control unit 12, a soft start resistor R20, and a bypass switch SW20.

The output capacitor Co has a first terminal (A) connected to the output terminal Po, and a second terminal (B) connected to a ground terminal which is a fixed voltage terminal.
The first switch SW1 is provided between one of the first input terminal Pi1 and the second input terminal Pi2 and the first terminal (A) of the first flying capacitor Cf1. In FIG. 2, the first switch SW1 is connected to the second input terminal Pi2.

  The second switch SW2 is provided between the second terminal (B) of the first flying capacitor Cf1 and the ground terminal. The third switch SW3 is provided between the second terminal (B) of the first flying capacitor Cf1 and any one of the first input terminal Pi1 and the second input terminal Pi2. In FIG. 2, the third switch SW3 is connected to the first input terminal Pi1.

  The fourth switch SW4 is provided between the first terminal (A) of the first flying capacitor Cf1 and the first terminal (A) of the second flying capacitor Cf2. The fifth switch SW5 is provided between the second terminal (B) of the second flying capacitor Cf2 and the ground terminal. The sixth switch SW6 is provided between the second terminal (B) of the second flying capacitor Cf2 and any one of the first input terminal Pi1 and the second input terminal Pi2. In FIG. 2, the sixth switch SW6 is connected to the second input terminal Pi2. The seventh switch SW7 is provided between the first terminal (A) of the second flying capacitor Cf2 and the output terminal Po.

  The control unit 12 generates control signals S1 to S7 that control ON / OFF of the first switch SW1 to the seventh switch SW7. Further, the output voltage Vo of the charge pump circuit 10 generated in the output capacitor Co is used to shift the level of the control signal and output it to the switches SW1 to SW7.

  The controller 12 repeats the first phase φ1 and the second phase φ2 alternately. In the first phase φ1, the first switch SW1, the second switch SW2, the sixth switch SW6, and the seventh switch SW7 are turned on, and the others are turned off. In the second phase φ2, the third switch SW3, the fourth switch SW4, and the fifth switch SW5 are turned on. The controller 12 generates an output voltage Vo obtained by boosting the input voltages Vi1 and Vi2 by alternately repeating the first phase φ1 and the second phase φ2.

  In the first phase φ1, when the first switch SW1 and the second switch SW2 are turned on, the first flying capacitor Cf1 is charged with the second input voltage Vi2. In the subsequent second phase φ2, when the third switch SW3 is turned on, the potential of the first terminal (A) of the first flying capacitor Cf1 becomes Vi1 + Vi2. At this time, since the fourth switch SW4 and the fifth switch SW5 are on, the second flying capacitor Cf2 is charged by the voltage (Vi1 + Vi2) at the first terminal (A) point of the first flying capacitor Cf1.

  Subsequently, in the first phase φ1, when the sixth switch SW6 is turned on, the potential of the first terminal (A) of the second flying capacitor Cf2 becomes Vi2 + (Vi1 + Vi2). At this time, when the seventh switch SW7 is turned on, the output capacitor Co is charged with the potential of the first terminal (A) of the second flying capacitor Cf2, and a voltage of output voltage Vo = Vi1 + 2 × Vi2 is generated.

  Note that when Vi1 = Vi2, that is, when the first input terminal Pi1 and the second input terminal Pi2 are connected in common, the charge pump circuit 10 of FIG.

  The soft start resistor R20 is provided on a path (also referred to as a series path) from the second input terminal Pi2 of the charge pump circuit 10 to the output capacitor Co without passing through the flying capacitors Cf1 and Cf2. For example, the resistance value of the soft start resistor R20 is set in a range of several hundred kΩ to several MΩ. The charging speed of the output capacitor Co can be adjusted by this resistance value. In FIG. 2, the soft start resistor R20 is provided closest to the output capacitor Co on the series path. However, the position of the soft start resistor R20 is not limited to this, and may be provided anywhere on the series path. The soft start resistor R20 can be replaced with an element other than a resistor having a significant resistance component.

  The bypass switch SW20 is a P-channel MOSFET, and is provided in parallel with the soft start resistor R20. The bypass switch SW20 is turned on / off by a bypass control signal S20 generated by the control unit 12.

  The control unit 12 includes an oscillator 13, a counter 14, a control signal generation unit 15, a first level shift circuit 16, and a second level shift circuit 18. The oscillator 13 generates a clock signal CK having a predetermined frequency. Based on the clock signal CK, the control unit 12 generates the control signals S1 to S7 so as to repeat the first phase φ1 and the second phase φ2. The control signals S1 to S7 are signals for instructing on / off of the first switch SW1 to the seventh switch SW7.

  The control signal generation unit 15 adjusts the timing of the positive edge or the negative edge of the control signals S1 to S7 so that the switch group that is turned on in the first phase φ1 and the switch group that is turned on in the second phase φ2 are not turned on at the same time. A dead time is set when all the switches are turned off.

  The oscillator 13, the counter 14, and the control signal generator 15 operate using the input voltage Vi1 or Vi2 supplied to the charge pump circuit 10 as the power supply voltage Vdd. The output signal of the control signal generator 15 swings between the power supply voltage Vdd and the ground voltage 0V.

  The first level shift circuit 16 receives the output voltage Vo generated at the output terminal Po, and level-shifts the control signals S1 to S7 using the output voltage Vo. The control signals S1 to S7 are level-shifted to an appropriate voltage level according to the supplied switch. Control signals output from the first level shift circuit 16 are denoted as S1 'to S7'.

  The control signal generator 15 generates a bypass control signal S20 that is at a low level during a period in which the bypass switch SW20 is to be turned on and is at a high level during a period in which the bypass switch SW20 is to be turned off. The second level shift circuit 18 shifts the high level of the bypass control signal S20 using the potential of the high potential side terminal of the soft start resistor R20. The level-shifted bypass control signal S20 'is input to the gate of the bypass switch SW20.

  Prior to the start of the boosting operation of the charge pump circuit 10, the controller 12 turns on the first switch SW1, the fourth switch SW4, and the seventh switch SW7 for a predetermined time τ. The first switch SW1, the fourth switch SW4, and the seventh switch SW7 are arranged on a series path extending from the second input terminal Pi2 to the first terminal (A) (output terminal Po) of the output capacitor Co without passing through the flying capacitor Cf. All switches provided in series. The first switch SW1, the fourth switch SW4, and the seventh switch SW7 that are turned on at startup are P-channel MOSFETs. According to this configuration, all the control signals S1 ', S4', and S7 'need only be fixed at a low level (ground level) at the time of activation, so that the circuit configuration can be simplified.

  The second switch SW2 and the fifth switch SW5 are N-channel MOSFETs. In FIG. 2, the third switch SW3 is an N-channel MOSFET, and the sixth switch SW6 is a P-channel MOSFET. However, for these two, either the P-channel or the N-channel may be used.

  The counter 14 receives an activation signal S10 that instructs activation. When the activation is instructed, the counter 14 counts a predetermined time τ using the clock signal CK. The counter 14 generates a timer signal S12 indicating that the predetermined time τ has elapsed. The control signal generator 15 receives the timer signal S12, and fixes the first switch SW1, the fourth switch SW4, and the seventh switch SW7 to be on and fixes the other switches to be off before the predetermined time τ has elapsed.

  Further, the controller 12 sets the bypass control signal S20 to the high level for a predetermined time τ to turn off the bypass switch SW20.

  During a predetermined time τ, the output capacitor Co is charged via the first switch SW1, the fourth switch SW4, the seventh switch SW7 and the soft start resistor R20, and the potential of the first terminal (A) of the output capacitor Co is moderate. To the vicinity of the first input voltage Vi1.

  After the elapse of the predetermined time τ, the control unit 12 sets the bypass control signal S20 to a low level to turn on the bypass switch SW20, and on / off switching of the plurality of switches SW1 to SW7, specifically, the first phase φ1 and the second phase described above. The step-up operation is started by alternately repeating φ2.

FIG. 3 is a time chart showing an operation state of the charge pump circuit 10 of FIG.
When the charge pump circuit 10 is instructed to start at time t0, the first switch SW1, the fourth switch SW4, and the seventh switch SW7 are turned on, and the bypass switch SW20 is turned off. This state is shown as the initialization phase φ0. By the initialization phase φ0, the output voltage Vo rises to near Vi2. The rising speed at this time is determined by the resistance value of the soft start resistor R20 and the capacitance value of the output capacitor Co.

  When the timer signal S12 becomes a high level at a time t1 after the elapse of a predetermined time τ from the start of the start, the control signal generator 15 sets the bypass control signal S20 to a low level and fully turns on the bypass switch SW20, and the first phase φ1 And the second phase φ2 are alternately repeated. As a result, the output voltage Vo increases.

  In order to clarify the effect of the charge pump circuit 10 of FIG. 2, the operation when the initialization phase φ0 is not provided will be described. When the initialization phase φ0 is not provided, in the first phase φ1, the first switch SW1 and the seventh switch SW7 are turned on, and the fourth switch SW4 is turned off. That is, the output capacitor Co is charged via the first switch SW1, the body diode (not shown) of the fourth switch SW4, and the seventh switch SW7. That is, Vo = Vi2−Vf. Vf is the forward voltage of the body diode.

  The first level shift circuit 16 generates the control signals S1 'to S7' using the output voltage Vo. That is, the control signals S1 'to S7' output from the first level shift circuit 16 swing with the voltage Vo as the upper limit. Therefore, in the reduced voltage state where the input voltage Vi2 is low, the output voltage Vo is also low, and therefore the first switch SW1 to the seventh switch SW7 may not be properly turned on / off in the subsequent second phase φ2. .

  In contrast, the charge pump circuit 10 of FIG. 2 raises the output voltage Vo to the input voltage Vi2 in order to turn on the first switch SW1, the fourth switch SW4, and the seventh switch SW7 in the initialization phase φ0. Can do. When the initialization phase φ0 is not provided and the charge pump circuit 10 can be started up with Vi2> Vth1, the charge pump circuit 10 of FIG. 2 is provided with a voltage range of Vi2> Vth1−Vf by providing the initialization phase φ0. Can start the circuit. In other words, it can be activated in a wider voltage range than in the past.

  The charge pump circuit 10 may include a clamp circuit 40 in the previous stage. The clamp circuit 40 clamps the input voltage Vdc below a predetermined clamp voltage Vcl. For example, the clamp circuit 40 includes a transistor Q1, a resistor R1, and a Zener diode D1. The transistor Q1 is an NPN-type bipolar transistor, the collector is connected to the external input terminal 102, and the input voltage Vdc is applied. The resistor R1 is provided between the base collector of the transistor Q1. A Zener diode D1 is provided between the base of the transistor Q1 and the ground terminal with the anode facing the ground terminal. In the clamp circuit 40 of FIG. 2, the base voltage of the transistor Q1 is clamped to be equal to or lower than the Zener voltage Vz of the Zener diode D1. Since the transistor Q1 forms an emitter follower circuit, the emitter voltage of the transistor Q1, that is, the clamp output voltage Vdc2 is clamped to a clamp voltage Vcl (= Vz−Vf) or less.

  Instead of the Zener diode D1, a plurality of m diodes connected in multiple stages in a direction in which the cathode is on the ground terminal side may be used. In this case, the clamp voltage Vcl is Vcl = (m−1) × Vf.

  On the other hand, in a voltage range in which the base voltage of the transistor Q1 is not clamped by the Zener diode D1, a relationship of Vdc2 = Vdc−Vf is established between the clamp output voltage Vdc2 and the input voltage Vdc.

  The charge pump circuit 10 may receive the input voltage Vdc of the clamp circuit 40 at the first input terminal Pi1, and may receive the output voltage Vdc2 of the clamp circuit 40 at the second input terminal Pi2. In this case, it is possible to prevent an overvoltage from being applied between the gate and source of the sixth switch SW6 of the P-channel MOSFET.

  However, when the withstand voltage of the MOSFET is sufficiently high, the input voltage Vdc and the clamp output voltage Vdc2 may be input to either the first input terminal Pi1 or the second input terminal Pi2.

  Reliability is improved by providing a clamp circuit 40 in the previous stage of the charge pump circuit 10 and applying the output voltage of the clamp circuit 40 to an input terminal to which a switch having a low breakdown voltage among the switches of the charge pump circuit 10 is connected. Can do.

  According to the overvoltage protection circuit 100 of FIG. 1, when the input voltage Vdc exceeds the overvoltage threshold voltage Vovp, the gate voltage Vg of the switch transistor M1 is not applied, and the switch transistor is connected between the external input terminal 102 and the external output terminal 104. Blocked by M1. That is, overvoltage protection can be realized by using an N-channel MOSFET as a switching element and supplying a gate voltage by a charge pump circuit. The N-channel MOSFET has a higher breakdown voltage and a smaller area than a P-channel MOSFET having the same performance, and is advantageous compared to an overvoltage protection circuit using a P-channel MOSFET.

  Further, by clamping the input voltage Vdc, which is the boost target of the charge pump circuit 10, by the clamp circuit 40, it is possible to suppress the gate voltage Vg of the switch transistor M1 from becoming an overvoltage. Depending on the semiconductor manufacturing process, even with an N-channel MOSFET, the gate-source breakdown voltage may be low, so that an overvoltage can be prevented from being applied between the gate and source by suppressing the gate voltage Vg. As a result, the design condition is not constrained by the gate-source breakdown voltage of the switch transistor M1, which has the advantage of increasing the degree of freedom in selecting the semiconductor manufacturing process.

  Further, in the initialization phase φ0, the soft start resistor R20 is inserted on the charging path to the output capacitor Co. Therefore, the charging speed of the output capacitor Co is decreased, and the output voltage Vo of the charge pump circuit 10, that is, the gate voltage Vg of the switch transistor M1 in FIG. Therefore, the switch transistor M1 is gradually switched from the off state to the on state, and an inrush current flowing from the external power source 110 into the charging circuit 112 can be prevented.

  After the elapse of the predetermined time τ, that is, after the charge pump circuit 10 starts the charge pump operation, the soft start resistor R20 is bypassed by the bypass switch SW20, and therefore has little or no influence on the circuit operation. If the bypass switch SW20 is not provided, the voltage drop of the soft start resistor R20 increases by the amount of current consumed by the first level shift circuit 16, so that the output voltage Vo of the charge pump circuit 10 becomes low and an effective boosting rate. Will fall. In contrast, in the charge pump circuit 10 according to the embodiment, since the soft start resistor R20 is bypassed during the charge pump operation, it is possible to suppress a decrease in the step-up rate.

  Those skilled in the art will understand that the above-described embodiment is an exemplification, and that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

The circuit of FIG. 2 can be grasped as follows from another viewpoint.
The charge pump circuit 10 includes a plurality of input terminals Pi1, Pi2, an output terminal Po that outputs a boosted output voltage Vo, n (n is a natural number) flying capacitors Cf1, Cf2, an output capacitor Co, a first A series switch SWs1 to a third series switch SWs3, a first input switch SWi1 to a third input switch SWi3, a first ground switch SWg1 to a third ground switch SWg3, and a control unit 12 are provided. The output capacitor Co has a first terminal (A) connected to the output terminal Po and a second terminal (B) connected to the ground terminal.

  The first series switch SWs1 is provided between any one of the input terminals Pi2 and the first terminal (A) of the first flying capacitor Cf1. The i-th series switch SWsi (i is an integer satisfying 2 ≦ i ≦ n) is connected to the first terminal (A) of the i-th flying capacitor Cfi and the (i−1) -th flying capacitor Cf (i−1). Provided between one terminal (A). The (n + 1) th series switch SWs (n + 1) is provided between the first terminal (A) of the output capacitor Co and the first terminal (A) of the nth flying capacitor Cfn.

  The n input switches SWi1 to SWi2 are provided for each of the flying capacitors Cf1 and Cf2, and are provided between the second terminal (B) of the corresponding flying capacitor Cf and any one of the input terminals (Pi1, Pi2).

  The n ground switches SWg1 to SWg2 are provided for each of the flying capacitors Cf1 and Cf2, and are provided between the second terminal (B) of the corresponding flying capacitor Cf and the ground terminal.

  When the charge pump circuit 10 is activated, the control unit 12 turns on the series switches SWs1 to SWs3 for a predetermined time. The series switches SWs1 to SWs3 are preferably composed of P-channel MOSFETs.

  The soft start resistor R20 is provided on a path formed by the series switches SWSs1 to SWs3. The bypass switch SW20 is provided in parallel with the soft start resistor R20 and is controlled by the control unit 12.

  Although FIG. 2 shows the case of n = 2, the expansion is possible even when n = 1 or n ≧ 3 or more.

  In the embodiment, the case where the overvoltage protection circuit 100 and the charging circuit 112 are configured as separate ICs has been described. However, they may be integrated as a power management IC. Alternatively, the overvoltage protection circuit 100 may be constituted by a discrete element.

  In the embodiment, the overvoltage protection circuit 100 using the charge pump circuit 10 has been described. However, the application of the charge pump circuit 10 is not limited to this. The present invention is widely applicable to charge pump circuits that boost the input voltage.

  Although the present invention has been described above based on the embodiments, it should be understood that the embodiments merely illustrate the principles and applications of the present invention, and the embodiments are within the scope of the claims. Needless to say, many modifications and arrangements can be made without departing from the concept of the present invention.

It is a block diagram which shows the structure of the electronic device carrying the overvoltage protection circuit which concerns on embodiment. It is a circuit diagram which shows the structure of a charge pump circuit. 3 is a time chart showing an operation state of the charge pump circuit of FIG. 2.

Explanation of symbols

Pi1 ... first input terminal, Pi2 ... second input terminal, Po ... output terminal, Cf1 ... first flying capacitor, Cf2 ... second flying capacitor, Co ... output capacitor, 10 ... charge pump circuit, 12 ... control unit, 13 ... Oscillator, 14 ... Counter, 15 ... Control signal generator, 16 ... First level shift circuit, 18 ... Second level shift circuit, SWs1 ... First series switch, SWs2 ... Second series switch, SWs3 ... Third series switch , SWi1... 1st input switch, SWi2... 2nd input switch, SWi3... 3rd input switch, SLo1... 1st ground switch, SLo2. ... second switch, SW3 ... third switch, SW4 ... fourth switch, SW5 ... fifth switch, S 6 ... 6th switch, SW7 ... 7th switch, 100 ... Overvoltage protection circuit, 102 ... External input terminal, 104 ... External output terminal, 110 ... External power supply, 112 ... Charging circuit, 114 ... Battery, M1 ... Switch transistor, 20 DESCRIPTION OF SYMBOLS ... Overvoltage monitoring part, 40 ... Clamp circuit, Q1 ... Transistor, R1 ... Resistance, D1 ... Zener diode, R20 ... Soft start resistance, SW20 ... Bypass switch, S20 ... Bypass control signal, 1000 ... Electronic equipment.

Claims (10)

An overvoltage protection circuit that has an external input terminal and an external output terminal, and shuts off between the external input terminal and the external output terminal when an input voltage input to the external input terminal exceeds a predetermined threshold voltage. There,
An N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) switch transistor provided between the external input terminal and the external output terminal;
A charge pump circuit that boosts the input voltage and outputs the boosted voltage to the gate of the switch transistor;
An overvoltage monitoring unit that compares the input voltage with the threshold voltage and instructs the charge pump circuit to perform a boost operation when the input voltage is lower than the threshold voltage;
With
The charge pump circuit
At least one flying capacitor;
An output capacitor;
A plurality of switches connecting the flying capacitor and the output capacitor;
A plurality of control signals for controlling on / off of the plurality of switches are generated, and the plurality of control signals are level-shifted by using an output voltage of the charge pump circuit generated in the output capacitor, to the plurality of switches. A control unit that outputs,
An impedance element provided on a path from the input terminal of the charge pump circuit to the output capacitor without passing through a flying capacitor;
A bypass switch provided in parallel with the impedance element and controlled by the control unit;
Including
The controller is
Prior to the start of the step-up operation of the charge pump circuit, all the switches provided in series on the path from the input terminal of the charge pump circuit to the output capacitor without passing through the flying capacitor are predetermined among the plurality of switches. Turn on the time and turn off the bypass switch,
An overvoltage protection circuit, wherein after the predetermined time has elapsed, the bypass switch is turned on to start on / off switching of the plurality of switches. The impedance element is provided on the most output capacitor side on the path,
The bypass switch is a P-channel MOSFET;
2. The control unit according to claim 1, further comprising a level shift circuit that shifts the level of the bypass control signal using a potential of a terminal on the high potential side of the impedance element and outputs the level to the gate of the bypass switch. The overvoltage protection circuit described in 1.   The overvoltage protection circuit according to claim 1, wherein the charge pump circuit performs a boosting operation using a gate capacitance of the switch transistor as an output capacitor.   All switches provided in series on a path extending from an input terminal of the charge pump circuit to the output capacitor without passing through a flying capacitor are configured by P-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). The overvoltage protection circuit according to claim 1. An overvoltage protection circuit that has an external input terminal and an external output terminal, and shuts off between the external input terminal and the external output terminal when an input voltage input to the external input terminal exceeds a predetermined threshold voltage. There,
An N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) switch transistor provided between the external input terminal and the external output terminal;
A charge pump circuit that boosts the input voltage and outputs the boosted voltage to the gate of the switch transistor;
An overvoltage monitoring unit that compares the input voltage with the threshold voltage and instructs the charge pump circuit to perform a boost operation when the input voltage is lower than the threshold voltage;
With
The charge pump circuit
Multiple input terminals,
An output terminal for outputting the boosted output voltage;
n (n is a natural number) flying capacitors;
An output capacitor having a first terminal connected to the output terminal and a second terminal connected to a fixed voltage terminal;
A first series switch provided between any one of the input terminals and the first terminal of the first flying capacitor;
The (n−1) second to (n−1) second terminals provided between the first terminal of the i th (i is an integer of 2 ≦ i ≦ n) th flying capacitor and the first terminal of the (i−1) th flying capacitor. An nth series switch;
An (n + 1) th series switch provided between the first terminal of the output capacitor and the first terminal of the nth flying capacitor;
A first to nth input switch provided for each flying capacitor and provided between the corresponding second terminal of the flying capacitor and any one of the input terminals;
A first to n-th ground switch provided for each flying capacitor and provided between a second terminal and a fixed voltage terminal of the corresponding flying capacitor;
A control signal for controlling ON / OFF of the series switch, the input switch, and the ground switch is generated, and the control signal is level-shifted by using the output voltage of the charge pump circuit generated in the output capacitor to each switch. A control unit that outputs,
An impedance element provided on a path formed by the series switch;
A bypass switch provided in parallel with the impedance element and controlled by the control unit;
Including
The controller is
Prior to the start of the boosting operation of the charge pump circuit, the series switch is turned on for a predetermined time and the bypass switch is turned off,
An overvoltage protection circuit comprising: turning on the bypass switch after the predetermined time has elapsed; and starting on-off switching of the series switch, the input switch, and the ground switch.   6. The overvoltage protection circuit according to claim 5, wherein the series switch is configured by a P-channel MOSFET. A clamp circuit that is provided in a preceding stage of the charge pump circuit and clamps the input voltage to a predetermined clamp voltage or less;
4. The overvoltage according to claim 3, wherein the charge pump circuit includes first and second input terminals, the input voltage is received at a first input terminal, and the output voltage of the clamp circuit is received at a second input terminal. Protection circuit.   8. The overvoltage protection circuit according to claim 7, wherein the first series switch is an N-channel MOSFET, and is provided between the first input terminal and a first terminal of the first flying capacitor.   9. The overvoltage protection circuit according to claim 1, wherein the overvoltage protection circuit is integrated on a single semiconductor substrate. A connector to which an external power supply can be attached and detached;
A secondary battery;
The overvoltage protection circuit according to any one of claims 1 to 8, wherein the connector is connected to the external input terminal;
A charging circuit for charging the secondary battery using an output voltage of the overvoltage protection circuit;
An electronic device comprising:

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