JP2009277518A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display panel with a long life and high productivity, despite being structured of a material without substantially containing a lead component. <P>SOLUTION: In the plasma display panel, a front face substrate with a plurality of display electrodes arranged and a rear face substrate with address electrodes arranged so as to cross the display electrodes and an insulation layer arranged on the address electrodes, are arranged in opposition so as to have a discharge space formed between the above substrates. Porosity of the insulation layer on the address electrodes is smaller than that on a place other than the address electrodes. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a plasma display panel known as a display device.

  In recent years, expectations for large screens and wall-mounted televisions are increasing as interactive information terminals, and there are many display devices such as liquid crystal display panels, field emission displays, and electroluminescence displays. Among these display devices, the plasma display panel (hereinafter referred to as “PDP”) is a self-luminous and beautiful image display, and is easy to enlarge. Development for higher definition and larger screen is underway.

  The PDP has a front plate on which components such as a display electrode, a dielectric layer, and a protective layer made of MgO are formed, and a back plate on which components such as electrodes, partition walls, an insulator layer, and a phosphor layer are formed. -G and B are arranged opposite each other so as to form minute discharge cells (hereinafter simply referred to as cells), and the periphery is sealed with a sealing member. A discharge gas obtained by mixing neon (Ne) and xenon (Xe) or the like is sealed in the cell at a pressure of about 66500 Pa (about 500 Torr), for example.

  Originally, PDP is a self-luminous type, so each cell has a very high viewing angle. However, with high definition and large screen, uniform panel characteristics are required in all areas. Various measures are taken against it. For example, by defining the discharge space and the phosphor shape, finding a method for realizing the structure using two coating processes at the same location, and obtaining uniform light emission from the phosphor with respect to changes in viewing angle Etc. are disclosed.

For example, Patent Document 1 and Patent Document 2 are known as prior art document information relating to the invention of this application.
JP 2000-208057 A JP 2006-040794 A

  By the way, with the recent heightened interest in environmental problems, a technology that does not substantially contain lead as a component has been developed. As for the insulating layer of the back plate of the PDP, a material containing lead as a constituent has been used so far, but in recent years, a technique for substituting a material containing substantially no lead has been established.

  However, when an insulator layer that does not contain lead is used, the voltage necessary for the discharge gradually increases as the time for lighting the PDP is prolonged, and finally it becomes in a state where it cannot be lit with the voltage set in the circuit. It became clear that a problem arises. Since this phenomenon determines the life of the PDP, solving this problem is extremely important in terms of extending the life of the PDP.

  The present invention has been made in view of such a current situation, and an object thereof is to provide a PDP having a long life and high productivity.

  In order to achieve the above object, the PDP of the present invention includes a front substrate on which a plurality of display electrodes are arranged, a rear substrate on which address electrodes are arranged so as to intersect the display electrodes, and an insulator layer is arranged on the address electrodes. The PDP is disposed so as to form a discharge space in between, and the porosity of the insulating layer on the address electrode is smaller than the porosity of the insulating layer other than on the address electrode. To do. Furthermore, the insulator layer may be substantially free of lead.

  As described above, according to the present invention, it is possible to provide a PDP having a long life and high productivity while being a PDP composed of a material that does not substantially contain a lead component.

  Hereinafter, a PDP according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
The configuration and characteristics of the PDP in this embodiment will be described with reference to FIGS. First, the main configuration of the PDP of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional perspective view showing a schematic configuration of a PDP according to an embodiment of the present invention, and FIG. 2 is a perspective view showing a configuration of a back plate of the PDP.

  In FIG. 1, the PDP 10 includes a front plate 20 and a back plate 30, and the front plate 20 and the back plate 30 are disposed to face each other so as to form a discharge space 40. The front plate 20 has a plurality of stripe-shaped display electrodes 24 that are paired with a scan electrode 22 and a sustain electrode 23 on a front substrate 21 such as sodium borosilicate glass formed by a float process. Further, a black stripe 25 serving as a light shielding portion is formed between adjacent display electrodes 24. A dielectric layer 26 is formed so as to cover the display electrode 24 and the black stripe 25, and a protective layer 27 made of magnesium oxide (MgO) is further formed so as to cover the dielectric layer 26.

  On the other hand, the back plate 30 has an address electrode 32 formed on the back substrate 31 in a direction orthogonal to the display electrode 24 of the front plate 20, and an insulating layer 33 is provided to cover the address electrode 32. In addition, on the insulator layer 33, for example, stripe-shaped and cross-beam-shaped barrier ribs 34 are provided, and phosphor layers 35 are provided on the side surfaces of the barrier ribs 34 and on the surface of the insulator layer 33. In the discharge space 40 partitioned by the adjacent barrier ribs 34, the phosphor layer 35 has a red phosphor layer 35R that emits red light, a green phosphor layer 35G that emits green light, and a blue phosphor layer 35B that emits blue light in order. Is formed.

  FIG. 2 is a perspective view showing a configuration of a back plate of the PDP in the embodiment of the present invention. As shown in FIG. 2, the partition walls 34 of the PDP are formed in a grid pattern by horizontal partition walls 34b parallel to the display electrodes 24 and vertical partition walls 34a orthogonal to the horizontal partition walls 34b. It is formed to be slightly higher than the height. In addition to this, the present invention can also be applied to a flat cross-beam shape. Further, the present invention can be applied to a stripe-shaped partition excluding the horizontal partition 34b.

  The scan electrode 22 and the sustain electrode 23 that constitute the display electrode 24 provided on the front plate 20 are each constituted by a transparent electrode and a bus electrode. The bus electrode is made of a material such as Cr / Cu / Cr or Ag, and is electrically connected to the transparent electrode.

  The front plate 20 and the back plate 30 are arranged opposite to each other with the partition wall 34 interposed therebetween so that the display electrode 24 and the address electrode 32 are orthogonal to each other and form a minute discharge space 40 inside, and the periphery is a sealing member. Seal with. Thereafter, a discharge gas in which Ne and Xe are mixed in the discharge space 40 is sealed at a pressure of about 66500 Pa (500 Torr) to complete the PDP, and a video signal voltage is selectively applied to the display electrode 24 to thereby discharge the discharge gas. Are discharged, and the ultraviolet rays generated thereby excite the phosphor layers 35 of the respective colors to emit red, green and blue colors, thereby displaying a color image.

(PDP manufacturing method)
Next, a method for manufacturing the back plate 30 of the PDP 10 will be described. First, the structure for the address electrode 32 is formed by a method of screen printing a paste containing a silver (Ag) material on the back substrate 31 or a method of patterning using a photolithography method after forming a metal film on the entire surface. An address electrode 32 is formed by forming a material layer and baking it at a desired temperature. Next, a dielectric paste is applied on the back substrate 31 on which the address electrodes 32 are formed by a die coating method so as to cover the address electrodes 32, thereby forming a dielectric paste layer. Thereafter, the dielectric paste layer is baked to form the insulator layer 33. The dielectric paste is a paint containing a dielectric material such as glass powder, a binder and a solvent. The composition of the insulator layer 33 will be described later in detail.

  Next, a partition wall forming paste containing a partition wall material is applied on the insulator layer 33 and patterned into a predetermined shape to form a partition wall material layer and then fired to form the partition walls 34. Here, as a method of patterning the partition wall paste applied on the insulator layer 33, a photolithography method or a sandblast method can be used. Next, the phosphor layer 35 is formed by applying and baking a phosphor paste containing a phosphor material on the insulator layer 33 between the adjacent partition walls 34 and on the side surfaces of the partition walls 34. Through the above steps, the back plate 30 having predetermined components on the back substrate 31 is completed.

  In this way, the front plate 20 and the back plate 30 provided with predetermined constituent members are arranged to face each other so that the scanning electrodes 22 and the address electrodes 32 are orthogonal to each other, and the periphery thereof is sealed with a glass frit, so that a discharge space is obtained. The PDP 10 is completed by enclosing a discharge gas containing Ne, Xe or the like in 40.

(Insulator layer in the embodiment of the present invention)
Hereinafter, the insulator layer 33 in the embodiment of the present invention will be specifically described. The insulator layer 33 is applied on the back substrate 31 and the address electrode 32 as shown in FIG. A die coating method is used for the application, and after the paste is applied, it is formed through a drying step and a baking step.

  As described above, in the conventional technique, as the time for lighting the PDP 10 is prolonged, the voltage required for the discharge gradually increases, and finally, there is a problem that the lighting cannot be performed with the voltage set in the circuit. there were.

  In contrast, the inventors have found that the above problem can be solved by making the porosity of the insulating layer 33 on the address electrode 32 smaller than the porosity of the insulating layer 33 other than on the address electrode 32. It was.

Here, the porosity is a volume ratio of a portion of the insulator layer 33 where the insulator layer 33 does not exist, and is measured by the following method.
(1) The back plate 30 is cleaved, and a sample in which the cross section of the insulator layer 33 is exposed is cut out. (2) The insulator layer 33 is imaged with a secondary electron scanning electron microscope (SEM). Void ratio is calculated from the dielectric cross section image. Also, the dielectric cross section is coated with resin to increase the contrast during SEM imaging and to prevent measurement variations due to cracking during cleaving. It is desirable. This measurement was performed using a scanning electron microscope S-3000 manufactured by Hitachi. The imaging used for the calculation was performed in the reflected electron measurement mode with an acceleration voltage of 15 kV and a work distance of 15 mm.

Further, in the embodiment of the present invention, the degree of increase in the required lighting voltage value of the PDP 10 is estimated as the amount of seepage of the lighting part. Here, the amount of seepage of the lighting part is measured as follows.
(1) Only a certain area of the PDP image display area is always lit in white, and the other areas are always in a non-lit state, and 100 hours have elapsed in that state. (2) The peripheral portion of the constantly lit white area, The phenomenon of light emission in the normally non-lighted area is observed (3) The width of the light-emitting area of the normally non-lighted part is measured, and this is used as the amount of seepage of the lighted part. This indicates a state in which the lighting voltage value has changed, and is used as an index for predicting the life of the PDP 10 due to a voltage increase.

  FIG. 3 is a diagram showing the relationship between the porosity of the insulator layer 33 and the amount of the light-emitting portion that leaks out. Thus, when the average value of the porosity of the depth of 0% to 50% from the back substrate 31 side of the insulating layer 33 in the back plate 30 exceeds 15%, the amount of the lighting part oozing may increase. Recognize. In the embodiment of the present invention, the amount of seepage of the lighting part is 10 mm or less that can sufficiently achieve the life of the PDP 10. That is, in order to ensure the life of the PDP 10, the porosity of the insulator layer 33 needs to be 15% or less.

  On the other hand, when the porosity of the insulator layer 33 is lowered, it has become clear that other problems occur. That is, the inventors have found that when the porosity is lowered, the application margin amount of the phosphor paste when the phosphor layer 35 is formed deteriorates.

  Here, the application margin amount is a width of an appropriate value of the application thickness that can be normally applied when applying the phosphor paste to the back plate 30. For example, if the coating thickness is smaller than the appropriate value, the phosphor layer 35 will come off at that location, resulting in defective discharge cells that do not discharge or discharge cells with low brightness. On the other hand, if it is larger than the appropriate value, the phosphor paste overflows the adjacent discharge cells beyond the barrier ribs 34, and the color mixture between the discharge cells and the phosphor film thickness greatly vary, resulting in a failure as well.

  That is, if there is no application margin amount of a certain amount or more, the yield of PDP is reduced due to phosphor application failure. That is, a back plate having a large range of appropriate values that does not cause phosphor coating defects is desirable.

  FIG. 4 is a diagram showing the relationship between the porosity of the insulator layer 33 and the phosphor coating margin amount. Thus, it can be seen that the coating margin amount decreases as the average value of the porosity of the depth of 0% to 50% from the back substrate 31 side of the insulator layer 33 decreases. In the embodiment of the present invention, the allowable range of the phosphor coating defect occurrence rate of the PDP 10 is an application margin amount of 10 μm or more. That is, in order to ensure the manufacturing yield of the PDP 10, the porosity of the insulator layer 33 having a depth of 0% to 50% from the back substrate 31 side needs to be 5% or more.

  As described above, the average value of the porosity with a depth of 0% to 50% from the back substrate 31 side of the insulator layer 33 in the back plate 30 is set to be in the range of 5% to 15%. This is a requirement required for the insulator layer 33 in order to ensure the above and to prevent the yield due to poor phosphor coating.

  The inventors have also found that the surface roughness (Ra) of the insulating layer 33 in the back plate 30 has a great influence on the above-described problems of the prior art. Specifically, it has been found that the above problem can be solved by setting the surface roughness (Ra) of the insulator layer 33 in the range of 0.5 to 0.75 μm.

  In the embodiment of the present invention, the surface roughness (Ra) was measured in accordance with JIS-2001 as the center line average roughness. In the measurement, a contact type surface roughness meter handysurf: E-35A (cut-off value = 0.8 mm, evaluation length 4 mm) manufactured by Tokyo Seimitsu was used. Then, similarly to the void ratio, the relationship between the amount of seepage of the lighting part and the amount of phosphor coating margin was examined. The results are shown in FIGS.

  As shown in FIG. 5, it can be seen that as the surface roughness of the insulator layer 33 in the back plate 30 increases, the amount of the light-emitting portion oozing increases. In order to make the amount of seepage of the lighting part 10 mm or less, the surface roughness (Ra) of the insulator layer 33 needs to be 0.75 μm or less.

  On the other hand, as shown in FIG. 6, it can be seen that as the surface roughness (Ra) of the insulator layer 33 in the back plate 30 increases, the phosphor coating margin amount can be secured. In order for the phosphor coating margin amount to be 10 μm or more, the surface roughness (Ra) of the insulator layer 33 needs to be 0.5 μm or more.

  From the above, setting the surface roughness (Ra) of the insulator layer 33 on the back plate 30 in the range of 0.5 to 0.75 μm ensures the life of the PDP 10 and does not reduce the yield due to poor phosphor coating. Therefore, it is a requirement required for the insulator layer 33.

  The inventors have also found that the reflectance of the insulating layer 33 on the back plate 30 has a great influence on the above-described problems of the prior art. Specifically, it has been found that the above problem can be solved by setting the reflectance of the insulator layer 33 in the range of 50 to 67%.

  Here, the reflectance was measured in accordance with JIS-R-3106 as a total reflectance with respect to a wavelength of 550 nm. In addition, MINOLTA: Spectrophotometer: CM-3600d was used for the measurement.

  FIG. 7 is a diagram showing the relationship between the reflectance of the insulator layer 33 and the amount of the lighting portion that oozes. Thus, it can be seen that when the reflectance of the insulating layer 33 on the back plate 30 exceeds 67%, the amount of the lighting portion oozing increases. In the embodiment of the present invention, the amount of seepage of the lighting part is 10 mm or less that can sufficiently achieve the life of the PDP 10. That is, in order to ensure the life of the PDP 10, the reflectance of the insulator layer 33 needs to be 67% or less.

  On the other hand, when the reflectance of the insulator layer 33 is lowered, it has been clarified that other problems occur. That is, when the reflectance is reduced, the influence of absorption of the phosphor emission in the insulator layer is increased, so that the light emission luminance of the PDP is lowered and the quality of the PDP is lowered. When the reflectance is less than 50%, the influence of the luminance reduction becomes large.

  As described above, setting the reflectance of the insulating layer 33 in the back plate 30 in the range of 50% to 67% ensures the life of the PDP and prevents the quality from being deteriorated due to the decrease in luminance. This is a requirement for the layer 33.

(Regarding the method of creating the insulator layer in the embodiment of the present invention)
Next, a method for creating an insulator layer in the embodiment of the present invention will be described. First, the insulator paste was examined using several types of glass components 10% to 50%, filler 10% to 50%, binder 10% to 20%, solvent 20% to 30%, and the following results were obtained. confirmed.

  In order to change the porosity with respect to the thickness of the insulating layer 33 as described above, it was effective to set the softening point of the glass component within a certain range. Specifically, the favorable result which solves this subject was obtained by making the softening point of a glass component into 560 to 580 degreeC.

  The softening point of the glass component of the insulator layer used in the prior art is around 540 ° C. On the other hand, in the embodiment of the present invention, the softening point is set higher than that of the prior art. In particular, a softening point of 560 ° C. to 565 ° C. was effective.

  Furthermore, in the embodiment of the present invention, the ratio of the filler and the glass component in the insulator paste is controlled. In the insulator layer used in the prior art, the glass component is generally 30% to 45% and the filler is 15% to 20%, whereas in the embodiment of the present invention, the glass component is 15% to 30%. %, Filler 30% to 45%. As a result, good results were obtained to solve this problem. More desirably, the glass component was 17% to 27% and the filler was 30% to 43%.

  In the embodiment of the present invention, the component of the insulator layer 33 is also controlled. That is, the content of each component of the insulator layer 33 in terms of mole is set as follows. Bi is 0.1% to 25%, Zn is 10% to 30%, Ti is 0.1% to 25%, and W, Mn, Sb, and Ba are 0.1% or less. As a result, good results were obtained to solve this problem.

  In the case of such a dielectric layer 33, the address electrode 32 is provided at the time of each baking process of the back plate 30 by reducing as much as possible the metal components that are likely to change in valence such as Bi, Ti, W, Mn, Sb, and Ba. The gas generated from can be left as a void in the insulator layer 33. Conversely, in the insulator layer 33 having a large component ratio of Bi, Ti, W, Mn, Sb, and Ba, it is difficult for gas to exist, and the porosity on the address electrode 32 becomes small. As a result, the object of the present invention cannot be achieved.

  By forming the insulator layer 33 as described above, the average value of the void ratio at the layer thickness 0.5d of the insulator layer on the back substrate side with respect to the layer thickness d of the insulator layer is the discharge space side. It was confirmed that the insulating layer was smaller than the average value of the porosity at a layer thickness of 0.5 d.

  Further, the same effect can be obtained by forming the insulating layer 33 in a multilayer structure. That is, a plurality of types of insulator pastes having different compositions are prepared, and the insulator layers 33 are produced by laminating them. For example, the first dielectric paste applied to the back substrate 31 has a glass component 25% to 35%, filler 25% to 35%, binder 10% to 20%, solvent 20% to 30%. The dielectric paste of the second layer to be applied thereon has a mixing ratio of glass component 15% to 20%, filler 45% to 50%, binder 10% to 20%, solvent 20% to 30%. The insulator layer 33 is formed by adjusting the film thicknesses of the first layer and the second layer to the same level. Also by this, the favorable result which solves this subject was obtained.

  Further, the same effect can be obtained by forming the insulator layer 33 in a stripe shape. That is, a plurality of types of insulator pastes having different compositions are prepared, and the insulator layer 33 is formed by applying different pastes to the region on the address electrode 32 and other regions. For example, the dielectric paste applied to the area on the address electrode 32 has a blending ratio of glass component 15% to 20%, filler 45% to 50%, binder 10% to 20%, solvent 20% to 30%. By making the dielectric paste to be applied to the other regions have a mixing ratio of glass component 25% to 35%, filler 25% to 35%, binder 10% to 20%, solvent 20% to 30%. As a result, good results were obtained to solve this problem.

  As described above, the PDP of the present invention has a front substrate in which a plurality of display electrodes are arranged, and a rear substrate in which address electrodes are arranged so as to intersect the display electrodes and an insulating layer is arranged on the address electrodes. The PDP is disposed so as to form a discharge space, wherein the porosity of the insulating layer on the address electrode is smaller than the porosity of the insulating layer other than on the address electrode. Furthermore, the insulator layer may be substantially free of lead.

  By using such an insulator layer and a PDP having the insulator layer, it is possible to resist a PDP that does not reduce the yield due to defective phosphor coating while ensuring the life of image display quality.

  The PDP of the present invention is useful in that it can provide a PDP having a long life and high productivity while being a PDP composed of a material that does not substantially contain a lead component.

Sectional perspective view which shows schematic structure of the plasma display panel in embodiment of this invention The perspective view which shows the structure of the back plate of the panel The figure which shows the relationship of the lighting part seepage amount to the porosity of the panel The figure which shows the relationship of the amount of application margin to the porosity of the panel The figure which shows the relationship of the lighting part seepage amount with respect to Ra of the panel The figure which shows the relationship of the coating margin amount with respect to Ra of the same panel The figure which shows the relationship between the reflectance of the same panel and the amount of lighting part seepage

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Plasma display panel 30 Back plate 31 Back glass substrate 32 Address electrode 33 Insulator layer 34 Partition 35 Phosphor layer

Claims (2)

A discharge space is formed between a front substrate on which a plurality of display electrodes are arranged and a rear substrate on which address electrodes are arranged so as to intersect the display electrodes and an insulating layer is arranged on the address electrodes. A plasma display panel arranged oppositely, wherein the porosity of the insulator layer on the address electrode is smaller than the porosity of the insulator layer other than on the address electrode. The plasma display panel according to claim 1, wherein the insulating layer is substantially free of lead.

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