JP2009239201A - Method of evaluating gate insulating film - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve such a problem that when a leakage current failure occurs while there causes no breakdown in a gate insulating film and when the gate voltage dependent failure occurs in the leakage current, measurement of C-V waveform for evaluating the gate insulating film is taken into consideration, and further when abnormal conditions occur in the C-V waveform, it is required to review the existence of the charge in the gate insulating film and the like but it is impossible to accurately verify the existence in an intrinsic element by a conventional method. <P>SOLUTION: With respect to a defective element (intrinsic element) of a discrete insulating gate semiconductor device, it is possible to check the existence and polarity of the charge in the gate insulating film and the like without cutting off a protective diode. It is possible to verify the charge existed in the gate insulating film and the like even if the number of samples sent back from a user is one. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for evaluating a gate insulating film of an insulated gate semiconductor device, and more particularly to a method for evaluating a gate insulating film capable of evaluating a gate insulating film of an actual element (product) by CV measurement.

As a method for evaluating a semiconductor element, a CV (Capasitance-Voltage) measurement method for measuring characteristics of capacitance change due to voltage change is known. For example, a method of performing CV measurement using an evaluation element (Test Element Group: TEG) as an evaluation of a gate insulating film (film quality) of MOS (Metal Oxide Semiconductor) -LSI (Large Scale Integration) is known. (See, for example, Patent Document 1).
Japanese Patent Publication No. 9-246343

  As an evaluation of the gate insulating film of the MOS-LSI by TEG, there is a method of performing CV measurement of the capacitive element using a TEG containing a large-area capacitive element.

  In such a CV measurement method, it is possible to measure the capacitance and voltage of a MOS transistor (an element that is actually a product (hereinafter, an actual element)) actually formed on an LSI, not an evaluation element. Ideal. However, in reality, the CV characteristics of the capacitive element must be measured using, for example, a TEG containing a large-area capacitive element. This is because a certain capacity area is required to perform CV measurement.

  This method is exactly the same in the evaluation of a gate insulating film (oxide film) of a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) of a discrete element (individual semiconductor element), that is, a planar type TEG is also conventionally used in a power MOSFET. Evaluation using a capacitive element is performed.

  In the power MOSFET, the area of the gate insulating film is larger than that of the LSI, and therefore there is a possibility that a CV waveform that is impossible with the LSI can be directly measured. However, the planar shape (two-dimensional structure) and cross-sectional shape (three-dimensional structure) of the power MOSFET are complex and various parasitic capacitances are formed, so that a CV waveform of a level that can be used for evaluation cannot be obtained. Was the current situation.

  In particular, in a power MOSFET of a discrete element, a protection circuit such as a protection diode that protects a gate insulating film is often provided on a semiconductor substrate (same chip). That is, there is a problem that a stable CV waveform cannot be obtained even if the protection circuit forms a parasitic capacitance or a leak current flows through the protection circuit.

  Further, as the voltage is lowered, the gate insulating film is made thinner, and when the gate insulating film thickness is 50 or less, a leakage current due to the tunnel effect flows. For this reason, there is a problem that an accurate capacity cannot be obtained even if CV measurement is performed. Therefore, in the power MOSFET as well, a TEG capacitive element has to be used as in the LSI.

  It is possible to indirectly evaluate the actual element from the measurement of the TEG manufactured by the same manufacturing process as the actual element. However, when any defect occurs in the actual element, it is most desirable to use the actual element for analysis of the defect.

  For example, in a device where a leakage current failure has occurred, if there is no leakage abnormality in the gate-source current Igs from DC measurement (static direct current measurement), the gate insulating film of the device is not broken. However, if a leakage current occurs in the weak inversion region and the leakage current depends on the gate voltage, the gate insulating film, the interface between the gate insulating film and the semiconductor crystal, or the interface There is a possibility that a charge causing a leakage current exists in the nearby semiconductor crystal. As a method for evaluating the quality of the gate insulating film, there is a measurement of a CV waveform. The type of charge in the gate insulating film, the interface between the gate insulating film and the semiconductor crystal, or the semiconductor crystal near the interface can be estimated from the CV waveform. If the type of charge is known, measures can be taken. Because it is possible. That is, when an abnormality appears in the C-V waveform, it is necessary to examine the presence of electric charge in the gate insulating film, or at the interface between the gate insulating film and the semiconductor crystal or in the semiconductor crystal near the interface.

  However, from the above situation, it has been difficult to directly measure a defective element in the past, and it has not been possible to accurately verify this in an actual element. Therefore, it is necessary to rely on indirect analysis by TEG, but it is difficult to reproduce the defective phenomenon by this method. For these reasons, the cause of defects related to the gate insulating film has not been verified in detail.

  The present invention has been made in view of the various circumstances described above. First, a desired diffusion region, a gate electrode, a gate insulating film, a source electrode connected to the diffusion region, and the semiconductor, which are provided on a semiconductor substrate. A real element of an insulated gate semiconductor element having a drain electrode connected to the substrate, the step of preparing a defective element having a defective electric characteristic of the real element, and the gate electrode at a predetermined frequency for the defective element A step of acquiring a first CV waveform by a CV measurement method between the source electrodes or between the gate electrode and the drain electrode, and the first CV waveform as a reference third CV And a step of comparing with the −V waveform.

  Second, a trench type insulated gate semiconductor device provided on a semiconductor substrate and having a desired diffusion region, a gate electrode, a gate insulating film, a source electrode connected to the diffusion region, and a drain electrode connected to the semiconductor substrate. A step of preparing a defective element having a defective electric characteristic of the actual element, and C between the gate electrode and the source electrode and between the gate electrode and the drain electrode at a predetermined frequency with respect to the defective element. Obtaining a first CV waveform by a -V measurement method, and using the capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode from the first CV waveform. A step of acquiring a second CV waveform obtained by correcting the CV waveform of one, and a step of comparing the second CV waveform with a reference third CV waveform. It solves by.

  According to the present invention, the following effects can be obtained.

  First, it is a discrete insulated gate semiconductor device, and there is no breakdown in the gate insulating film due to its electrical characteristics, and there is a charge in the gate insulating film, the interface between the gate insulating film and the semiconductor crystal, or in the semiconductor crystal near the interface. Check the presence of charges and the polarity of charges in the gate insulating film, or at the interface between the gate insulating film and the semiconductor crystal, or in the semiconductor crystal near the interface in a defective device that is determined to have the presence of be able to.

  In the present embodiment, a CV measuring device capable of measuring CV of a real element is used to measure a defective element of the real element, and the CV measurement result of the real element in which a defect actually occurs and the non-defective product This is to be compared with the CV measurement of an actual element. As a result, the actual element can be directly analyzed. Therefore, in the gate insulating film or in the gate insulating film as compared with the conventional method in which the wafer process is indirectly evaluated using the TEG planar type capacitive element. It is possible to accurately confirm the presence of electric charges in the interface between the semiconductor crystal and the semiconductor crystal near the interface.

  In addition, even if only one sample is returned from the user, it is possible to verify the presence of charges in the gate insulating film, the interface between the gate insulating film and the semiconductor crystal, or in the semiconductor crystal near the interface. Have.

  Secondly, since it is a measurement of an actual element and CV measurement is possible without removing a protection diode provided on the same chip, measurement can be performed while maintaining the characteristics of the sample.

  For example, in the case of a defective element, if a protective diode or the like is removed for analysis, the characteristics at the time of failure may change. Therefore, it is desirable to perform measurement while maintaining a state where a defect has occurred as much as possible. According to the present embodiment, it is not necessary to cut off the protective diode, and the presence of charges in the gate insulating film, or at the interface between the gate insulating film and the semiconductor crystal, or in the semiconductor crystal near the interface while maintaining the defective state as much as possible. Can be evaluated.

  Conventionally, the protection circuit also forms a parasitic capacitance, and there is a problem that a stable CV waveform cannot be obtained due to the presence of a leak current flowing through the protection circuit. The CV measurement of the actual element can be performed, and even in the case of a power MOSFET with a protection diode, the gate insulating film using the actual element can be evaluated without removing the protection diode.

  Third, by comparing the CV waveforms before and after the reliability test of a good real device, the semiconductor crystal in the gate insulating film, the interface between the gate insulating film and the semiconductor crystal, or near the interface in the reliability test. The presence of charge inside can be evaluated.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the flowchart of FIG. 1 and with reference to FIGS. 2 to 7, taking an n-channel MOSFET as an example of an insulated gate semiconductor element.

  FIG. 1 is a flowchart for explaining a gate insulating film evaluation method according to the present embodiment. The gate insulating film evaluation method is provided on a semiconductor substrate and includes a desired diffusion region, a gate electrode, a gate insulating film, and the diffusion. Preparing a defective element having a trench-type insulated gate semiconductor element having a source electrode connected to a region and a drain electrode connected to the semiconductor substrate, the electric characteristics of the real element being poor, Obtaining a first CV waveform by a CV measurement method between the gate electrode and the source electrode and between the gate electrode and the drain electrode at a predetermined frequency for a defective element; A second CV waveform obtained by correcting the first CV waveform using a capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode is obtained from a V waveform. A step of, constituted the second C-V waveform, and a step of comparing the third C-V waveform as a reference.

  First step (FIG. 1, step S1, FIG. 2): a trench provided in a semiconductor substrate and having a desired diffusion region, a gate electrode, a gate insulating film, a source electrode connected to the diffusion region, and a drain electrode connected to the semiconductor substrate A step of preparing a defective element which is an actual element of a type insulated gate semiconductor element and has poor electrical characteristics.

  FIG. 2 is a schematic view showing a cross-sectional structure of the trench MOSFET of this embodiment.

  MOSFET 100 has a drain region in which an n− type semiconductor layer 2 is stacked on an n ++ type silicon semiconductor substrate 1, a p− type channel region 3 provided on the surface of the n− type semiconductor layer 2, and a channel region 3. A trench 4, a gate insulating film (for example, an oxide film) 5 covering the trench 4, a gate electrode 6 (gate G) embedded in the trench 4, and a surface of the channel region 3 adjacent to the trench 4. N + type source region 7, p + type body region 8 provided on the surface of channel region 3, source region 7 and source electrode 9 (source S) connected to body region 8, and n ++ type silicon semiconductor substrate 1 And a drain electrode 10 (drain D) provided on the back surface of the substrate. A gate pad electrode (not shown) connected to the gate electrode 6 is provided by the same metal layer as the source electrode 9.

  The MOSFET 100 is a discrete element (single-function individual semiconductor element). Although not shown, many cells of the MOSFET 100 of FIG. 2 are arranged in one chip, and a protection diode for protecting the gate oxide film 5 is also provided. . One end of the protection diode is connected to the gate pad electrode, and the other end is connected to the source electrode 9.

  The MOSFET of this embodiment is not an evaluation element, but an element that is actually a product (hereinafter, an actual element), and further, an element (defect element) that is determined to be defective in the measurement of electrical characteristics among the actual elements. is there. More specifically, the defective element (MOSFET) 100 is an element in which a leakage current failure between the drain and the source occurs, and the leakage current depends on the gate voltage (the drain-source current depends on the gate voltage). It is an element having electrical characteristics (in which Ids changes). Furthermore, it is an element whose gate current Igs is clearly not abnormal by DC measurement, that is, it is determined that there is no breakdown in the gate oxide film.

  Second Step (FIG. 1, Step S2, FIG. 3): The first CV waveform is acquired for the defective element by the CV measurement method between the gate electrode and the source electrode and between the gate electrode and the drain electrode at a predetermined frequency. Process.

  A probe is brought into contact with the gate electrode 6 (gate pad electrode) and the source electrode 9 of the defective element 100, respectively, and a CV waveform (capacitance change with respect to voltage change) is obtained by a CV measurement method at a predetermined frequency (for example, 100 Hz).

  In general CV measurement by TEG, a capacitive element (capacitor) is formed on the surface of a semiconductor chip to form a MOS structure, and this is measured. However, unlike an ordinary capacitor, a MOS capacitor (hereinafter referred to as a MOS capacitor) has an inversion layer (changed from a depletion layer to an inversion layer) immediately below the insulator. Due to the presence of the inversion layer, a CV waveform peculiar to a MOS can be obtained. The characteristics of the insulator (silicon oxide film) and the lower electrode (silicon crystal) can be characterized by the AC characteristics of the MOS structure called the CV waveform (CV curve). Note that even if there is a defect in the polycrystalline silicon which is the material of the gate electrode, it is considered that the CV curve is not affected.

  In a MOS capacitor element having no defect (small) and a MOS capacitor element having a defect, the depletion layer and the inversion layer immediately below the insulating film (gate oxide film) are in different states, resulting in a difference in the CV curve. It can be used mainly for evaluation of insulation and characteristics of the formation state of the inversion layer (insulation resistance, weak inversion characteristics, and threshold voltage Vth characteristics). Since an ideal CV waveform (curve) can be mathematically derived from a theoretical formula, a theoretical CV waveform exists. However, the actual evaluation needs to be performed by comparing the CV waveform of the non-defective product with the CV waveform of the defective product.

  Conventionally, measurement of an actual element has been difficult, but in the present embodiment, an actual element is measured by a CV measurement method. Then, in a later process, the CV waveforms of the actual element (defective element 100) where the defect actually occurs and the non-defective actual element are compared. As a result, it is possible to directly evaluate the gate insulating film that is actually causing the defect.

  FIG. 3 shows the result of CV measurement of the defective element 100. The horizontal axis is the gate G-source S voltage Vgs or the gate G-drain D voltage Vgd, and the vertical axis is the gate electrode 6-source electrode 9 (hereinafter referred to as gate G-source S) capacitance Cgs or gate electrode. 6 -capacitance Cgd between the drain electrodes 10 (hereinafter, between the gate G and the drain D). A one-dot chain line is a CV waveform between the gate G and the drain D, and a solid line is a CV waveform between the gate G and the source S (first CV waveform).

  As shown in FIG. 3, when the defective element 100 of the trench MOSFET is measured, it can be seen that the CV waveform between the gate G and the source S has a V-shaped characteristic. Originally, the characteristics of the gate oxide film 5 can be evaluated by the CV waveform, but it is difficult to perform a strict analysis with such a waveform. Therefore, correction is performed on this waveform.

  FIG. 4 is a diagram showing a CV waveform of the MOS capacitor element.

  FIG. 4A is a structural principle diagram of a capacitor used when measuring the characteristics between the gate G and the source S, and has a structure in which a gate oxide film 15 and a gate electrode 16 are provided on the p-type semiconductor layer 11. This is a capacitive element corresponding to the gate G and source S of the n-channel MOSFET, and the p-type semiconductor layer 11 is a channel formation region.

  FIG. 4B is a diagram showing the CV waveform of FIG. The presence of a positive charge in the gate oxide film 15 is an electrical state equivalent to applying a positive voltage to the gate electrode. That is, in FIG. 4B, when there is a positive charge in the gate oxide film 15, the CV waveform shifts in the negative voltage direction of the gate-source voltage Vgs and the negative charge is present in the gate oxide film 15. If there is, there is a shift in the positive voltage direction of the gate-source voltage Vgs.

  On the other hand, FIG. 4C is a structural principle diagram of a capacitive element used when measuring the characteristics between the gate G and the drain D, and has a structure in which a gate insulating film 15 and a gate electrode 16 are provided on the n-type semiconductor layer 12. . This is a capacitive element corresponding to the gate G and drain D of the n-channel MOSFET, and the n-type semiconductor layer 12 is the drain D.

  FIG. 4D shows the CV waveform. The presence of a positive charge in the gate oxide film 15, or at the interface between the gate oxide film 15 and the semiconductor crystal or in the semiconductor crystal near the interface is an electrical state equivalent to applying a positive voltage to the gate electrode.

  In the following description, when it is described that charges exist in the gate oxide film (insulating film) 15 or the like, the gate oxide film 15 or the interface between the gate oxide film 15 and the semiconductor crystal or near the interface. This means that electric charges exist in the semiconductor crystal.

  That is, in FIG. 4D, when there is a positive charge in the gate oxide film 15 or the like, the CV waveform shifts in the negative voltage direction of the gate-drain voltage Vgd, and in the gate oxide film 15 or the like. If there is a negative charge, it shifts in the positive voltage direction of the gate-drain voltage Vgd.

  As shown in FIGS. 4B and 4D, the CV waveform between the gate G and the source S and the CV waveform between the gate G and the drain D are symmetrical.

  Refer to FIG. 3 again. In FIG. 3, the CV waveform between the gate G and the drain D and the CV waveform between the gate G and the source S are shown in one graph.

  In the case of the trench type MOSFET, the CV waveform between the gate G and the drain D shows a waveform (dot chain line) almost the same as that in the case of the capacitive element shown in FIG. By comparing with the CV waveform of the actual element (in the shift direction), the existence of charges in the gate oxide film 15 can be verified.

  However, the CV waveform between the gate G and the source S of the defective element 100 is significantly different from the CV waveform of the planar type capacitive element (FIG. 4B). Judgment is not possible. Therefore, the CV waveform between the gate G and the source S of the defective element 100 obtained by the following process is corrected.

  Third step (FIG. 1, step S3, FIG. 3, FIG. 4): The first CV waveform is corrected from the first CV waveform using the capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode. Obtaining the second CV waveform.

  The CV waveform between the gate G and the source S of the trench MOSFET becomes V-shaped because of its structure, the gate insulating film 5 is formed on the n − type semiconductor layer 2 whose gate electrode is the drain layer. It is because it is arranged via.

  5A and 5B are diagrams for explaining the gate-drain capacitance Cgd and the gate-source capacitance Cgs in the trench MOSFET. FIG. 5A is an equivalent circuit diagram, and FIG. It is a Venn diagram which shows the collection range of the capacity | capacitance to perform.

  The trench MOSFET has a structure in which a gate-source capacitance Cgs and a gate-drain capacitance Cgd are connected in parallel. For this reason, when the capacitance Cgs between the gate G and the source S is measured, the input capacitance Ciss equivalent to the case where the source S and the drain D are short-circuited (= gate-drain capacitance Cgd + gate-source capacitance Cgs). ) Is the same as when measuring.

  Therefore, the gate-drain capacitance Cgd is arithmetically excluded from the CV waveform (first CV waveform) between the gate G and the source S obtained by measuring the defective element 100.

  Since the capacitance of the gate-drain capacitance Cgd overlaps the gate-source capacitance Cgs, in order to obtain an actual (exact) gate G-source S CV waveform, A set operation is performed under the conditions shown (see FIG. 5B).

  Here, (Cgs∩Cgd) is an overlapping capacity.

  Next, the capacitance C of the MOS capacitive element formed by the gate oxide film 5, the gate electrode 6 and the n − type semiconductor layer 2 of the defective element 100 shown in FIG. 1 is determined by the gate oxide film capacitance Cox and the depletion layer capacitance Cd. It is represented by the following formula 2.

  Then, (Cgs と い う Cgd) is calculated by the following equations 3 and 4, using the principle that the capacitance C of the storage region is asymptotic to the gate oxide film capacitance Cox (C≈Cox).

  Here, since the depletion layer thickness on the accumulation side is as close to 0 (zero) as possible, it can be considered mathematically that Cd approaches infinity as much as possible.

  From the CV waveform (first CV waveform) between the solid gate G and the source S shown in FIG. 3 by (Cgs∩Cgd) calculated in this way, the distance between the gate G and the drain D indicated by the alternate long and short dash line The CV waveform between the gate G and the source S is corrected by subtracting the CV waveform. In the present embodiment, the value of (Cgs∩Cgd) is about 0.5 nF, for example.

  FIG. 6 is a diagram showing each waveform after performing the above set operation, and the CV waveform (second CV waveform) between the gate G and the source S after the calculation is shown by a solid line.

  Strictly speaking, the CV waveform between the gate G and the source S (second CV waveform) and the CV waveform between the gate G and the drain D (one-dot chain line) are not axially symmetric. This is because a pn junction is formed between the gate G and the drain D and includes a junction capacitance. However, since the junction capacitance is smaller than the oxide film capacitance, the influence on the CV waveform is small.

  The junction capacitance was corrected, and the CV waveform (fourth CV waveform) between the gate G and the source S after the capacitance correction was indicated by a two-dot chain line. This is because it is asymptotic to the gate oxide film capacitance Cox.

  Fourth step (FIG. 1, step 4): A step of comparing the second CV waveform with the reference third CV waveform.

  After correcting the CV waveform as described above, the reference CV waveform (third CV waveform) (FIG. 4B) of the non-defective product and the CV waveform ( The second CV waveform (solid line in FIG. 6) is compared. Further, the CV waveform of the non-defective real element may be corrected and compared with the fourth CV waveform after correction of the capacity of the defective element 100 (two-dot line in FIG. 6).

  FIG. 7 is a diagram comparing a third CV waveform (broken line) serving as a reference at the same frequency with a second CV waveform (solid line). Here, the CV waveforms in a state where no correction of the capacitance is performed are compared here.

  When the CV waveform shifts to the left and right, it can be seen that charges exist in the gate oxide film. In addition, the charge polarity can be seen from the changing direction of the CV waveform. That is, in the case between the gate G and the source S of the n-channel MOSFET, if the CV waveform is shifted in the negative voltage direction (left direction), it can be proved that positive charges exist in the gate oxide film 15 and the like.

  On the other hand, if the CV waveform is shifted in the positive voltage direction (right direction), it can be proved that negative charges exist in the gate oxide film 15 (see FIG. 4).

As shown in FIG. 7, in the defective element 100 of the present embodiment, the CV waveform between the gate G and the source S is shifted to the left, so that it can move around in the oxide film in the gate oxide film 5. There may exist mobile ions of light metals such as sodium ions (Na ⁺ ), potassium ions (K ⁺ ), magnesium ions (Mg ²⁺ ), calcium ions (Ca ²⁺ ), etc. There is sex. Alternatively, it may be an excess of silicon cations existing in an oxide film in the vicinity of the interface called fixed oxide charge (Qf).

  As described above, according to the present embodiment, it is possible to directly evaluate the gate oxide film of the real element in which the defect has occurred.

  As described above, the n-channel type MOSFET has been described in the present embodiment, but the present invention can be similarly applied to a p-channel type MOSFET whose conductivity type is reversed. Further, an IGBT (Insulated Gate Bipolar Transistor) having a structure in which a unipolar transistor and a bipolar transistor are combined can be similarly applied. Moreover, although the case where the frequency f of CV measurement was 100 Hz was demonstrated to the example, it was able to evaluate similarly when the frequency f was 10 KHz and 1 MHz.

  The optimum frequency depends on the capacity (gate oxide film thickness and gate area), and 100 Hz is not necessarily optimum. However, when the frequency is low, the difference between the CV waveforms tends to appear, but the difference between the CV waveforms tends to decrease as the frequency increases. This is because, as the frequency increases, the movement of charges in the gate oxide film 15 cannot follow the change in the gate voltage. Therefore, a low frequency is generally advantageous as an evaluation method.

  Further, if the CV waveform of the non-defective element can be compared with the CV waveform of the defective element, the CV waveform between the gate G and the source S or the CV waveform between the gate G and the drain D can be compared. Any of comparisons may be used.

  However, the CV waveform between the gate G and the drain D includes the junction capacitance between the n − type semiconductor layer 2 serving as the drain layer and the channel region. If there is a difference in impurity concentration or impurity concentration distribution, the difference affects. On the other hand, the CV waveform between the gate G and the source S can avoid such a risk because the source region is in contact with the gate oxide film.

  In particular, in the case of a planar type MOSFET, the influence of the above-described junction capacitance becomes large, so it is preferable to evaluate with a CV waveform between the gate G and the source S.

  As described above, the case where the defective element is compared with the good real element has been described as an example. However, the reliability test of the good real element may be performed, and the CV waveform may be obtained before and after the reliability test. . The main purpose of the reliability test is to reveal defects inherent in non-defective products, to investigate durability, and to estimate the lifetime, but here it corresponds to tests performed for the purpose of revealing defects. To do.

  That is, before the reliability test is performed, a reference third CV waveform is acquired, and after the reliability test is performed, the CV waveform (first CV waveform) of the actual element is obtained. get. The obtained first CV waveform is corrected to obtain a second CV waveform, which is compared with a third CV waveform (a waveform before the reliability test is performed).

  Thereby, it is possible to evaluate the movable charges in the gate oxide film 15 before and after the reliability test, or in the semiconductor crystal near the interface between the gate oxide film 15 and the semiconductor crystal, or in the vicinity of the interface.

  In this case, since the comparison is performed before and after the reliability test of the same element, there is no difference in the impurity concentration or impurity concentration distribution of the n − type semiconductor layer 2, so that CV between the gate G and the source S can be obtained. Either a waveform or a CV waveform between the gate G and the drain D may be used.

It is a flowchart explaining the evaluation method of the gate insulating film of embodiment of this invention. It is sectional drawing explaining the evaluation method of the gate insulating film of embodiment of this invention. It is a characteristic view explaining the evaluation method of the gate insulating film of embodiment of this invention. It is (A) principle figure, (B) characteristic figure, (C) principle figure, and (D) characteristic figure for demonstrating the evaluation method of the gate insulating film of embodiment of this invention. It is (A) an equivalent circuit diagram and (B) Venn diagram for demonstrating the evaluation method of the gate insulating film of embodiment of this invention. It is a characteristic view explaining the evaluation method of the gate insulating film of embodiment of this invention. It is a characteristic view explaining the evaluation method of the gate insulating film of embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Semiconductor layer 3 Channel area | region 4 Trench 5 Gate insulating film (oxide film)
6 gate electrode 7 source region 8 body region 9 source electrode 10 drain electrode 11 p-type semiconductor layer 12 n-type semiconductor layer 15 gate oxide film 16 gate electrode S source G gate D drain Cgs gate-source capacitance Cgd gate-drain capacitance

Claims (8)

An actual element of an insulated gate semiconductor device provided on a semiconductor substrate, having a desired diffusion region, a gate electrode, a gate insulating film, a source electrode connected to the diffusion region, and a drain electrode connected to the semiconductor substrate, A step of preparing a defective element having a defective electric characteristic of the real element;
Obtaining a first CV waveform by a CV measurement method between the gate electrode and the source electrode or between the gate electrode and the drain electrode at a predetermined frequency for the defective element;
Comparing the first CV waveform with a reference third CV waveform;
A method for evaluating a gate insulating film, comprising:   The third CV waveform is a waveform measured by a CV measurement method between a gate electrode and a source electrode or a gate electrode and a drain electrode at the predetermined frequency of a good real element of the insulated gate semiconductor element. The method for evaluating a gate insulating film according to claim 1, wherein: The defective element is an element whose electrical characteristics have become defective after performing a reliability test on a good real element of the insulated gate semiconductor element,
The first CV waveform is a waveform measured by a CV measurement method after performing a reliability test on the non-defective real element,
The third CV waveform was measured by the CV measurement method between the gate electrode and the source electrode or the gate electrode and the drain electrode at the predetermined frequency of the good real element before the reliability test. The method for evaluating a gate insulating film according to claim 1, wherein the method is a waveform.   Depending on the shift direction of the first CV waveform from the third CV waveform, the charge in the gate insulating film, the charge at the interface between the gate insulating film and the semiconductor crystal, or the semiconductor crystal near the interface 4. The method for evaluating a gate insulating film according to claim 2, wherein the presence of electric charge in the gate is evaluated. An actual element of a trench-type insulated gate semiconductor element provided on a semiconductor substrate and having a desired diffusion region, a gate electrode, a gate insulating film, a source electrode connected to the diffusion region, and a drain electrode connected to the semiconductor substrate. A step of preparing a defective element having a defective electric characteristic of the real element;
Obtaining a first CV waveform by a CV measurement method between the gate electrode and the source electrode and between the gate electrode and the drain electrode at a predetermined frequency for the defective element;
A second CV waveform obtained by correcting the first CV waveform using the capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode is obtained from the first CV waveform. And a process of
Comparing the second CV waveform with a reference third CV waveform;
A method for evaluating a gate insulating film, comprising:   The third CV waveform is a waveform measured by a CV measurement method between a gate electrode and a source electrode and a gate electrode and a drain electrode at the predetermined frequency of a good real element of the insulated gate semiconductor element. 2. The method for evaluating a gate insulating film according to claim 1, wherein the waveform is a waveform obtained by correcting the above. The defective element is an element whose electrical characteristics have become defective after performing a reliability test on a good real element of the insulated gate semiconductor element,
The first CV waveform is a waveform measured by a CV measurement method after performing a reliability test on the non-defective real element,
The third CV waveform was measured by the CV measurement method between the gate electrode and the source electrode at the predetermined frequency and between the gate electrode and the drain electrode of the good real element before the reliability test. 2. The method for evaluating a gate insulating film according to claim 1, wherein the waveform is a waveform obtained by correcting the waveform.   Depending on the shift direction of the second CV waveform from the third CV waveform, the charge in the gate insulating film, the charge at the interface between the gate insulating film and the semiconductor crystal, or the semiconductor crystal near the interface 8. The method for evaluating a gate insulating film according to claim 6, wherein the presence of electric charges in the gate insulating film is evaluated.

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