JP2009231604A - Substrate processing method and substrate with grounding portion - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of times of formation of etching processing mask on a surface of a substrate. <P>SOLUTION: The substrate 1 with a grounding portion includes a substrate 10, a GND unit portion 12 formed on a surface 10p of the substrate 10, a conductive layer 14 (for example, Ni) formed on a rear face of the substrate 10, through-holes 14a, 10c passing through the substrate 10 and the conductive layer 14, and a conductive member 16 covering the inner face IS of the through-holes 14a, 10c and the surface 14p of the conductive layer 14. An etching rate of the conductive layer 14 is smaller than that of the substrate 10, and a rear face 14q of the conductive layer 14 is put opposite to the front face 14p of the conductive layer 14 and put in contact with the rear face of the substrate 10. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an etching mask.

  Conventionally, it is known to use a photoresist and a photosensitive polyimide resin (for example, see the summary of Patent Document 1) as an etching mask in a semiconductor via hole processing step.

  In addition to GaAs and Si, SiC is known as a substrate material. The etching rate of the SiC substrate is considerably smaller than the etching rates of the GaAs substrate and the Si substrate. Therefore, it takes much time to open a via hole in an SiC substrate compared to an attempt to open a via hole in a GaAs substrate and an Si substrate.

Japanese Patent Laid-Open No. 2003-7706

  Here, it is assumed that a via hole is to be opened in the SiC substrate using the photoresist and the photosensitive polyimide resin as an etching mask. In this case, before the via hole is opened, the etching mask is scraped away. Therefore, every time the etching mask is removed, it becomes necessary to form the etching mask on the surface of the substrate.

  Therefore, an object of the present invention is to reduce the number of times of forming an etching mask on the surface of a substrate.

  The substrate processing method according to the present invention includes: a conductive layer forming step of forming a conductive layer having a first through hole opened on a back surface of a substrate on the back surface; and the substrate on which the conductive layer is formed An etching process that etches until a second through-hole is formed that opens to the through-hole and penetrates the substrate, and a grounding portion formed on the surface of the substrate and the conductive layer are connected by a conductive member. Connecting step, wherein the etching rate of the conductive layer is smaller than the etching rate of the substrate, and the conductive member has a portion disposed inside the first through hole and the second through hole. Configured to have.

  According to the substrate processing method configured as described above, in the conductive layer forming step, a conductive layer having a first through hole opened on the back surface of the substrate is formed on the back surface. In the etching step, the substrate on which the conductive layer is formed is etched until a second through hole that opens to the first through hole and penetrates the substrate is formed. In the connecting step, the grounding portion formed on the surface of the substrate and the conductive layer are connected by a conductive member. The etching rate of the conductive layer is smaller than the etching rate of the substrate. And the said electroconductive member has the part arrange | positioned inside the said 1st through-hole and said 2nd through-hole.

  In the substrate processing method according to the present invention, the substrate may have a SiC layer.

  In the substrate processing method according to the present invention, the conductive layer may be Ni.

  In the substrate processing method according to the present invention, the conductive layer forming step includes a step of forming a photoresist on the back surface, a step of plating the conductive layer on the back surface on which the photoresist is formed, A step of removing the photoresist.

  In the substrate processing method according to the present invention, the connecting member may form the conductive member so as to cover the conductive layer and the inner surfaces of the first through hole and the second through hole. Good.

  A substrate with a grounding portion according to the present invention includes a substrate, a grounding portion formed on the surface of the substrate, a conductive layer formed on the back surface of the substrate, a through-hole penetrating the substrate and the conductive layer, Etching the conductive layer, comprising a conductive member that covers a part or all of the inner surface of the through hole and a part or all of the surface of the conductive layer, and connects the ground portion and the conductive layer. The rate is smaller than the etching rate of the substrate, and the back surface of the conductive layer is configured to face the front surface of the conductive layer and be in contact with the back surface of the substrate.

  The board | substrate with a grounding part comprised as mentioned above has a board | substrate, and the grounding part is formed in the surface of the said board | substrate. A conductive layer is formed on the back surface of the substrate. A through hole penetrates the substrate and the conductive layer. A conductive member covers part or all of the inner surface of the through hole and part or all of the surface of the conductive layer, and connects the grounding portion and the conductive layer. The etching rate of the conductive layer is smaller than the etching rate of the substrate. Moreover, the back surface of the conductive layer faces the surface of the conductive layer and is in contact with the back surface of the substrate.

  In the substrate with a grounding portion according to the present invention, the substrate may have a SiC layer.

  In the substrate with a grounding portion according to the present invention, the conductive layer may be Ni.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a flowchart showing steps of a substrate processing method according to an embodiment of the present invention. First, the substrate to be processed will be described. FIG. 3 is a front view of the substrate 10.

  The substrate 10 has a base layer 10a and a sputter metal layer 10b. The material of the base layer 10a is, for example, SiC (silicon carbide). The sputter metal layer 10b is formed by forming a Ti layer (for example, 500 Å thick) on the base layer 10a by sputtering, and further forming an Au layer (for example, 1000 Å) by sputtering on the Ti layer. It is obtained by doing.

  A GND portion (grounding portion) 12 is formed on the surface 10p of the substrate 10. The GND unit 12 is grounded.

  Note that the surface of the substrate 10 facing the front surface 10p is referred to as a back surface 10q.

  The base layer 10a is processed (for example, ground and polished) to have a thickness of about 100 micrometers after the GND portion 12 is formed on the surface 10p. This processing is called thinning processing.

  Returning to FIG. 1, in the substrate processing method according to the embodiment of the present invention, first, the conductive layer 14 is formed on the back surface 10q (S10). This process is called a conductive layer forming process. In addition, the conductive layer 14 has the 1st through-hole 14a opened to the back surface 10q (refer FIG.4 (c)).

  FIG. 2 is a flowchart showing in detail the conductive layer forming step (S10). FIG. 4 is a front view of the substrate 10 for explaining the conductive layer forming step (S10) in detail.

  In the conductive layer forming step (S10), first, a step (S102) of forming a photoresist 20 on the back surface 10q of the substrate 10 is performed. FIG. 4A is a front view of the substrate 10 immediately after the step of forming the photoresist 20 (S102).

  Referring to FIG. 4A, two photoresists 20 having a diameter D = 50 μm (micrometer) and a height H = 15 μm are formed on the back surface 10q. The photoresist 20 is, for example, a THB151N (manufactured by JSR) resist. In order to form the photoresist 20, well-known processes (for example, spin coat application, baking, pattern exposure, and development) are performed. Description of these known steps is omitted.

  Next, a step (S104) of plating the conductive layer 14 on the back surface 10q on which the photoresist 20 is formed is performed. FIG. 4B is a front view of the substrate 10 immediately after the plating step (S104). However, in FIG. 4B, only a portion of the conductive layer 14 is taken and hatched.

For example, using a plating solution microfabricated Ni100, Ni is plated under the conditions of a temperature of 55 ° C., a current value of 0.9 A, and a processing time of 30 minutes (however, the area of the back surface 10q to be plated is 45 cm ² ) A conductive layer 14 having a thickness (see FIG. 4B) is obtained.

  It is assumed that the etching rate of the conductive layer 14 (meaning how much depth is etched per unit time by etching, the unit is μm / min) is smaller than the etching rate of the substrate 10. The conductive layer 14 is a conductor.

  The material of the conductive layer 14 is preferably Ni. (1) The thickness of the conductive layer 14 can be made relatively thick as 10 μm, (2) resistant to etching (for example, plasma etching) (low etching rate), (3) noble metals (Ag, Pt, etc.) This is because it has the advantage of being inexpensive compared to

  Note that the back surface 14q of the conductive layer 14 faces the front surface 14p of the conductive layer 14. In addition, the back surface 14q of the conductive layer 14 is in contact with the back surface 10q of the substrate 10 (see FIG. 4A).

  Finally, a step of removing the photoresist 20 (S106) is performed. FIG. 4C is a front view of the substrate 10 immediately after the step of removing the photoresist 20 (S106). However, in FIG. 4C, only a portion of the conductive layer 14 is taken and hatched.

When the material of the photoresist 20 is THB151N, the photoresist 20 can be removed from the substrate 10 with a dedicated alkaline solvent or O ₂ plasma ashing. When the photoresist 20 is removed, the portion where the photoresist 20 has been formed becomes the first through hole 14a. The first through hole 14a opens in the front surface 14p and the back surface 14q of the conductive layer 14. In addition, the back surface 14q of the conductive layer 14 is in contact with the back surface 10q of the substrate 10 (see FIG. 4A). Therefore, the conductive layer 14 has a first through hole 14a that opens in the back surface 10q of the substrate 10 (see FIG. 4C).

  Returning to FIG. 1, after the conductive layer forming step (S10), the substrate 10 on which the conductive layer 14 is formed is etched until the second through hole 10c is formed (S12). This process is called an etching process.

  FIG. 5 is a front sectional view of the substrate 10 immediately after the etching step (S12). However, for convenience of illustration, the sputter metal layer 10b is not hatched. Referring to FIG. 5, second through hole 10 c opens to first through hole 14 a and penetrates substrate 10.

  For example, etching is performed at a temperature of 100 ° C. or less (in order to prevent the adhesive from softening the adhesive that attaches the base layer 10a to the support substrate (not shown) for thinning processing) at about 110 ° C., fluorine-based A mixed gas of gas and oxygen is turned into plasma and reacted while reacting with the substrate 10. This etching is performed until the GND portion 12 becomes visible from the surface 14p of the substrate 14.

  In addition, the 1st through-hole 14a and the 2nd through-hole 10c can be recognized as an integral thing, ie, a through-hole. The through hole penetrates the substrate 10 and the conductive layer 14. In addition, it can be said that the through-hole is opened in the surface 10p of the board | substrate 10, and is opened in the GND part 12. FIG.

  Further, at the end of the etching step (S12), the conductive layer 14 is also slightly etched away. However, since the etching rate of the conductive layer 14 is smaller than the etching rate of the substrate 10, the back surface 10 q of the substrate 10 is not exposed even if the conductive layer 14 is scraped.

  After completion of the etching step (S12), the substrate 10 and the conductive layer 14 are cleaned. Washing is performed with running water or an acidic liquid. However, when the conductive layer 14 is made of Ni, it is not preferable to wash it with an acid that reacts well with Ni. This is because the conductive layer 14 is melted.

  The inner surfaces of the through holes (first through hole 14a and second through hole 10c) are referred to as IS.

  After cleaning the substrate 10 and the conductive layer 14, the GND portion (ground portion) 12 formed on the surface 10p of the substrate 10 and the conductive layer 14 are connected by the conductive member 16 (S14). This process is called a connection process.

  FIG. 6 is a front sectional view of the substrate 10 immediately after the connecting step (S14). However, for convenience of illustration, only the conductive member 16 is hatched. Referring to FIG. 6, conductive member 16 covers inner surface IS of through holes (first through hole 14 a and second through hole 10 c) and surface 14 p of conductive layer 14. In FIG. 6, the conductive member 16 covers the entire inner surface IS of the through hole and the entire surface 14 p of the conductive layer 14. However, the conductive member 16 only needs to cover part or all of the inner surface IS of the through hole and part or all of the surface 14p of the conductive layer 14. It can be said that the part of the conductive member 16 covering the inner surface IS of the through hole is disposed inside the first through hole 14a and the second through hole 10c.

  In addition, the board | substrate 10, the GND part 12, the conductive layer 14, and the electroconductive member 16 are united, and comprise the board | substrate 1 with a grounding part.

  The conductive member 16 is obtained by sputtering Ti and then sputtering Au from the surface 14p of the conductive layer 14. At this time, the conductive member 16 covers the entire inner surface IS of the through hole and the entire surface 14p of the conductive layer 14, and also covers the surface of the GND portion 12 (portion facing the through hole).

  The GND portion 12 is grounded by being connected to the conductive layer 14 by the conductive member 16. The conductive layer 14 functions as a ground (GND metal) for grounding the GND portion 12. Note that the conductive layer 14 need not be removed from the substrate 10.

  Further, Au plating (for example, a thickness of 3 to 5 μm) is performed on the conductive member 16.

  Finally, patterning (S16) is performed. FIG. 7 is a front sectional view of the substrate 10 for explaining patterning. However, for convenience of illustration, only the conductive member 16 is hatched. Referring to FIG. 7, in actual substrate processing, a plurality of substrates 10 shown in FIGS. 3 to 6 are integrated. Therefore, after the Au plating is performed on the conductive member 16, the substrate 10 is divided into pieces on the dividing surface S one by one. Before that, the conductive member 16 near the dividing surface S is deleted (patterning). The deleted part is called a deleted part R.

  According to the substrate processing method according to the embodiment of the present invention, the etching rate of the conductive layer 14 is smaller than the etching rate of the substrate 10. For this reason, at the end of the etching step (S12), the back surface 10q of the substrate 10 is not exposed even if the conductive layer 14 is scraped. Therefore, the conductive layer 14 may be formed once before the etching step (S12) is completed, and the conductive layer 14 may not be formed many times.

  In addition, the conductive layer 14 functions as a ground (GND metal) for grounding the GND portion 12. For this reason, even if an etching process (S12) is complete | finished, it is not necessary to remove the conductive layer 14 from the board | substrate 10. FIG. On the other hand, if a photoresist is used as a mask for etching (S12) of conductive layer 14, the photoresist must be removed at the end of etching (S12). However, according to the substrate processing method according to the embodiment of the present invention, since it is not necessary to remove the conductive layer 14 used as a mask, the labor for processing the substrate can be reduced. Moreover, since it is not necessary to remove the conductive layer 14, it is good for the environment.

  When Ni is used as the conductive layer 14, it is not impossible to remove the conductive layer 14 from the substrate 10 after the etching step (S12) is finished (if sulfuric acid, hydrochloric acid, nitric acid, phosphoric acid is used). Difficult to remove). The Ni layer is not as easy to remove with organic solvents as photoresist. For this reason, it was difficult to conceive of using the Ni layer as a mask for etching (S12) at the time of filing this application. However, since the Ni layer used as a mask functions as a GND metal, it is not necessary to remove the Ni layer, and the above advantageous effects are achieved.

  This is because the conductive member 16 covers the inner surface IS of the through holes (the first through hole 14a and the second through hole 10c) and the surface 14p of the conductive layer 14, thereby connecting the GND portion 12 and the conductive layer 14. Since the substrate with the grounding portion is configured as described above, the conductive layer 14 functions as a GND metal, and it can be said that the advantageous effects as described above were achieved.

It is a flowchart which shows the process of the board | substrate processing method concerning embodiment of this invention. It is a flowchart which shows a conductive layer formation process (S10) in detail. 2 is a front view of a substrate 10. FIG. It is a front view of the board | substrate 10 for demonstrating in detail a conductive layer formation process (S10). It is front sectional drawing of the board | substrate 10 immediately after an etching process (S12). It is front sectional drawing of the board | substrate 10 immediately after a connection process (S14). It is front sectional drawing of the board | substrate 10 for demonstrating patterning.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate with a grounding part 10 Board | substrate 10c 2nd through-hole 10p Surface 10q Back surface 12 GND part (grounding part)
14 conductive layer 14p surface 14q back surface 14a first through hole 16 conductive member 20 photoresist IS inner surface of through hole

Claims (8)

A conductive layer forming step of forming a conductive layer having a first through hole opening on the back surface of the substrate on the back surface;
An etching step of etching the substrate on which the conductive layer is formed until a second through hole is formed that opens to the first through hole and penetrates the substrate;
A connecting step of connecting the grounding portion formed on the surface of the substrate and the conductive layer with a conductive member;
With
The etching rate of the conductive layer is smaller than the etching rate of the substrate,
The conductive member has a portion disposed inside the first through hole and the second through hole.
Substrate processing method. The substrate processing method according to claim 1,
The substrate has a SiC layer;
Substrate processing method. The substrate processing method according to claim 1,
The conductive layer is Ni;
Substrate processing method. The substrate processing method according to claim 1,
The conductive layer forming step includes
Forming a photoresist on the back surface;
Plating the conductive layer on the back surface on which the photoresist is formed;
Removing the photoresist;
A substrate processing method comprising: The substrate processing method according to claim 1,
The connecting step includes
Forming the conductive member so as to cover the conductive layer and the inner surfaces of the first through hole and the second through hole;
Substrate processing method. A substrate,
A grounding portion formed on the surface of the substrate;
A conductive layer formed on the back surface of the substrate;
A through hole penetrating the substrate and the conductive layer;
A conductive member that covers part or all of the inner surface of the through-hole and part or all of the surface of the conductive layer, and connects the ground portion and the conductive layer;
With
The etching rate of the conductive layer is smaller than the etching rate of the substrate,
The back surface of the conductive layer faces the surface of the conductive layer and is in contact with the back surface of the substrate.
Substrate with grounding part. It is a board | substrate with a grounding part of Claim 6, Comprising:
The substrate has a SiC layer;
Substrate with grounding part. It is a board | substrate with a grounding part of Claim 6, Comprising:
The conductive layer is Ni;
Substrate with grounding part.

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