JP2009231594A - Hetero-junction bipolar transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an HBT capable of simultaneously improving both on-state resistance and a breakdown voltage in the state that a collector current is flowing. <P>SOLUTION: The hetero-junction bipolar transistor includes an n-type GaAs sub collector layer 101, an InGaP collector layer 102 formed on the GaAs sub collector layer 101, an n-type GaAs spacer layer 103 formed on the InGaP collector layer 102, an n-type GaAs second collector layer 104 and a GaAs first collector layer 105 formed on the GaAs spacer layer 103, a p-type GaAs base layer 110 formed on the GaAs first collector layer 105, and an n-type InGaP emitter layer 111 formed on the GaAs base layer 110. The GaAs sub collector layer 101 has a carrier density higher than that of the GaAs second collector layer 104 and the GaAs first collector layer 105, and the GaAs second collector layer 104 has the carrier density higher than that of the GaAs first collector layer 105. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to heterojunction bipolar transistors.

  A compound semiconductor device such as a field effect transistor (hereinafter referred to as FET) or a heterojunction bipolar transistor (hereinafter referred to as HBT) is, for example, a high output power amplifier for transmission which is one of the components of a mobile phone. Etc. are used. In recent years, high output characteristics, high gain characteristics, and low distortion characteristics have been demanded for HBTs, and in order to realize these, it is required to realize HBTs having high breakdown voltage and low on-resistance. Yes.

  As a material used for the emitter layer of the HBT, InGaP is becoming mainstream in recent years instead of AlGaAs. Advantages of InGaP include lattice matching with GaAs near In composition 0.5, high selectivity of wet etching to GaAs, and valence band discontinuity when bonded to GaAs base layer compared to AlGaAs. For example, it is large, there is no deep impurity level like the DX center found in AlGaAs, and the surface recombination velocity is low.

  Next, a device structure of a conventional HBT will be described with reference to a cross-sectional view of FIG. 12 (see, for example, Patent Document 1).

On a GaAs substrate 500, an n-type GaAs subcollector layer 501 having an electron concentration of 5E18 cm ⁻³ and a thickness of 600 nm, an undoped InGaP collector layer 502 having a thickness of 100 nm, and an n-type GaAs spacer layer having an electron concentration of 2E18 cm ⁻³ and a thickness of 10 nm 503, an n-type GaAs collector layer 504 having an electron concentration of 1E16 cm ⁻³ and a thickness of 500 nm, a p-type GaAs base layer 510 having a hole concentration of 4E19 cm ⁻³ and a thickness of 80 nm, an n-type InGaP emitter having an electron concentration of 3E17 cm ⁻³ and a thickness of 30 nm A layer 511, an n-type GaAs emitter cap layer 512 having an electron concentration of 3E18 cm ⁻³ and a thickness of 200 nm, and an n-type InGaAs emitter contact layer 513 having an electron concentration of 1E19 cm ⁻³ and a thickness of 100 nm are grown in this order. A collector electrode 520 is formed on the GaAs subcollector layer 501, a base electrode 521 is formed on the GaAs base layer 510, and an emitter electrode 522 is formed on the InGaAs emitter contact layer 513.

  The meaning of introducing the InGaP collector layer 502 is to improve the emitter-collector breakdown voltage (BVcex) in a state where the collector current flows, as described in detail in Patent Document 1. The peak of the electric field strength at this time occurs between the collector layer and the subcollector layer, and the breakdown voltage is improved by introducing InGaP having a collision ionization coefficient smaller than GaAs at this position.

  InGaP has the property that the atomic arrangement state and band gap in the crystal change according to the growth conditions. When the growth temperature of InGaP is changed, the group III elements In and Ga are regularly arranged in the group III atomic layer surface to form an order type (CuPt type natural superlattice structure), and irregularly arranged. The case where a disordered type is formed is observed. If InGaP is grown in a disordered type, a conduction band discontinuity (ΔEc) of approximately 0.2 eV occurs between InGaP and GaAs. Therefore, the on-resistance (Ron) indicating the rise of the collector current with respect to the collector voltage increases. The InGaP collector layer 502 in the HBT of Patent Document 1 is assumed to be a disordered type. To prevent this problem, an effective ΔEc is introduced by introducing an n-type GaAs spacer layer 503 in the HBT of Patent Document 1. Is reduced to prevent an increase in Ron.

On the other hand, if InGaP is grown in order, there is almost no conduction band discontinuity between InGaP and GaAs, and no increase in on-resistance due to that occurs. However, it is known that the order type has an abnormality in the concentration distribution state at the interface between InGaP and GaAs, but the cause is not clarified. The interface state density is said to be about 2E12 cm ^-2 , but it is not clear. For this reason, carrier depletion occurs at the interface between the InGaP layer and the layer above it (interface with InGaP GaAs), resulting in a positively charged state. On the other hand, carrier accumulation occurs at the interface between the InGaP layer and the layer below the InGaP layer, resulting in a negatively charged state. As a result, modulation occurs in the flatness of the conduction band between InGaP and GaAs, and this modulation becomes an obstacle when the collector current flows, so that the on-resistance increases.

A structure similar to that shown in FIG. 12 is also disclosed in Patent Document 2, but Patent Document 2 assumes order-type InGaP. Also in Patent Document 2, an n-type spacer layer is introduced on the InGaP collector layer. Further, Patent Document 3 discloses a structure in which an n-type spacer layer is introduced between an InGaP collector layer and a GaAs collector layer. Note that the electron concentration of the n-type spacer layer is limited to 1E18 cm ⁻³ or less in order to prevent a decrease in breakdown voltage.
JP2007-103784A (FIG. 6) Japanese Patent No. 3573737 JP 2005-39169 A

Incidentally, in the conventional HBT of FIG. 12, the electron concentration of the n-type GaAs spacer layer 503 cannot be increased without limitation in order to reduce Ron. This is because if the electron concentration is set to a high concentration such as 5E18 cm ⁻³ , BVcex will decrease. This will be described in detail.

  In the HBT of FIG. 12, the carrier concentration (electron concentration) and the electric field strength (absolute value) in the collector layer when the collector current sufficiently flows when the electron concentration of the n-type GaAs spacer layer 503 is increased. The distributions of are shown in FIGS. 13 (a) and 13 (b), respectively. 13A, the horizontal axis represents the distance from the surface of the GaAs base layer 510, the vertical axis represents the carrier concentration, and in FIG. 13B, the horizontal axis represents the distance from the surface of the GaAs base layer 510, and the vertical axis. Indicates electric field strength.

  As shown in FIG. 13A, in the region of the GaAs collector layer 504, the concentration of electrons injected from the emitter exceeds the set concentration and is negatively charged. On the other hand, in the region of the n-type GaAs spacer layer 503, the set electron concentration (set concentration) exceeds the actual electron concentration and is positively charged. Further, the region of the InGaP collector layer 502 is negatively charged due to undoping. As a result, as shown in FIG. 13B, the electric field strength is greatly reduced in the region of the n-type GaAs spacer layer 503, and the InGaP collector layer 502 is only slightly applied with an electric field. Is not alive. In this case, the breakdown voltage is determined by the electric field strength at the boundary between the GaAs collector layer 504 and the n-type GaAs spacer layer 503. When the n-type GaAs spacer layer 503 has such a high concentration, the same electric field strength is obtained in the undoped region. As compared with the case where the occurrence occurs, destruction occurs at a lower critical electric field strength. Therefore, in the HBT of FIG. 12, when the electron concentration of the n-type GaAs spacer layer 503 is set high, a sufficiently high breakdown voltage cannot be obtained.

However, to increase the breakdown voltage, when the electron concentration of the n-type GaAs spacer layer 503 in the HBT of FIG. 12 is set to a low concentration such as 5E17 cm ⁻³ , the peak of the electric field strength is applied to the InGaP collector layer 502 and the high breakdown voltage is increased. Although it is expected to be obtained, the on-resistance deteriorates conversely. Here, when the InGaP collector layer 502 is of the order type, as described above, carrier depletion occurs at the interface between the InGaP layer and the layer above the InGaP collector layer 502, resulting in a positively charged state. As a result, modulation occurs in the flatness of the conduction band between InGaP and GaAs, and this modulation becomes an obstacle when the collector current flows, so that the on-resistance increases.

  Therefore, an object of the present invention is to provide an HBT that can simultaneously improve both the on-resistance and the breakdown voltage in a state where a collector current flows.

  In order to solve the above problems, a heterojunction bipolar transistor of the present invention is formed on an n-type GaAs subcollector layer, an InGaP collector layer formed on the GaAs subcollector layer, and the InGaP collector layer. An n-type GaAs spacer layer; an n-type GaAs collector layer formed on the GaAs spacer layer; a p-type base layer formed on the GaAs collector layer; and a base layer formed on the base layer. an n-type emitter layer, wherein the carrier concentration of the GaAs subcollector layer is higher than the carrier concentration of the GaAs collector layer, and the carrier concentration of the GaAs collector layer is from the portion facing the base layer to the GaAs spacer layer. It is characterized by being raised toward the facing part. Here, the carrier concentration of the GaAs spacer layer may be higher than the maximum carrier concentration of the GaAs collector layer.

  Thereby, the peak of the electric field strength that determines the breakdown voltage can be generated in the low carrier concentration GaAs collector layer having a high critical electric field strength, so that the breakdown voltage of the HBT can be increased. At the same time, no peak of electric field strength occurs in the n-type GaAs spacer layer, so that the carrier concentration of the n-type GaAs spacer layer can be increased and the on-resistance can be reduced without considering the decrease in breakdown voltage. As a result, it is possible to realize an HBT capable of simultaneously improving both the on-resistance and the breakdown voltage in a state where the collector current is flowing.

  As described above, the heterojunction bipolar transistor of the present invention can simultaneously improve both the on-resistance and the breakdown voltage in the state where the collector current flows.

  Hereinafter, heterojunction bipolar transistors according to embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a cross-sectional view showing the structure of the HBT of this embodiment.

As shown in FIG. 1, on a GaAs substrate 100, an electron concentration 5E18 cm ^-3 and the n-type GaAs subcollector layer 101 with a thickness of 600 nm, the thickness 100nm of InGaP collector layer 102 an undoped electron concentration 5E18 cm ^-3 and the thickness An n-type GaAs spacer layer 103 having a thickness of 10 nm, an n-type GaAs second collector layer 104 having an electron concentration of 4E16 cm ⁻³ and a thickness of 400 nm, an n-type GaAs first collector layer 105 having an electron concentration of 1.4E16 cm ⁻³ and a thickness of 600 nm, holes A p-type GaAs base layer 110 having a concentration of 4E19 cm ⁻³ and a thickness of 80 nm, an n-type InGaP emitter layer 111 having an electron concentration of 3E17 cm ⁻³ and a thickness of 30 nm, and an n-type GaAs emitter cap layer 112 having an electron concentration of 3E18 cm ⁻³ and a thickness of 200 nm. , as well as the electron concentration 1E19cm ^-3 And n-type InGaAs emitter contact layer 113 having a thickness of 100nm are grown respectively in this order. By etching these semiconductor layers and electrode deposition, a collector electrode 120 is formed on the GaAs subcollector layer 101, a base electrode 121 is formed on the GaAs base layer 110, and an emitter electrode 122 is formed on the InGaAs emitter contact layer 113 as ohmic electrodes. Has been.

  At this time, the InGaP collector layer 102 is grown in a disordered type. Therefore, the crystal state of the InGaP collector layer 102 is not a natural superlattice state but a disordered state.

  Next, the breakdown voltage of the HBT having the above structure will be considered. FIGS. 2A and 2B are diagrams showing the distribution of carrier concentration (electron concentration) and electric field strength (absolute value) in the collector layer when a sufficiently high collector current flows. 2A, the horizontal axis indicates the distance from the surface of the GaAs base layer 110, the vertical axis indicates the carrier concentration, and in FIG. 2B, the horizontal axis indicates the distance from the surface of the GaAs base layer 110, and the vertical axis. Indicates electric field strength.

  As shown in FIG. 2A, in the region of the GaAs first collector layer 105 and the region of the InGaP collector layer 102, the actual electron concentration exceeds the set electron concentration (set concentration), and is negatively charged. ing. On the other hand, the regions of the GaAs second collector layer 104 and the n-type GaAs spacer layer 103 are positively charged. Therefore, as shown in FIG. 2B, the electric field strength has a peak at the boundary between the GaAs second collector layer 104 and the GaAs first collector layer 105. In this way, by generating the electric field intensity peak in the region of the low concentration GaAs collector layer having a high critical electric field intensity, the breakdown voltage which is the area occupied by the electric field intensity (the value obtained by integrating the electric field intensity in FIG. 2B). Becomes larger. Since the electric field strength is reduced in the region of the n-type GaAs spacer layer 103, almost no electric field is applied in the region of the InGaP collector layer 102. Therefore, it cannot be said that the high pressure resistance of InGaP is utilized. However, InGaP has wet etching selectivity over GaAs. In the high breakdown voltage type HBT, the collector layer has a thick film of about 1 μm. Therefore, as the film becomes thicker, the difficulty of the HBT manufacturing process increases. Therefore, the use of InGaP having etching selectivity facilitates the manufacturing process of HBT, so it can be said that the use of InGaP for HBT is essential.

  The setting of the electron concentration of the GaAs first collector layer 105 and the GaAs second collector layer 104 will be described with reference to FIGS.

  FIG. 3 is a diagram illustrating the relationship between BVcex and the ratio of the electron concentrations of the GaAs first collector layer 105 and the GaAs second collector layer 104 (collector layer concentration ratio) using the electron concentration of the GaAs first collector layer 105 as a parameter. It is. FIG. 4 is a diagram showing the relationship between the collector-collector breakdown voltage (BVceo) and the collector layer concentration ratio using the electron concentration of the GaAs first collector layer 105 as a parameter when no collector current is flowing.

  As shown in FIG. 3, BVcex has a peak at a predetermined collector layer concentration ratio, and the value increases as the electron concentration of the GaAs first collector layer 105 increases. When the electron concentration of the GaAs first collector layer 105 is a predetermined value and the electron concentration of the GaAs second collector layer 104 is low, an electric field intensity peak comes on the n-type GaAs spacer layer 103, and this electric field intensity peak causes The breakdown voltage is determined. On the other hand, when the electron concentration of the GaAs second collector layer 104 is high, an electric field strength peak appears at the boundary between the GaAs first collector layer 105 and the GaAs second collector layer 104, and the breakdown voltage is determined by the electric field peak. . Under the concentration condition where BVcex has a peak, it is considered that destruction occurs simultaneously at the two positions described above.

  As shown in FIG. 4, this time, the lower the electron concentration of the GaAs first collector layer 105, the higher the BVceo. When the GaAs first collector layer 105 has a predetermined electron concentration, the BVceo decreases as the electron concentration in the GaAs second collector layer 104 increases.

Figure 3 and Figure 4, GaAs electron concentration in the range of the first collector layer 105 and 1.0E16cm ^-3 or more 1.8E16cm ^-3 or less, 1.0E16cm the range of electron concentration in the GaAs second collector layer 104 ^-3 This was set to 7.0E16 cm ⁻³ or less.

  As described above, according to the HBT of the present embodiment, the collector layer is provided with the GaAs first collector layer 105 and the GaAs second collector layer 104 having different carrier concentrations, and the carrier concentration of the GaAs second collector layer 104 is GaAs. It is set to be higher than the carrier concentration of the first collector layer 105. Therefore, an electric field peak is generated in the region of the collector layer having a low carrier concentration, so that a high breakdown voltage of the HBT can be realized. In addition, since the electric field peak that determines the withstand voltage does not occur in the high-concentration n-type GaAs spacer layer 103, the carrier concentration of the n-type GaAs spacer layer 103 can be increased and a low on-resistance HBT can be realized.

In this embodiment, the GaAs second collector layer 104 has an impurity concentration of 4E16 cm ^−3, and the GaAs first collector layer 105 has an impurity concentration of 1.4E16 cm ^−3. Was added. However, the present invention is not limited to this as long as impurities are added so that the carrier concentration of the GaAs second collector layer 104 is higher than the carrier concentration of the GaAs first collector layer 105.

  Further, in the present embodiment, by laminating two semiconductor layers having different carrier concentrations, that is, the GaAs first collector layer 105 and the GaAs second collector layer 104, the carrier concentration on the n-type GaAs spacer layer 103 side is changed to the GaAs base layer. A concentration distribution higher than the carrier concentration on the 110 side is formed in the collector layer. However, only one GaAs layer is formed between the n-type GaAs spacer layer 103 and the GaAs base layer 110, and the carrier concentration increases from the portion on the GaAs base layer 110 side to the portion on the n-type GaAs spacer layer 103 side. The following concentration distribution may be formed in this one GaAs layer. In this case, concentration distribution is formed by stepwise or continuous implantation of impurities into the semiconductor layer so that the impurity concentration increases from the GaAs base layer 110 side toward the n-type GaAs spacer layer 103 side. Is done.

Further, in the present embodiment, the n-type GaAs spacer layer 103 is doped with impurities so that the carrier concentration is 5E18 cm ⁻³ . However, the n-type GaAs spacer layer 103 can prevent an increase in on-resistance due to conduction band discontinuity, and has a carrier concentration that does not cause a peak of electric field strength in the region of the n-type GaAs spacer layer 103. If an impurity is added to this, it will not be restricted to this. Specifically, a high concentration of 2E18 cm ^-3 or more and a maximum of higher carrier concentration than 4E16cm ^-3 is a carrier concentration of the GaAs collector layer (GaAs first collector layer 105 and the GaAs second collector layer 104) Thus, it is not limited to this as long as impurities are added.

In the present embodiment, the carrier concentration of the GaAs subcollector layer 101 is 5E18 cm ⁻³ , but is not limited thereto as long as it is higher than the carrier concentrations of the GaAs first collector layer 105 and the GaAs second collector layer 104. .

(Second Embodiment)
FIG. 5 is a cross-sectional view showing the structure of the HBT of the present embodiment.

As shown in FIG. 5, on a GaAs substrate 200, an electron concentration 5E18 cm ^-3 and the n-type GaAs subcollector layer 201 with a thickness of 600 nm, InGaP collector layer having a thickness of 100nm undoped 202, electron concentration 5E18 cm ^-3 and the thickness n-type GaAs spacer layer 203 of 10 nm, electron concentration 4E16cm ^-3 and the n-type GaAs fourth collector layer 204 having a thickness of 250nm, electron concentration 3E16cm ^-3 and the thickness 250nm of n-type GaAs third collector layer 205, the electron concentration 2E16cm ^-3 and 250 nm thick n-type GaAs second collector layer 206, electron concentration 1E16 cm ^-3 and 250 nm thick n-type GaAs first collector layer 207, hole concentration 4E19 cm ^-3 and 80 nm thick p-type GaAs base layer 210, electron concentration 3E17 cm ^-3 and thickness 3 nm of n-type InGaP emitter layer 211, the electron concentration 3E18 cm ^-3 and the n-type GaAs emitter cap layer 212 having a thickness of 200 nm, and electron concentration 1E19 cm ^-3 and a thickness of 100 nm n-type InGaAs emitter contact layer 213 are each in this order Has grown. By etching these semiconductor layers and depositing electrodes, a collector electrode 220 is formed on the GaAs subcollector layer 201, a base electrode 221 is formed on the GaAs base layer 210, and an emitter electrode 222 is formed on the InGaAs emitter contact layer 213 as ohmic electrodes. Has been.

  At this time, as in FIG. 1, the InGaP collector layer 202 is grown in a disordered type. Therefore, the crystal state of the InGaP collector layer 202 is not a natural superlattice state but a disordered state.

  Next, the breakdown voltage of the HBT having the above structure will be considered. FIGS. 6A and 6B are graphs showing the distribution of carrier concentration (electron concentration) and electric field strength (absolute value) in the collector layer when a sufficiently high collector current flows. 6A, the horizontal axis indicates the distance from the surface of the GaAs base layer 210, the vertical axis indicates the carrier concentration, and in FIG. 6B, the horizontal axis indicates the distance from the surface of the GaAs base layer 210, and the vertical axis. Indicates electric field strength.

  From the same consideration as that performed for FIGS. 2A and 2B, in this case, the peak of the electric field strength occurs at the boundary between the GaAs second collector layer 206 and the GaAs third collector layer 205. . In this way, in the structure in which the set concentration changes little by little in the collector layer, the change in the electric field strength from the peak of the electric field strength is gentle compared to FIG. The breakdown voltage expressed by the area occupied is further increased.

  As described above, according to the HBT of the present embodiment, a high breakdown voltage and low on-resistance HBT can be realized for the same reason as the HBT of the first embodiment.

In the present embodiment, the GaAs fourth collector layer 204 has a carrier concentration of 4E16 cm ^−3, and the GaAs third collector layer 205 has a carrier concentration of 3E16 cm ⁻³ . Impurities are added so that the carrier concentration of the two collector layers 206 is 2E16 cm ⁻³ and the carrier concentration of the GaAs first collector layer 207 is 1E16 cm ⁻³ . However, if impurities are added so that the electron concentration increases in the order of the GaAs first collector layer 207, the GaAs second collector layer 206, the GaAs third collector layer 205, and the GaAs fourth collector layer 204, it is limited to this. Absent.

  Further, in the present embodiment, four GaAs layers having different carrier concentrations, such as a GaAs first collector layer 207, a GaAs second collector layer 206, a GaAs third collector layer 205, and a GaAs fourth collector layer 204, are stacked. It is assumed that a concentration distribution in which the carrier concentration on the n-type GaAs spacer layer 203 side is higher than the carrier concentration on the GaAs base layer 210 side is formed in the collector layer. However, only one GaAs layer is formed between the n-type GaAs spacer layer 203 and the GaAs base layer 210, and the carrier concentration increases from the portion on the GaAs base layer 210 side to the portion on the n-type GaAs spacer layer 203 side. This concentration distribution may be formed in this single GaAs. In this case, a concentration distribution is formed by stepwise or continuous implantation of impurities into the GaAs layer so that the impurity concentration increases from the GaAs base layer 210 side toward the n-type GaAs spacer layer 203 side. Is done.

Further, in the present embodiment, the n-type GaAs spacer layer 203 is doped with impurities so that the carrier concentration is 5E18 cm ⁻³ . However, the n-type GaAs spacer layer 203 can prevent an increase in on-resistance due to conduction band discontinuity, and has a carrier concentration that does not generate a peak of electric field strength in the region of the n-type GaAs spacer layer 203. If an impurity is added to this, it will not be restricted to this. Specifically, the maximum concentration of the GaAs collector layer (GaAs first collector layer 207, GaAs second collector layer 206, GaAs third collector layer 205, and GaAs fourth collector layer 204) at a high concentration of 2E18 cm ⁻³ or more. However, the present invention is not limited to this as long as impurities are added so that the carrier concentration is higher than the carrier concentration of 4E16 cm ⁻³ .

In the present embodiment, the carrier concentration of the GaAs subcollector layer 201 is 5E18 cm ⁻³ , but the GaAs first collector layer 207, the GaAs second collector layer 206, the GaAs third collector layer 205, and the GaAs first collector layer 201. If it is higher than the carrier concentration of 4 collector layers 204, it will not be restricted to this.

(Third embodiment)
FIG. 7 is a cross-sectional view showing the structure of the HBT of the present embodiment.

As shown in FIG. 7, on a GaAs substrate 300, an electron concentration 5E18 cm ^-3 and the n-type GaAs subcollector layer 301 with a thickness of 600 nm, InGaP collector layer having a thickness of 100nm undoped 302, electron concentration 1E18 cm ^-3 and the thickness An n-type GaAs spacer layer 303 having a thickness of 10 nm, an n-type GaAs collector layer 304 having an electron concentration of 1.4E16 cm ⁻³ and a thickness of 1000 nm, a p-type GaAs base layer 310 having a hole concentration of 4E19 cm ⁻³ and a thickness of 80 nm, and an electron concentration of 3E17 cm ^−3. An n-type InGaP emitter layer 311 having a thickness of 30 nm, an n-type GaAs emitter cap layer 312 having an electron concentration of 3E18 cm ⁻³ and a thickness of 200 nm, and an n-type InGaAs emitter contact layer 313 having an electron concentration of 1E19 cm ⁻³ and a thickness of 100 nm. In this order It is. By etching these semiconductor layers and electrode deposition, a collector electrode 320 is formed on the GaAs subcollector layer 301, a base electrode 321 is formed on the GaAs base layer 310, and an emitter electrode 322 is formed on the InGaAs emitter contact layer 313 as ohmic electrodes. Has been.

At this time, the InGaP collector layer 302 is grown in order. Therefore, the crystal state of the InGaP collector layer 302 is partially or completely (CuPt type) natural superlattice state, which is in the order state. Since the InGaP collector layer 302 is of the order type, the on-resistance is not deteriorated due to the conduction band discontinuity. However, as described above, in the case of the order type, the carrier is depleted at the interface between the InGaP layer and the layer above it, and is in a positively charged state. In order to eliminate this positive charge, a low-concentration n-type GaAs spacer layer 303 is introduced between the InGaP collector layer 302 and the GaAs collector layer 304 thereabove. Free electrons from the n-type GaAs spacer layer 303 cancel with the positive charges in the depletion region. The donor is positively charged due to electron shortage, but the electrons generated at the interface with the GaAs subcollector layer 301 below the InGaP collector layer 302 are n-type GaAs spacer layer 303 (donor region). To eliminate the positive charge of the donor. By doing so, the positive charge and the electrons cancel each other, and the positive charge of the InGaP collector layer 302 disappears. Therefore, the electron concentration of the n-type GaAs spacer layer 303 does not need to be high enough to prevent an increase in on-resistance due to conduction band discontinuity. ^-3 or more and lower than 2E18 cm ^-3 , so the concentration is low.

  Next, the breakdown voltage of the HBT having the above structure will be considered. FIGS. 8A and 8B are diagrams showing the distribution of carrier concentration (electron concentration) and electric field strength (absolute value) in the collector layer when a sufficiently high collector current flows. 8A, the horizontal axis indicates the distance from the surface of the GaAs base layer 310, the vertical axis indicates the carrier concentration, and in FIG. 8B, the horizontal axis indicates the distance from the surface of the GaAs base layer 310, and the vertical axis. Indicates electric field strength.

  Since the set concentration of the n-type GaAs spacer layer 303 is low, an electric field strength gradient hardly occurs in the n-type GaAs spacer layer 303. Therefore, it can be said that a high electric field can be applied to the InGaP collector layer 302 and the high breakdown voltage of InGaP is utilized. At this time, the position of the electric field that determines the breakdown voltage is either the interface between the InGaP collector layer 302 and the GaAs subcollector layer 301 or the n-type GaAs spacer layer 303. This position changes depending on the condition of the carrier concentration in the InGaP collector layer 302 or in the n-type GaAs spacer layer 303. Where the carrier concentration is high, the breakdown voltage is determined by breakdown at a low electric field strength, so the breakdown voltage is not always determined at the position where the electric field strength is the highest. In this way, when the InGaP collector layer 302 is of the order type, the on-resistance deterioration phenomenon due to ΔEc does not occur, and therefore the electron concentration of the n-type GaAs spacer layer 303 is changed to the conventional HBT structure (HBT structure in FIG. 12). By lowering the concentration, a high electric field can be applied to the InGaP collector layer 302, and the high breakdown voltage of InGaP is utilized.

  As described above, according to the HBT of the present embodiment, the n-type GaAs spacer layer 303 is provided above the order-type InGaP collector layer 302. Therefore, an increase in on-resistance due to modulation of the flatness of the conduction band between InGaP and GaAs can be eliminated. Further, the carrier concentration of the n-type GaAs spacer layer 303 is set low. Accordingly, since a high electric field is applied to the InGaP collector layer 302, the HBT can have a high breakdown voltage.

In the present embodiment, the n-type GaAs spacer layer 303 is doped with impurities so that its carrier concentration is 1E18 cm ⁻³ . However, in the n-type GaAs spacer layer 303, the positive charge of the InGaP collector layer 302 can be extinguished, and the impurity concentration is set so as to have a carrier concentration that does not cause an electric field strength peak in the region of the n-type GaAs spacer layer 303. If is added, it is not limited to this. Specifically, at concentrations as low as below 2E18 cm ^-3 at 1E18 cm ^-3 or more, and if impurities are added to a higher carrier concentration than 1.4E16cm ^-3 is a carrier concentration of the GaAs collector layer 304 It is not limited to this.

In the present embodiment, the carrier concentration of the GaAs subcollector layer 301 is 5E18 cm ⁻³ , but is not limited thereto as long as it is higher than the carrier concentration of the GaAs collector layer 304.

(Fourth embodiment)
FIG. 9 is a cross-sectional view showing the structure of the HBT of the present embodiment.

As shown in FIG. 9, on a GaAs substrate 400, an electron concentration 5E18 cm ^-3 and the n-type GaAs subcollector layer 401 with a thickness of 600 nm, InGaP collector layer having a thickness of 100nm undoped 402, electron concentration 1E18 cm ^-3 and the thickness An n-type GaAs spacer layer 403 having a thickness of 10 nm, an n-type GaAs second collector layer 404 having an electron concentration of 4E16 cm ⁻³ and a thickness of 400 nm, an n-type GaAs first collector layer 405 having an electron concentration of 1.4E16 cm ⁻³ and a thickness of 600 nm, holes A p-type GaAs base layer 410 having a concentration of 4E19 cm ⁻³ and a thickness of 80 nm, an n-type InGaP emitter layer 411 having an electron concentration of 3E17 cm ⁻³ and a thickness of 30 nm, and an n-type GaAs emitter cap layer 412 having an electron concentration of 3E18 cm ⁻³ and a thickness of 200 nm. , as well as the electron concentration 1E19cm ^-3 And n-type InGaAs emitter contact layer 413 having a thickness of 100nm are grown respectively in this order. By etching these semiconductor layers and electrode deposition, a collector electrode 420 is formed on the GaAs subcollector layer 401, a base electrode 421 is formed on the GaAs base layer 410, and an emitter electrode 422 is formed on the InGaAs emitter contact layer 413 as ohmic electrodes. Has been.

  At this time, the InGaP collector layer 402 is grown in order. Therefore, the crystal state of the InGaP collector layer 402 is partially or completely (CuPt type) natural superlattice state, which is an order state. Since the InGaP collector layer 402 is an order type, on-resistance is not deteriorated due to conduction band discontinuity. Further, since the n-type GaAs spacer layer 403 is provided above the InGaP collector layer 402, an increase in on-resistance due to modulation of the flatness of the conduction band between InGaP and GaAs can be eliminated.

  Next, the breakdown voltage of the HBT having the above structure will be considered. FIGS. 10A and 10B are graphs showing the distribution of carrier concentration (electron concentration) and electric field strength in the collector layer when a sufficiently high collector current flows. 10A, the horizontal axis indicates the distance from the surface of the GaAs base layer 410, the vertical axis indicates the carrier concentration, and in FIG. 10B, the horizontal axis indicates the distance from the surface of the GaAs base layer 410, and the vertical axis. Indicates electric field strength.

  From the same consideration as that performed for FIGS. 2A and 2B, the peak of the electric field strength occurs in the region of the low concentration collector layer where the critical electric field strength is high. A certain withstand voltage increases. The position of the electric field intensity peak that determines the breakdown voltage is one of the interface between the InGaP collector layer 402 and the GaAs subcollector layer 401, the n-type GaAs spacer layer 403, and the low concentration collector layer. This position varies depending on the condition of the carrier concentration in the boundary region between the InGaP collector layer 402, the n-type GaAs spacer layer 403, or the n-type GaAs first collector layer 405 and the n-type GaAs second collector layer 404. If the breakdown voltage is determined in the n-type GaAs spacer layer 303 in the HBT of FIG. 7, the electric field strength in the n-type GaAs spacer layer 303 becomes equal in FIG. 8B and FIG. Comparing the area occupied by the electric field strength, it can be said that the breakdown voltage is higher in the HBT in FIG. 9 than in the HBT in FIG.

In the present embodiment, the n-type GaAs spacer layer 403 is doped with impurities so that its carrier concentration is 1E18 cm ⁻³ . However, in the n-type GaAs spacer layer 403, the impurity concentration can be such that the positive charge of the InGaP collector layer 402 can be eliminated and the carrier concentration does not cause a field strength peak in the region of the n-type GaAs spacer layer 403. If is added, it is not limited to this. Specifically, at a low concentration of 1E18 cm ^-3 or more 2E18 cm ^-3 or less, and higher than 4E16cm ^-3, the largest carrier concentration of the GaAs collector layer (GaAs second collector layer 404 and the GaAs first collector layer 405) The present invention is not limited to this as long as impurities are added so that the carrier concentration is achieved.

In the present embodiment, the carrier concentration of the GaAs subcollector layer 401 is 5E18 cm ⁻³ , but is not limited thereto as long as it is higher than the carrier concentrations of the GaAs second collector layer 404 and the GaAs first collector layer 405. .

  FIG. 11 shows the electrical measurement results for the HBTs examined so far. FIG. 11 is a diagram showing Ice-Vce measurement results at a predetermined Ib for the HBTs of FIGS. 1, 5, 7 and 9. In FIG. In FIG. 11, the horizontal axis indicates Vce and the vertical axis indicates Ice.

  As described above, in the HBTs of FIGS. 1, 5, and 12, the InGaP collector layer is a disorder type, and the HBTs of FIGS. 7 and 9 are an order type. In the HBT of FIG. 12, the carrier concentration of the n-type GaAs spacer layer is not appropriate, the rise of Ice is poor due to ΔEc of InGaP, and the on-resistance is higher than those of FIGS. 1, 5, 7, and 9. In the HBTs of FIGS. 1 and 5, since the carrier concentration of the n-type GaAs spacer layer is high, the rise of Ice is good and the on-resistance is low. In addition, since the InBT of the HBT of FIGS. 7 and 9 is of the order type and the carrier concentration of the n-type GaAs spacer layer is low, there is a problem of ΔEc and a problem of modulation of the flatness of the conduction band between InGaP and GaAs. Similarly, the on-resistance is low.

  Further, with respect to the withstand voltage, the HBT in FIG. 5 in which the collector layer is further multilayered is higher than the HBT in FIG. The breakdown voltage of the HBT in FIGS. 7 and 9 and the HBT in FIGS. 1 and 5 varies depending on the condition of the carrier concentration in the InGaP collector layer, n-type GaAs spacer layer, or n-type GaAs collector layer. Any HBT is higher than at least the conventional HBT of FIG. Such a technique for multilayering the collector layer is also introduced in Japanese Patent Application Laid-Open No. 2007-173624 and Japanese Patent Application Laid-Open No. 2006-60221, both of which are high-concentration n-type GaAs spacer layers as in the present invention. Is not touched on.

  Although the heterojunction bipolar transistor of the present invention has been described based on the embodiment, the present invention is not limited to this embodiment. The present invention includes various modifications made by those skilled in the art without departing from the scope of the present invention.

  The present invention can be used for heterojunction bipolar transistors, and in particular, can be used for transmission high-output power amplifiers and the like used for cellular phones and the like.

It is sectional drawing showing the device structure of HBT by the 1st Embodiment of this invention. (A) It is a figure showing the carrier concentration distribution of HBT by the 1st Embodiment of this invention. (B) It is a figure showing the electric field strength distribution of HBT by the 1st Embodiment of this invention. It is a figure showing the relationship between BVcex and collector layer concentration ratio when changing the collector layer concentration of HBT by the 1st Embodiment of this invention. It is a figure showing the relationship between BVceo and collector layer concentration ratio when changing the collector layer concentration of HBT by the 1st Embodiment of this invention. It is sectional drawing showing the device structure of HBT by the 2nd Embodiment of this invention. (A) It is a figure showing the carrier concentration distribution of HBT by the 2nd Embodiment of this invention. (B) It is a figure showing the electric field strength distribution of HBT by the 2nd Embodiment of this invention. It is sectional drawing showing the device structure of HBT by the 3rd Embodiment of this invention. (A) It is a figure showing the carrier concentration distribution of HBT by the 3rd Embodiment of this invention. (B) It is a figure showing the electric field strength distribution of HBT by the 3rd Embodiment of this invention. It is sectional drawing showing the device structure of HBT by the 4th Embodiment of this invention. (A) It is a figure showing the carrier concentration distribution of HBT by the 4th Embodiment of this invention. (B) It is a figure showing the electric field strength distribution of HBT by the 4th Embodiment of this invention. It is a figure showing the Ice-Vce electrical characteristic of 1st-4th embodiment of this invention and HBT by a prior art. It is sectional drawing showing the device structure of HBT by a prior art. (A) It is a figure showing the carrier concentration distribution of HBT by a prior art. (B) It is a figure showing the electric field strength distribution of HBT by a prior art.

Explanation of symbols

100, 200, 300, 400, 500 GaAs substrate 101, 201, 301, 401, 501 GaAs subcollector layer 102, 202, 302, 402, 502 InGaP collector layer 103, 203, 303, 403, 503 GaAs spacer layer 104, 206, 404 GaAs second collector layer 105, 207, 405 GaAs first collector layer 110, 210, 310, 410, 510 GaAs base layer 111, 211, 311, 411, 511 InGaP emitter layer 112, 212, 312, 412, 512 GaAs emitter cap layer 113, 213, 313, 413, 513 InGaAs emitter contact layer 120, 220, 320, 420, 520 Collector electrode 121, 221, 321, 421, 521 Electrodes 122,222,322,422,522 emitter electrode 204 GaAs fourth collector layer 205 GaAs third collector layer 304, 504 GaAs collector layer

Claims (6)

an n-type GaAs subcollector layer;
An InGaP collector layer formed on the GaAs subcollector layer;
An n-type GaAs spacer layer formed on the InGaP collector layer;
An n-type GaAs collector layer formed on the GaAs spacer layer;
A p-type base layer formed on the GaAs collector layer;
An n-type emitter layer formed on the base layer,
The carrier concentration of the GaAs subcollector layer is higher than the carrier concentration of the GaAs collector layer,
The heterojunction bipolar transistor, wherein the carrier concentration of the GaAs collector layer increases from a portion facing the base layer toward a portion facing the GaAs spacer layer. The heterojunction bipolar transistor according to claim 1, wherein the carrier concentration of the GaAs spacer layer is higher than the maximum carrier concentration of the GaAs collector layer. The GaAs collector layer includes a GaAs second collector layer facing the GaAs spacer layer and a GaAs first collector layer facing the base layer.
The heterojunction bipolar transistor according to claim 1 or 2, wherein the carrier concentration of the GaAs second collector layer is higher than the carrier concentration of the GaAs first collector layer. The carrier concentration of the GaAs first collector layer is 1.0E16cm ^-3 or more 1.8E16cm ^-3 or less,
The GaAs co carrier concentration of the second collector layer, a heterojunction bipolar transistor according to claim 3, wherein the at 1.0E16cm ^-3 or more 7.0E16cm ^-3 or less. The crystal state of the InGaP collector layer is in a disordered state,
5. The heterojunction bipolar transistor according to claim 1, wherein a carrier concentration of the GaAs spacer layer is 2E18 cm ⁻³ or more. The crystal state of the InGaP collector layer is a natural superlattice state,
5. The heterojunction bipolar transistor according to claim 1, wherein a carrier concentration of the GaAs spacer layer is 1E18 cm ⁻³ or more and lower than 2E18 cm ⁻³ .

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