JP2009206461A - Nitride semiconductor light emitting element, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor light emitting element that maintains excellent light emission efficiency (external quantum efficiency) even under a large current density condition. <P>SOLUTION: The nitride semiconductor light emitting element includes a plurality of nitride semiconductor layers parallel to a nonpolar A plane. The nitride semiconductor light emitting element includes one or more n-type nitride semiconductor layers, a nitride semiconductor active layer (113), one or more p-type nitride semiconductor layers (112, 111, 110a), and metal layers (107, 106) which are laminated in order, and the active layer includes one or more quantum well layers, the distance between the metal layer (107) and the quantum well layer closest thereto being 10 to 50 nm. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

The present invention, nitride semiconductor _{(In x Al y Ga 1-} xy N: 0 ≦ x, 0 ≦ y, x + y ≦ 1) light emitting elements such as light emitting diodes using (LED) and laser diodes (LD) and It relates to the manufacturing method.

  In recent years, nitride semiconductor light emitting diodes and nitride semiconductor laser diodes have been realized. Most of the nitride light-emitting diodes in practical use at present are so-called C-plane nitride light-emitting diodes, which are hexagonal sapphire C-plane, ie, (0001) plane, or A-plane orthogonal to (11-). 20) It is fabricated using a nitride semiconductor layer having a C plane that grows in parallel on the plane. However, in order to realize a light emitting device that can meet the demanded high current density condition in the future, it is considered that the crystal growth surface of the nitride semiconductor layer needs to be reexamined.

  The schematic perspective views of FIGS. 8 and 9 show the main crystallographic orientations in hexagonal sapphire crystals and GaN crystals. In the atomic plane parallel to the C plane of the GaN crystal, the Ga atomic plane and the N atomic plane are alternately overlapped. Then, due to the difference in electronegativity between these different atoms, spontaneous polarization occurs in the c-axis direction in the crystal, that is, the [0001] axis direction. Further, when strain is applied, piezoelectric (piezoelectric) polarization occurs. Are superimposed. In the quantum well layer acting as the light emitting layer (parallel to the C-plane), if an electric field due to polarization is generated in this way, electrons and holes are separated on both interface sides of the well layer, leading to a decrease in light emission efficiency. . In particular, under a large current density condition, separation of electrons and holes becomes remarkable, and the decrease in luminous efficiency becomes more remarkable.

As a countermeasure, there is an example in which a nitride light-emitting diode including an active layer (light-emitting layer) parallel to a nonpolar A-plane on a sapphire R-plane, that is, a (01-12) plane, has been prototyped (for example, see Patent Document 1 No. 2006-196490 and Japanese Patent Application Laid-Open No. 2007-157766 of Patent Document 2). In this case, spontaneous polarization in the active layer is suppressed, and it is possible to obtain a light emitting element in which the separation of electrons and holes in the quantum well is small and the light emission efficiency is hardly lowered.
JP 2006-196490 A JP 2007-157766 A

However, even the techniques disclosed in Patent Document 1 and Patent Document 2 can realize a light-emitting element in which the current-light output correlation is linear under a large current density condition of 150 A / cm ² or more. Not enough for that.

  As a physical structure model, separation of electrons and holes can be suppressed in the quantum well of the nonpolar nitride semiconductor layer parallel to the A plane under such a large current density condition, but the light emission recombination lifetime. (Carrier lifetime until electrons and holes as carriers recombine and emit light) is not short enough, so that carriers overflow from the well layer before recombination in the well layer. I guess that.

  In view of such a situation in the prior art, an object of the present invention is to provide a nitride semiconductor light emitting device capable of maintaining good light emission efficiency (external quantum efficiency) even under a large current density condition.

  The nitride semiconductor light emitting device according to the present invention includes a plurality of nitride semiconductor layers parallel to the nonpolar A-plane, and the light emitting device includes one or more n-type nitride semiconductor layers and a nitride semiconductor active layer sequentially stacked. The active layer includes one or more quantum well layers, and the distance between the metal layer and the nearest quantum well layer is in the range of 10 nm to 50 nm. It is characterized by being. As a result, the luminescence recombination lifetime is shortened by the surface plasmon resonance effect, and the situation where carriers overflow before being recombined in the well layer can be suppressed. As a result, it is considered that a nitride semiconductor light emitting device having a good luminous efficiency (external quantum efficiency) can be obtained even under a large current density condition.

  In addition, it is preferable that the thickness of a well layer exists in the range of 2.5 nm or more and 5.0 nm or less. In this case, it is presumed that the thickness of the well layer becomes sufficient, and carrier overflow can be further suppressed, and the internal quantum efficiency can be greatly improved.

  The present invention is particularly effective when the nitride semiconductor active layer generates light in the wavelength range of 390 nm to 510 nm. A well layer that generates light in such a wavelength range contains In having a large atomic radius in a relatively large composition ratio. When the present invention is not applied, not only the spontaneous polarization due to the polarity but also the well layer is distorted. In some cases, significant piezoelectric polarization is superimposed, and electrons and holes in the quantum well layer are separated on both interface sides of the well layer, leading to a decrease in luminous efficiency. That is, by applying the present invention, it is possible to suppress not only the spontaneous polarization but also the influence of piezoelectric polarization, and it is estimated that the internal quantum efficiency can be greatly improved even under a large current density condition. The

  When manufacturing the nitride semiconductor light emitting device as described above, it is preferable that the plurality of nitride semiconductor layers included in the light emitting device are vapor-phase grown on the R surface of the sapphire substrate or the A surface of the GaN substrate. By using these substrates, it becomes easy to grow a nitride semiconductor layer parallel to the A plane. After the growth of the plurality of nitride semiconductor layers, the substrate is preferably peeled off, and the plurality of nitride semiconductor layers are preferably sandwiched between the p-type electrode and the n-type electrode.

  In terms of terms such as plasmon, surface plasmon, and surface plasmon resonance, free electrons in a metal can be regarded as a kind of plasma state, and the collective motion (vibration) of free electrons is called plasma oscillation. It has the property of wave (charge density wave). This plasma vibration is regarded as particles in terms of quantum mechanics and is called plasmon.

  A surface plasmon is a collective oscillation wave (having a longitudinal wave property) of electrons localized on a metal surface, and a surface plasma oscillation is a decay wave whose amplitude decays exponentially with the depth from the surface ( Near-field light).

  In the bulk, since the plasma oscillation is a longitudinal wave, it does not interact with an electromagnetic wave that is a transverse wave. However, in a thin film smaller than the attenuation depth of the surface plasmon, the interaction between the electromagnetic wave and the surface plasmon occurs, and in the region near the surface where this resonance occurs, the electric field can be enhanced by several orders of magnitude.

Further, with the present invention, as described above the nitride-based semiconductor _{In x Al y Ga 1-xy} N (0 ≦ x, 0 ≦ y, x + y ≦ 1) refers to, but about 20 atomic percent of nitrogen element The following may be substituted with any element of As, P and Sb. Furthermore, it goes without saying that the nitride semiconductor may be doped with any of Si, O, Cl, S, C, Ge, Zn, Cd, Mg, and Be.

  According to the present invention, in the nitride semiconductor light emitting device, the distance between the metal layer and the quantum well layer in the active layer closest thereto is within the range of 10 nm or more and 50 nm or less. The coupling lifetime is shortened, and the situation where carriers overflow before the light emission recombination in the well layer can be suppressed. As a result, a nitride semiconductor light emitting device having a good luminous efficiency (external quantum efficiency) even under a large current density condition can be obtained.

<Example 1>
FIG. 1 is a schematic cross-sectional view showing a nitride-based semiconductor light-emitting diode according to Example 1 of the present invention. In this light emitting diode, a positive electrode (Ti / Au) 101, a conductive Si support substrate 102, a metal layer (Ti / Au) 103 on the Si support substrate, an Au-Sn junction metal layer 104, a barrier metal layer (Au / Ni-Ti) 105, reflective metal layer (Ag) 106, ohmic layer for p-type GaN (Pd) 107, p-type GaN uneven region 110a, p-type GaN layer 111, p-type AlGaN evaporation prevention layer (p-type Al _0.15 Ga) _0.85 N) 112, InGaN active layer 113, n-type GaN layer 114, n-type GaN uneven region 115, transparent conductor layer 120, and negative electrode pad electrode (Ti / Al / Ti / Au) 121 are laminated in this order. . In the following, a method for manufacturing the nitride semiconductor light emitting diode will be described.

(Crystal growth)
FIG. 2 is a schematic cross-sectional view illustrating a photolithography process when processing a sapphire substrate, and FIG. 3 is a schematic view of a wafer including a nitride semiconductor multilayer structure formed by crystal growth on the processed sapphire substrate. It is sectional drawing.

In FIG. 2, a mask layer of SiO ₂ or SiN is deposited with a thickness in the range of 100 to 500 nm so as to cover the upper surface of the sapphire substrate 201 having the R-plane main surface. This mask layer is processed using photolithography and hydrofluoric acid etchant to form a stripe-shaped mask region 202 having a width of about 3 μm and a window region 203 having a width of about 2 μm. The shape and size of the opening (window region 203) can be adjusted according to desired characteristics of the nitride semiconductor light emitting device to be manufactured.

  Next, by using RIE (reactive ion etching), a concave portion (groove) 301a having a depth of about 0.5 μm is formed on the sapphire substrate, and a convex portion 301b is formed accordingly (see FIG. 3). Thereafter, the mask region 202 is removed with a hydrofluoric acid etchant. In this manner, as shown in FIG. 3, a sapphire substrate (also referred to as a concavo-convex sapphire substrate) 301 on which irregularities are formed can be obtained.

The concavo-convex sapphire substrate 301 is installed in an MOCVD (metal organic chemical vapor deposition) apparatus, and the substrate surface is cleaned at a substrate temperature of 1100 ° C. Next, using TMA (trimethylaluminum), TMG (trimethylgallium), NH ₃ = 5.0 slm, H ₂ = 5.0 slm as a carrier gas, and N ₂ = 2.5 slm (hydrogen partial pressure 40%) Then, an Al _0.02 Ga _0.98 N buffer layer (also referred to as an AlGaN buffer layer) 302 having a thickness of 150 nm is grown at a growth temperature of 1000 ° C. At this time, on the R-plane of the sapphire substrate 301, the nitride semiconductor buffer layer 302 grows parallel to its own A-plane.

On the AlGaN buffer layer 302, TMG (trimethylgallium), NH ₃ = 5.0 slm, H ₂ = 12.0 slm as a carrier gas, and N ₂ = 3.0 slm (hydrogen partial pressure 60%) are used. Furthermore, the crystal of the n-type GaN layer 114 is grown using SiH ₄ as the n-type dopant. At this time, the n-type GaN uneven region 115 also grows along the groove 301a of the sapphire substrate. However, the n-type GaN uneven region 115 cannot grow until the groove 301a of the sapphire substrate is filled.

After the growth of the n-type GaN layer 114, the InGaN active layer 113 capable of generating light having a main peak wavelength of 450 nm is reduced from 0.5 nm to 3 nm using TMI (trimethylindium), TMG, and NH ₃ by reducing the substrate temperature. Grow to a thickness of about. The active layer may be formed in a multiple quantum well structure including an (Al) GaN barrier layer / InGaN quantum well layer, or may be sandwiched between GaN layers or InGaN layers that function as guide layers.

After the growth of the active layer 113, the substrate temperature is increased again, and a p-type AlGaN evaporation prevention layer (p-type) having a thickness of 15 nm is formed using Cp ₂ Mg (biscyclopentadienyl magnesium), TMA, TMG, and NH _3. Al _0.15 Ga _0.85 N) 112 is formed, and a p-type GaN layer 111 having a thickness of 20 nm and a p-type GaN layer 110 having a thickness of 30 nm are grown using Cp ₂ Mg, TMG, and NH ₃ . Note that the p-type AlGaN evaporation prevention layer 112 may be omitted.

FIG. 4 is a schematic cross-sectional view showing in more detail the vicinity of the active layer 113 in the nitride semiconductor multilayer structure in this example. In this figure, the active layer 113 includes a barrier layer 113c, a quantum well layer 113b closest to the p side, and a nearest barrier layer 113a on the p side. On the active layer 113, a p-type Al _0.15 Ga _0.85 N evaporation preventing layer 112 having a thickness of 15 nm, a p-type GaN layer 111 having a thickness of 20 nm, and a p-type GaN layer (layer to be processed with unevenness) 110 having a thickness of 30 nm. Is formed. That is, at this stage, the distance between the upper surface 401 of the quantum well layer 113b closest to the p side and the upper surface (surface covered with the metal reflection film) 402 of the p-type GaN layer 110 is 65 nm.

  In the wafer including a plurality of nitride semiconductor layers grown on the sapphire R-plane substrate as described above, the designed external dimensions of each light emitting element chip were set to a square having a side of 350 μm.

(Formation of p-type GaN uneven region)
Referring to schematic cross-sectional view 5, p-type GaN layer 110 is processed by photolithography, RIE, wet etching or the like to form p-type GaN uneven region 110 a. In this embodiment, a square pyramid-shaped p-type GaN uneven region 110a having a side of 0.1 μm and a height of about 0.1 μm is formed. The shape and size of the unevenness can be appropriately changed. At this stage, the distance between the top surface 401 of the quantum well layer 113b closest to the p-side and the bottom surface (surface covered with the metal reflective film) 111a of the p-type GaN uneven region 110a is 35 nm.

(Support substrate pasting process)
FIG. 6 is a schematic cross-sectional view illustrating a process of attaching a support substrate on a nitride semiconductor multilayer structure grown on a sapphire substrate. As shown in this figure, a p-type Pd ohmic layer 107 having a thickness of 3.5 nm, an Ag reflecting metal layer 106 having a thickness of 200 nm, and an Au layer having a thickness of 500 nm are formed on the p-type GaN uneven region 110a. And a barrier metal layer 105 including a stack of a Ni—Ti layer having a thickness of 100 nm and an Au—Sn junction metal layer 104 having a thickness of 3 μm are sequentially deposited. For these vapor depositions, an EB (electron beam) vapor deposition method or a resistance heating vapor deposition method can be used. The composition of the AuSn alloy can include 20 wt% Sn, for example.

  On the other hand, on the upper surface of the p-type Si support substrate 102 whose thickness is adjusted to 200 μm using a commercially available grinding / polishing machine, a positive electrode (Ti / Au) 101 is formed by EB vapor deposition. Further, a metal layer (Ti / Au) 103 is formed on the lower surface of the Si support substrate 102 by EB vapor deposition.

Thereafter, the metal layer (Ti / Au) 103 and the Au—Sn bonding metal layer 104 are brought into contact with each other and bonded together using a eutectic bonding method at a temperature of 310 ° C. and a pressure of 300 N / cm ² .

(Sapphire substrate peeling process)
YAG-THG (yttrium aluminum garnet third harmonic: wavelength 355 nm) laser light is irradiated from the mirror-polished back side of the concavo-convex sapphire substrate 301, and the AlGaN buffer layer 302 and the n-type GaN layer in contact with the concavo-convex sapphire substrate 301 The uneven sapphire substrate 301 is removed by thermally decomposing a part of the lower surface of 114. At this time, the n-type GaN uneven region 115 remains on the exposed surface of the n-type GaN layer 114 corresponding to the groove 301 a of the uneven sapphire substrate 301.

  The exposed surface of the n-type GaN concavo-convex region 115 is cleaned by RIE or wet etching, and a transparent conductive layer 120 (ITO) having a thickness of 150 nm is deposited thereon, and an n-side bonding pad electrode (IT) ( Ti / Al / Ti / Au) 121 is formed. Thereafter, the chip is divided using a laser, a dicer, RIE, or the like to obtain an LED chip as shown in FIG.

(LED chip mounting)
FIG. 7 is a schematic perspective view showing an example of a light-emitting device on which the nitride semiconductor LED chip obtained as described above is mounted. In the light emitting device 710 shown in this figure, the LED chip 720 with the p-side electrode 101 facing downward is mounted on the stem 701a using Ag paste. The n-side pad electrode (Ti / Al / Ti / Au) 121 for bonding and the lead 701b are connected by an Au wire 702 using a ball bonding apparatus.

(Internal quantum efficiency, total luminous flux light output)
In the external quantum efficiency of the light emitting device as shown in FIG. 7, the value when the current density is 10 A / cm ² is 100%, and the value when the current density is 150 A / cm ² is 75%. That is, it can be seen that the light emitting device of this example shows good light emission characteristics with a small reduction rate of external quantum efficiency even under a large current density condition. Here, the external quantum efficiency corresponds to the ratio of the number of photons converted from the total luminous flux output with respect to the injection current (number of carriers).

<Comparative Example 1>
Compared with Example 1, the LED chip manufactured in Comparative Example 1 has an upper surface 401 of the quantum well layer 113b closest to the p side and an upper surface (surface covered with a metal reflective film) 402 of the p-type GaN layer 110. The only difference was that the distance was set to 125 nm, and the distance between the upper surface 402 and the bottom surface (surface covered with the metal reflective film) 111a of the p-type GaN uneven region 110a was 100 nm.

In the external quantum efficiency of the nitride semiconductor light emitting device according to this comparative example, the value when the current density was 10 A / cm ² was 100%, and the value when the current density was 150 A / cm ² was 51%. That is, it can be seen that the external quantum efficiency of the light emitting device according to this comparative example is significantly reduced under the high current density condition as compared with Example 1.

<Example 2>
The LED chip manufactured in Example 2 of the present invention has a total thickness of the p-type GaN layers 111 and 110 set to 25 nm as compared with Example 1, and the p-type GaN layer 110 is flat without being etched away. It was different only in what was left. That is, in this case, since the p-type evaporation prevention layer 112 having a thickness of 15 nm is present, the upper surface 401 of the quantum well layer 113b closest to the p side and the upper surface of the p-type GaN layer 110 (covered with a metal reflective film). The distance to the surface 402 is 40 nm (see FIG. 4).

In the external quantum efficiency of the nitride semiconductor light emitting device according to Example 2, the value when the current density was 10 A / cm ² was 100%, and the value when the current density was 150 A / cm ² was a favorable value of 72%. .

  As in this example, when the influence of the distance between the upper surface 401 of the quantum well layer 113b closest to the p side and the upper surface (surface covered with the metal reflective film) 402 of the p-type GaN layer 110 was examined, the distance was 10 nm. It has been found that when the thickness is in the range of 50 nm or less, it is effective in suppressing a decrease in external quantum efficiency of the light emitting device under a high current density condition.

  In the above embodiment, the light emitting device including a plurality of nitride semiconductor layers parallel to the A plane grown on the R plane of the sapphire substrate is illustrated. However, the light emitting element is grown on the A plane of the GaN substrate. Needless to say, the present invention can also be applied to a light emitting device including a plurality of nitride semiconductor layers parallel to the A-plane.

  In the above embodiment, the nitride semiconductor light emitting device in which the positive electrode is disposed on one side of the substrate and the negative electrode is disposed on the other side is illustrated. However, the positive electrode and the negative electrode are disposed on one side of the substrate. It goes without saying that the present invention can also be applied to a nitride semiconductor light emitting device in which both are arranged.

  As described above, according to the present invention, it is possible to provide a nitride semiconductor light emitting element capable of maintaining good light emission efficiency (external quantum efficiency) even under a large current density condition.

1 is a schematic cross-sectional view showing a nitride semiconductor light emitting diode according to an embodiment of the present invention. It is typical sectional drawing illustrating the processing process of the sapphire substrate in one Example of this invention. It is typical sectional drawing illustrating the crystal growth process of the some nitride semiconductor layer in one Example of this invention. 1 is a schematic cross-sectional view showing in more detail the vicinity of an active layer of a nitride semiconductor light emitting device according to an embodiment of the present invention. It is typical sectional drawing which shows the state after etching the uppermost layer in FIG. It is typical sectional drawing illustrating the process of affixing a support substrate in one Example of this invention. 1 is a schematic perspective view of a light emitting device in which a nitride semiconductor LED chip is mounted on a stem in one embodiment of the present invention. FIG. It is a typical perspective view which shows the crystallographic orientation of a hexagonal unit cell. FIG. 3 is a schematic perspective view clearly showing an R plane in a hexagonal unit cell.

Explanation of symbols

101 Positive electrode (Ti / Au), 102 Si support substrate, 103 Si support substrate side metal layer (Ti / Au), 104 Au—Sn junction metal layer, 105 Barrier metal layer (Au / Ni—Ti), 106 Reflection Metal layer (Ag), 107 p-type ohmic layer (Pd), 110 p-type GaN layer, 110a p-type GaN uneven region, 111 p-type GaN layer, bottom surface of 111a p-type GaN uneven region 110a (covered with metal reflective film) 112 p-type AlGaN evaporation prevention layer, 113 InGaN active layer, 113a barrier layer, 113b quantum well layer, 113c barrier layer, 114 n-type GaN layer, 115 n-type GaN uneven region, 120 transparent conductor (ITO) 121 Negative electrode (Ti / Al / Ti / Au), 201 Sapphire substrate, 202 Mask layer, 203 Window region, 301 Concavity and convexity formed Sapphire substrates (unevenness sapphire substrate), recesses 301a sapphire substrate, convex portions of 301b sapphire substrate 302 AlGaN buffer layer _{(Al 0.02 Ga 0.98 N),} 113 active layer, the barrier layer closest to 113a p side, 113b Quantum well layer closest to p side, 113c barrier layer, 401 upper surface of well layer 113b, 402 upper surface of p-type GaN layer 402 (surface covered with metal reflection film), 701 lead, 702 Au wire, 710 stem, 720 nitride Physical semiconductor LED chip.

Claims (5)

A nitride semiconductor light emitting device including a plurality of nitride semiconductor layers parallel to a nonpolar A-plane,
The light emitting device includes one or more n-type nitride semiconductor layers, a nitride semiconductor active layer, one or more p-type nitride semiconductor layers, and a metal layer, which are sequentially stacked.
The active layer includes one or more quantum well layers;
A nitride semiconductor light emitting device, wherein a distance between the metal layer and the quantum well layer closest thereto is in a range of 10 nm to 50 nm.   2. The nitride semiconductor light emitting device according to claim 1, wherein a thickness of the well layer is in a range of 2.5 nm to 5.0 nm.   The nitride semiconductor light emitting device according to claim 1, wherein the active layer generates light in a wavelength range of 390 nm to 510 nm.   4. The method for manufacturing the nitride semiconductor light emitting device according to claim 1, wherein the plurality of nitride semiconductor layers are vapor-phase grown on an R surface of a sapphire substrate or an A surface of a GaN substrate. The manufacturing method characterized by the above-mentioned.   The manufacturing method according to claim 4, wherein the substrate is peeled after the growth of the plurality of nitride semiconductor layers, and the plurality of nitride semiconductor layers are sandwiched between the p-type electrode and the n-type electrode.

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