JP2009183075A - Power conversion controller and power conversion system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of deterioration of controllability of a first motor generator and a second motor generator by performing a processing (shoot-through) for shorting upper/lower arms of an inverter IV1 or the inverter IV2 in a structure where the inverter IV1 connected to a first motor generator, and the inverter IV2 connected to a second motor generator are connected to a high pressure battery through an impedance network. <P>SOLUTION: Periods of carriers on the inverters IV1 and IV2 are made to be the same and phases are made to be the same or opposite. Thus, periods when mutual request operation states become zero vector are synchronized. In the period when the request operation state having a larger modulation rate becomes zero vector, the processing for shorting the arms is performed. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention is applied to a power conversion circuit including an inverter connected between a power feeding unit and a rotating machine, and operates the inverter so that a high potential side input terminal and a low potential side input terminal of the inverter are short-circuited. The present invention relates to a power conversion control device that performs processing to perform, and a power conversion system including the same.

  For example, when power is supplied to a three-phase motor, a three-phase inverter that converts a DC voltage into an AC voltage is usually used. Thereby, an alternating voltage can be applied to each phase of the three-phase motor. The maximum value of the output voltage of this inverter is limited by the voltage of the DC power supply. For this reason, it is also well known that a booster circuit is provided between the DC power supply and the inverter. However, when a booster circuit is provided, a driver or the like for turning on / off a switching element of the booster circuit is provided, and an increase in the number of components cannot be ignored.

  Therefore, conventionally, as seen in Patent Document 1 below, for example, it has been proposed to provide an impedance network between the inverter and the DC power supply. According to this, by short-circuiting the upper and lower arms of the inverter, it is possible to boost the voltage of the DC power supply using the inductor constituting the impedance network. Therefore, the boosting operation can be performed only by operating the switching element of the inverter, and an increase in the number of parts can be suppressed.

However, when the process of short-circuiting the upper and lower arms is performed, the output voltage of the inverter becomes zero. On the other hand, the following Non-Patent Document 1 proposes performing a process of short-circuiting the upper and lower arms when the operation state of the inverter becomes a zero vector period.
US Pat. No. 7,130,205 Fang Zheng Peng, “Z-Source Inverter” IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 39, NO. 2, MARCH / APRIL 2003

  By the way, in recent years, a power conversion system including a plurality of inverters and rotating machines connected thereto, such as parallel series hybrid vehicles, has been put into practical use. Also here, a booster circuit is provided so that the maximum value of the output voltage of the inverter is not restricted by the DC power supply. Under such circumstances, it is desirable to provide the impedance network in place of the booster circuit from the viewpoint of suppressing the increase in the number of components while performing the boosting operation.

  However, when the boosting operation is performed using the impedance network, the output voltage of other inverters becomes zero during the process of operating an arbitrary inverter to short-circuit the upper and lower arms. For this reason, there exists a possibility that the controllability of a rotary machine may fall.

  It should be noted that the control of the rotating machine is not limited to the one provided with the plurality of inverters described above, but in the case of performing the processing for short-circuiting the upper and lower arms, the output voltage of the inverter becomes zero when performing the processing. These facts of the decline in sex are generally common.

  The present invention has been made to solve the above-described problems, and the object thereof is applied to a power conversion circuit including an inverter connected between a power feeding means and a rotating machine, and a high potential side input terminal of the inverter and A power conversion control device capable of maintaining high controllability of a rotating machine, and a power conversion system including the same, even when processing to operate the inverter so as to make a short circuit between low-potential side input terminals It is to provide.

  Hereinafter, means for solving the above-described problems and the operation and effects thereof will be described.

  The invention according to claim 1 is applied to a power conversion circuit including an inverter connected between the power feeding means and each of the plurality of rotating machines, and shorts between the high potential side input terminal and the low potential side input terminal of the inverter. In the power conversion control device that performs the process of operating the inverter so as to be in a state, the process of setting the short circuit state by operating an inverter connected to an arbitrary rotating machine, and the inverter connected to another rotating machine There is provided an associating means for associating the above operations with each other.

  As described above, when the process for setting the short-circuit state in any inverter is performed, the output voltage of the other inverter is also zero. For this reason, if the process of setting the short circuit state as part of this operation while operating a plurality of inverters independently of each other, the intended output voltage may not be realized by operating the inverter. In this regard, in the above invention, by providing the association means, it is possible to suppress or avoid the above-mentioned inconvenience caused by the plurality of inverters being operated independently of each other, and thus maintain high controllability of the rotating machine. can do.

  The other rotating machines are preferably all remaining rotating machines except the arbitrary rotating machine among the plurality of rotating machines.

  According to a second aspect of the present invention, in the first aspect of the present invention, the power conversion circuit boosts the voltage of the power feeding means by setting the short circuit state.

  In the above invention, by providing the association means, the controllability of each rotating machine can be kept high during the boosting operation.

  Note that the power conversion circuit is described as follows: “The power feeding is performed by using a phenomenon that an inductor is provided and energy stored in the inductor is released when the short-circuit state is released due to the short-circuit state. It is desirable that the voltage of the power supply means is increased "or" the voltage of the power supply means is increased by using a phenomenon that includes an inductor and a back electromotive force is generated in the inductor by releasing the short-circuit state ". .

  According to a third aspect of the present invention, in the second aspect of the invention, the power conversion circuit includes an inductor connected between the high potential side input terminal and a positive terminal of the power feeding unit, the low potential side input terminal, and the A pair of inductors composed of inductors connected between the negative terminals of the power supply means, and a capacitor connected between the inductor and the inverter and between the other inductor and the power supply means for each of the pair of inductors; And an impedance network configured to include:

  In the above-described invention, by providing the pair of inductors and capacitors, the step-up operation can be appropriately performed by the processing for setting the short circuit state.

  According to a fourth aspect of the present invention, in the invention according to any one of the first to third aspects, the association means includes a period in which a requested operation state for an inverter connected to the other rotating machine is a zero vector. And a synchronization means for synchronizing a period in which the requested operation state for the inverter connected to the arbitrary rotating machine is a zero vector.

  In the case of performing the processing for short-circuiting, the output voltage of the inverter operated to perform this processing is also zero. For this reason, when performing the process which makes a short circuit state by operating the inverter connected to arbitrary rotary machines, there exists a possibility that the controllability of arbitrary rotary machines may also fall. Here, in the above invention, since the synchronization means is provided, the actual operation state when the requested operation state of both the arbitrary rotating machine and the inverter connected to each of the other rotating machines is a zero vector. It can be set as the operation state for making into a short circuit state. For this reason, the controllability of both the other rotating machine and the arbitrary rotating machine can be maintained high regardless of the processing for setting the short circuit state.

  The requested operation state is an operation state requested from the control of the rotating machine.

  According to a fifth aspect of the present invention, in the fourth aspect of the invention, each of the plurality of inverters is operated based on a magnitude relationship between a command value of a voltage for a rotating machine connected to the inverter and a carrier wave. The synchronizing means is means for making the frequencies of the carriers related to each of the plurality of rotating machines the same and making the phases the same or opposite.

  Zero vectors occur at the peaks or valleys of the carrier. Here, according to the said invention, the peaks of a carrier wave regarding each rotary machine, valleys, or a peak and a valley can be made to correspond. For this reason, it is possible to synchronize the period during which the requested operation state for the inverter is a zero vector, and the synchronization means can be configured simply and appropriately.

  According to a sixth aspect of the invention, in the fifth aspect of the invention, each of the plurality of inverters is operated based on a magnitude relationship between a command value of a voltage for a rotating machine connected to the inverter and a carrier wave. The synchronization means is a means for setting a ratio of carrier frequency for each of the plurality of rotating machines to an integer.

  Zero vectors occur at the peaks or valleys of the carrier. Here, according to the said invention, the peak of a carrier wave regarding each rotary machine, valleys, or a peak and a valley can be made to correspond with a predetermined period. For this reason, it is possible to synchronize the period in which the requested operation state for the inverter is a zero vector, and the synchronization means can be configured simply and appropriately.

  The invention according to claim 7 is the invention according to any one of claims 1 to 6, wherein each of the plurality of inverters is a magnitude relationship between a command value of a voltage for a rotating machine connected to the inverter and a carrier wave. The linkage means uses the one having the highest modulation rate of the modulation processing as the arbitrary rotating machine and has a requested operation state for an inverter connected to the rotating machine. The short circuit state is processed in a period of zero vector.

  The one with the largest modulation rate has the shortest zero vector period. For this reason, when the above invention is applied to the invention having the matters specifying the invention of claim 4, it is connected to an arbitrary rotating machine when the operation state of an inverter connected to another rotating machine is a zero vector. Therefore, it is possible to perform a process of setting a short circuit state by operating the inverter, and to maintain high controllability of both an arbitrary rotating machine and another rotating machine.

  Further, even when the synchronization means that is the invention specific matter of claim 4 is not provided, the short-circuit state is detected in one period in which the requested operation state for the inverter connected to another rotating machine is a zero vector. It is possible to compensate for a decrease in voltage due to the processing.

  The invention according to an eighth aspect is the invention according to any one of the first to seventh aspects, wherein the linkage means is configured such that the operation state of the inverter connected to the other rotating machine is a zero vector. It is characterized in that the short circuit state is processed by operating an inverter connected to an arbitrary rotating machine.

  When performing a short-circuit process by operating an inverter connected to an arbitrary rotating machine, the output voltage of the inverter connected to the other rotating machine depends on the operation of the inverter connected to the other rotating machine. Zero regardless of state. However, if the operation state of the inverter connected to the other rotating machine is a zero vector, depending on whether or not the processing for setting the short circuit state is performed by operating the inverter connected to an arbitrary rotating machine, The output voltage of the inverter connected to the rotating machine is not affected. In the above-mentioned invention, in view of this point, it is possible to perform a process of setting a short circuit state by operating an inverter connected to an arbitrary rotating machine without hindering controllability of other rotating machines.

  The invention according to claim 9 is the invention according to any one of claims 1 to 7, wherein the associating means is configured to perform the arbitrary operation when an operation state of an inverter connected to the other rotating machine is not a zero vector. Compensating means for compensating for a decrease in voltage to be applied to the other rotating machine due to the short-circuiting process when the short-circuiting process is performed by operating an inverter connected to the rotating machine. It is characterized by that.

  When the operation state of an inverter connected to another rotating machine is not a zero vector, when an inverter connected to an arbitrary rotating machine is operated to make a short circuit state, the inverter connected to the other rotating machine The output voltage of becomes zero. For this reason, the output voltage of the inverter connected to the other rotating machine is reduced as compared with that assumed from the operation state. In this respect, in the above invention, the controllability of other rotating machines can be recovered by providing the compensation means.

  According to a tenth aspect of the present invention, in the ninth aspect of the invention, the power conversion circuit includes an inductor connected between the high potential side input terminal and a positive terminal of the power feeding unit, the low potential side input terminal, and the A pair of inductors composed of inductors connected between the negative terminals of the power supply means, and a capacitor connected between the inductor and the inverter and between the other inductor and the power supply means for each of the pair of inductors; The compensation means performs the compensation processing based on the voltage between the output terminals of the impedance network.

  When the short circuit processing is performed, the voltage between the output terminals of the impedance network becomes zero. In the above invention, paying attention to this point, the operation of the inverter connected to an arbitrary rotating machine when the operating state of the inverter connected to another rotating machine is not a zero vector by using the voltage between the output terminals. It is possible to determine whether or not the processing for short-circuiting has been performed.

  The invention according to claim 11 is the invention according to any one of claims 1 to 10, wherein the linkage means performs a process of setting the short circuit state among inverters connected to each of the plurality of rotating machines. In order to perform this, the inverter to be operated is made variable.

  In the above-described invention, it is possible to improve the frequency of the short-circuiting process as compared with the case of performing the short-circuiting process by operating only a specific inverter. Moreover, the restrictions imposed by the process which makes a short circuit state with respect to operation of each inverter can also be reduced by assigning the inverter used as operation object in a time division manner in order to perform the process which makes a short circuit state.

  The invention according to claim 12 is applied to a power conversion circuit including an inverter connected between the power feeding means and the rotating machine so that the high potential side input terminal and the low potential side input terminal of the inverter are short-circuited. The power conversion control device that performs the process of operating the inverter includes a compensation unit that compensates for a decrease in voltage to be applied to the rotating machine due to the process of setting the short circuit state.

  When performing the short circuit processing, the output voltage of the inverter becomes zero. For this reason, there exists a possibility that the output voltage of an inverter may reduce by setting it as a short circuit state. In the above invention, in view of this point, by providing the compensation means, such a problem can be avoided, and as a result, the controllability of the rotating machine can be maintained high.

  According to a thirteenth aspect of the invention, in the twelfth aspect of the invention, the inverter is operated based on a modulation process corresponding to a magnitude relationship between a voltage command value for the rotating machine and a carrier wave, and the compensation When the processing for setting the short circuit state is performed in a period in which the operation state of the inverter required by the modulation process is not a zero vector, the short circuit is performed in the period in which the required operation state is a zero vector. A reduction in voltage to be applied to the rotating machine due to the processing to make a state is compensated.

  In the above invention, the compensation means can be appropriately realized.

  According to a fourteenth aspect of the present invention, in the invention according to the thirteenth aspect, the processing for setting the short circuit state includes a period during which the operation state of the inverter required by the modulation processing is a zero vector and a period during which the operation state is not a zero vector. It is characterized by being performed in both.

  In the above invention, the frequency of the short-circuiting process can be increased as compared with the case where the short-circuiting process is performed only during the period in which the required operation state is a zero vector. For this reason, it is possible to increase the amount of energy exchanged between the power conversion circuit and the rotating machine per unit time, while shortening the one-time period of the short-circuiting process. Therefore, when the invention specific matter of claim 17 described later is included, the inductor is downsized while the amount of energy exchanged between the power conversion circuit and the rotating machine per unit time meets the requirement. can do.

  A fifteenth aspect of the invention is the invention according to any one of the twelfth to fourteenth aspects, wherein the rotating machine includes a plurality of rotating machines, and the inverter includes each of the power feeding means and the plurality of rotating machines. It consists of a plurality of inverters connected between the two.

  As described above, when the process for setting the short-circuit state in any inverter is performed, the output voltage of the other inverter is also zero. For this reason, there is a possibility that the intended output voltage cannot be realized by actually operating the inverter by performing the processing for setting the short circuit state. In this regard, in the above invention, by providing the compensation means, such inconvenience can be avoided, and as a result, the controllability of the rotating machine can be kept high.

  The invention according to claim 16 is the invention according to any one of claims 12 to 15, wherein the power conversion circuit boosts the voltage of the power feeding means by setting the short circuit state. Features.

  In the above invention, by providing the compensation means, the controllability of each rotating machine can be kept high during the boosting operation.

  Note that the power conversion circuit is described as follows: “The power feeding is performed by using a phenomenon that an inductor is provided and energy stored in the inductor is released when the short-circuit state is released due to the short-circuit state. It is desirable that the voltage of the power supply means is increased "or" the voltage of the power supply means is increased by using a phenomenon that includes an inductor and a back electromotive force is generated in the inductor by releasing the short-circuit state ". .

  The invention according to claim 17 is the invention according to claim 16, wherein the power conversion circuit includes an inductor connected between the high potential side input terminal and a positive terminal of the power feeding unit, the low potential side input terminal, and the A pair of inductors composed of inductors connected between the negative terminals of the power supply means, and a capacitor connected between the inductor and the inverter and between the other inductor and the power supply means for each of the pair of inductors; And an impedance network configured to include:

  In the above-described invention, by providing the pair of inductors and capacitors, the step-up operation can be appropriately performed by the processing for setting the short circuit state.

  The invention according to claim 18 is a power conversion system comprising the power conversion control device according to any one of claims 1 to 17 and the power conversion circuit.

(First embodiment)
Hereinafter, a first embodiment in which a power conversion control device and a power conversion system according to the present invention are applied to a parallel series hybrid vehicle will be described with reference to the drawings.

  FIG. 1 shows the system configuration of this embodiment. As shown in the figure, this embodiment includes two three-phase rotating machines, a first motor generator 10a and a second motor generator 10b, and separate inverters IV1 and IV2 corresponding thereto. The first motor generator 10a and the second motor generator 10b are three-phase motors / generators. The first motor generator 10a and the second motor generator 10b are connected to the high voltage battery 12 via a power conversion circuit including inverters IV1 and IV2 and an impedance network IN. The high voltage battery 12 is a secondary battery that applies a predetermined high voltage (for example, “288 V”).

  The inverter IV1 connected to the first motor generator 10a is a parallel connection body of a serial connection body of switching elements Sup1 and Sun1, a serial connection body of switching elements Svp1 and Svn1, and a serial connection body of switching elements Swp1 and Swn1. It is configured with. Here, the connection point of the switching element Sup1 and the switching element Sun1 is connected to the U phase of the first motor generator 10a, and the connection point of the switching element Svp1 and the switching element Svn1 is connected to the V phase of the first motor generator 10a. The connection point of the switching element Swp1 and the switching element Swn1 is connected to the W phase of the first motor generator 10a.

  Similarly, the inverter IV2 connected to the second motor generator 10b includes a series connection body of switching elements Sup2 and Sun2, a series connection body of switching elements Svp2 and Svn2, and a series connection body of switching elements Swp2 and Swn2. A connection body is provided. These switching elements Sup1, Sun1, Svp1, Svn1, Swp1, Swn1, Sup2, Sun2, Svp2, Svn2, Swp2, and Swn2 are formed of insulated gate bipolar transistors (IGBT). The diodes Dup1, Dun1, Dvp1, Dvn1, Dwp1, Dwn1, Dup2, Dun2, Dvp2, Dvn2, Dwp2, Dwn2 are connected in antiparallel to each other.

  The impedance network IN includes an inductor 20 connected between the positive terminal side of the high voltage battery 12 and the high potential side input terminal of the inverter IV, and the negative terminal side of the high voltage battery 12 and the low potential side input terminal of the inverter IV. And an inductor 22 connected therebetween. Further, the impedance network IN includes a capacitor 24 that connects between the input terminal on the high potential side of the inverter IV and the inductor 20, and between the negative terminal and the inductor 22 of the high voltage battery 12, and between the positive terminal of the high voltage battery 12 and the inductor 20. A capacitor 26 that connects the input terminal on the low potential side of the inverter IV and the inductor 22 is provided.

  Between the positive terminal of the high-voltage battery 12 and the inductor 20, a diode 30 as a rectifier for backflow prevention and a switching element 32 for regeneration control are connected.

  The central processing unit (CPU 40) sets the voltage applied to the first motor generator 10a and the second motor generator 10b as the command voltage based on the detection values of various sensors in the high voltage system and the torque requested by the user. Inverters IV1 and IV2 are operated. In other words, the switching elements Sup1, Sun1, Svp1, Svn1, Swp1, Swn1, Sup2, Sun2, Svp2, Svn2, Swp2, Swn2 are operated. In particular, the CPU 40 operates the inverters IV1 and IV2 by PWM processing so that the voltage applied to the first motor generator 10a and the second motor generator 10b is a command voltage.

  Further, during this operation, the switching elements of both the upper arm and the lower arm are turned on (series connection body of switching elements Sup1, Sun1, serial connection body of switching elements Svp1, Svn1, and switching element Swp1, At least one of the series connection body of Swn1, the series connection body of the switching elements Sup2 and Sun2, the series connection body of the switching elements Svp2 and Svn2, and the series connection body of the switching elements Swp2 and Swn2 is short-circuited. Process (shoot-through: hereinafter, short circuit process)). This is a process for boosting the output voltages of the inverters IV1 and IV2. That is, the output voltage of the impedance network IN is made higher than the voltage of the high-voltage battery 12 by utilizing the phenomenon that a counter electromotive force is generated in the inductors 20 and 22 by canceling the short-circuit process after the short-circuit process is performed. Can do. Note that, in Patent Document 1, the switching period T and the short-circuit processing time of the series connection body are provided under the condition that the inductances of the inductors 20 and 22 are equal to each other and the capacitances of the capacitors 24 and 26 are equal to each other. There is an explanation that the output voltage is boosted to “Vo · T / (T−T0)” using the voltage Vo of the high voltage battery 12 at T0. Furthermore, it is described that the AC voltage applied to the first motor generator 10a and the second motor generator 10b using the modulation factor M is “M · Vo · T / {2 · (T−T0)}”. Yes.

  By performing the short-circuit process, the output voltage of the impedance network IN can be boosted, and as a result, the output voltages of the inverters IV1 and IV2 can be boosted. However, during the short-circuit process, the output voltages of the inverters IV1 and IV2 become zero. For this reason, even if the switching operation is performed according to the PWM process so that the voltage applied to the first motor generator 10a or the second motor generator 10b is the command voltage, the actual output voltages of the inverters IV1 and IV2 are reduced by the short circuit process. There is a risk that it will not. Such a situation can be avoided by performing the short-circuit process in the zero vector period of the required operation state. As shown in FIG. 2, the zero vector period is a zero vector V7 period in which all of the upper arm switching elements Sup1, Svp1, Swp1 (Sup2, Svp2, Swp2) are on, and a lower arm switching element Sun1, This is a zero vector V0 period in which all of Svn1, Swn1 (Sun2, Svn2, Swn2) are in the on state. In other words, it is two vector periods of eight voltage vectors expressing that one of the upper arm and the lower arm is turned on for each phase. Since no voltage is output from the inverters IV1 and IV2 in the zero vector period, the voltage applied to the first motor generator 10a and the second motor generator 10b does not change even if the short circuit process is performed using this period.

  However, when the two inverters IV1 and IV2 are provided as in the present embodiment, the timings at which both of the requested operation states become zero vectors are generally independent of each other, as shown in FIG. For this reason, even if the short-circuit process is performed when one of the requested operation states is the zero vector, the other requested operation state is not always the zero vector at this time. When the other requested operation state is not the zero vector and the short circuit process is performed, the other inverter output voltage does not become the command voltage.

  Therefore, in the present embodiment, the periods in which the requested operation states for the inverters IV1 and IV2 are zero vectors are synchronized. This can be done by setting the carriers in the triangular wave PWM process in association with each other in the manner shown in FIG.

  4 (a1), FIG. 4 (b1), FIG. 4 (c1), and FIG. 4 (d1) are examples of setting a carrier. Here, FIG. 4A1 shows the carrier on the inverter IV1 side and the command voltages Vuc, Vvc, Vwc, FIG. 4B1 shows the short circuit processing performed in the inverter IV1, and FIG. The carrier on the inverter IV2 side and the command voltages Vuc, Vvc, Vwc are shown, and FIG. 4 (d1) shows the short-circuit process performed in the inverter IV2. As shown in the figure, the peak and valley of the carrier are made to coincide on the inverter IV1 side and the inverter IV2 side, and these are set to have the same period. Thereby, the period when each request | requirement operation state with respect to inverter IV1, IV2 becomes a zero vector can be synchronized. In particular, the short circuit process can be performed in the zero vector period of both required operation states by performing the short circuit process in the zero vector period of the required operation state on the inverter IV1 side, which is the side with the higher modulation rate.

  On the other hand, FIG. 4 (a2), FIG. 4 (b2), FIG. 4 (c2), and FIG. 4 (d2) are other setting examples of carriers. 4 (a2), FIG. 4 (b2), FIG. 4 (c2), and FIG. 4 (d2) are the same as FIG. 4 (a1), FIG. 4 (b1), FIG. 4 (c1), and FIG. This corresponds to (d1). As shown in the figure, here, the carrier is the same period and the phase is reversed on the inverter IV1 side and the inverter IV2 side. Thereby, since the peak of one carrier coincides with the valley of the other carrier, it is possible to synchronize the period in which each requested operation state for inverters IV1 and IV2 is a zero vector. In particular, the short circuit process can be performed in the zero vector period of both required operation states by performing the short circuit process in the zero vector period of the required operation state on the inverter IV1 side, which is the side with the higher modulation rate.

  According to the embodiment described in detail above, the following effects can be obtained.

  (1) A period in which the requested operation state for the inverter IV1 connected to the first motor generator 10a is a zero vector and a period in which the requested operation state for the inverter IV2 connected to the second motor generator 10b is a zero vector are synchronized. I let you. Thereby, when the required operation state of both inverters IV1 and IV2 is a zero vector, it is possible to perform a process of setting a short circuit state. For this reason, the controllability of both the first motor generator 10a and the second motor generator 10b can be kept high regardless of the processing for setting the short circuit state.

  (2) When operating each of the inverters IV1 and IV2 based on the magnitude relationship between the command value of the voltage for each of the first motor generator 10a and the second motor generator 10b and the carrier, the frequency between the carriers is made the same and the phase is set. Same or opposite. Thereby, it is possible to easily and appropriately synchronize the period in which the requested operation state is the zero vector.

  (3) When operating each of the inverters IV1 and IV2 based on the modulation process according to the magnitude relationship between the command value of the voltage for each of the first motor generator 10a and the second motor generator 10b and the carrier, the modulation rate of the modulation process The short-circuiting process was performed during the period when the requested operation state for the larger side is zero vector. As a result, a short-circuit process is performed when the requested operation state for both inverters IV1 and IV2 is a zero vector, and the controllability of both first motor generator 10a and second motor generator 10b can be maintained high. it can.

  (4) The means for operating the inverter IV1 and the means for operating the inverter IV2 are common hardware means (CPU 40). Thereby, the period in which the requested operation state for the inverter IV1 connected to the first motor generator 10a is a zero vector and the period in which the requested operation state for the inverter IV2 connected to the second motor generator 10b is a zero vector are simplified. Can be synchronized.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 5 shows a carrier setting mode according to the present embodiment. Here, FIGS. 5 (a), 5 (b), 5 (c), and 5 (d) are the same as FIGS. 4 (a1), 4 (b1), 4 (c1), and FIG. 4 (d1). As shown in the figure, in the present embodiment, the frequency of the carrier on the inverter IV2 side is set to be twice the frequency of the carrier on the inverter IV1 side and the phase is adjusted, so that the peaks or peaks and valleys of these two carriers are adjusted. And periodically matched. Thereby, in the peak and valley of the carrier on the inverter IV1 side, the carrier on the inverter IV2 side can always be a peak or valley. Therefore, the zero vector periods of each other can be synchronized. Then, the short circuit process can be performed in both zero vector periods by performing the short circuit process in the zero vector period on the inverter IV1 side, which is the side with the higher modulation rate.

  According to this embodiment described above, in addition to the effects (1), (3), and (4) of the first embodiment, the following effects can be obtained.

  (5) When operating each of the inverters IV1 and IV2 based on the magnitude relationship between the command value of the voltage for each of the first motor generator 10a and the second motor generator 10b and the carrier, the ratio of the carrier frequencies is an integer. Thereby, the peaks of the carriers, the valleys, or the peaks and valleys can be matched at a predetermined period. For this reason, it is possible to synchronize the period in which the requested operation state is a zero vector.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In this embodiment, the setting of synchronizing the zero vector periods of the inverters IV1 and IV2 is not performed while performing the short-circuit process in the zero vector period having the larger modulation rate among the inverters IV1 and IV2. Specifically, each carrier is set independently. Thereby, each of the mutual carriers can be set to an optimum frequency in accordance with various requirements such as switching loss and noise reduction, and avoidance of the resonance frequency. However, in this case, when one of the inverters IV1 and IV2 is subjected to a short circuit process, the other operation state may not become a zero vector. In this case, the other inverter output voltage decreases. Therefore, in this embodiment, under such circumstances, a process for compensating for the decrease in the output voltage due to the short circuit process is performed.

  FIG. 6 shows aspects of short-circuit processing and voltage compensation processing according to this embodiment. Specifically, FIG. 6A shows the transition of the carrier on the inverter IV1 side and the command voltages Vuc, Vvc, Vwc, FIG. 6B shows the short-circuit process on the inverter IV1 side, and FIG. The transition of the carrier on the inverter IV2 side and the command voltages Vuc, Vvc, Vwc is shown, and FIG. 6D shows the voltage compensation period in the inverter IV2.

  In the example shown in FIG. 6, an example is shown in which the short circuit process is performed for all of the zero vector periods on the inverter IV1 side, which is the side with the higher modulation rate. Further, it is a period during which short-circuit processing is performed, and is a zero vector period of a requested operation state for the inverter IV2 in order to compensate for a decrease in the output voltage of the inverter IV2 during a period in which the operation state of the inverter IV2 is not a zero vector. In a period in which the short circuit process is not performed, a process for compensating the voltage is performed.

  FIG. 7 shows details of voltage compensation processing. Specifically, FIG. 7A shows the transition of the carrier on the inverter IV1 side and the command voltages Vuc, Vvc, Vwc, and FIG. 7B shows the operation state (voltage) of the inverter IV1 required by the PWM processing. FIG. 7C shows a short-circuiting period on the inverter IV1 side. FIG. 7D shows the transition of the operation state (voltage vector) of the inverter IV2 requested by the PWM process, and FIG. 7E shows the voltage compensation process on the inverter IV2 side. FIG. 7F shows the transition of the carrier on the inverter IV2 side and the command voltages Vuc, Vvc, Vwc.

  In FIG. 7, the short circuit process is performed over a period in which the request for the operation state of the inverter IV1 by the PWM process is the zero vector V7, and the request for the operation state of the inverter IV2 by the PWM process in this period is the non-zero vector V1. An example of a zero vector V7 is shown. In this case, in the period when the request for the operation state of the inverter IV2 by the PWM processing is the zero vector V7 and the short circuit processing is not performed, the actual operation state is set to the non-zero vector V1, thereby compensating for the voltage decrease. To do. As a result, the output voltage can be controlled to the command voltage even on the inverter IV2 side that is not short-circuited.

  According to the embodiment described above, the following effects can be obtained.

  (6) When the operation state of one inverter is not a zero vector and the other inverter is operated to perform a short circuit process, the decrease in the output voltage on one inverter side due to the short circuit process is compensated. Thereby, the controllability of the first motor generator 10b and the second motor generator 10b can be maintained high.

  (7) When the operation state of one inverter is not a zero vector and the other inverter is operated and short circuit processing is performed, the request for PWM processing for the operation state of one inverter is a zero vector and the short circuit processing is performed Compensation processing was carried out during the period when it was not done. Thereby, compensation processing can be performed appropriately.

  (8) The means for operating the inverter IV1 and the means for operating the inverter IV2 are common hardware means (CPU 40). Thereby, when the operation state of one inverter is not a zero vector, it is possible to easily grasp the situation in which the other inverter is operated and short circuit processing is performed.

(Fourth embodiment)
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the third embodiment.

  In the present embodiment, the frequency of the short circuit process is increased by performing the short circuit process in both the zero vector period and the non-zero vector period in which the modulation rate is larger among the inverters IV1 and IV2. This is a setting for reducing the size of the power conversion circuit. That is, as the inductors 20 and 22 are downsized to reduce the size of the power conversion circuit (more specifically, the impedance network IN), the current that flows when the short-circuit process is performed for a predetermined time increases. This is because the current is inversely proportional to the inductance of the inductors 20 and 22. For this reason, from the viewpoint of avoiding an excessive current flowing through the power conversion circuit, the short-circuit processing time cannot be made long. On the other hand, the inflow / outflow energy amount of the impedance network IN becomes smaller as the short-circuit processing time becomes shorter, and becomes smaller as the inductance becomes smaller. For this reason, the frequency of the short-circuit process is increased in order to secure the amount of energy while miniaturizing the impedance network IN.

  FIG. 8 shows an aspect of the short circuit process according to the present embodiment. Specifically, FIG. 8A shows the transition of the carrier on the inverter IV1 side and the command voltages Vuc, Vvc, and Vwc, and FIGS. 8B to 8G show the switching elements Sup1, Svp1 of the inverter IV1. , Swp1, Sun1, Svn1, and Swn1 operation signals gup1, gvp1, gwp1, gun1, gvn1, and gwn1. FIG. 8 (h) shows the transition of the request (voltage vector) by the PWM process for the operation state of the inverter IV1, FIG. 8 (i) shows the timing of the short circuit process by the operation of the inverter IV1, and FIG. Shows the transition of the request (voltage vector) by the PWM processing for the operation state of the inverter IV2. FIG. 8 (k) shows the transition of the carrier on the inverter IV2 side and the command voltages Vuc, Vvc, Vwc, and FIGS. 8 (i) -8 (q) show the switching elements Sup2, Svp2, Swp2, of the inverter IV2. The transition of the operation signals gup2, gvp2, gwp2, gun2, gvn2, and gwn2 of Sun2, Svn2, and Swn2 is shown.

  As shown in the figure, in this embodiment, the inverter IV1 is operated not only in the period of the zero vector V0 and V7 on the inverter IV1 side having the larger modulation rate but also in the period between the zero vector V0 and the zero vector V7. And short-circuiting is performed. As a result, the frequency of the short-circuit process can be increased as compared with the case where the short-circuit process is performed only in the zero vector period, and as a result, the outflow of the impedance network IN can be achieved even if the time of one short-circuit process is shortened. The amount of input energy can be secured. For this reason, the inductors 20 and 22 can be appropriately downsized.

  However, in this case, when the short circuit process is performed in the non-zero vector period, the output voltages of the inverters IV1 and IV2 are reduced with respect to the command voltage. For this reason, in the present embodiment, a process for compensating for the decrease is performed in the zero vector period of the requested operation state for the inverter IV1 and the inverter IV2 and the short-circuit process is not performed. FIG. 8 shows an example in which the voltage compensation processing on the side of the inverter IV1 performs processing for compensating the voltage by providing an equal period before and after the timing of the short circuit processing in the zero vector period in the requested operation state. It was.

  According to the present embodiment described above, the following effects can be obtained in addition to the effects (6) to (8) of the third embodiment.

  (9) The short-circuit process was performed in both the period in which the operation state having the higher modulation rate required by the modulation process of the inverters IV1 and IV2 is set to the zero vector and the period not set to the zero vector. Thereby, compared with the case where the process which makes a short circuit state only during the period when the said operation state is made into a zero vector, the frequency of the process which makes a short circuit state can be increased. For this reason, the inductors 20 and 22 can be reduced in size while the amount of energy output (input) from the impedance network IN per unit time meets the requirements.

(Fifth embodiment)
Hereinafter, the fifth embodiment will be described with reference to the drawings with a focus on differences from the fourth embodiment.

  FIG. 9 shows a short-circuit processing aspect according to this embodiment. Specifically, FIG. 9A shows the transition of the carrier on the inverter IV1 side and the command voltages Vuc, Vvc, and Vwc, and FIG. 9B shows the timing of the short-circuit process that operates the inverter IV1. 9 (c) shows the transition of the carrier on the inverter IV2 side and the command voltages Vuc, Vvc, Vwc, and FIG. 9 (d) shows the timing of the short-circuit process with the inverter IV2 as the operation target.

  As shown in the figure, in this embodiment, the operation target for performing the short-circuit process is both inverters IV1 and IV2. Further, the carrier phase is shifted so that the peaks of the carriers, the valleys, and the peaks and valleys do not coincide with each other while the carriers of the PWM processing when operating these are set to the same period. When the PWM processing request for the operation state of the inverter IV1 is a zero vector, the inverter IV1 is operated to perform a short circuit process, and when the PWM processing request for the operation state of the inverter IV2 is a zero vector, the inverter The short circuit process is performed by operating IV2. Thereby, the frequency of a short circuit process can be improved further.

  Note that the voltage decrease on the other side when operating one of the inverters IV1 and IV2 to perform the short circuit process is compensated for in the zero vector period due to the request for the PWM process on the other side and not performing the short circuit process You just have to do it.

  According to this embodiment described above, the following effects can be obtained in addition to the effects (6) to (8) of the third embodiment.

  (10) The operation target for performing the short-circuit process is both inverters IV1 and IV2. Thereby, it becomes possible to improve the frequency of the process which makes a short circuit state compared with the case where a short circuit process is performed only by operating a specific inverter. Moreover, the restrictions imposed by the short-circuit process on the operation of each inverter can be reduced by assigning the inverters to be operated in a time division manner for performing the short-circuit process.

(Sixth embodiment)
Hereinafter, the sixth embodiment will be described with reference to the drawings with a focus on differences from the third to fifth embodiments.

  FIG. 10 shows the system configuration of this embodiment. As illustrated, in this embodiment, the means for operating the inverter IV1 and the means for operating the inverter IV2 are different hardware means (CPUs 40a and 40b). In this case, it is necessary to grasp whether or not the other one is operated and the short circuit processing is performed by means for operating one of the inverters IV1 and IV2. Therefore, in the present embodiment, based on the detection value Vpn of the voltage sensor 50 that detects the voltage between the output terminals of the impedance network IN, it is grasped whether the other is operated and the short circuit processing is performed. Thus, the same processing as in the third to fifth embodiments can be performed while the means for operating the inverter IV1 and the means for operating the inverter IV2 are different hardware means. Note that when performing the processes of the third and fourth embodiments, it is necessary to compare which modulation rate is higher on the inverter IV1 side and the inverter IV2 side. This is performed by exchanging information between the CPUs 40a and 40b at L1.

  According to the present embodiment described above, the following effects can be obtained in addition to the effects other than the above (8) of the third to fifth embodiments.

  (11) By taking in the voltage (detected value Vpn) between the output terminals of the impedance network IN, one of the CPUs 40a and 40b can determine whether or not the short-circuit processing is performed by the operation of the other operation target. .

(Other embodiments)
Each of the above embodiments may be modified as follows.

  In the first embodiment, the short circuit processing is performed each time with both the zero vectors V0 and V7, but the present invention is not limited to this. For example, the short circuit processing may be performed only on one of the zero vectors V0 and V7 for the larger modulation rate. For example, after the short circuit processing is performed on the zero vector V0, the subsequent zero vector V7, Short circuit processing may be performed at the next zero vector V7 without performing short circuit processing at V0.

  In the second embodiment, the peak of the carrier on the inverter IV2 side is set to periodically coincide with the peak and valley of the carrier on the inverter IV1 side, but the present invention is not limited to this. For example, the valley of the carrier on the inverter IV2 side may be set to periodically coincide with the peak and valley of the carrier on the inverter IV1 side. Further, the frequency on the inverter IV2 side is not limited to “twice” the frequency on the inverter IV1 side. For example, “3 times”, “4 times”, “½ times”, or the like may be used.

  In the first and second embodiments, the means for operating the inverter IV1 and the means for operating the inverter IV2 may be different means as illustrated in FIG. Even in this case, both carriers can be linked via the signal line L1.

  In the third embodiment, the short-circuit process is performed in the zero vector period with the larger modulation rate of the inverters IV1 and IV2, but the present invention is not limited to this. For example, even when the short-circuit process is performed in the zero vector period with the smaller modulation rate, the short-circuit process period is limited to the zero vector period with the greater modulation rate or less so that the one with the larger modulation rate is performed once. In the zero vector period, it is possible to perform a process of compensating for a voltage decrease due to one short-circuit process.

  In the fourth embodiment, the short-circuit process is performed in the periods of the zero vectors V0 and V7 having the larger modulation rate of the inverters IV1 and IV2 and in the center timing of these periods, but the present invention is not limited to this. For example, between the inverters IV1 and IV2, the carriers have the same period and the same phase or opposite phase, and the periods of the zero vectors V0 and V7 with the larger modulation rate of the inverters IV1 and IV2 and the inverters IV1 and IV2 Short circuit processing may be performed at the end of the zero vector period with the smaller modulation rate. As a result, the voltage of the inverters IV1 and IV2 having the smaller modulation rate is not reduced by the short-circuit process, so that it is not necessary to perform the voltage compensation process.

  In the fourth embodiment, short-circuiting may be performed once at both ends of the zero vector period with the smaller modulation rate among the inverters IV1 and IV2. In this case, processing for compensating for the voltage decrease due to the short circuit processing is performed in the zero vector period of the inverters IV1 and IV2, which has the larger modulation rate.

  In the fifth embodiment, the inverter operated so as to perform the short-circuit process with the carrier having the same period and the same phase or the opposite phase may be alternately switched between the inverter IV1 and the inverter IV2. In this case, although the frequency for performing the short-circuit process is smaller than that in the case of the fifth embodiment, the operation states of the inverters IV1 and IV2 can be made as normal as possible with the PWM process.

  In the sixth embodiment, when each of the inverters IV1 and IV2 is operated by the CPUs 40a and 40b that are different from each other, in order to grasp whether or not the other inverter is short-circuited. Although the voltage between the output terminals of the impedance network IN (detected value Vpn) is used, the present invention is not limited to this. For example, as shown in FIG. 11, even when both inverters IV1 and IV2 are operated by a single CPU 40, based on the voltage between the output terminals of the impedance network IN (detected value Vpn), You may make it grasp | ascertain whether the short circuit process is made | formed in the other inverter.

  The impedance network IN is not limited to that exemplified in the above embodiment. For example, FIG. Of “Z-Source Inverter for Fuel Cell Vehicles submitted to Oak Ridge National Laboratory Engineering Science and Technology Division Power Electrics Electric Machinery Research Center August 31 2005”. As described in 3.4, a configuration in which several diodes and capacitors are additionally connected to the one shown in FIG. 1 may be used.

  The process for applying the command voltage to the rotating machine is not limited to the PWM process that modulates the carrier based on the command voltage. For example, so-called space vector modulation processing exemplified in JP-A-10-4696 may be used.

  -The rotating machine is not limited to a three-phase rotating machine. For example, a single-phase rotating machine may be used.

  -Hybrid vehicles are not limited to parallel series hybrid vehicles. For example, a series hybrid vehicle or a parallel hybrid vehicle may be used. Even in this case, it is effective to perform voltage compensation processing in the zero vector period instead of performing short circuit processing even when the operation state of the inverter required by the modulation processing is not a zero vector. In particular, if the operation state of the inverter required by the modulation process is short-circuited in both the zero vector period and the non-zero vector period, the frequency for performing the short-circuit process can be increased. The inductors 20 and 22 can be reduced in size while increasing the inflow / outflow energy of IN.

  Further, the present invention may be applied not only to a hybrid vehicle but also to a power conversion circuit of an electric vehicle, for example. Further, the power conversion circuit is not limited to one in which one or two rotating machines are connected, and may be one in which three or more are connected. The power supply means is not limited to a secondary battery, and may be a primary battery, for example.

1 is a system configuration diagram according to a first embodiment. FIG. The figure which shows a voltage vector. The time chart for demonstrating the problem which the said system gets into. The time chart which shows the aspect of the setting of the carrier wave and short circuit processing concerning the said embodiment. The time chart which shows the aspect of the setting of the carrier wave and short circuit processing concerning 2nd Embodiment. The time chart which shows the aspect of the short circuit process concerning 3rd Embodiment, and the aspect of a voltage compensation process. The time chart which shows the aspect of the voltage compensation process concerning the said embodiment. The time chart which shows the aspect of the short circuit process concerning 4th Embodiment, and the aspect of a voltage compensation process. The time chart which shows the aspect of the short circuit process concerning 5th Embodiment. The system block diagram concerning the said 6th Embodiment. The system block diagram concerning the modification of the said 6th Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10a ... 1st motor generator (one embodiment of a rotary machine), 10b ... 2nd motor generator (one embodiment of a rotary machine), 12 ... High voltage battery (one embodiment of a feeding means), IV1, IV2 ... Inverter, IN ... impedance network.

Claims (18)

The inverter is applied to a power conversion circuit including an inverter connected between the power feeding means and each of the plurality of rotating machines, and the inverter is configured to short-circuit between the high potential side input terminal and the low potential side input terminal of the inverter. In the power conversion control device that performs processing to operate,
Power conversion control characterized by comprising association means for associating a process for setting the short circuit state by operating an inverter connected to an arbitrary rotating machine and an operation of an inverter connected to another rotating machine. apparatus.   The power conversion control device according to claim 1, wherein the power conversion circuit boosts the voltage of the power feeding unit by setting the short circuit state.   The power conversion circuit includes a pair of inductors including an inductor connected between the high-potential side input terminal and the positive terminal of the power feeding means, and an inductor connected between the low potential side input terminal and the negative terminal of the power feeding means. And each of the pair of inductors includes an impedance network including a capacitor connected between the inductor and the inverter and between the other inductor and the power feeding unit. Item 3. The power conversion control device according to Item 2.   The linkage means synchronizes a period in which the requested operation state for the inverter connected to the other rotating machine is a zero vector and a period in which the requested operation state for the inverter connected to the arbitrary rotating machine is a zero vector. The power conversion control device according to any one of claims 1 to 3, further comprising synchronization means for performing the operation. Each of the plurality of inverters is operated based on a magnitude relationship between a voltage command value and a carrier wave for a rotating machine connected to the inverter,
5. The power conversion control device according to claim 4, wherein the synchronization unit is a unit that makes the frequencies of the carriers related to each of the plurality of rotating machines the same and makes the phase the same or reverse. Each of the plurality of inverters is operated based on a magnitude relationship between a voltage command value and a carrier wave for a rotating machine connected to the inverter,
6. The power conversion control apparatus according to claim 5, wherein the synchronization unit is a unit that sets a ratio of carrier wave frequencies for each of the plurality of rotating machines as an integer. Each of the plurality of inverters is operated based on a modulation process according to a magnitude relationship between a voltage command value and a carrier wave for a rotating machine connected to the inverter,
The associating means performs a process of setting the shortest state in a period in which a request operation state with respect to an inverter connected to the rotating machine is a zero vector, with the one having the highest modulation rate of the modulation processing as the arbitrary rotating machine. The power conversion control device according to claim 1, wherein the power conversion control device is a power conversion control device.   The linkage means performs a process of setting the short circuit state by operating an inverter connected to the arbitrary rotating machine when an operating state of the inverter connected to the other rotating machine is a zero vector. The power conversion control device according to claim 1, wherein the power conversion control device is a power conversion control device.   The linkage means, when the operation state of the inverter connected to the other rotating machine is not a zero vector, the inverter connected to the arbitrary rotating machine is operated to make the short circuit state, The power conversion control device according to any one of claims 1 to 7, further comprising compensation means for compensating for a decrease in voltage to be applied to the other rotating machine due to the short-circuiting process. The power conversion circuit includes a pair of inductors including an inductor connected between the high-potential side input terminal and the positive terminal of the power feeding means, and an inductor connected between the low potential side input terminal and the negative terminal of the power feeding means. And for each of the pair of inductors, an impedance network configured to include a capacitor connected between the inductor and the inverter and between the other inductor and the power feeding means,
The power conversion control device according to claim 9, wherein the compensation unit performs the compensation process based on a voltage between output terminals of the impedance network.   The said linkage means makes variable the inverter made into operation object in order to perform the process which makes the said short circuit state among the inverters connected to each of these rotary machines. The power conversion control device according to claim 1. This is applied to a power conversion circuit including an inverter connected between a power feeding means and a rotating machine, and performs a process of operating the inverter so as to short-circuit between a high potential side input terminal and a low potential side input terminal of the inverter. In the power conversion control device,
A power conversion control device, comprising: compensation means for compensating for a decrease in voltage to be applied to the rotating machine due to the short circuit processing. The inverter is operated based on a modulation process according to a magnitude relationship between a command value of a voltage for the rotating machine and a carrier wave,
When the processing for setting the short circuit state is performed in a period in which the operation state of the inverter required by the modulation process is not a zero vector, the compensation unit is configured to perform a process in which the required operation state is a zero vector. The power conversion control device according to claim 12, wherein a decrease in the voltage to be applied to the rotating machine due to the short-circuiting process is compensated.   14. The power conversion according to claim 13, wherein the process of setting the short circuit state is performed in both a period in which an operation state of the inverter required by the modulation process is a zero vector and a period in which the operation state is not a zero vector. Control device. The rotating machine comprises a plurality of rotating machines,
15. The power conversion control device according to claim 12, wherein the inverter includes a plurality of inverters connected between the power feeding unit and the plurality of rotating machines.   The power conversion control device according to any one of claims 12 to 15, wherein the power conversion circuit boosts the voltage of the power feeding means by setting the short circuit state.   The power conversion circuit includes a pair of inductors including an inductor connected between the high-potential side input terminal and the positive terminal of the power feeding means, and an inductor connected between the low potential side input terminal and the negative terminal of the power feeding means. And each of the pair of inductors includes an impedance network including a capacitor connected between the inductor and the inverter and between the other inductor and the power feeding unit. Item 17. The power conversion control device according to Item 16. The power conversion control device according to any one of claims 1 to 17,
A power conversion system comprising the power conversion circuit.

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