JP2009169394A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device capable of improving detection sensitivity of sensors formed in a sensor region of a substrate, and to improve saturation characteristics of the sensors. <P>SOLUTION: The display device includes: the substrate having a pixel region in which pixels are formed and the sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region (36A) and an N-type semiconductor region (36K), and operative to receive light incident from the other surface side of the substrate; and a metal film (38) formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential. In the thin film photodiode, the width Wp of the P-type semiconductor region and the width Wn of the N-type semiconductor region are different from each other. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display device including a substrate (display unit) having a pixel region where pixels are formed and a sensor region where light receiving elements are formed. Specifically, the present invention relates to a technique for improving the utilization efficiency of light received by a plurality of light receiving elements, which is reflected by a detection object that is in contact with or close to a substrate (display unit).

  As display devices used for mobile phones, personal digital assistants (PDAs), digital still cameras, PC monitors, televisions, etc., liquid crystal display devices, organic EL display devices, display devices using electrophoretic methods, and the like are known. .

  As display devices become thinner, in addition to the original function of displaying video and text information, there is a demand for multi-functionality that also has functions such as an input device for inputting user instructions and the like. Yes. As a response to this requirement, a display device that detects that a user's finger or stylus pen (a so-called touch pen or the like) has touched or approached a display screen is known.

  The contact detection can be performed with, for example, a resistive film type or capacitive type touch panel. A display device in which a touch panel is added to the display surface side of a display panel such as a liquid crystal panel is known.

  However, the addition of a touch panel is disadvantageous for thinning the display panel, which causes an increase in cost. In particular, a resistance film type touch panel cannot detect a change in resistance value unless the screen is pressed with a certain degree of strength, which distorts the display surface. In addition, the resistive film type touch panel has one point detection in principle, and its application is limited.

  In recent years, in liquid crystal display devices, there is a movement to provide a touch panel function by simultaneously forming photosensors on a transistor array substrate that controls a voltage for driving liquid crystal.

  In a display device having a photosensor on the transistor array substrate, for example, a method of looking at the shadow of external light to recognize a finger or a stylus pen, or reflecting light from a backlight to a finger or stylus. A method for detecting the reflected light is known.

  However, the method of looking at the shadow of external light to recognize a finger or stylus pen has a problem that it does not function in the dark. Further, there is a problem that the method of detecting the reflected light by reflecting the light from the backlight to a finger or a stylus cannot be detected in the case of a completely black display.

  Against such a background, Patent Document 1 proposes a liquid crystal display device that emits infrared light from a backlight and detects the reflected light.

Patent Document 2 proposes a liquid crystal display device in which a reflector is provided under a semiconductor layer made of polysilicon constituting a PIN diode to reflect light to the semiconductor layer to increase the light absorption length.
JP 2005-275644 A JP 2007-241303 A

  However, in the liquid crystal display device described in Patent Document 1, in order to realize an infrared sensor with a thin-film polycrystalline silicon thin film, as shown in FIG. It was difficult to detect because of the problem. Further, since a visible light source is used as the backlight light source, there is a problem that when visible light having high photosensitivity is incident on the photodiode, an infrared signal to be detected is buried in noise.

  In addition, the liquid crystal display device described in Patent Document 2 has a problem that although the light output increases, the sensitivity does not increase unless the capacity of the detection destination is devised.

In addition to the above-described problems related to the improvement of the sensitivity of the sensor, there is a demand for improvement of the saturation characteristic of the sensor.
These problems are not limited to the liquid crystal display devices disclosed in Patent Document 1 and Patent Document 2, but are common to other display devices such as an organic EL display device and a display device using electronic play.

  The problem to be solved is that it is difficult to improve the detection sensitivity of the sensor and the saturation characteristics of the sensor.

  The display device of the present invention includes a substrate having a pixel region in which pixels are formed and a sensor region in which an optical sensor unit is formed, an illumination unit that illuminates the substrate from one surface side of the substrate, and a sensor region. A thin film photodiode which is disposed and has at least a P-type semiconductor region and an N-type semiconductor region and receives light incident from the other surface side of the substrate; and the thin film via an insulating film on the one surface side of the substrate A metal film that is formed to face a photodiode, suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one surface side, and is fixed to a predetermined potential; In the thin film photodiode, the width of the P-type semiconductor region in a direction perpendicular to the direction connecting to the N-type semiconductor region and the front in the direction perpendicular to the direction connecting to the P-type semiconductor region. The width of the N-type semiconductor region are formed differently.

The display device of the present invention includes a substrate, an illumination unit, a thin film photodiode, and a metal film.
The substrate includes a pixel region in which pixels are formed and a sensor region in which an optical sensor unit including the pixels is formed.
The illumination unit illuminates the substrate from one side of the substrate.
The thin film photodiode is disposed in the sensor region, has at least a P-type semiconductor region and an N-type semiconductor region, and receives light incident from the other surface side of the substrate.
The metal film is formed on one side of the substrate so as to face the thin film photodiode with an insulating film interposed therebetween, and suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one side. It is fixed at the potential.
Here, in the thin film photodiode, the width of the P-type semiconductor region in the direction perpendicular to the direction connecting to the N-type semiconductor region is different from the width of the N-type semiconductor region in the direction perpendicular to the direction connecting to the P-type semiconductor region. It is formed with a layout.

  The display device of the present invention includes a substrate having a pixel region in which pixels are formed and a sensor region in which an optical sensor unit is formed, an illumination unit that illuminates the substrate from one surface side of the substrate, and a sensor region. A thin film photodiode which is disposed and has at least a P-type semiconductor region and an N-type semiconductor region and receives light incident from the other surface side of the substrate; and the thin film via an insulating film on the one surface side of the substrate A metal film that is formed to face a photodiode, suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one surface side, and is fixed to a predetermined potential; In the thin film photodiode and the metal film, a capacitance value of a parasitic capacitance formed by the metal film and the P-type semiconductor region opposed via the insulating film is opposed via the insulating film. Capacitance value of the parasitic capacitance formed serial N-type semiconductor region and by the metal film different.

The display device of the present invention includes a substrate, an illumination unit, a thin film photodiode, and a metal film.
The substrate has a pixel region in which pixels are formed and a sensor region in which photosensor portions are formed.
The illumination unit illuminates the substrate from one side of the substrate.
The thin film photodiode is disposed in the sensor region, has at least a P-type semiconductor region and an N-type semiconductor region, and receives light incident from the other surface side of the substrate.
The metal film is formed on one side of the substrate so as to face the thin film photodiode with an insulating film interposed therebetween, and suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one side. It is fixed at the potential.
Here, in the thin film photodiode and the metal film, the capacitance value of the parasitic capacitance constituted by the P-type semiconductor region and the metal film opposed via the insulating film is equal to the N-type semiconductor region and the metal film opposed via the insulating film. It differs from the capacitance value of the parasitic capacitance constituted by.

  The display device of the present invention includes a substrate having a pixel region in which pixels are formed and a sensor region in which an optical sensor unit is formed, an illumination unit that illuminates the substrate from one surface side of the substrate, and a sensor region. A thin film photodiode which is disposed and has at least a P-type semiconductor region and an N-type semiconductor region and receives light incident from the other surface side of the substrate; and the thin film via an insulating film on the one surface side of the substrate A metal film that is formed to face a photodiode, suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one surface side, and is fixed to a predetermined potential; In the thin film photodiode, the area of the region where the P-type semiconductor region and the metal film overlap when viewed from one side or the other side is the overlapping region of the N-type semiconductor region and the metal film Different from the area.

The display device of the present invention includes a substrate, an illumination unit, a thin film photodiode, and a metal film.
The substrate has a pixel region in which pixels are formed and a sensor region in which photosensor portions are formed.
The illumination unit illuminates the substrate from one side of the substrate.
The thin film photodiode is disposed in the sensor region, has at least a P-type semiconductor region and an N-type semiconductor region, and receives light incident from the other surface side of the substrate.
The metal film is formed on one side of the substrate so as to face the thin film photodiode with an insulating film interposed therebetween, and suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one side. It is fixed at the potential.
Here, in the thin film photodiode, the area of the region where the P-type semiconductor region and the metal film overlap when viewed from one side or the other side is different from the area of the overlap region of the N-type semiconductor region and the metal film.

  According to the display device of the present invention, in the thin film photodiode formed in the sensor region of the substrate, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different. Thereby, the parasitic capacitance between the thin film photodiode and the metal film can be reduced to improve the detection sensitivity of the sensor, and the saturation characteristic of the sensor can be improved.

  Further, according to the display device of the present invention, the capacitance value of the parasitic capacitance formed by the P-type semiconductor region and the metal film facing each other through the insulating film is equal to the N-type semiconductor region and the metal film facing each other through the insulating film. It differs from the capacitance value of the parasitic capacitance constituted by. Thereby, the parasitic capacitance between the thin film photodiode and the metal film can be reduced to improve the detection sensitivity of the sensor, and the saturation characteristic of the sensor can be improved.

  Further, according to the display device of the present invention, the area of the region where the P-type semiconductor region and the metal film overlap when viewed from one side or the other side is the area of the overlapping region of the N-type semiconductor region and the metal film. Different. Thereby, the capacitance value of the parasitic capacitance constituted by the P-type semiconductor region and the metal film opposed via the insulating film is equal to the capacitance of the parasitic capacitance constituted by the N-type semiconductor region and the metal film opposed via the insulating film. It becomes a structure different from a value, the parasitic capacitance between a thin film photodiode and a metal film can be reduced, the detection sensitivity of a sensor can be improved, and the saturation characteristic of a sensor can be improved.

Hereinafter, a display device and an embodiment of the present invention will be described with reference to the drawings.
The description will be given in the following order.
1. First Embodiment (Configuration in which the width of the anode region in the direction perpendicular to the direction connecting to the cathode region is different from the width of the cathode region in the direction perpendicular to the direction connecting to the anode region)
2. Modified example 2. Second embodiment (configuration in which an extending portion extending in a direction perpendicular to the direction connecting to the cathode region is provided outside the overlapping region with the control gate)
4). Third embodiment (configuration having an I region portion having a width equal to the width of the anode region at the end of the anode region of the I region)
5. Fourth Embodiment (Configuration in which the overlap width of the P ⁺ region and the control gate is narrower than the overlap width of the N ⁺ region and the control gate)
6). Fifth embodiment (applied product example of display device)

<First Embodiment>
Hereinafter, as a display device according to the first embodiment, a liquid crystal display device will be described as a main example with reference to the drawings.
The display device of this embodiment can be suitably implemented in a so-called “transmission type” liquid crystal display device in which light is irradiated from the back side of the substrate which is a display unit (the surface opposite to the front side where image display is performed). For this reason, in the following description, it is assumed that the liquid crystal display device is a transmissive type.

[overall structure]
FIG. 1 shows a schematic overall configuration diagram of a transmissive liquid crystal display device.
The liquid crystal display device 100 illustrated in FIG. 1 includes, for example, a liquid crystal panel 200 as a display unit as a “substrate”, a backlight 300 as an “illumination unit”, and a data processing unit 400.

  For example, as shown in FIG. 1, the liquid crystal panel 200 includes a TFT array substrate 201, a color filter substrate 202 as a so-called “counter substrate”, and a liquid crystal layer 203. Hereinafter, with respect to the liquid crystal layer 203, the side of the backlight 300 in the thickness direction of the liquid crystal panel 200 is referred to as “one side” or “back side”, and the side opposite to the one side is referred to as “the other side”. Or referred to as “front side”.

  For example, the TFT array substrate 201 and the color filter substrate 202 face each other with a gap therebetween, and the liquid crystal layer 203 is formed so as to be sandwiched between the TFT array substrate 201 and the color filter substrate 202. . Although not particularly illustrated, a pair of alignment films are formed to align the alignment direction of the liquid crystal molecules of the liquid crystal layer 203 with the liquid crystal layer 203 interposed therebetween. A color filter 204 is formed on the surface of the color filter substrate 202 on the liquid crystal layer 203 side.

  For example, the first polarizing plate 206 and the second polarizing plate 207 are installed so as to face each other on both sides of the liquid crystal panel 200. A first polarizing plate 206 is disposed on the back side of the TFT array substrate 201, and a second polarizing plate 207 is disposed on the front side of the color filter substrate 202.

  For example, the optical sensor unit 1 is provided on the other side of the TFT array substrate 201 facing the liquid crystal layer 203 as shown in FIG. As will be described in detail later, the optical sensor unit 1 includes a thin film photodiode that is a light receiving element and a readout circuit thereof.

The optical sensor unit 1 is formed to give a so-called touch panel function to the liquid crystal panel 200. For example, when the liquid crystal panel 200 is viewed from the display surface (front surface) side, it is regularly arranged in the effective display area PA.
FIG. 1 shows a cross section of a liquid crystal panel 200 in which the optical sensor units 1 are arranged in a matrix in the effective display area PA. For example, in FIG. 1, a plurality (four on the drawing) of optical sensor units 1 are arranged at equal intervals. Although FIG. 1 shows four photosensor parts 1 for convenience of illustration, the present invention is not limited to this.
When the position detection function is limited to a part of the effective display area PA, for example, the optical sensor unit 1 is regularly arranged in the limited display area.

  In the effective display area PA on the display plane (front surface), as shown in FIG. 1, the area of the liquid crystal panel 200 in which the optical sensor unit 1 is formed is the “sensor area (PA2)”, and the other areas of the liquid crystal panel 200 are It is defined as “pixel area (PA1)”. The pixel area (PA1) is a pixel arrangement area in which a plurality of colors such as red (R), green (G), and blue (B) are assigned to each pixel. The color assignment is determined by the transmission wavelength characteristic of the color filter facing the pixel.

For example, although not shown in FIG. 1, a pixel electrode and a common electrode (also referred to as a counter electrode) are formed in a pixel arrangement region (pixel region (PA1)). The pixel electrode and the common electrode are made of a transparent electrode material. In some cases, a common electrode common to all the pixels is formed on the other surface side (liquid crystal layer side) of the TFT array substrate 201 on the side opposite to the pixel electrode of the pixel electrode, facing the pixel electrode. Alternatively, the pixel electrode may be formed on the other surface side of the TFT array substrate 201 and the common electrode may be formed in common for all the pixels at a position on the color filter substrate 202 side with the liquid crystal layer 203 interposed therebetween.
Although not shown in FIG. 1, in the pixel arrangement region, an auxiliary capacitor for assisting liquid crystal capacitance between the pixel electrode and the counter electrode, and an applied potential to the pixel electrode are input according to the pixel configuration. A switching element or the like that is controlled according to the potential is also formed.

  For example, when a unit composed of a plurality of pixels each corresponding to a plurality of colors is a “pixel unit”, when the ratio of the photosensor unit 1 to the pixel unit is 1: 1, the arrangement density of the photosensor units 1 is the maximum. Become. In the present embodiment, the arrangement density of the optical sensor units 1 may be the maximum case or smaller.

For example, the backlight 300 is disposed on the back side of the TFT array substrate 201. The backlight 300 faces the back surface of the liquid crystal panel 200 and emits illumination light to the effective display area PA of the liquid crystal panel 200.
The backlight 300 illustrated in FIG. 1 includes a light source 301 and a light guide plate 302 that converts light emitted from the light source 301 into planar light by diffusing. The backlight 300 includes a sidelight type and a direct type according to the arrangement position of the light source 301 with respect to the light guide plate 302. Here, a sidelight type is exemplified.

For example, the light source 301 is disposed behind the liquid crystal panel 200 and on one side or both sides in the direction along the back surface of the liquid crystal panel 200. In other words, the light source 301 is arranged along one side or two opposite sides of the liquid crystal panel 200 as viewed from the display surface 200A (front surface). However, the light source 301 may be disposed along three or more sides of the liquid crystal panel 200.
The light source 301 is composed of, for example, a cold-cathode tube lamp that emits ultraviolet light generated by arc discharge in low-pressure mercury vapor in a glass tube and converts it into visible light with a phosphor, or an LED or EL element. FIG. 1 shows a case where a visible light source 301a such as a white LED and an IR light source 301b are arranged as two light sources 301 facing each other.

  The light guide plate 302 is made of, for example, a translucent acrylic plate, and guides light along the surface (from one side in the direction along the back surface of the liquid crystal panel 200 to the other side) while totally reflecting light from the light source 301. To do. On the back surface of the light guide plate 302, for example, a dot pattern (not shown) (a plurality of protrusions) formed integrally with the light guide plate 302 or formed by a member different from the light guide plate 302 is provided. . The guided light is scattered by the dot pattern and applied to the liquid crystal panel 200. Note that a reflective sheet that reflects light may be provided on the back side of the light guide plate 302, and a diffusion sheet or a prism sheet may be provided on the front side of the light guide plate 302.

  For example, the backlight 300 has the above-described configuration, and is configured to irradiate substantially uniform plane light on the entire surface of the effective display area PA of the liquid crystal panel 200.

For example, the data processing unit 400 includes a control unit 401 and a position detection unit 402 as illustrated in FIG. The data processing unit 400 includes a computer and operates when the computer controls each unit by a program. For this reason, the functions of the control unit 401 and the position detection unit 402 are realized in advance using program tasks and data stored in a memory (not shown) or input from the outside.
The data processing unit 400 may be implemented with its functions divided inside and outside the liquid crystal panel 200. FIG. 1 illustrates a case where the data processing unit 400 is arranged outside the liquid crystal panel 200 as, for example, one or a plurality of ICs.

For example, the control unit 401 performs image display control, IR sensor control for position detection (data collection by light reception), and backlight control.
Regarding the image display, the control unit 401 controls the image display of the liquid crystal panel 200 by, for example, giving an instruction by supervising the display driving circuit in the liquid crystal panel 200. Regarding the control of the IR sensor, the control unit 401 controls the detection of the position (and size) of the object to be detected by, for example, giving an instruction by supervising the sensor driving circuit in the liquid crystal panel 200. Examples of the display driving circuit and the sensor driving circuit will be described later.
Regarding the backlight control, the control unit 401 controls the brightness of illumination light output from the backlight 300 by supplying a control signal to a power supply unit (not shown) of the backlight 300.

  For example, when the position detection unit 402 receives an instruction from the control unit 401, the position detection unit 402 detects a detected object such as a user's finger or a stylus pen based on light reception data transmitted via a sensor driving circuit in the liquid crystal panel 200. Detect contact or close position. This detection is performed on the effective display area PA of the liquid crystal panel 200.

[Schematic configuration of LCD panel]
FIG. 2 is a block diagram illustrating a configuration example of a drive circuit in the liquid crystal panel.

For example, as shown in FIG. 2, the liquid crystal panel 200 includes the display unit 10 in which pixels (PIX) are arranged in a matrix.
As shown in FIG. 1, a peripheral area CA exists around the effective display area PA. The peripheral area CA is an area other than the effective display area PA of the TFT array substrate 201. In the peripheral area CA, as shown in FIG. 2, drive circuits indicated by several functional blocks configured to include TFTs formed together with TFTs in the effective display area PA are formed.

  For example, the liquid crystal panel 200 has a vertical driver (V.DRV.) 11, a display driver (D-DRV.) 12, a sensor driver (S-DRV.) 13, a selection switch array (SEL.SW.) 14, as a drive circuit. And a DC / DC converter (DC / DC.CNV.) 15.

For example, the vertical driver 11 is a circuit having a function of a shift register or the like that scans various control lines wired in the horizontal direction in the vertical direction in order to select a pixel line.
The display driver 12 is a circuit having a function of sampling the data potential of the video signal to generate a data signal amplitude and discharging the data signal amplitude to a common signal line among the pixels in the column direction.
The sensor driver 13 outputs a sensor output (detection) in synchronization with the scanning of the control line similar to the vertical driver 11 and the scanning of the control line with respect to the optical sensor unit 1 distributed in the pixel arrangement region at a predetermined density. Data).
The switch array 14 is composed of a plurality of TFT switches, and is a circuit that controls discharge of data signal amplitude by the display driver 12 and control of sensor output from the display unit 10.
The DC / DC converter 15 is a circuit that generates various DC voltages having potentials necessary for driving the liquid crystal panel 200 from an input power supply voltage.

  For example, input / output signals of the display driver 12 and the sensor driver 13 and other signals are exchanged inside and outside the liquid crystal panel 200 via the flexible substrate 16 provided in the liquid crystal panel 200.

  For example, in addition to the configuration shown in FIG. 2, a configuration for generating a clock signal or external input is also included in the drive circuit.

[Combination example of pixel and photo sensor]
As already described, for example, the pixels and the optical sensor units are regularly arranged in the effective display area PA. The arrangement rule is arbitrary, but a plurality of pixels and one photosensor unit may be combined into a matrix in the effective display area PA. For example, three pixels R, G, and B One optical sensor unit 1 is set as one set.

  For example, the color filter 204 shown in FIG. 1 substantially corresponds to the size of the pixel (PIX) in plan view, and selectively transmits each of R, G, and B wavelength regions, and prevents color mixing. It has a black matrix that shields the periphery of the filter (all boundaries) with a constant width.

[Pattern and cross-sectional structure of pixel portion and optical sensor portion]
FIG. 3A shows an example of a plan view of the optical sensor unit 1, and FIG. 3B shows an example of an equivalent circuit of the optical sensor unit 1 corresponding to the pattern of FIG.
For example, as illustrated in FIG. 3B, the optical sensor unit 1 includes three transistors formed of N-channel thin film transistors (TFTs) and a thin film photodiode PD that is a light receiving element.
The three transistors are a reset transistor TS, an amplifier transistor TA, and a read transistor TR.

For example, the thin film photodiode PD is formed as a light receiving element having sensitivity to invisible light such as infrared light or ultraviolet light. In the present embodiment, the light receiving element is sensitive to infrared light emitted from the IR light source 301b that constitutes the backlight 300 described above. When the backlight emits ultraviolet light, the thin film photodiode PD is designed to be sensitive to the ultraviolet light.
For example, the thin film photodiode PD has an anode connected to the storage node SN and a cathode connected to a supply line (hereinafter referred to as VDD line) 31 of the power supply voltage VDD.
The thin film photodiode PD has a PIN structure or a PDN structure as will be described later, and is an insulating film with respect to an I (intrinsic) region (intrinsic semiconductor region with a PIN structure) or a D (doped) region (N ^- region with a PDN structure). And a control gate CG for applying an electric field via the. The thin film photodiode PD is used while being reverse-biased, and has a structure in which the sensitivity can be optimized (usually maximized) by controlling the degree of depletion at that time by the control gate CG.

  For example, the reset transistor TS has a drain connected to the storage node SN, a source connected to a reference voltage VSS supply line (hereinafter referred to as VSS line) 32 via a wiring 37, and a gate connected to a reset signal (RESET) supply line (RESET). Hereinafter, it is connected to a reset line 33. The reset transistor TS switches the storage node SN from the floating state to the connection state to the VSS line 32, discharges the storage node SN, and resets the accumulated charge amount.

  For example, the amplifier transistor TA has a drain connected to the VDD line 31, a source connected to the output line (hereinafter referred to as detection line) 35 of the detection potential Vdet (or detection current Idet) via the read transistor TR, and a gate connected to the storage node. Connected to SN.

  For example, the read transistor TR has a drain connected to the source of the amplifier transistor TA, a source connected to the detection line 35, and a gate connected to a supply line (hereinafter, read control line) 34 of a read control signal (READ). Yes.

  For example, when the positive charge generated in the thin film photodiode PD is accumulated in the storage node SN that is again in a floating state after reset, the amplifier transistor TA has an effect of amplifying the accumulated charge amount (light receiving potential). The read transistor TR is a transistor that controls the timing at which the light reception potential amplified by the amplifier transistor TA is discharged to the detection line 35. When the storage time of a certain time elapses, the read control signal (READ) is activated and the read transistor TR is turned on, so that a voltage is applied to the source and drain of the amplifier transistor TA, and the gate potential at that time corresponds to Apply current. Accordingly, a potential change with an increased amplitude appears on the detection line 35 according to the received light potential, and this potential change is output from the detection line 35 to the outside of the optical sensor unit 1 as the detection potential Vdet. Alternatively, the detection current Idet whose value changes according to the light reception potential is output from the detection line 35 to the outside of the optical sensor unit 1.

FIG. 3A shows a top view of the TFT array substrate 201 before being bonded to the color filter substrate 202 and filled with liquid crystal as shown in FIG.
In the pattern diagram shown in FIG. 3A, the elements and nodes shown in FIG. 3B are denoted by the same reference numerals, and thus the electrical connection between the elements is clear.
For example, the VDD line 31, the VSS line 32, and the detection line 35 are formed from an aluminum (AL) wiring layer, and the reset line 33 and the read control line 34 are formed from a gate metal (GM), for example, molybdenum (Mo). Yes. The gate metal (GM) is formed below the aluminum (AL) wiring layer. Four semiconductor layers, such as a polysilicon (PS) layer, are arranged in isolation in a layer above the gate metal (GM) and below the aluminum (AL). Each of the reset transistor TS, the read transistor TR, the amplifier transistor TA, and the thin film photodiode PD includes a semiconductor layer such as a PS layer.

For example, a transistor has a transistor structure in which a source and a drain are formed by introducing an N-type impurity into one and the other of a portion of a thin-film semiconductor layer made of a PS layer or the like intersecting with a gate metal (GM). Yes.
On the other hand, the thin-film photodiode PD has a diode structure because impurities of P-type and N-type reverse conductivity are introduced into one and the other of the thin-film semiconductor layer 36 made of a PS layer or the like. The P-type impurity region (P ⁺ region) becomes the anode (A) region of the thin film photodiode PD, and this constitutes the storage node SN, for example. On the other hand, the N-type impurity region (N ⁺ region) constitutes the cathode (K) region of the thin-film photodiode PD, which is connected to the upper VDD line 31 through a contact, for example.
Details of the configuration of the thin film photodiode PD will be described later.

  FIG. 4 is a cross-sectional view schematically showing the optical sensor unit 1 and a part of an FFS liquid crystal pixel (PIX). FIG. 4 shows a cross section showing a part of the optical sensor unit 1 along a line S1-S1 in FIG. 3A and a cross section showing a part of a pixel (PIX) (not shown).

  For example, the liquid crystal pixel of the present embodiment is an FFS (Field Fringe Switching) method. The FFS liquid crystal is also referred to as “In Plane Switching (IPS) -Pro” liquid crystal ”.

  As shown in FIG. 4, a transistor to be a switching element SW is formed by being embedded in a multilayer insulating film on the TFT array substrate 201. The insulating film shown in FIG. 4 includes a two-layer gate insulating film 50, a two-layer first interlayer insulating film 51, a second interlayer insulating film (planarizing film) 52, and a third interlayer insulating film 53 in order from the lower layer. .

For example, a gate metal GM made of molybdenum (Mo) or the like is formed immediately below the gate insulating film 50 and becomes the vertical scanning line 44, and a thin semiconductor layer 43 made of a polysilicon (PS) layer or the like is formed on the gate insulating film 50. Is formed.
In the semiconductor layer 43, a P ⁻ region serving as a channel formation region is located above the gate metal GM, and N ⁺ regions serving as a source / drain are formed on both sides thereof to constitute a thin film transistor.

For example, a pixel electrode 40 formed of a transparent electrode layer divided for each pixel via an internal wiring 42 and a contact 41 is formed on one of a source and a drain formed on the semiconductor layer 43.
A common electrode 55 is formed below the pixel electrode 40 at the interface between the second interlayer insulating film 52 and the third interlayer insulating film 53 so as to face the pixel electrode 40. The common electrode 55 is formed of a transparent electrode layer common to all pixels.
A signal line 45A made of aluminum or the like is connected to the other of the source and drain of the semiconductor layer 43.

Further, for example, the color filter substrate 202 is overlaid on the TFT array substrate 201, and the liquid crystal layer 203, the alignment film 56, and the color filter 204 are positioned between the two substrates in order from the lower layer.
Here, the liquid crystal layer 203 is composed of nematic liquid crystal.
The common electrode 55 is an electrode that is fixed at a common potential and changes an electric field applied to the liquid crystal by a voltage applied between the pixel electrode 40 and the common electrode 55.

  As shown in FIG. 1, the first polarizing plate 206 and the second polarizing plate 207, which are provided in close contact with the outer surfaces of the TFT array substrate 201 and the color filter substrate 202 with an adhesive, are in a crossed Nicols state. Provided.

  The signal lines 45A and the vertical scanning lines 44 (gate metal (GM)) are made of aluminum (Al), molybdenum (Mo), chromium (Cr), tungsten (W), titanium (Ti), lead (Pb). ), A composite layer thereof (for example, Ti / Al), or an alloy layer thereof can be used.

Next, a cross-sectional structure of the optical sensor unit 1 will be described.
As shown in FIG. 4, the thin film photodiode PD includes a two-layer gate insulating film 50, a two-layer first interlayer insulating film 51, a second interlayer insulating film (planarizing film) 52, and a second layer on the TFT array substrate 201. It is formed by being embedded in a multilayer insulating film including the three interlayer insulating film 53.

For example, a control gate CG which is a “metal film” is formed immediately below the gate insulating film 50, and a thin semiconductor layer 36 made of polysilicon or the like is formed on the gate insulating film 50.
The semiconductor layer 36 has an I region (intrinsic semiconductor region) 36I located above the control gate CG, and an anode region 36A composed of a P ⁺ region (P type semiconductor region) and an N ⁺ region (N type semiconductor) on both sides thereof. A cathode region 36K composed of a region). Further, in the present embodiment, a low concentration semiconductor region (N ⁻ region) 36N containing a low concentration N-type impurity is provided between the I region 36I and the cathode region 36K. As described above, a thin film photodiode having a PIN structure having a low concentration semiconductor region is formed.
In the case of the PDN structure, a D region (N ⁻ region) is formed instead of the I region.

For example, the cathode region 36 </ b> K is connected to the VDD line 31 formed on the first interlayer insulating film 51 by the contact plug 54 formed in the first interlayer insulating film 51. The anode region 36A is connected to the wiring 39 at a location not shown, and is connected to the gate electrode of the amplifier transistor TA.
On the first interlayer insulating film 51, the detection line 35 and the VSS line 32 are arranged side by side at a position away from the VDD line 31.

For example, since the VDD line 31, the VSS line 32, and the detection line 35 are all made of aluminum or the like and have a large step, a second interlayer insulating film (flattening film) 52 that flattens the step is formed.
On the second interlayer insulating film 52, a common electrode 55 that is fixed at a common potential is formed. Since the optical sensor unit 1 does not have a pixel electrode, the electric field applied to the liquid crystal cannot be controlled. Since the common electrode 55 is formed of a transparent electrode layer, it can transmit light.

  In FIG. 4, in the color filter 204, a black matrix 21K is formed at the boundary between the optical sensor unit 1 and the pixel (PIX), and a sensor opening SA is provided between the two black matrices 21K. On the other hand, in the pixel (PIX), one of R, G, and B filters is shown.

[Structure and light receiving characteristics of thin film photodiode PD]
FIG. 5A is a plan view of a thin film photodiode PD having a PIN structure, and FIG. 5B is a cross-sectional view taken along line XX ′ in FIG. In FIG. 5B, the wirings such as the VDD line 31 and the structure above the second interlayer insulating film 52 are omitted.
For example, a control gate 38 made of a “metal film” is formed on the TFT array substrate 201, a two-layer gate insulating film 50 is formed thereon, and a semiconductor layer 36 is formed thereon.
The semiconductor layer 26 has a pattern shape shown in FIG. That is, an anode region 36A composed of a P ⁺ region (P type semiconductor region), an I region (intrinsic semiconductor region) 36I, a low concentration semiconductor region (N ⁻ region) 36N, and an N ⁺ region (N type semiconductor). The cathode regions 36 </ b> K composed of regions) are laid out. Thus, a thin film photodiode having a PIN structure having a low concentration semiconductor region is formed.
In the case of the PDN structure, a D region (N ⁻ region) is formed instead of the I region.
The layout of the control gate 38 for each of the above regions is as shown in FIG.
A first interlayer insulating film 51 is formed so as to cover the photodiode, and is connected to a contact plug 54 via a contact hole CT reaching the anode region 36A and the cathode region 36K.

In the above photodiode, when a reverse bias is applied, a depletion layer expands inside the I region (or D region). In order to promote this depletion, back gate control (electric field control by the control gate CG) is performed. However, the PIN structure has a depletion of about 10 μm from the P ⁺ region, but the PDN structure has an advantage that almost the entire region of the D region is depleted and the area having light receiving sensitivity is wide. In this embodiment, either a PIN structure or a PDN structure can be employed.

The thin film photodiode PD as a position sensor having such a structure is designed to be sensitive to invisible light, and preferably has a sensitivity peak.
Invisible light includes, for example, infrared light or ultraviolet light. In the International Commission on Illumination (CIE), the wavelength boundary between ultraviolet light (which is also an example of invisible light) and visible light is 360 nm to 400 nm, visible light and infrared light. The wavelength boundary with light is set to 760 nm to 830 nm. However, practically, a wavelength of 350 nm or less may be ultraviolet light, and a wavelength of 700 nm or more may be infrared light. Here, the wavelength range of invisible light is set to 350 nm or less and 700 nm or more. However, in the present embodiment, the boundary of the wavelength of invisible light may be arbitrarily defined within the ranges of 360 nm to 400 nm and 760 nm to 830 nm.

When infrared light (IR light) is used as invisible light, the thin film semiconductor layer 36 constituting the thin film photodiode PD having a sensitivity peak in IR light has an energy band gap (for example, 1.6 eV) of a light receiving element for visible light. It is preferable to have a smaller value. For example, it is made of polycrystalline silicon or crystalline silicon having an energy band gap between the valence band and the conduction band of 1.1 eV, which is smaller than the energy band gap (eg, 1.6 eV) of a visible light receiving element. Can do.
The energy band gap Eg is calculated as an optimum value from Eg = hν (h is Planck's constant, ν = 1 / λ (λ is the wavelength of light)).

  On the other hand, when a thin semiconductor layer 36 is formed from amorphous silicon or microcrystalline silicon, these semiconductor materials have a distribution in the energy band gap level, so that the light receiving ability (sensitivity) for infrared rays and ultraviolet rays is also obtained. It has. Therefore, the thin film photodiode PD formed from these semiconductor materials has the ability to receive not only visible light but also infrared and ultraviolet non-visible light, and can be used as a light receiving element for visible light and invisible light. It becomes possible.

From the above, it is preferable that the semiconductor layer 36 of the thin film photodiode PD that can be suitably used in this embodiment is formed of polycrystalline silicon, microcrystalline silicon, amorphous silicon, or crystalline silicon.
In any case, the thin film photodiode PD in this embodiment is made of a semiconductor material so that the absorption coefficient of invisible light such as infrared light or ultraviolet light is larger than that of a photodiode designed for receiving visible light. Selected and designed.

Here, with reference to FIG. 3, the light detection operation of the light sensor unit including the above-described thin film photodiode will be examined.
If a method is adopted in which the current generated by light irradiation to the thin film photodiode is stored in the storage capacitor in the pixel, converted into voltage, and then read out by amplifying the signal with the amplifier transistor TA, the sensor signal sensitivity (voltage) is the photocurrent. X Expressed by exposure time / current storage capacity.
Therefore, in order to increase the sensor signal sensitivity, there are methods of (1) increasing the photocurrent, (2) increasing the exposure time, and (3) reducing the current storage capacity.

  In particular, when the parasitic capacitance of the element is used as the current storage capacitor, the sensor signal sensitivity voltage can be improved by reducing the parasitic capacitance by the device structure.

[Example of thin-film photodiode layout]
The width Wp of the anode region (P ⁺ region) 36A in the direction perpendicular to the direction connecting to the cathode region (N ⁺ region) 36K and the cathode region (N in the direction perpendicular to the direction connecting to the anode region (P ⁺ region) 36A ⁺ Region) The layout has a different width Wn of 36K.

In the above configuration, the area of the overlapping region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one surface side or the other surface side is the same as that of the cathode region (N ⁺ region) 36K and the control gate 38. A configuration different from the area of the region can be employed.
That is, the parasitic capacitance between the control gate 38 and the anode region (P ⁺ region) 36A or the cathode region (N ⁺ region) 36K in which the area of the overlapping region with the control gate 38 is reduced by reducing the width can be reduced. It becomes possible.

Here, when considering the above overlapping region, the low concentration semiconductor region (N ⁻ region) 36N may be a part of the cathode region 36K. In the case where the low-concentration semiconductor region (N ⁻ region) 36N occupies an extremely small area or the N-type impurity concentration is very low, this may be considered. The same applies to the following.

In the present embodiment, for example, the control gate 38 is connected to the cathode region (N ⁺ region) 36K. Here, the width Wp of the cathode region ^{(N +} region) anode region in a direction perpendicular to a direction of connecting to the 36K ^{(P +} region) 36A is, in the direction perpendicular to the direction of connecting to the anode region ^{(P +} region) 36A The structure is narrower than the width Wn of the cathode region (N ⁺ region) 36K.

With the above configuration, the area of the overlap region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other surface side is the overlap of the cathode region (N ⁺ region) 36K and the control gate 38. The configuration can be smaller than the area of the region. Thereby, the parasitic capacitance Cgp between the control gate 38 and the anode region (P ⁺ region) 36A can be reduced.

In particular, in the thin film photodiode PD, the ratio R1 of the width Wp of the anode region (P ⁺ region) 36A / the width Wn of the cathode region (N ⁺ region) 36K is preferably in the range of 0.3 ≦ R1 <1.
The reason why the above range is preferable will be described later in Examples.

Alternatively, unlike the illustrated photodiode, when the control gate 38 is connected to the anode region (P ⁺ region) 36A, the following configuration is used. That is, the width Wp of the cathode region ^{(N +} region) anode region in a direction perpendicular to a direction of connecting to the 36K ^{(P +} region) 36A is, the cathode in the direction perpendicular to the direction of connecting to the anode region ^{(P +} region) 36A The region (N ⁺ region) is configured to be wider than the width Wn of 36K.

With the above configuration, the area of the overlap region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other surface side is the overlap of the cathode region (N ⁺ region) 36K and the control gate 38. The configuration is larger than the area of the region. As a result, the parasitic capacitance Cgn between the control gate 38 and the cathode region (N ⁺ region) 36K can be reduced as described above.

In particular, in the thin film photodiode PD, the ratio R2 of the width Wn of the cathode region (N ⁺ region) 36K / the width Wp of the anode region (P ⁺ region) 36A is preferably in the range of 0.3 ≦ R2 <1.
The reason why the above range is preferable will be described later in Examples.

[Connection between cathode region and gate electrode]
FIG. 6A is a circuit diagram showing parasitic capacitance existing in the thin film photodiode and the control gate.
The following parasitic capacitances exist in the thin film photodiode and the control gate.
(1) Parasitic capacitance Cgp between the control gate 38 and the anode region (P ⁺ region) 36A
(2) Parasitic capacitance Cgn between the control gate 38 and the cathode region (N ⁺ region) 36K
(3) Parasitic capacitance Cjnc at the junction between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K

As described above, when the control gate 38 is connected to the cathode region (N ⁺ region) 36K, the circuit diagram of FIG. 6A has the configuration shown in FIG. 6B.
That is, the parasitic capacitance Cgn between the control gate 38 and the cathode region (N ⁺ region) 36K apparently does not exist. That is, the current storage capacitance is the parasitic capacitance Cgp between the control gate 38 and the anode region (P ⁺ region) 36A, and the parasitic of the junction between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K. It is represented by the sum of the capacitance Cjnc.

Conversely, if the control gate 38 is connected to the anode region ^{(P +} region) 36A, no longer exists an apparent parasitic capacitance Cgp between control gate 38 and the anode region ^{(P +} region) 36A. That is, the above-described current storage capacitance includes the parasitic capacitance Cgn between the control gate 38 and the cathode region (N ⁺ region) 36K, and the parasitic of the junction between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K. It is represented by the sum of the capacitance Cjnc.

As described above, the control gate 38 is connected to the cathode region (N ⁺ region) 36K or the anode region (P ⁺ region) 36A, so that the parasitic capacitance Cgn or the parasitic capacitance Cgp apparently does not exist. . Thereby, the sensor signal sensitivity voltage can be improved by reducing the parasitic capacitance.

Here, as described above, the parasitic capacitance formed between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K and the control gate 38, that is, the parasitic capacitances Cgp and Cgn described above. It is preferable that the control gate 38 is connected to the larger capacitance value. The effect of reducing the parasitic capacitance can be enhanced by assuming that the larger capacitance of the parasitic capacitances Cgp and Cgn does not exist.

The thin-film photodiode PD includes a parasitic capacitance Cgp constituted by a P-type semiconductor region (anode region (P ⁺ region) 36A) and a metal film (control gate 38) facing each other through an insulating film (gate insulating film 50). Have In addition, it has a parasitic capacitance Cgn constituted by an N-type semiconductor region (cathode region (N ⁺ region) 36K) and a metal film (control gate 38) that face each other through an insulating film (gate insulating film 50).

In the present embodiment, the area of the overlapping region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other side is equal to the cathode region (N ⁺ region) 36K and the control gate 38. The configuration is different from the area of the overlapping region. Thereby, the capacitance value of the parasitic capacitance Cgp is different from the capacitance value of the parasitic capacitance Cgn.
As a result, the parasitic capacitance is reduced compared to the conventional thin film photodiode, that is, the current storage capacitance is reduced.

Further, the parasitic capacitance formed between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K and the control gate 38 opposed via the gate insulating film 50, that is, the parasitic capacitance described above. The control gate 38 is connected to the larger capacitance value of Cgp and Cgn.
The parasitic capacitance having a larger capacitance of the parasitic capacitances Cgp and Cgn can be apparently not present, and the parasitic capacitance can be further reduced, that is, the current storage capacitance can be further reduced.

  According to the liquid crystal display device including the optical sensor unit having the thin film photodiode according to the present embodiment, the sensor signal sensitivity can be increased by reducing the current storage capacitance as the parasitic capacitance as described above.

In the above configuration, if the width Wp of the anode region (P ⁺ region) 36A varies, the sensitivity may be affected. Therefore, it is important to design with sufficient consideration.

[Improvement of sensor sensitivity and saturation characteristics]
By the way, when the parasitic capacitance of the thin film photodiode is reduced and the sensitivity of the optical sensor unit is increased as described above, the saturation characteristics of the sensor are affected.
In the present embodiment, as described below, the component of light incident on the thin film photodiode PD is closely examined, and the sensitivity of the sensor is obtained by causing light to be detected to enter the thin film photodiode as much as possible from the operation of the thin film photodiode. To improve both the improvement of the saturation characteristics and the saturation characteristics.

  The above-described thin film photodiode PD having sensitivity to invisible light has a reduced S / N ratio due to “stray light” that goes around the thin film photodiode PD due to repeated reflection in the liquid crystal panel 200 without reaching the object to be detected. It has become easier.

For example, light incident on a thin film photodiode is distinguished as follows.
(1) Light noise reflected on the deflecting plate air interface and entering the thin film photodiode, (2) Light noise entering the thin film photodiode in the metal wiring, (3) Light noise directly entering the thin film photodiode (4) An optical signal in which backlight light is reflected from a finger.

  As described above, when the non-visible light from the backlight hits the wiring such as the VDD line 31, the VSS line 32, the detection line 35 (excluding the transparent electrode) or the electrode such as the control gate 38, the non-visible light is reflected. The amount of light reaching the front side of the panel is reduced. In addition to this, before reaching the front side of the panel, it is returned to the thin film photodiode PD side as stray light and received as a noise component.

Here, considering the operation of the thin film photodiode, when the control gate 38 is connected to the cathode region (N ⁺ region) 36K, a depletion layer is formed near the boundary between the anode region (P ⁺ region) 36A and the I region 36I. Therefore, the photosensitivity in that region is increased.
Therefore, preventing stray light from the backlight from entering the I region 36I region suppresses the stray light from entering the high-sensitivity portion of the thin film photodiode PD, improves the S / N ratio, and increases the dynamic range. Leads to expansion.

The control gate 38 provided in the thin film photodiode of the present embodiment is a metal film, and can prevent stray light from entering from the backlight side.
That is, the layout of the control gate 38 below the portion of the thin film photodiode PD where the photosensitivity is high can suppress the incidence of stray light.

In particular, the distance D between the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side and the end of the control gate 38 on the anode region (P ⁺ region) 36A side is 1.5 μm or more 3 It is preferable that the thickness is within a range of 0.0 μm or less.

Further, the distance between the end of the cathode region (N ⁺ region) 36K on the anode region (P ⁺ region) 36A side and the end of the control gate 38 on the cathode region (N ⁺ region) 36K side is 1.5 μm or more. A range of 0 μm or less is preferable.
The reason why the above range is preferable will be described later in Examples.

[Operation]
Next, an example of a schematic operation of the liquid crystal display device 100 will be described.
In the pixel region, a backlight 300 is provided on the back side of the liquid crystal panel 200. Illumination light from the backlight 300 is transmitted through the first polarizing plate 206, the TFT array substrate 201, the liquid crystal layer 203, the color filter 204, the color filter substrate 202, and the second polarizing plate 207 to display the screen. Therefore, it emits from the front.

  During this transmission process, transmitted light is polarized in the first direction when transmitted through the first polarizing plate 206. While light is transmitted through the liquid crystal layer 203, the polarization direction of the transmitted light changes by a predetermined angle along the molecular alignment direction of the liquid crystal due to the optical anisotropy effect of the liquid crystal molecules. At the time of transmission through the second polarizing plate 207, the transmitted light is polarized in a second direction that is shifted from the first direction by a predetermined angle.

  Of these three degrees of polarization action, the polarization angle during transmission through the liquid crystal layer 203 changes independently for each pixel by controlling the electric field strength applied to the liquid crystal layer 203 in accordance with the potential of the input video signal. To do. For this reason, the light passing through each pixel is emitted from the liquid crystal panel 200 after being modulated to change in brightness according to the potential of the video signal, and used for a predetermined image display.

  On the other hand, light that passes through the optical sensor portion in the sensor region is emitted from the liquid crystal panel 200 as it is without being modulated by an electrical signal, such as light that passes through a pixel.

In the middle of the image display, for example, a user instruction may be urged to display content in accordance with an application. In such a case, the user lightly touches the display screen with a finger or a stylus pen.
When an object to be detected such as a finger or a stylus pen contacts or approaches the display screen, the light emitted from the liquid crystal panel 200 is reflected by the object to be detected and returned to the liquid crystal panel 200. Since the returned light (reflected light) is repeatedly refracted and reflected by a reflective object such as a layer interface or wiring in the liquid crystal panel 200, the reflected light generally spreads and travels on the liquid crystal panel 200. Therefore, although it depends on the size of the object to be detected, the reflected light reaches at least one of the plurality of optical sensor units 1.

When a part of the reflected light enters the thin film photodiode PD to which a predetermined reverse bias is applied among the reflected light that has reached the optical sensor unit 1, the thin film photodiode PD performs photoelectric conversion to generate photocharges. The photocharge is accumulated in the storage node SN, which is a current accumulation capacity formed by the anode region (P ⁺ region) 36A and the like, and is output through the amplifier transistor TA connected thereto. The charge amount at this time represents received light data proportional to the received light amount. The received light data (charge amount) is output as the detection potential Vdet or the detection current Idet from the detection line 35 of the readout circuit shown in FIG.

  The detection potential Vdet or the detection current Idet is sent to the sensor driver 13 side by the switch array (SEL.SW.) 14 shown in FIG. 2, where it is collected as received light data, and further in the data processing unit 400 shown in FIG. Input to the position detection unit 402. The position detection unit 402 or the control unit 401 sequentially inputs a set of row and column addresses for each detection potential Vdet or detection current Idet from the liquid crystal panel 200 side in real time. For this reason, in the data processing unit 400, in-memory position information (detected potential Vdet or detected current Idet) of the detected object is stored in the memory in association with the address information in the row and column directions.

  The liquid crystal display device 100 superimposes the position information of the detection object and the display information on the basis of the information in the memory, thereby “the user performs an instruction based on the display information using a finger or a stylus pen”. Can be determined. Alternatively, it can be determined that “the user has input predetermined information by moving a stylus pen or the like on the display screen”. In other words, the liquid crystal display device 100 can realize the same function as that when a touch panel is added to the liquid crystal panel 200 by a thin display panel to which no touch panel is added. Such a display panel is referred to as an “in-cell touch panel”.

[Method for forming thin film photodiode]
Next, a method for forming a thin film photodiode provided in the optical sensor unit of the liquid crystal display device according to the present embodiment will be described.
FIG. 7A is a plan view showing a forming process of a method for forming a thin film photodiode, and FIG. 7B is a cross-sectional view taken along the line XX ′ in FIG.
For example, the control gate 38 is formed by forming a metal film such as molybdenum on the TFT array substrate 201 by sputtering or the like, and patterning it into a control gate pattern.
Next, the gate insulating film 50 is formed by stacking silicon nitride and silicon oxide, for example, by CVD (chemical vapor deposition).
Next, for example, a semiconductor such as polysilicon is deposited by a CVD method or the like, and is patterned into a thin film photodiode pattern to form the semiconductor layer 36. The semiconductor layer 36 is made of a semiconductor that becomes an intrinsic semiconductor region of the PIN diode as it is unless a conductive impurity is ion-implanted.

8A is a plan view showing a step subsequent to the step shown in FIGS. 7A and 7B, and FIG. 8B is a cross-sectional view taken along the line XX ′ in FIG. 8A. is there.
Next, a photoresist film is formed on the entire surface of the semiconductor layer 36 by, for example, coating. Next, the entire surface is irradiated with light from one side (back side) of the TFT array substrate 201, the photoresist film is exposed using the control gate 38 as a mask, and a resist mask M1 having a pattern for protecting a portion to be an intrinsic semiconductor region is formed. Form a pattern.
By exposure using the control gate 38 as a mask, the resist mask M1 can be patterned in a self-aligned manner with respect to the control gate 38.

FIG. 9A is a plan view showing a step subsequent to the step shown in FIGS. 8A and 8B, and FIG. 9B is a cross-sectional view taken along the line XX ′ in FIG. 9A. is there.
Next, for example, N-type conductive impurities are ion-implanted at a low concentration using the resist mask M1 as a mask to form a low-concentration semiconductor region 36N containing the N-type conductive impurities at a low concentration.
At this time, a portion protected by the resist mask M1 becomes an I region (intrinsic semiconductor region) 36I.

FIG. 10A is a plan view showing a step subsequent to the step shown in FIGS. 9A and 9B, and FIG. 10B is a cross-sectional view taken along the line XX ′ in FIG. is there.
Next, for example, a resist mask M2 having a pattern opening an area to be the anode area (P ⁺ area) 36A is formed by a photolithography process while leaving the resist mask M1. Here, the resist mask M2 is a pattern that partially overlaps the resist mask M1, and the resist mask M1 and the resist mask M2 are combined to form a pattern that protects a portion other than the anode region (P ⁺ region) 36A.
Next, for example, using the resist mask M1 and the resist mask M2 as a mask, a P-type conductive impurity is ion-implanted at a high concentration into the exposed low-concentration semiconductor region 36N, and the P-type conductive impurity is high-concentrated. The anode region (P ⁺ region) 36A contained in the substrate is formed.
Position of the end portion of the anode region ^{(P +} region) 36A is determined by the resist mask M1, therefore, the anode region ^{(P +} region) 36A is formed in self-alignment with the control gate 38.

FIG. 11A is a plan view showing a step subsequent to the step shown in FIGS. 10A and 10B, and FIG. 11B is a cross-sectional view taken along line XX ′ in FIG. is there.
Next, for example, the resist mask M1 and the resist mask M2 are peeled off, and a resist mask M3 having a pattern that opens a region that becomes the cathode region (N ⁺ region) 36K is formed by a photolithography process. Here, the low concentration semiconductor region 36N is formed to be protected with a predetermined width so that the low concentration semiconductor region 36N remains between the cathode region (N ⁺ region) 36K and the I region 36I.
Next, for example, using the resist mask M3 as a mask, an N-type conductive impurity is ion-implanted at a high concentration into the exposed low-concentration semiconductor region 36N, and the cathode containing the N-type conductive impurity at a high concentration. A region (N ⁺ region) 36K is formed.

As a subsequent process, for example, the resist mask M3 is removed. Next, over the entire surface of the semiconductor layer 36 including the anode region (P ⁺ region) 36A, the I region (intrinsic semiconductor region) 36I, the low concentration semiconductor region 36N, and the cathode region (N ⁺ region) 36K, for example, a CVD method or the like. Thus, the first interlayer insulating film 51 is formed. Next, contact holes reaching the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K are opened, and a contact plug 54 is formed by filling the contact hole with a conductive layer.
As described above, the thin film photodiode provided in the photosensor portion of the liquid crystal display device according to the present embodiment as shown in FIGS. 5A and 5B can be formed.

<Modification>
12A is a plan view of a thin-film photodiode PD having a PIN structure, and FIG. 12B is a cross-sectional view taken along the line XX ′ in FIG.
This is a photodiode substantially equivalent to the configuration shown in FIGS. 5 (a) and 5 (b). Cathode region ^{(N +} region) anode region in a direction perpendicular to a direction of connecting to the 36K ^{(P +} region) 36A width Wp of the anode region ^{(P +} region) cathode region in the direction perpendicular to the direction of connecting to 36A ( N ⁺ region) is narrower than the width Wn of 36K. In the vicinity of the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side, it is equal to the width Wn of the cathode region (N ⁺ region) 36K (or the width of the I region (intrinsic semiconductor region) 36I). An anode region (P ⁺ region) portion 36AW having a width of 5 mm is provided.
The anode region ^{(P +} region) of the anode region resulting from the fact that narrowing the width Wp of 36A ^{(P +} region) 36A and a cathode region ^{(N +} region) photocurrent flowing between 36K decreases can be suppressed. Moreover, it can suppress that the effect of the sensitivity increase by narrowing the width Wp of the anode area | region (P ⁺ area | region) 36A diminishes.

  Further, there is an advantage that the influence of the misalignment of the interface position in the manufacturing process is smaller than the configuration of FIGS. 5 (a) and 5 (b).

<Example 1>
As the thin film photodiode shown in FIGS. 5A and 5B, the thin film photodiode according to the conventional example in which the width Wp of the anode region (P ⁺ region) 36A and the width Wn of the cathode region (N ⁺ region) 36K are the same 100 μm. A diode was created.
The width Wp anode region of the anode region ^{(P +} region) 36A ^{(P +} region) 36A and a cathode region ^{(N +} region) 36K by short, the voltage applied to the control gate of the gate capacitance Cg seen from the gate terminal Vg Dependency was examined. Here, the width of the I region 36I disposed so as to be sandwiched between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K is 4.5 μm (a), 5.5 μm (b), It was changed to 6.5 μm (c), 7.5 μm (d), 8.5 μm (e), and 9.5 μm (f). The overlap of the control gate-cathode region (N ⁺ region) 36K and the overlap of the control gate-anode region (P ⁺ region) 36A are not changed.

The results are shown in FIG.
When a voltage is applied to the control gate to some extent, the gate capacitance Cg increases as the width of the I region 36I increases. However, when the control gate voltage is set to 0V, the gate does not depend on the width of the I region 36I. The capacitance Cg was constant (about 150 fF).

FIG. 14 plots the values of (a) the gate capacitance Cg when the gate voltage is 10 V and (b) the gate capacitance Cg when the gate voltage is 0 V against the width L of the I region 36I. FIG.
When the gate voltage is 10 V, the gate capacitance Cg increases as the width of the I region 36I increases.
When the gate voltage is 0 V, the gate capacitance Cg is constant (about 150 fF) regardless of the width of the I region 36I.

In the above results, the gate capacitance that increases as the width of the I region 36I increases corresponds to the channel capacitance. The gate capacitance Cg that is constant regardless of the width of the I region 36I is due to the parasitic capacitance determined by the overlap of the control gate-cathode region (N ⁺ region) 36K and the overlap of the control gate-anode region (P ⁺ region) 36A. It is thought that.

<Example 2>
In the thin film photodiode shown in FIGS. 5A and 5B, the width Wn of the cathode region (N ⁺ region) 36K is set to 100 μm, and the width Wp of the anode region (P ⁺ region) 36A is variously changed. A diode was created and the change in parasitic capacitance Cp was measured.

The results are shown in FIG. In the figure, a is a parasitic capacitance viewed from the control gate 38, and b is a parasitic capacitance viewed from the anode region (P ⁺ region) 36A.
The parasitic capacitance component viewed from the control gate 38 and the parasitic capacitance component viewed from the anode region (P ⁺ region) 36A when the control gate 38 and the cathode region (N ⁺ region) 36K are connected are the anode region (P ⁺ region). Decrease with decreasing width of 36A. That is, in order to reduce the parasitic capacitance, it is effective to reduce the amount of overlap between the control gate 38 and the anode region (P ⁺ region) 36A and between the control gate 38 and the cathode region (N ⁺ region) 36K. Indicated.
In this case, since the sensor signal sensitivity (voltage) is expressed by photocurrent × exposure time / current storage capacity as described above, if the photocurrent is constant and the capacity can be reduced, the sensor sensitivity can be improved. .

<Example 3>
As in Example 2, in the thin film photodiode shown in FIGS. 5A and 5B, the width Wn of the cathode region (N ⁺ region) 36K is set to 100 μm, and the width Wp of the anode region (P ⁺ region) 36A. Thin film photodiodes with various changes were made. The change of the photocurrent Inp of the obtained thin film photodiode was measured.

The results are shown in FIG. If the photocurrent Inp is proportional to the width Wp of the anode region (P ⁺ region) 36A, the data should be plotted on the dotted line passing through the origin in the figure, but in practice the anode region (P ⁺ region). It has been found that even if the width Wp of 36A is narrowed, a larger photocurrent flows than when it is proportional.
That is, when one of the width Wn of the cathode region (N ⁺ region) 36K and the width Wp of the anode region (P ⁺ region) 36A is narrowed, the photocurrent does not take a constant value but does not show an extreme decrease. It was shown that narrowing the width Wn of the cathode region (N ⁺ region) 36K or the width Wp of the anode region (P ⁺ region) 36A can contribute to improvement in sensitivity.

<Example 4>
As described above, the sensor signal sensitivity (voltage) can be expressed by photocurrent × exposure time / current storage capacity. Therefore, in the thin film photodiode in which the width Wn of the cathode region (N ⁺ region) 36K is 100 μm and the width Wp of the anode region (P ⁺ region) 36A is variously changed, the relative sensitivity RS of the thin film photodiode is set with a constant exposure time. (Relative value) was estimated.

The results are shown in FIG. It can be seen that as the width Wp of the anode region (P ⁺ region) 36A is narrowed, the relative sensitivity is greatly increased.
However, if the width Wp of the anode region (P ⁺ region) 36A becomes too small, the sensitivity greatly changes according to the width Wp of the actually formed anode region (P ⁺ region) 36A.
In consideration of the above, the width of the anode region (P ⁺ region) 36 ^</ b ^> A with respect to the width Wn (100 μm) of the cathode region (N ⁺ region) 36 ^</ b ^> K as a region where the sensor sensitivity increases and the variation in sensitivity does not increase. Wp is preferably 30 μm or more and less than 100 μm.
In other words, in the thin film photodiode PD, the ratio R1 of the width Wp of the anode region (P ⁺ region) 36A / the width Wn of the cathode region (N ⁺ region) 36K is in the range of 0.3 ≦ R1 <1. Is preferred.

<Example 5>
Thin film photodiodes in which the distance D between the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side and the end of the control gate 38 on the anode region (P ⁺ region) 36A side is varied. A simulation was performed. Here, the relative light quantity RL (relative value) corresponding to the noise component, in which the light from the backlight is reflected on the wiring or the like and is incident on the thin film photodiode, was obtained by simulation.

The results are shown in FIG. It has been found that the relative light quantity RL decreases as the distance D increases.
Here, the actual optical signal level SIG is shown in the figure. It has been found that when the distance D is 0.5 μm or more, the optical signal level is larger than the noise component.

<Example 6>
In the thin film photodiode shown in FIGS. 5A and 5B, the width Wn of the cathode region (N ⁺ region) 36K is set to 100 μm, the width Wp of the anode region (P ⁺ region) 36A is set to 30 μm, and the following estimation is performed. .
Here, the distance D between the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side and the end of the control gate 38 on the anode region (P ⁺ region) 36A side was variously changed. . In the above thin film photodiode, the relative sensitivity RS (relative value) of the thin film photodiode was estimated with a constant exposure time.

The results are shown in FIG. It has been found that the relative sensitivity RS decreases as the distance D increases.
The distance D between the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side and the end of the control gate 38 on the anode region (P ⁺ region) 36A side is 1.5 μm or more and 3.0 μm or less. The range RG is preferable. As a result, sensor sensitivity and stability of variation can be realized.

<Example 7>
In the thin film photodiode shown in FIGS. 5A and 5B, the width Wn of the cathode region (N ⁺ region) 36K is set to 100 μm, the width Wp of the anode region (P ⁺ region) 36A is set to 30 μm, and the following estimation is performed. .
Here, the distance D between the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side and the end of the control gate 38 on the anode region (P ⁺ region) 36A side was variously changed. . In the above thin film photodiode, the light quantity L _SAT (relative value) at which the signal of the optical sensor unit is saturated was estimated.
The results are shown in FIG. The distance D between the end of the anode region (P ⁺ region) 36A on the cathode region (N ⁺ region) 36K side and the end of the control gate 38 on the anode region (P ⁺ region) 36A side is 1.5 μm or more and 3.0 μm or less. It is preferable to set in the range. As a result, it was found that the saturation characteristic was improved by 2.5 times compared to the case of D = −0.2 μm.
As a result, it was found that both the sensitivity characteristics of the sensor and the dynamic range were improved.

  According to this embodiment and its modification, in the thin film photodiode formed in the sensor region of the display unit (substrate), the width of the P-type semiconductor region and the width of the N-type semiconductor region are different. Thereby, the parasitic capacitance between the thin film photodiode and the metal film can be reduced to improve the detection sensitivity of the sensor, and the saturation characteristic of the sensor can be improved.

Second Embodiment
FIG. 21A is a plan view of a thin-film photodiode PD having a PIN structure in the present embodiment, and FIG. 21B is a cross-sectional view taken along the line XX ′ in FIG. In FIG. 21B, the wirings such as the VDD line 31 and the configuration above the second interlayer insulating film 52 are omitted. Except for the configuration of the thin-film photodiode PD, the display device of this embodiment has the same configuration as that of the first embodiment.

For example, a control gate 38 made of a “metal film” is formed on the TFT array substrate 201, a two-layer gate insulating film 50 is formed thereon, and a semiconductor layer 36 is formed thereon.
The semiconductor layer 26 has a pattern shape shown in FIG. That is, an anode region 36A composed of a P ⁺ region (P type semiconductor region), an I region (intrinsic semiconductor region) 36I, a low concentration semiconductor region (N ⁻ region) 36N, and an N ⁺ region (N type semiconductor). The cathode regions 36 </ b> K composed of regions) are laid out. Thus, a thin film photodiode having a PIN structure having a low concentration semiconductor region is formed.
The width Wp of the anode region (P ⁺ region) 36A in the direction perpendicular to the direction connecting to the cathode region (N ⁺ region) 36K and the cathode region (N in the direction perpendicular to the direction connecting to the anode region (P ⁺ region) 36A ⁺ Region) The layout has a different width Wn of 36K.
Further, the layout of the control gate 38 for each of the above regions is as shown in FIG.

Here, the anode region (P ⁺ region) 36A is provided with an extending portion 36AL extending in a direction perpendicular to the direction connecting to the cathode region (N ⁺ region) 36K outside the overlapping region with the control gate 38. Yes.
A first interlayer insulating film 51 is formed so as to cover the photodiode, and contact plugs 54 are formed through contact holes CT reaching the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K. It is connected to the. A contact hole for the anode region (P ⁺ region) 36A is provided in the extending portion 36AL.

In the present embodiment, the area of the overlapping region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other side is equal to the cathode region (N ⁺ region) 36K and the control gate 38. The configuration is different from the area of the overlapping region. Thereby, the capacitance value of the parasitic capacitance Cgp is different from the capacitance value of the parasitic capacitance Cgn.
As a result, the parasitic capacitance is reduced compared to the conventional thin film photodiode, that is, the current storage capacitance is reduced.

Further, the parasitic capacitance formed between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K and the control gate 38 opposed via the gate insulating film 50, that is, the parasitic capacitance described above. The control gate 38 is preferably connected to the larger capacitance value of Cgp and Cgn. In the present embodiment, a control gate 38 is connected to the cathode region (N ⁺ region) 36K.
The parasitic capacitance having a larger capacitance of the parasitic capacitances Cgp and Cgn can be apparently not present, and the parasitic capacitance can be further reduced, that is, the current storage capacitance can be further reduced.

  According to the liquid crystal display device including the optical sensor unit having the thin film photodiode according to the present embodiment, the sensor signal sensitivity can be increased by reducing the current storage capacitance as the parasitic capacitance as described above.

In the thin film photodiode of the present embodiment, the structure of the anode region (P ⁺ region) 36A outside the overlapping region with the control gate 38 is basically arbitrary.
On the other hand, for the reasons described later, it is preferable not to provide the extended portion 36AL or to make it as short as possible. However, the present invention can be applied to a case where there is some restriction in the opening region of the contact hole.

<Example 8>
The thin film photodiode of the display device according to the first embodiment and the thin film photodiode of the display device according to the second embodiment were produced. Here, the width Wn of the cathode region (N ⁺ region) 36K was set to 100 μm, and the width Wp of the anode region (P ⁺ region) 36A was variously changed. Changes in these parasitic capacitances were measured.

The results are shown in FIG. In the figure, a is a parasitic capacitance viewed from the anode region (P ⁺ region) 36A in the thin film photodiode having the configuration of the first embodiment, and b is an anode region (P ⁺ in the thin film photodiode having the configuration of the second embodiment. Region) is a parasitic capacitance viewed from 36A.
When the width Wp of the anode region (P ⁺ region) 36A is narrowed, the thin film photodiode of the configuration of the first embodiment has a larger size capable of reducing the parasitic capacitance, and the sensor signal sensitivity is increased by reducing the current storage capacitance. Therefore, the configuration of the first embodiment is preferable.

<Third Embodiment>
FIG. 23A is a plan view of a thin-film photodiode PD having a PIN structure in the present embodiment, and FIG. 23B is a cross-sectional view taken along the line XX ′ in FIG. In FIG. 23 (b), the wirings such as the VDD line 31 and the structure above the second interlayer insulating film 52 are omitted. Except for the configuration of the thin-film photodiode PD, the display device of this embodiment has the same configuration as that of the first embodiment.

For example, a control gate 38 made of a “metal film” is formed on the TFT array substrate 201, a two-layer gate insulating film 50 is formed thereon, and a semiconductor layer 36 is formed thereon.
The semiconductor layer 26 has a pattern shape shown in FIG. That is, an anode region 36A composed of a P ⁺ region (P type semiconductor region), an I region (intrinsic semiconductor region) 36I, a low concentration semiconductor region (N ⁻ region) 36N, and an N ⁺ region (N type semiconductor). The cathode regions 36 </ b> K composed of regions) are laid out. Thus, a thin film photodiode having a PIN structure having a low concentration semiconductor region is formed.
The width Wp of the anode region (P ⁺ region) 36A in the direction perpendicular to the direction connecting to the cathode region (N ⁺ region) 36K and the cathode region (N in the direction perpendicular to the direction connecting to the anode region (P ⁺ region) 36A ⁺ Region) The layout has a different width Wn of 36K.
Further, the layout of the control gate 38 for each of the above regions is as shown in FIG.
A first interlayer insulating film 51 is formed so as to cover the photodiode, and contact plugs 54 are formed through contact holes CT reaching the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K. It is connected to the.

Here, in the vicinity of the end of the I region 36I on the anode region (P ⁺ region) 36A side, an I region portion 36IW having a width equivalent to the width Wp of the anode region (P ⁺ region) 36A is provided.

In the present embodiment, as in the first embodiment, the area of the overlapping region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other side is the cathode region (N ⁺ region). ) The area of the overlapping region of 36K and the control gate 38 is different. Thereby, the capacitance value of the parasitic capacitance Cgp is different from the capacitance value of the parasitic capacitance Cgn.
As a result, the parasitic capacitance is reduced compared to the conventional thin film photodiode, that is, the current storage capacitance is reduced.

Further, of the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K, the capacitance value of the parasitic capacitance formed between the control gate 38 facing the gate insulating film 50 is larger. The control gate 38 is preferably connected. That is, it is preferable that the control gate 38 is connected to the larger one of the parasitic capacitances Cgp and Cgn. In the present embodiment, a control gate 38 is connected to the cathode region (N ⁺ region) 36K.
The parasitic capacitance having a larger capacitance of the parasitic capacitances Cgp and Cgn can be apparently not present, and the parasitic capacitance can be further reduced, that is, the current storage capacitance can be further reduced.

  According to the liquid crystal display device including the optical sensor unit having the thin film photodiode according to the present embodiment, the sensor signal sensitivity can be increased by reducing the current storage capacitance as the parasitic capacitance as described above.

In particular, in the thin film photodiode according to the present embodiment, the area of the overlap region of the anode region (P ⁺ region) 36A and the control gate 38 is narrower than that of the thin film photodiode of the first embodiment, so that the parasitic capacitance Cgp is reduced. It is reduced from the first embodiment.
In addition, since the interface between the I region 36I and the anode region (P ⁺ region) 36A is provided in the width Wp portion, there is an advantage that the influence of misalignment of the interface position in the manufacturing process is smaller than that in the first embodiment.

In the above configuration, if the width Wp of the anode region (P ⁺ region) 36A varies, the sensitivity may be affected. Therefore, it is important to design with sufficient consideration.
In addition, since the region having the width Wp is provided in the I region 36I, the loss due to recombination may be larger than that in the first embodiment. When the loss is large, it is important to reduce the area of the I region portion 36IW and to study in a range where the influence is small.

<Fourth embodiment>
FIG. 24A is a plan view of a thin-film photodiode PD having a PIN structure according to this embodiment, and FIG. 24B is a cross-sectional view taken along the line XX ′ in FIG. In FIG. 24 (b), wirings such as the VDD line 31 and the structure above the second interlayer insulating film 52 are omitted. Except for the configuration of the thin-film photodiode PD, the display device of this embodiment has the same configuration as that of the first embodiment.

For example, a control gate 38 made of a “metal film” is formed on the TFT array substrate 201, a two-layer gate insulating film 50 is formed thereon, and a semiconductor layer 36 is formed thereon.
The semiconductor layer 26 has a pattern shape shown in FIG. That is, an anode region 36A composed of a P ⁺ region (P type semiconductor region), an I region (intrinsic semiconductor region) 36I, a low concentration semiconductor region (N ⁻ region) 36N, and an N ⁺ region (N type semiconductor). The cathode regions 36 </ b> K composed of regions) are laid out. Thus, a thin film photodiode having a PIN structure having a low concentration semiconductor region is formed.
A first interlayer insulating film 51 is formed so as to cover the photodiode, and contact plugs 54 are formed through contact holes CT reaching the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K. It is connected to the.

Here, the width Lp of the overlap between the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other side is the width of the overlap between the cathode region (N ⁺ region) 36K and the control gate 38. It is narrower than Ln.
Thus, as in the first embodiment, the area of the overlapping region of the anode region (P ⁺ region) 36A and the control gate 38 when viewed from one side or the other side is the cathode region (N ⁺ region) 36K. The configuration is different from the area of the overlapping region of the control gate 38. Thereby, the capacitance value of the parasitic capacitance Cgp is different from the capacitance value of the parasitic capacitance Cgn.
As a result, the parasitic capacitance is reduced compared to the conventional thin film photodiode, that is, the current storage capacitance is reduced.

Further, the control gate 38 is connected to a parasitic capacitance formed between the anode region (P ⁺ region) 36A and the cathode region (N ⁺ region) 36K with the control gate 38 facing through the gate insulating film 50. It is preferable. That is, it is preferable that the control gate 38 is connected to the larger one of the parasitic capacitances Cgp and Cgn. In the present embodiment, a control gate 38 is connected to the cathode region (N ⁺ region) 36K.
The parasitic capacitance having a larger capacitance of the parasitic capacitances Cgp and Cgn can be apparently not present, and the parasitic capacitance can be further reduced, that is, the current storage capacitance can be further reduced.

  According to the liquid crystal display device including the optical sensor unit having the thin film photodiode according to the present embodiment, the sensor signal sensitivity can be increased by reducing the current storage capacitance as the parasitic capacitance as described above.

In particular, the thin film photodiode according to this embodiment has an advantage that loss due to recombination is smaller than that of the first embodiment.
The influence on the sensitivity when the width Wp of the anode region (P ⁺ region) 36A varies is also smaller than that in the first embodiment.
In addition, since the interface between the I region 36I and the anode region (P ⁺ region) 36A is provided in the width Wp portion, there is an advantage that the influence of misalignment of the interface position in the manufacturing process is smaller than that in the first embodiment.

<Example 9>
In the thin film photodiode of the display device according to the fourth embodiment, the width Wn of the cathode region (N ⁺ region) 36K and the width Wp of the anode region (P ⁺ region) 36A are the same. A thin film photodiode was prepared. Here, the overlapping width Lp of the anode region (P ⁺ region) 36A and the control gate 38 and the overlapping width Ln of the cathode region (N ⁺ region) 36K and the control gate 38 are 0.5 μm and 1.5 μm, respectively. It was.
In the above thin film photodiode, the parasitic capacitance Cgp between the control gate 38 and the anode region (P ⁺ region) 36A when the W length is changed, and the parasitic capacitance Cgn between the control gate 38 and the cathode region (N ⁺ region) 36K. Changes were measured.

The results are shown in FIG.
Both Cgp and Cgn increase as the W length increases, but Cgn has a larger inclination with respect to the W length, and Cgn becomes larger than Cgp as the W length increases.
Here, as shown in the fourth embodiment, by connecting the control gate 38 and the cathode region (N ⁺ region) 36K, only a smaller parasitic capacitance Cgp exists. Thereby, it is possible to further reduce the parasitic capacitance and increase the sensor signal sensitivity by reducing the current storage capacitance.

<Fifth Embodiment>
[Applicable products for display devices]
The embodiment and its modifications can be applied to display parts for characters and images of the following various products.
For example, a television receiver, a monitor device such as a personal computer, a mobile phone, a game machine, a mobile device having a video playback function such as a PDA, a photographing device such as a still camera or a video camera, an in-vehicle device such as a car navigation device, etc. Applicable.
Moreover, when using infrared rays as invisible light, it becomes possible to detect the distribution of human body temperature as infrared rays. For this reason, the present invention can be applied to effective use of infrared rays in human finger vein authentication.
In this case, instead of the liquid crystal panel 200, a vein authentication panel that transmits light from the backlight is provided, and infrared light is irradiated from the backlight in a state where a human finger is in contact with the surface of the vein authentication panel. And a means for performing vein authentication.

<First application example>
FIG. 26 is a perspective view showing a television as a first application example. The television according to this application example includes a video display screen unit 101 including a front panel 102, a filter glass 103, and the like, and the above display device can be applied to the video display screen unit 101.

<Second application example>
27A and 27B are diagrams showing a digital camera as a second application example. FIG. 27A is a perspective view seen from the front side, and FIG. 27B is a perspective view seen from the back side. is there. The digital camera according to this application example includes a light emitting unit 111 for flash, a display unit 112, a menu switch 113, a shutter button 114, and the like, and the above display device can be applied to the display unit 112.

<Third application example>
FIG. 28 is a perspective view showing a notebook personal computer as a third application example. The notebook personal computer according to this application example includes a main body 121 including a keyboard 122 that is operated when inputting characters and the like, a display unit 123 that displays an image, and the like, and the display device can be applied to the display unit 123. It is.

<Fourth application example>
FIG. 29 is a perspective view showing a video camera as a fourth application example. The video camera according to this application example includes a main body 131, a lens 132 for shooting an object on a side facing forward, a start / stop switch 133 at the time of shooting, a display unit 134, and the like. The device is applicable.

<Fifth application example>
FIGS. 30A to 30E are diagrams showing a mobile terminal device, for example, a mobile phone, as a fifth application example. 30 (a) is a front view in an open state, FIG. 30 (b) is a side view thereof, FIG. 30 (c) is a front view in a closed state, FIG. 30 (d) is a left side view, and FIG. (E) is a right side view, FIG. 30 (F) is a top view, and FIG. 30 (g) is a bottom view. The mobile phone according to this application example includes an upper casing 141, a lower casing 142, a connecting portion (here, a hinge portion) 143, a display 144, a sub-display 145, a picture light 146, a camera 147, and the like. The display device described above can be applied to the display 144 and the sub display 145.

The display device according to the present embodiment is not limited to the above description.
For example, in the above embodiment, the control gate is connected to the cathode region (N ⁺ region) 36K side, and the width of the anode region (P ⁺ region) 36A is narrower than the cathode region (N ⁺ region) 36K. It is not limited to this. For example, an embodiment in which the control gate is connected to the anode region (P ⁺ region) 36A side and the width of the cathode region (N ⁺ region) 36K is narrower than the anode region (P ⁺ region) 36A is also possible.
In this case, for the same reason as described above, in the thin film photodiode PD, the ratio R2 of the width Wn of the cathode region (N ⁺ region) 36K / the width Wp of the anode region (P ⁺ region) 36A is 0.3 ≦ R2 <1. It is preferable that it is the range of these.
For the same reason as described above, the distance between the end of the cathode region (N ⁺ region) 36K on the anode region (P ⁺ region) 36A side and the end of the control gate 38 on the cathode region (N ⁺ region) 36K side is The range is preferably from 1.5 μm to 3.0 μm.
In the above embodiment, the liquid crystal display device is described. However, the present invention is not limited to this, and the present invention can also be applied to an organic EL display device or a display device such as an E-Paper.
In addition, various modifications can be made without departing from the scope of the present invention.

FIG. 1 is a schematic overall configuration diagram of a liquid crystal display device according to a first embodiment of the present invention. FIG. 2 is a block diagram showing a configuration example of a drive circuit in the liquid crystal display device according to the first embodiment of the present invention. FIG. 3A is a plan view of an optical sensor unit provided in the liquid crystal display device according to the first embodiment of the present invention, and FIG. 3B is an optical sensor unit corresponding to the pattern of FIG. It is an equivalent circuit diagram. FIG. 4 is a cross-sectional view schematically showing an optical sensor unit and a part of an FFS liquid crystal pixel (PIX) provided in the liquid crystal display device according to the first embodiment of the present invention. FIG. 5A is a plan view of a PIN structure photodiode provided in the liquid crystal display device according to the first embodiment of the present invention. FIG. 5B is a cross-sectional view taken along line XX ′ in FIG. It is sectional drawing. FIGS. 6A and 6B are circuit diagrams showing parasitic capacitances existing in the thin film photodiode and the control gate according to the first embodiment of the present invention. FIG. 7A is a plan view showing a forming process of a method for forming a thin film photodiode provided in the liquid crystal display device according to the first embodiment of the present invention, and FIG. 6B is a plan view in FIG. It is sectional drawing in XX '. 8A is a plan view showing a step subsequent to the step shown in FIGS. 7A and 7B, and FIG. 8B is a cross-sectional view taken along the line XX ′ in FIG. 8A. is there. FIG. 9A is a plan view showing a step subsequent to the step shown in FIGS. 8A and 8B, and FIG. 9B is a cross-sectional view taken along the line XX ′ in FIG. 9A. is there. FIG. 10A is a plan view showing a step subsequent to the step shown in FIGS. 9A and 9B, and FIG. 10B is a cross-sectional view taken along the line XX ′ in FIG. is there. FIG. 11A is a plan view showing a step subsequent to the step shown in FIGS. 10A and 10B, and FIG. 11B is a cross-sectional view taken along line XX ′ in FIG. is there. 12A is a plan view of a PIN structure photodiode provided in a liquid crystal display device according to a modification of the embodiment of the present invention, and FIG. 12B is a cross-sectional view taken along line XX ′ in FIG. FIG. FIG. 13 is a graph showing the dependency of the gate capacitance seen from the gate terminal according to the first embodiment on the applied voltage of the control gate. FIG. 14 is an explanatory diagram in which the results of FIG. 13 are plotted. FIG. 15 is a diagram illustrating the dependency of the parasitic capacitance on the anode region width according to the second embodiment. FIG. 16 is a diagram illustrating the dependence of the photocurrent on the anode region width according to the third embodiment. FIG. 17 is a diagram illustrating the dependence of relative sensitivity on the anode region width according to the fourth embodiment. FIG. 18 is a diagram illustrating the distance dependency of the relative light amount corresponding to the noise component according to the fifth embodiment between the anode region end and the control gate end. FIG. 19 is a graph showing the distance dependency of the relative sensitivity according to the sixth embodiment between the end portion of the anode region and the end portion of the control gate. FIG. 20 is a diagram illustrating the distance dependency between the end of the anode region and the end of the control gate with respect to the amount of light that saturates the signal of the optical sensor unit according to the seventh embodiment. FIG. 21A is a plan view of a PIN structure photodiode provided in the liquid crystal display device according to the second embodiment of the present invention, and FIG. 21B is a cross-sectional view taken along line XX ′ in FIG. It is sectional drawing. FIG. 22 shows the dependency of parasitic capacitance on the width Wp of the anode region (P ⁺ region) as viewed from the anode region (P ⁺ region) according to Example 8. FIG. 23A is a plan view of a PIN structure photodiode provided in the liquid crystal display device according to the third embodiment of the present invention, and FIG. 23B is a cross-sectional view taken along line XX ′ in FIG. It is sectional drawing. FIG. 24A is a plan view of a PIN structure photodiode provided in the liquid crystal display device according to the fourth embodiment of the present invention. FIG. 24B is a cross-sectional view taken along line XX ′ in FIG. It is sectional drawing. FIG. 25 is a graph showing the W length dependency of the parasitic capacitances Cgp and Cgn according to the ninth embodiment. FIG. 26 is a perspective view showing a television as a first application example according to the fifth embodiment of the present invention. 27A and 27B are diagrams showing a digital camera as a second application example according to the fifth embodiment of the present invention. FIG. 27A is a perspective view seen from the front side, and FIG. 27B is a perspective view seen from the back side. FIG. FIG. 28 is a perspective view showing a notebook personal computer as a third application example according to the fifth embodiment of the present invention. FIG. 29 is a perspective view showing a video camera as a fourth application example according to the fifth embodiment of the invention. 30 (a) to 30 (e) are views showing a mobile phone as a fifth application example according to the fifth embodiment of the present invention. 30 (a) is a front view in an open state, FIG. 30 (b) is a side view thereof, FIG. 30 (c) is a front view in a closed state, FIG. 30 (d) is a left side view, and FIG. (E) is a right side view, FIG. 30 (f) is a top view, and FIG. 30 (g) is a bottom view.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Optical sensor part, 10 ... Display part, 11 ... Vertical driver, 12 ... Display driver, 13 ... Sensor driver, 14 ... Selection switch array, 15 ... DC / DC converter, 12 ... Selection switch, 13 ... Vertical driver, 14 ... Display driver, 15 ... Sensor driver, 21K ... Black matrix, 31 ... VDD line, 32 ... VSS line, 33 ... Reset line, 34 ... Read control line, 35 ... Detection line, 36 ... Semiconductor layer, 36A ... Anode region, 36AL ... Extension part, 36AW ... Anode region part, 36I ... I region (intrinsic semiconductor region), 36IW ... I region part, 36N ... Low concentration semiconductor region, 36K ... Cathode region, 37 ... Wiring, 38 ... Control gate, 39 ... Wiring 100 ... Liquid crystal display device 101 ... Video display screen unit 102 ... Front panel 1 DESCRIPTION OF SYMBOLS 3 ... Filter glass, 111 ... Light emission part, 112 ... Display part, 113 ... Menu switch, 114 ... Shutter button, 121 ... Main body, 122 ... Keyboard, 123 ... Display part, 131 ... Main part, 132 ... Lens, 133 ... Start / Stop switch, 134 ... display unit, 141 ... upper housing, 142 ... lower housing, 143 ... connecting unit, 144 ... display, 145 ... sub-display, 146 ... picture light, 147 ... camera, 200 ... liquid crystal panel, 201 DESCRIPTION OF SYMBOLS ... TFT array substrate 202 ... Color filter substrate 203 ... Liquid crystal layer 204 ... Color filter 300 ... Backlight 400 ... Data processing unit 401 ... Control unit 402 ... Position detection unit PA ... Effective display area PA1 ... pixel area, PA2 ... sensor area, CA ... peripheral area, PIX ... pixel, D ... photodiode

Claims (20)

A substrate having a pixel region in which a pixel is formed and a sensor region in which an optical sensor unit is formed;
An illumination unit that illuminates the substrate from one side of the substrate;
A thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and receiving light incident from the other surface side of the substrate;
It is formed on the one surface side of the substrate so as to face the thin film photodiode via an insulating film, and suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one surface side. And a metal film fixed at a predetermined potential,
In the thin film photodiode, a width of the P-type semiconductor region in a direction perpendicular to a direction connecting to the N-type semiconductor region, and a width of the N-type semiconductor region in a direction perpendicular to the direction connecting to the P-type semiconductor region Display devices that are formed differently. In the thin film photodiode, the area of the overlapping region of the P-type semiconductor region and the metal film when viewed from the one surface side or the other surface side is the area of the overlapping region of the N-type semiconductor region and the metal film. The display device according to claim 1. The metal film is connected to the N-type semiconductor region;
In the thin film photodiode, a width of the P-type semiconductor region in a direction perpendicular to a direction connecting to the N-type semiconductor region is a width of the N-type semiconductor region in a direction perpendicular to the direction connecting to the P-type semiconductor region. The display device according to claim 1, which is narrower. In the thin film photodiode, the area of the overlapping region of the P-type semiconductor region and the metal film when viewed from the one surface side or the other surface side is the area of the overlapping region of the N-type semiconductor region and the metal film. The display device according to claim 3. 4. The display device according to claim 3, wherein in the thin film photodiode, a ratio R1 of a width of the P-type semiconductor region / a width of the N-type semiconductor region is in a range of 0.3 ≦ R1 <1. The metal film is connected to the P-type semiconductor region;
In the thin film photodiode, a width of the P-type semiconductor region in a direction perpendicular to a direction connecting to the N-type semiconductor region is a width of the N-type semiconductor region in a direction perpendicular to the direction connecting to the P-type semiconductor region. The display device according to claim 1, which is wider. In the thin film photodiode, the area of the overlapping region of the P-type semiconductor region and the metal film when viewed from the one surface side or the other surface side is the area of the overlapping region of the N-type semiconductor region and the metal film. The display device according to claim 6. The display device according to claim 6, wherein in the thin film photodiode, a ratio R2 of a width of the N-type semiconductor region / a width of the P-type semiconductor region is in a range of 0.3 ≦ R2 <1. The thin film photodiode has an intrinsic semiconductor region and / or a low concentration semiconductor region having a lower conductive impurity concentration than the N type semiconductor region and the P type semiconductor region between the N type semiconductor region and the P type semiconductor region. The display device according to claim 1. The display device according to claim 1, wherein the semiconductor region including the P-type semiconductor region and the N-type semiconductor region constituting the thin film photodiode is formed of polycrystalline silicon, microcrystalline silicon, amorphous silicon, or crystalline silicon. . The illumination unit emits invisible light;
The display device according to claim 1, wherein the thin film photodiode has sensitivity to the invisible light. The distance between the end of the P-type semiconductor region on the N-type semiconductor region side and the end of the metal film on the P-type semiconductor region side is in a range of 1.5 μm or more and 3.0 μm or less. Display device. The distance between the end of the N-type semiconductor region on the P-type semiconductor region side and the end of the metal film on the N-type semiconductor region side is in a range of 1.5 μm or more and 3.0 μm or less. Display device. A substrate having a pixel region in which a pixel is formed and a sensor region in which an optical sensor unit is formed;
An illumination unit that illuminates the substrate from one side of the substrate;
A thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and receiving light incident from the other surface side of the substrate;
It is formed on the one surface side of the substrate so as to face the thin film photodiode via an insulating film, and suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one surface side. And a metal film fixed at a predetermined potential,
In the thin film photodiode and the metal film, a capacitance value of a parasitic capacitance constituted by the P-type semiconductor region and the metal film facing each other through the insulating film is opposed to the N-type semiconductor through the insulating film. A display device having a capacitance value different from that of the parasitic capacitance formed by the region and the metal film. A substrate having a pixel region in which a pixel is formed and a sensor region in which an optical sensor unit is formed;
An illumination unit that illuminates the substrate from one side of the substrate;
A thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and receiving light incident from the other surface side of the substrate;
It is formed on the one surface side of the substrate so as to face the thin film photodiode via an insulating film, and suppresses light emitted from the illumination unit from directly entering the thin film photodiode from the one surface side. And a metal film fixed at a predetermined potential,
In the thin film photodiode, the area of the region where the P-type semiconductor region and the metal film overlap when viewed from one side or the other side is different from the area of the overlapping region of the N-type semiconductor region and the metal film. Display device. The metal film is connected to the P-type semiconductor region and the N-type semiconductor region having a larger capacitance value of parasitic capacitance formed between the metal film facing each other through the insulating film. The display device according to claim 14. In the thin film photodiode, a width of the P-type semiconductor region in a direction perpendicular to a direction connecting to the N-type semiconductor region, and a width of the N-type semiconductor region in a direction perpendicular to the direction connecting to the P-type semiconductor region The display device according to claim 15, wherein the display devices are different from each other. The metal film is connected to the N-type semiconductor region;
In the thin film photodiode, a width of the P-type semiconductor region in a direction perpendicular to a direction connecting to the N-type semiconductor region is a width of the N-type semiconductor region in a direction perpendicular to the direction connecting to the P-type semiconductor region. The display device according to claim 16, which is narrower. The metal film is connected to the P-type semiconductor region;
In the thin film photodiode, a width of the P-type semiconductor region in a direction perpendicular to a direction connecting to the N-type semiconductor region is a width of the N-type semiconductor region in a direction perpendicular to the direction connecting to the P-type semiconductor region. The display device according to claim 15, which is wider. The thin film photodiode has an intrinsic semiconductor region and / or a low concentration semiconductor region having a lower conductive impurity concentration than the N type semiconductor region and the P type semiconductor region between the N type semiconductor region and the P type semiconductor region. The display device according to claim 15.

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