JP2009164928A - Transmitting device and transmitting method, receiving device and receiving method, information processor and information processing method, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily reduce the occurrence of data errors due to multipaths. <P>SOLUTION: An information processing part 163 uses the error rate of the latest bit out of N-bits for finding an error rate expected value for an error of the latest bit in a transmission bit string due to the appearance of each of bit patterns in a unit bit string. A transmission processing part 101 uses the error rate expected value and the appearance frequency of each of the bit patterns in the unit bit string as part of the transmission bit string for finding a value corresponding to a product of the appearance frequency of the bit pattern and the error rate expected value for the bit pattern, as an expected value (an error frequency expected value) for the error frequency of errors due to the appearance of the bit pattern, and transmits the unit bit string converted into an N-bit conversion bit string to reduce the total of the error frequency expected value for each of the bit patterns in the unit bit string as part of the transmission bit string. This invention is applicable, for example, for communications under multipath environment. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a transmission device, a transmission method, a reception device, a reception method, an information processing device, an information processing method, and a program. In particular, for example, occurrence of data errors due to multipath is easily reduced. The present invention relates to a transmission device, a transmission method, a reception device, a reception method, an information processing device, an information processing method, and a program.

  Conventionally, for example, a CRT (Cathode Ray Tube) or LCD (Liquid Crystal Display) is applied to image signals from external devices such as tuners that receive television broadcast signals and DVD (Digital Versatile Disc) players. There is a signal processing device that supplies an image signal to a display device.

  In such a signal processing device, a noise removal process for removing noise from an image signal supplied from an external device, or an image displayed on a display device with higher image quality than an image from the external device. Signal processing such as image conversion processing for converting a signal and image adjustment processing for adjusting the brightness and contrast of an image displayed on the display device is performed.

  FIG. 1 is a block diagram showing a configuration of an example of a conventional signal processing apparatus.

In FIG. 1, a signal processing apparatus 11 includes a housing 12, connectors 13 ₁ to 13 ₄ , an input selector 14, a signal router 15, connectors 16 ₁ to 16 ₄ , connectors 17 ₁ to 17 ₃ , and functional blocks 18 ₁ to 18 _3. , Connector 19, remote commander 20, operation unit 21, system control block 22, and control bus 23.

In the signal processing device 11, the connectors 13 ₁ to 13 ₄ are connected to the input selector 14 via a signal cable, and the input selector 14 is connected to the signal router 15 via the signal cable. The signal router 15 is connected to the connectors 16 ₁ to 16 ₄ and the connector 19 via signal cables, and further to the function block 18 ₁ via the connectors 16 ₁ to 16 ₃ and the connectors 17 ₁ to 17 _3. not to have been connected to the 18 _3. The input selector 14, the signal router 15, the connectors 16 ₁ to 16 ₄ , and the system control block 22 are connected to each other via a control bus 23.

The housing 12 is, for example, a rectangular parallelepiped metal housing, and includes an input selector 14, a signal router 15, connectors 16 ₁ to 16 ₄ , connectors 17 ₁ to 17 ₃ , and functional blocks 18 ₁ to 18. 18 ₃ , a system control block 22, a control bus 23, and the like are accommodated.

Further, the housing 12 is provided with connectors 13 ₁ to 13 ₄ , 19 and an operation unit 21 so as to be exposed to the outside.

Connected to the connectors 13 ₁ to 13 ₄ are cables for connecting the signal processing device 11 and an external device (not shown) such as a tuner or a DVD player for supplying image signals to the signal processing device 11.

The input selector 14 is supplied with an image signal from an external device via the connectors 13 ₁ to 13 ₄ . The input selector 14 selects an image signal supplied from the connectors 13 ₁ to 13 ₄ according to the control of the system control block 22 and supplies it to the signal router 15.

The signal router 15 supplies the signal supplied from the input selector 14 to the function block 18 _i via the connectors 16 _i and 17 _i under the control of the system control block 22 (i = 1, 2 in FIG. 1). , 3).

The signal router 15 is supplied with signals subjected to signal processing from the function block 18 _i via connectors 17 _i and 16 _i . The signal router 15 supplies the signal from the functional block 18 _i to the display device (not shown) connected to the connector 19 via the connector 19.

The connectors 16 _i and 17 _i are detachable from each other, and connect the signal router 15 and the control bus 23 to the functional block 18 _i .

In FIG. 1, four connectors 16 ₁ to 16 ₄ are provided in the housing 12, and three connectors 16 ₁ to 16 ₃ are connected to the connectors 17 ₁ to 17 of the functional blocks 18 ₁ to 18 _3. 17 ₃ are connected to each other. In Figure 1, nothing in the connector 16 ₄ which is not connected, it is possible to connect a new function block (connector) to be added to the signal processor 11.

Each of the functional blocks 18 ₁ to 18 ₃ has a signal processing circuit that performs signal processing such as noise removal processing, image conversion processing, or image adjustment processing. The functional blocks 18 ₁ to 18 ₃ perform signal processing on the signal supplied from the signal router 15, and supply the signal subjected to signal processing to the signal router 15.

  The connector 19 is connected to a cable that connects the signal processing device 11 and a display device that displays an image output from the signal processing device 11.

  The remote commander 20 includes a plurality of buttons operated by the user and supplies (transmits) an operation signal corresponding to the user's operation to the system control block 22 using infrared rays or the like. To do.

  Similar to the remote commander 20, the operation unit 21 includes a plurality of buttons operated by the user, and is operated by the user, and supplies an operation signal corresponding to the user operation to the system control block 22.

When an operation signal corresponding to a user operation is supplied from the remote commander 20 or the operation unit 21, the system control block 22 is input via the control bus 23 so that processing according to the operation signal is performed. The selector 14, the signal router 15, or the function blocks 18 ₁ to 18 ₃ are controlled.

In the signal processing apparatus 11 configured as described above, an image signal is supplied to the signal router 15 via the connectors 13 ₁ to 13 ₄ and the input selector 14, and the signal router 15 and the functional blocks 18 ₁ to 18 ₃ are connected. In between, an image signal is transmitted (transmitted) via a signal cable.

By the way, in recent years, as the image becomes higher in definition, the signal capacity of the image subjected to signal processing by the signal processing device 11 tends to increase. When the image signal has a large capacity, for example, the image signal is transmitted between the signal router 15 and the functional blocks 18 ₁ to 18 ₃ via the signal cable at high speed. As described above, when a signal is transmitted at a high speed, a problem occurs in signal transmission due to the influence of the frequency characteristics of the signal cable, crosstalk, timing shift (skew) occurring in the parallel signal cable, and the like.

  Therefore, there is a method of transmitting signals by wireless communication. Here, the wireless communication includes, for example, proximity non-contact communication used in an IC (Integrated Circuit) tag that transmits a signal using electromagnetic induction, wireless communication using radio waves, and the like.

  In order to perform proximity non-contact communication, it is necessary to arrange the transmitting side and the receiving side in a state of close proximity to some extent. Therefore, when proximity non-contact communication is performed between the substrates of the signal processing device, There are restrictions on the placement of the substrate.

  On the other hand, wireless communication using radio waves is not subject to such restrictions. For example, Patent Document 1 discloses a signal processing apparatus that performs signal processing by transmitting signals by wireless communication using radio waves between substrates built in a housing.

As described in Patent Document 1, for example, the signal router 15 and the functional blocks 18 ₁ to 18 ₃ transmit signals by radio communication using radio waves, thereby transmitting signals at high speed via a signal cable. The problem which arises by this can be avoided.

However, when the signal router 15 and the functional blocks 18 ₁ to 18 ₃ transmit signals by radio communication using radio waves inside the casing 12 of the signal processing device 11, the radio waves are reflected by the wall surface of the casing 12. In addition, due to the fact that radio waves are diffracted by the substrate built in the housing 12, a plurality of transmission paths (multipaths) having different transmission path distances are generated. Then, when multipath occurs, a plurality of signals that are out of phase arrive at the receiving side that receives the signal, and the plurality of signals interfere with each other to generate multipath fading and are reproduced on the receiving side. An error occurs in a bit (bit string).

  That is, when multipath occurs, for example, the signal of the bit transmitted later is affected by the signal of the bit transmitted earlier (in the past), and as a result, the waveform of the signal of the bit transmitted later is deformed. Multipath fading occurs, and an error may occur in bits reproduced on the receiving side.

  In addition to wireless communication inside the housing, for example, in mobile communication using a mobile phone, interference is also caused by the signal phase being shifted due to multipath caused by reflection of radio waves by a building or other construction object. appear. Further, in addition to such wireless communication, for example, when transmitting a signal via a cable, the signal is reflected at the end of the cable, and interference occurs between the signal to be transmitted and the reflected signal.

  In general wireless communication, as a method of measures against multipath by signal processing, for example, a method of adopting OFDM (Orthogonal Frequency Division Multiplexing) as a modulation method, a spread spectrum method as a modulation method, and a receiving side There are a method of performing RAKE reception in the network, a method of employing multiple input multiple output (MIMO) using multiple antennas (multiple antennas) on the transmission side and the reception side, a method of using a waveform equalizer, and the like.

  However, in the method of adopting OFDM as the modulation method, the processing load of FFT (Fast Fourier Transform) and A / D (Analog / Digtal) conversion necessary for modulation and demodulation is heavy, and when processing is performed at high speed Measures against heat are necessary.

  The spread spectrum method used for modulation and rake reception requires processing at a chip rate that is many times faster than the baseband speed during modulation and demodulation. Is difficult to realize.

  In the method of using MIMO and the method of using a waveform equalizer, noise that is uncorrelated with transmission information can be superimposed on the transmission information, and there is not much antenna installation space in the housing so that they are uncorrelated with each other. Predicting changes in transmission characteristics, difficult multi-antenna placement, high-speed A / D conversion required, UW (Unique Word) insertion into packets The problem is that a large-scale prediction circuit is required to improve accuracy.

  In addition, as a countermeasure against multipath, for example, by using a combination of convolutional code and Viterbi decoding, or using an error correction code such as RS (Reed Solomon) code or turbo code, communication on the receiving side There is a method for correcting an error of a bit generated in a path.

  However, when error correction is performed on the receiving side, a wider communication band is required for the amount of data increased by the error correction code, or the data needs to be compressed at a higher compression rate. Arise.

  Further, a large circuit is required for generating an error correction code on the transmission side and for performing error correction on the reception side, respectively.

Japanese Patent Laid-Open No. 2003-179821

  Conventionally, it has been difficult to easily reduce the occurrence of data errors due to multipath.

  The present invention has been made in view of such a situation, and makes it possible to easily reduce the occurrence of data errors due to multipath.

  The transmission apparatus or program according to the first aspect of the present invention is a transmission apparatus that transmits a transmission bit string that is an array of N-bit unit bit strings that are a plurality of bits, and for each bit pattern of the unit bit string, the bit Error rate expected value storage means for storing an error rate expected value that is an expected value of an error rate in which the latest bit of the transmission bit sequence is erroneous due to the appearance of a pattern, and each bit of the unit bit sequence constituting the transmission bit sequence An error occurs due to the appearance of the bit pattern, the value corresponding to the product of the appearance frequency calculating means for determining the appearance frequency of the pattern, the appearance frequency of the bit pattern, and the expected error rate for the bit pattern. Obtained as the expected number of errors, which is the expected value of the number of errors, for each bit pattern of the unit bit string constituting the transmission bit string A transmission apparatus comprising a conversion means for converting the unit bit string into an N-bit conversion bit string and a transmission means for transmitting the converted bit string so as to reduce the sum of expected error counts, or a computer as a transmission apparatus Is a program that allows

  A transmission method according to a first aspect of the present invention is a transmission method of a transmission apparatus that transmits a transmission bit string that is an array of N-bit unit bit strings that are a plurality of bits, and the transmission apparatus is a unit that constitutes the transmission bit string. The appearance frequency of each bit pattern of the bit string is obtained, and the latest bit of the transmission bit string is erroneous due to the appearance frequency of the bit pattern and the appearance of the bit pattern obtained for each bit pattern of the unit bit string. A value corresponding to a product of an error rate expectation value that is an error rate expectation value is obtained as an error count expectation value that is an expected number of error occurrences due to the appearance of the bit pattern, and the transmission bit string is obtained The unit bit string is converted to an N-bit conversion bit so as to reduce the sum of the expected number of errors for each bit pattern of the unit bit string constituting the unit bit string. Into a preparative column, a transmission method comprising transmitting the converted bit string.

  In the first aspect as described above, the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string is obtained. Then, an error rate that is an expected value of an error rate at which the latest bit of the transmission bit string is erroneous due to the appearance frequency of the bit pattern and the appearance of the bit pattern obtained for each bit pattern of the unit bit string A value corresponding to the product of the expected value is obtained as an expected number of errors that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern, and each bit pattern of the unit bit string constituting the transmission bit string The unit bit string is converted into an N-bit converted bit string and the converted bit string is transmitted so as to reduce the total sum of the expected number of errors for.

  The receiving apparatus or program according to the second aspect of the present invention is a receiving apparatus that receives a bit string transmitted from a transmitting apparatus that transmits a transmission bit string that is an array of unit bit strings of N bits that are a plurality of bits, The transmission device obtains the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string, resulting from the appearance frequency of the bit pattern and the appearance of the bit pattern obtained for each bit pattern of the unit bit string Then, the value corresponding to the product of the error rate expectation value, which is the expected error rate of the latest bit of the transmission bit string, is the expected value of the number of errors in which an error occurs due to the appearance of the bit pattern. Obtained as an expected number of error times, and the sum of the expected number of error times for each bit pattern of the unit bit string constituting the transmission bit string is reduced. As described above, when the unit bit string is converted into an N-bit converted bit string and the converted bit string is transmitted, receiving means for receiving the converted bit string from the transmitting device, and the converted bit string It is a receiving apparatus provided with the reverse conversion means to carry out reverse conversion to a bit stream, or a program which makes a computer function as a receiving apparatus.

  A receiving method according to a second aspect of the present invention is a receiving method of a receiving apparatus that receives a bit string transmitted from a transmitting apparatus that transmits a transmission bit string that is an array of N-bit unit bit strings that are a plurality of bits, The transmission device obtains the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string, resulting from the appearance frequency of the bit pattern and the appearance of the bit pattern obtained for each bit pattern of the unit bit string. Thus, the value corresponding to the product of the error rate expected value, which is the expected error rate of the latest bit of the transmission bit string, is the expected value of the number of errors in which an error occurs due to the appearance of the bit pattern. Calculated as the expected number of error times, and reduces the total sum of expected error times for each bit pattern of the unit bit string constituting the transmission bit string As described above, when the unit bit string is converted into an N-bit converted bit string and the converted bit string is transmitted, the receiving apparatus receives the converted bit string from the transmitting apparatus, and the converted bit string is converted into the unit bit string. It is a receiving method including the step of carrying out reverse conversion to a bit stream.

  In the second aspect as described above, the converted bit string is received from the transmission device, and the converted bit string is inversely converted into the unit bit string.

  The information processing apparatus or the program according to the third aspect of the present invention provides an error rate used for converting the unit bit string of a transmission bit string that is an array of N-bit unit bit strings, which is a plurality of bits, into a predetermined converted bit string. An information processing apparatus for obtaining an expected value, the test pattern generated by a test pattern generating means for generating a test pattern that is an N-bit bit pattern that can be the unit bit string, and the test transmitted by a transmitting apparatus that transmits the test pattern An error rate calculation means for obtaining an error rate in which the latest bit of the N bits of the test pattern is erroneous by comparing with a received test pattern obtained by receiving a pattern, and each bit pattern of the unit bit string Due to the appearance of the bit pattern, the latest bit of the transmission bit string is That the error rate expected value is the expected value of the error rate, the information processing apparatus and a error rate expectation value calculation means for calculating using said error rate, or, as an information processing apparatus, a program causing a computer to function.

  The information processing method according to the third aspect of the present invention obtains an expected error rate value used to convert the unit bit string of the transmission bit string, which is a sequence of N-bit unit bit strings, which is a plurality of bits, into a predetermined converted bit string. An information processing method for an information processing device, wherein the information processing device transmits a test pattern generated by a test pattern generation unit that generates a test pattern that is an N-bit bit pattern that can be the unit bit string, and a test pattern. By comparing with the received test pattern obtained by receiving the test pattern transmitted by the apparatus, the error rate of the latest bit out of the N bits of the test pattern is obtained, and each bit of the unit bit string is obtained. Due to the appearance of the bit pattern, the latest bit of the transmission bit string is incorrect. An error rate expectation value is the expected value of the error rate, an information processing method comprising the steps of obtaining by using the error rate.

  In the third aspect as described above, the test pattern generated by the test pattern generating means for generating a test pattern which is an N-bit bit pattern which can be the unit bit string, and the transmitter transmitted by the transmitter transmitting the test pattern are transmitted. By comparing with the received test pattern obtained by receiving the test pattern, an error rate in which the latest bit of the N bits of the test pattern is erroneous is obtained, and for each bit pattern of the unit bit string, Due to the appearance of the bit pattern, an expected error rate, which is an expected error rate of the latest bit of the transmission bit string, is obtained using the error rate.

  The program can be provided by being transmitted through a transmission medium or by being recorded on a recording medium.

  In addition, the transmission device, the reception device, and the information processing device may be independent devices or may be internal blocks constituting one device.

  According to the first to third aspects of the present invention, it is possible to easily reduce the occurrence of data errors due to multipath.

  FIG. 2 is a perspective view showing a configuration example of an embodiment of a signal processing device to which the present invention is applied.

In FIG. 2, a signal processing device 31 includes a housing 32, a power supply module 33, a substrate (platform substrate) 34, a substrate (input substrate) 35, substrates (signal processing substrates) 36 ₁ to 36 ₃ , and a substrate (output substrate). 37.

Housing 32 is a metallic casing in a rectangular parallelepiped shape, the inside, the power module 33, platform board 34, input board 35, signal processing boards 36 ₁ through 36 _3, and output board 37 is housed Yes.

The power supply module 33 supplies power required for driving to the platform board 34, the input board 35, the signal processing boards 36 ₁ to 36 ₃ , and the output board 37.

Signal processing boards 36 ₁ to 36 ₃ are mounted on the platform board 34. Note that power is supplied to the signal processing boards 36 ₁ to 36 ₃ from the power supply module 33 via the platform board 34.

The input board 35 is connected to connectors 13 ₁ to 13 ₄ (FIG. 3) provided outside the housing 32, and an external device (see FIG. 3) connected to the input board 35 via the connector 13 _i . For example, an image signal is supplied from (not shown). Also, the input board 35 has an antenna 35a for wireless communication using radio waves, the signal of the image supplied from the external device, via the antenna 35a, the signal processing boards 36 ₁ through 36 ₃ Send (transmit).

The signal processing boards 36 ₁ to 36 ₃ are respectively provided with antennas 36a ₁ to 36a ₃ for performing wireless communication using radio waves. The signal processing board 36 _i, via the antenna 36a _i, the signal of the image is supplied transmitted from the input board 35. The signal processing board 36 _i performs signal processing such as noise removal processing, image conversion processing, or image adjustment processing on the image signal from the input board 35, and the signal signal subjected to the signal processing is transmitted to the antenna 36 a _i. To the output board 37.

The output board 37 includes an antenna 37a for performing wireless communication using radio waves, and is connected to a connector 19 (FIG. 3) provided on the housing 32. The output board 37 receives image signals transmitted from the signal processing boards 36 ₁ to 36 ₃ via the antenna 37 a and supplies them to a display device (not shown) connected to the connector 19.

  Next, FIG. 3 is a block diagram illustrating an electrical configuration example of the signal processing device 31 of FIG.

  In the figure, portions corresponding to those of the signal processing device 11 of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted below as appropriate.

In FIG. 3, the signal processing device 31 includes connectors 13 ₁ to 13 ₄ , connector 19, remote commander 20, operation unit 21, housing 32, input selector 44, signal router 45, functional blocks 46 ₁ to 46 ₃ , and system. The control block 50 is configured.

In the signal processing device 31, the connectors 13 ₁ to 13 ₄ are connected to an input selector 44 via a signal cable, and the input selector 44 is connected to a signal router 45 via a signal cable. Is connected to the connector 19 via a signal cable.

Inside the housing 32, an input selector 44, a signal router 45, functional blocks 46 ₁ to 46 ₃ , and a system control block 50 are housed.

  For example, the input selector 44 is provided on the input board 35 of FIG. 2, and wireless communication can be performed via an antenna 35 a provided on the input board 35.

The input selector 44 is supplied with an image signal from an external device (not shown) via the connectors 13 ₁ to 13 ₄ . The input selector 44 selects an image signal supplied from an external device connected to the connectors 13 ₁ to 13 ₄ according to the control of the system control block 50 and supplies it to the signal router 45.

  For example, the signal router 45 is provided on the output board 37 of FIG. 2, and wireless communication can be performed via an antenna 37 a provided on the output board 37.

Signal router 45 under the control of the system control block 50, a signal of the image supplied from the input selector 44 via the antenna 37a, by wireless communication using radio waves, and transmits to the functional blocks 46 ₁ through 46 _3.

The signal router 45 receives the image signal transmitted from the function blocks 46 ₁ to 46 ₃ through the antenna 37a by radio communication using radio waves, and receives the image signal from the function blocks 46 ₁ to 46 _3. Is supplied to a display device (not shown) connected to the connector 19 via the connector 19.

The functional blocks 46 ₁ to 46 ₃ are provided, for example, on the signal processing boards 36 ₁ to 36 ₃ in FIG. 2, respectively, via antennas 36a ₁ to 36a ₃ provided on the signal processing boards 36 ₁ to 36 _3. Wireless communication is possible.

The functional block 46 _i receives an image signal transmitted from the signal router 45 by radio communication using radio waves via the antenna 36 a _i, and performs noise removal processing and image conversion processing on the image signal. Or signal processing such as image adjustment processing. The functional block 46 _i transmits the signal of the image subjected to the signal processing to the signal router 45 through the antenna 36a _i by wireless communication using radio waves. Further, the function blocks 46 _i and 46 _{i ′} transmit and receive signals by wireless communication via the antennas 36 a _i and 36 a _{i ′} as necessary.

In the case the function block 46 is not necessary to distinguish between ₁ to each of the 46 ₃ individually hereinafter, referred to functional blocks 46 ₁ through 46 ₃ and the functional block 46. Similarly, the antennas 36a ₁ to 36a ₃ are also referred to as the antenna 36a.

  The system control block 50 is provided, for example, on the platform board 34 in FIG. 2, and wireless communication can be performed via an antenna 50a that is provided on the platform board 34 and is not shown in FIG. It has become.

  Further, an operation signal is supplied to the system control block 50 from the remote commander 20 and the operation unit 21.

  When an operation signal corresponding to a user's operation is supplied from the remote commander 20 or the operation unit 21, the system control block 50 transmits radio waves via the antenna 50a so that processing according to the operation signal is performed. The input selector 44, the signal router 45, and the functional block 46 are controlled by the used wireless communication.

  Inside the housing 32 of the signal processing device 31 configured as described above, any one of the input selector 44, the signal router 45, the function block 46, and the system control block 50 is required as necessary. Becomes a transmission device, and at least one other block becomes a reception device, and the transmission device transmits, for example, an image signal, a control signal, and other signals by wireless communication using radio waves. Then, the receiving device receives a signal from the transmitting device.

  Here, in order to simplify the description, attention is paid to the signal router 45 and the functional block 46, and wireless communication performed by the signal router 45 and the functional block 46 in the housing 32 will be described.

  FIG. 4 shows a communication system (system is a collection of a plurality of devices logically composed of a signal router 45 and a function block 46 in the housing 32, and devices of each configuration are in the same housing. It is a block diagram showing a configuration example).

  The signal router 45 includes a transmission processing unit 101, a reception processing unit 102, a signal processing unit 103, and a control unit 104.

  The transmission processing unit 101 performs a transmission process of transmitting data (for example, image signals) supplied from the signal processing unit 103, control signals such as commands supplied from the control unit 104, and the like by radio waves from the antenna 37a. .

  The reception processing unit 102 performs reception processing for receiving a signal supplied from the antenna 37a when the antenna 37a receives a radio wave, and obtains data (including a control signal) as a result as necessary. This is supplied to the signal processing unit 103 and the control unit 104.

  The signal processing unit 103 performs predetermined signal processing as the signal router 45 on the data supplied from the reception processing unit 102, and supplies the data obtained as a result to the transmission processing unit 101.

  The control unit 104 controls the transmission processing unit 101, the reception processing unit 102, and the signal processing unit 103, for example, according to a control signal supplied from the reception processing unit 102.

  In FIG. 4, the connection lines connecting the transmission processing unit 101, the reception processing unit 102, and the signal processing unit 103 to the control unit 104 are not shown in order to avoid making the figure complicated. It is. The same applies to the connection lines connecting the transmission processing unit 111, the reception processing unit 112, and the signal processing unit 113 of the functional block 46 to the control unit 114.

  The functional block 46 includes a transmission processing unit 111, a reception processing unit 112, a signal processing unit 113, and a control unit 114. The transmission processing unit 111, the reception processing unit 112, the signal processing unit 113, and the control unit 114 are the same as the transmission processing unit 101, the reception processing unit 102, the signal processing unit 103, and the control unit 114 of the signal router 45, respectively. Since it is configured, its description is omitted.

  In the communication system configured as described above, for example, when data is transmitted from the signal router 45 to the functional block 46, the transmission processing unit 101 is supplied from the signal processing unit 103 in the signal router 45. And the like are transmitted by radio waves from the antenna 37a. The radio wave transmitted from the antenna 37a is received by the antenna 36a, and a signal corresponding to the radio wave is supplied to the reception processing unit 112 of the functional block 46.

  The reception processing unit 112 receives a signal from the antenna 36 a and supplies data obtained as a result to the signal processing unit 113. In the signal processing unit 113, predetermined signal processing as the functional block 46 is performed on the data supplied from the reception processing unit 102.

  Similarly, data can be transmitted from the functional block 46 to the signal router 45.

  In the following description, the signal router 45 is described as a transmitting device that transmits data, and the functional block 46 is described as a receiving device that receives data.

  When the signal router 45 and the functional block 46 perform wireless communication in the housing 32, multipath is generated by the radio waves reflected inside the housing 32.

  When multipath occurs, in the signal router 45 as a transmission apparatus, the signal of the bit transmitted later is affected by the signal of the bit transmitted earlier (in the past) (interference occurs), and as a result, The waveform of the signal of the transmitted bit may be distorted (fading occurs), and an error may occur in the bit received in the functional block 46 as a receiving apparatus.

  The distortion generated in the waveform of a signal of a certain bit varies depending on the bits around the bit (bits transmitted before and after the bit).

  Therefore, for example, assuming that a bit string of N bits, which is a plurality of bits, is now referred to as a unit bit string, when the unit bit string is transmitted from the signal router 45 as a transmitting device to the functional block 46 as a receiving device, the unit bit string The error rate characteristic in which a specific one bit is wrong is different from the average error rate characteristic in the communication path between the signal router 45 as the transmission apparatus and the functional block 46 as the reception apparatus.

However, inside the housing 32 of the signal processing device 31 (FIG. 2), the power supply module 33, the platform board 34, the input board 35, the signal processing boards 36 ₁ to 36 ₃ , and the output board 37 are fixed. . For this reason, the radio wave is always reflected in the same manner on the wall surface of the housing 32 and each substrate, and the interference of the radio waves reflected on the wall surface of the housing 32 and the substrates 35, 36 ₁ to 36 ₃ , 35, etc. As a result, the waveform distortion of a specific 1-bit signal in the unit bit string becomes steady.

  That is, for example, in mobile wireless communication represented by a mobile phone or the like, since the way of interference caused by multipath changes with the movement of the wireless station, a process for removing interference according to the change is performed in real time. It is necessary to do in.

On the other hand, in the wireless communication performed inside the housing 32 (hereinafter also referred to as in-housing wireless communication), the signal router 45 as a transmitting device and the functional block 46 as a receiving device do not move. Further, in the case wireless communication, the power supply module 33, the platform board 34, the input board 35, the signal processing boards 36 ₁ to 36 ₃ , and the output board 37 are fixed inside the casing 32. Unless added, deleted (removed), or changed, the communication environment does not change.

  Therefore, in the in-casing wireless communication, the way of interference does not change with time and becomes steady, and the waveform distortion of the signal due to the interference also becomes steady.

  As described above, in the case of wireless communication within a casing, the waveform of a signal due to multipath is distorted in a steady manner, but the distortion that occurs in the waveform of a signal of a certain bit is the bit around that bit (the bit It depends on the bit transmitted before and after).

  That is, FIG. 5 shows a waveform of a received signal received by the receiving device when the unit bit string is transmitted by wired communication and when transmitted by wireless communication within the casing.

  In the waveform of the received signal in FIG. 5, the horizontal axis represents time, and the vertical axis represents the amplitude of the received signal. Further, the amplitude of the signal when transmitting a bit is, for example, -0.3V (volt) for bit "0" and + 0.3V for bit "1", for example.

Here, hereinafter, each of the N bits as a unit bit string is described as b ₁ , b ₂ ,..., B _N in the order of transmission (also in the order of reception). In addition, the nth bit (bit transmitted _nth ) b _n (“0” or “1”) in the unit bit string is also referred to as the nth bit.

  FIG. 5A shows a waveform of a received signal of the fifth bit “1” when 6 bits are used as a unit bit string and one bit pattern “010111” of the unit bit string is transmitted a plurality of times by wired communication. Yes.

  In FIG. 5A, black lines represent a plurality of received signals corresponding to a unit bit string transmitted a plurality of times, and white portions represent an average value of the plurality of received signals.

  In wired communication, the unit bit string signal is not affected by multipath, and is only affected by the circuit of the transmission device and the reception device (effect of the circuit system). Therefore, the amplitude of the reception signal of the fifth bit is It is almost constant and the variance is small.

  FIG. 5B shows the waveform of the received signal of the fifth bit “1” when the same unit bit string “010111” as in FIG. 5A is transmitted a plurality of times by in-housing wireless communication.

  In FIG. 5B, as in FIG. 5A, the black line represents a plurality of received signals corresponding to the unit bit string transmitted a plurality of times, and the white portion represents the average value of the plurality of received signals. Represents.

  In the in-casing wireless communication, the signal of the unit bit string is affected by the influence of the multipath (the influence of the interference caused by the multipath) in addition to the influence of the circuit system. As a result, the received signal of the fifth bit is It is distorted more than the case.

  For example, with 0.0V as a threshold, a received signal that is equal to or greater than (or greater than) the threshold is reproduced (determined) to bit “1”, and a received signal that is less than (or less than) the threshold is represented by bit “0”. 5 (B), the received signal of the fifth bit of “1” in FIG. 5B has a portion where the amplitude is less than the threshold value. In this case, the fifth bit is erroneously May be played back to "0".

  Here, the influence of the circuit system includes reflection at a connector end in a path through which a signal passes and a filter effect in the circuit. The filter effect is the filter characteristics of the filter itself in the circuit and the parts in the circuit, that is, the upper and lower limits of the frequency component of the signal that the circuit passes, so that some frequency components of the signal that passes through the circuit are cut. Or the frequency component of the signal passing through the circuit becomes a partial frequency component of the signal.

  If a bit in the unit bit string is focused on as a target bit, the frequency component of the signal passing through the filter effect depends on, for example, the convolution of the signal of the target bit and the signals of the bits before and after it. The waveform of the signal is dependent on the bits before and after it.

  For example, in the unit bit string “010111” shown in FIG. 5, when the fifth bit “1” is the target bit, the fourth bit before the target bit and the sixth bit after the target bit are both Since it is the same “1” as the bit of interest, there is a sharp change (rising or falling) between the 4th and 5th bits and between the 5th and 6th bits. ) Does not exist, that is, there is no high-frequency component cut by the filter effect. As a result, when only the influence of the circuit system is taken into consideration, the waveform of the received signal of the fifth bit, which is the target bit, is Almost straight.

  On the other hand, the effect of multipath appears as multipath fading where multiple waves (multipath) such as direct waves, reflected waves, and diffracted waves interfere.

  In particular, in wireless communication in a closed space such as in-chamber wireless communication, since the divergence of radio waves is small, the attenuation of reflected waves is small, and the influence of reflected waves continues for several bits. As a result, the distortion of the received signal becomes large. For example, as shown in FIG. 5B, the amplitude of the received signal of the target bit (fifth bit) which is “1” becomes less than the threshold value, It may be played back to "0" by mistake.

  However, in FIG. 5B, the variance of the received signal is within a certain range. Furthermore, although the waveform of the received signal is distorted, the distortion has a certain tendency (stationarity).

  In the in-casing wireless communication, the reception signal received by the reception device is a signal in which the transmission signal transmitted from the transmission device is affected by the influence of the circuit system and the influence of multipath.

  The influence of the circuit system affected by the transmission signal and the influence of multipath are stationary, and the influence of the transmission signal of the bit of interest in the past and future bits (sequence) before the bit of interest (before the bit of interest). , And the bit (sequence) transmitted after the bit of interest).

  FIGS. 6 to 8 show a case where the bit of interest is transmitted for a plurality of times when a 7-bit bit string is transmitted a plurality of times as a unit bit string and the sixth bit of the unit bit string is set as a bit of interest in the in-casing wireless communication. The waveform of the received signal is shown.

  That is, FIG. 6 shows the waveform of the received signal of the sixth bit “0” as the target bit of the unit bit string “0000101” (unit bit string whose bit pattern is “0000101”).

  FIG. 7 shows the waveform of the received signal of the sixth bit “0” as the target bit of the unit bit string “0011101”, and FIG. 8 shows the sixth bit as the target bit of the unit bit string “0000000”. The waveform of the received signal of “0” is shown.

  The received signal waveforms in FIGS. 6 to 8 are all the waveform of the received signal of bit “0”, but are distorted differently for each bit pattern of the unit bit string. Therefore, the threshold value is 0.0V. Is different for each bit pattern of the unit bit string.

  However, the waveform distortion of the received signal has a certain tendency for each bit pattern.

  For this reason, the error rate at which the target bit of the unit bit string is erroneous differs for each bit pattern of the unit bit string and depends on the bit pattern.

  FIG. 9 shows an error rate of a target bit when an 8-bit bit string is a unit bit string and the seventh bit of the unit bit string is a target bit.

  Here, in FIG. 9, the horizontal axis represents the bit pattern of the unit bit string, and the vertical axis represents the error rate (Ber).

The bit patterns “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” of the 8-bit unit bit string include 256 patterns “00000000” to “11111111”. However, in FIG. 9, the bit pattern “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” is represented by a binary number, and the binary number is represented by a decimal number (0). To 255) are shown on the horizontal axis.

  According to FIG. 9, it can be seen that there are bit patterns in which the seventh bit, which is the target bit, is likely to be erroneous, and bit patterns that are not likely to be erroneous.

  As described above, in the case of wireless communication within the housing, there is a certain tendency for each bit pattern in the waveform distortion of the received signal. As a result, there are bit patterns that are likely to be erroneous and bit patterns that are difficult to error. To do.

  Next, in multi-path wireless communication, when a multipath occurs, the signal of the bit transmitted later from the transmission device is affected by the signal of the bit transmitted earlier (in the past) (interference occurs) As a result, the waveform of the bit signal transmitted later is distorted (fading occurs), and an error occurs in the bit received by the receiving apparatus due to the distortion of the waveform.

  In this way, in a communication environment with multipath, the bit (the signal) transmitted (received) first affects the bit (the signal) received by the receiving apparatus. In other words, in a communication environment with multipath, the unit bit string transmitted earlier affects the bits transmitted later over several bits thereafter.

  In this case, for each bit pattern of the unit bit string, consider the expected value due to the appearance of the bit pattern, that is, the latest bit of the transmission bit string that is the arrangement of the unit bit strings is incorrect due to the influence of the bit pattern. Can do.

  With reference to FIG. 10, a description will be given of how to obtain an expected error rate value in which the latest bit that appears after the occurrence of a certain bit pattern is incorrect.

  FIG. 10 shows a unit bit string in the transmission bit string.

In FIG. 10, the unit bit string is an 8 (= N) bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ”, and the bit pattern is “ 0,1,0,1,1,1,0,1 ".

In FIG. 10, at a certain time t, the receiving device receives the unit bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” = 0,1,0, 1,1,1,0,1 of "latest bit (bit 8) b ₈ has been received.

Furthermore, in FIG. 10, at the time t + 1 next to the time t, the bit b ₉ transmitted after the bit b ₈ is received by the receiving device, and at the next time t + 2, the bit b ₉ the next bit b ₁₀ is received by the receiving device.

Similarly, the receiving apparatus receives bit b _{8 + i} as the latest bit at time t + i (i = 0, 1, 2,...).

  Now, let us say that the L bit when the previously transmitted bit affects the bit transmitted later over the L bit is the affected bit length. In FIG. 10, the influence bit length L is N−1 (= 7) bits, which is 1 bit less than the number of bits N (= 8) of the unit bit string.

After the appearance of the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" That is, the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" is received After being received by the device, the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0 , 1 ″ affects the latest bit while the distance (number of bits) from the latest bit received by the receiving apparatus is in the range of the affected bit length L.

Then, the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" appeared After that, the appearance of the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" The error rate expected value, which is the expected value of the error rate that the latest bit is erroneous, is represented by the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " While the distance between = "0,1,0,1,1,1,0,1" and the latest bit is within the affected bit length L, only the bit string that appears as the expected value calculation target bit string is transmitted Then, it can be obtained by accumulating the expected error rate value in which the latest bit of the expected value calculation target bit string is erroneous.

  Here, the expected value calculation target bit string is a bit string (the portion hatched in FIG. 10) from the bit that is traced back by the influence bit length L from the latest bit to the latest bit. , A bit string having the same number of bits N (= 8) as the unit bit string.

In FIG. 10, at time t + i, the unit bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” = “0,1,0,1,1,1”. , 0,1 "(the latest eighth bit b ₈ ) and the latest bit b _{8 + i} (hereinafter also referred to as inter-bit distance) are i bits.

  Therefore, the inter-bit distance i is within the affected bit length L (= 7) from the time t to t + 7, and after the time t + 8, the inter-bit distance i is the affected bit length L. Over.

Therefore, the appearance of the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" Therefore, after that, the expected error rate value of the latest bit error is obtained by integrating the expected error rate value of the latest bit of the expected value calculation target bit string at each time from time t to t + 7. Can do.

That is, the error rate expectation value in which the latest bit appearing thereafter is erroneous due to the appearance of the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " As E (b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ) and the latest bit b _{8 + i} of the expected value calculation target bits at time t _{+ i} of the error rate expectation value, when it represents a EE _i, the error rate expectation _{E (b 1, b 2,} b 3, b 4, b 5, b 6, b 7, b 8) is the following formula Can be sought.

E (b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ) = EE ₀ + EE ₁ + ・ ・ ・ + EE _L

Now, only the 8-bit bit pattern “b ′ ₁ , b ′ ₂ , b ′ ₃ , b ′ ₄ , b ′ ₅ , b ′ ₆ , b ′ ₇ , b ′ ₈ ” which can be an 8-bit unit bit string is used. The error rate at which the 8th bit b ′ _{8, which} is the latest bit, is erroneous when transmitted is defined as C ₈ (b ′ ₁ , b ′ ₂ , b ′ ₃ , b ′ ₄ , b ′ ₅ , b ′ ₆ , b ' ₇ , b' ₈ ), error rate expectation value EE _i (and error rate expectation value E (b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ )) Can be obtained using the error rate C ₈ (b ′ ₁ , b ′ ₂ , b ′ ₃ , b ′ ₄ , b ′ ₅ , b ′ ₆ , b ′ ₇ , b ′ ₈ ).

That is, at time t, the bit string from the latest bit b _{8 of} the already received bits to the bit b ₁ separated by the affected bit length L (= 7), that is, the unit bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ "=" 0,1,0,1,1,1,0,1 "itself is the expected value calculation target bit string, and its expected value Error rate expectation value of the latest bit b ₈ (bit sequence “b ₁ , b ₂ , b ₃ ” of the calculation target bit sequence “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ″ when only the expected value) EE ₀ is obtained when bit b ₈ is erroneously transmitted.

At time t, the expected value calculation target bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” is the unit bit string “0,1,0,1,1,1”. , 0,1 "and all bits b ₁ to B ₈ are known, the expected value calculation target bit string" b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ "The expected error rate value EE ₀ of the latest bit b ₈ is the error rate C ₈ of the unit bit string" b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ) = C ₈ (“0,1,0,1,1,1,0,1”).

Next, at time t + 1, the bit string “b ₂ , b ₃ , b from the latest bit b ₉ among the already received bits to bit b _{2 that is} separated by the affected bit length L (= 7). ₄ , b ₅ , b ₆ , b ₇ , b ₈ , b ₉ "=" 1,0,1,1,1,0,1, x ", that is, the unit bit string" b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ "of the latest 7 bits" b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ "at time t + 1 Latest bit b ₉ to the added bit sequence _{"b 2, b 3, b} 4, b 5, b 6, b 7, b 8, b 9" = "1,0,1,1,1,0,1 , x "is the expected value calculation target bit string.

  Here, x represents an indefinite value (bit) which is either “0” or “1”.

Appearance of unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" (transmission / At the time of (reception), since the bit appearing (transmitting / receiving) after that is not known, the latest bits b ₉ , b ₁₀ ,... After time t + 1 are the indefinite value x.

Assuming that the probability of occurrence of "0" is equal to the probability of occurrence of "1" as an indefinite value x, that is, "0" and "1" are both 1/2 probability. If it occurs, the expected value calculation target bit string "b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ , b ₉ " = "1,0,1,1,1,0, The expected error rate expected value EE ₁ of the latest bit b ₉ of “1, x” is the expected value calculation target bit string “1,0,1,1,1,0,1,” when the indefinite value x is “0”. 0 "error rate C ₈ (1,0,1,1,1,0,1,0) and expected value calculation target bit string" 1,0,1,1 "when the indefinite value x is" 1 " , 1,0,1,1 "and the average error rate C ₈ (1,0,1,1,1,0,1,1) ((C ₈ (1,0,1,1,1, 0,1,0) + C ₈ (1,0,1,1,1,0,1,1)) / 2).

Next, at time t + 2, the bit string “b ₃ , b ₄ , b from the latest bit b _{10 of} the already received bits to the bit b _{3 that is} separated by the affected bit length L (= 7). ₅ , b ₆ , b ₇ , b ₈ , b ₉ , b ₁₀ "=" 0,1,1,1,0,1, x, x ", that is, the unit bit string" b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ "of the latest 6 bits" b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " Bit sequence "b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ , b ₉ , b ₁₀ " = "0,1, with bit b ₉ and latest bit b ₁₀ at time t + 2 added 1,1,0,1, x, x "is an expected value calculation target bit string.

As described above, assuming that the occurrence probability of “0” and the occurrence probability of “1” are equal as the indefinite value x, the expected value calculation target bit string “b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ , b ₉ , b ₁₀ "=" 0,1,1,1,0,1, x, x "The latest error rate expected value EE ₂ of the bit b ₁₀ is an indefinite value" x , x "is" 0,0 ", the error rate C ₈ (0,1,1,1,0, for the expected value calculation target bit string" 0,1,1,1,0,1,0,0 " , 1,0,0), the error rate of the expected value calculation target bit string "0,1,1,1,0,1,0,1" when the indefinite value "x, x" is "0,1" C ₈ (0,1,1,1,0,1,0,1), expected value calculation target bit string "0,1,1,1" when the indefinite value "x, x" is "1,0" , 0,1,1,0 "error rate C ₈ (0,1,1,1,0,1,1,0) and indefinite value" x, x "is" 1,1 " Expected value calculation target bit string "0,1,1,1,0,1,1,1" error rate C ₈ (0,1,1,1,0,1,1,1) average value (( C ₈ (0,1,1,1,0,1,0,0) + C ₈ (0,1,1,1,0,1,0,1) + C ₈ (0,1,1,1 , 0,1,1,0) + C ₈ (0,1,1,1,0,1,1,1)) / 4).

Hereinafter, similarly, at each time t + i from time t + 3 to time t + 7, it is separated from the latest bit b _{8 + i} among the already received bits by the affected bit length L (= 7). Bit sequence up to bit b _{i + 1} "b _{i + 1} , b _{i + 2} , b _{i + 3} , b _{i + 4} , b _{i + 5} , b _{i + 6} , b _{i + 7} , b _{i + 8} " That is, at the time t at the latest 8-i bits b _{i + 1} to b ₈ in the unit bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” N (= 8) bits to which the i-bit indefinite value x bits of the latest bits b _{8 + 1} to b _{8 + i from} +1 to time t + i are added are the expected value calculation target bit strings.

As in the case described above, as the indefinite value x, the occurrence probability of “0” and the occurrence probability of “1” are equal, and the expected value calculation target bit string “b _{i + 1} , b _{i + 2, b i + 3, b} i + 4, b i + 5, b i + 6, b i + 7, b i + 8 latest bit b _{i + 8} of the error rate expectation EE _{i + 8} of "is Error rate C ₈ (b _{i + 1} , b _{i + 2} , b _{i + 3} , b _{i + 4} , b _{i + 5} , b _{i + 6} , b _{i + 7} , b _{i + 8} ) It is done.

As described above, the error rate expected values EE ₀ to EE _{7 in} which the latest bit of the expected value calculation target bit string from time t to t + 7 are erroneous are obtained, and these error rate expected values EE ₀ to EE ₇ are integrated. As a result, the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" After the appearance, the unit bit string "b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ " = "0,1,0,1,1,1,0,1" Error rate expectation value (hereinafter referred to as error rate expectation value for a unit bit string) E (b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ) (= EE ₀ + EE ₁ +... + EE ₇ ).

FIG. 11 shows an error rate C ₈ (b ₁ , b ₂ , b ₈ ) of each bit pattern of an 8-bit unit bit string “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ”. b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ) and expected error rate E (b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b) for each bit pattern ₇ , b ₈ ).

  Here, in FIG. 11, the horizontal axis represents the bit pattern of the unit bit string, and the vertical axis represents the error rate and the expected error rate.

The bit patterns “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” of the 8-bit unit bit string include 256 patterns “00000000” to “11111111”. However, in FIG. 11, the bit pattern “b ₁ , b ₂ , b ₃ , b ₄ , b ₅ , b ₆ , b ₇ , b ₈ ” is represented by a binary number, and the binary number is represented by a decimal number (0). To 255) are shown on the horizontal axis.

  According to FIG. 11, there are a bit pattern with a high error rate and a bit pattern with a low error rate, that is, a bit pattern in which the 8th bit, which is the latest bit, is likely to be erroneous, and a bit pattern that is difficult to error. I understand that

  Furthermore, according to FIG. 11, there is a bit pattern with a high error rate expectation value and a bit pattern with a low error rate expectation value, that is, there is a high possibility that the latest bit after the bit pattern appears is erroneous. It can be seen that there are bit patterns and low bit patterns.

  Further, according to FIG. 11, there is no particular relationship between the error rate of the eighth bit of the bit pattern and the possibility of erroneously using the latest bit pattern (error rate expected value).

  In the signal router 45 serving as the transmitting device and the functional block 46 serving as the receiving device, the expected error rate for each bit pattern of the unit bit string has the above-described level (in a biased manner) in the in-casing wireless communication. ), And by converting bit patterns with a high appearance frequency among the bit patterns of the unit bit string to bit patterns with a low error rate expectation value and transmitting them, Generation is easily reduced.

  That is, FIG. 12 shows a configuration example of the transmission processing unit 101 (FIG. 4) of the signal router 45 as a transmission device and the reception processing unit 112 (FIG. 4) of the functional block 46 as a reception device.

  The transmission processing unit 101 includes a data storage unit 151, an expected error rate storage unit 152, an appearance frequency calculation unit 153, a data conversion unit 154, a test pattern generation unit 155, and a data transmission unit 156. It functions as a transmission device that transmits a certain transmission bit string.

  That is, for example, an arrangement of unit bit strings representing pixel values of an image is supplied from the signal processing unit 103 (FIG. 4) to the data storage unit 151 as a transmission bit string.

  The data storage unit 151 stores the transmission bit string supplied thereto in a predetermined unit such as one frame unit.

  The error rate expected value storage unit 152 stores an error rate expected value table in which each bit pattern of the unit bit string is associated with an expected error rate for the bit pattern.

  The appearance frequency calculation unit 153 obtains the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string stored in the data storage unit 151, and the appearance frequency that associates each bit pattern with the appearance frequency of the bit pattern A table is created and supplied to the data converter 154.

  The data conversion unit 154 uses the error rate expected value table stored in the error rate expected value storage unit 152 and the appearance frequency table supplied from the appearance frequency calculation unit 153 to transmit the data stored in the data storage unit 151. The unit bit string constituting the bit string is converted into a converted bit string having the same number of bits N as the unit bit and supplied to the data transmission unit 156.

  That is, the data conversion unit 154 has a value corresponding to the product of the appearance frequency of each bit pattern of the unit bit string and the expected error rate value for each bit pattern of the unit bit string (for example, the appearance frequency and the expected error rate value). Product or a value proportional to the product) is obtained as an expected number of error times, which is an expected value of the number of errors caused by the appearance of each bit pattern (in the bits after the bit pattern) The unit bit string constituting the transmission bit string stored in the data storage unit 151 is converted into the converted bit string so as to reduce the sum of the expected number of errors for each bit pattern of the unit bit string constituting the transmission bit string stored in the unit 151. And is supplied to the data transmission unit 156.

  Here, details of the processing of the data conversion unit 154 will be described later.

  The test pattern generation unit 155 generates a test pattern that is an N-bit bit pattern that can be a unit bit string, and supplies the test pattern to the data transmission unit 156.

  The data transmission unit 156 modulates the converted bit string from the data conversion unit 154 or the test pattern from the test pattern generation unit 155, and transmits a modulation signal obtained by the modulation from the antenna 37a.

  The reception processing unit 112 includes a data reception unit 161, a data inverse conversion unit 162, and an information processing unit 163, and functions as a reception device that receives a bit string (modulated signal) from the transmission processing unit 101.

  That is, the data receiving unit 161 receives the modulated signal transmitted from the transmission processing unit 101 via the antenna 36a, and demodulates it into a baseband signal (received signal). Further, the data reception unit 161 reproduces a converted bit string or a bit string as a test pattern by comparing the received signal with a predetermined threshold, and supplies the converted bit string to the data inverse conversion unit 162 and the information processing unit 163. To do.

  The data inverse conversion unit 162 inversely converts the converted bit string from the data receiving unit 161 into a unit bit string and supplies the unit bit string to the signal processing unit 113 (FIG. 4).

  The information processing unit 163 includes a test pattern generation unit 171, an error rate calculation unit 172, and an error rate expected value calculation unit 173, and an error rate expected value used to convert a unit bit string into a converted bit string is registered. It functions as an information processing device that creates an expected error rate value table.

  That is, the test pattern generation unit 171 generates a test pattern that is an N-bit bit pattern that can be a unit bit string, and supplies the test pattern to the error rate calculation unit 172. Note that the test pattern generation unit 171 generates the same test patterns as the test pattern generation unit 155 of the transmission processing unit 101 in the same order.

  The error rate calculation unit 172 is supplied with a test pattern generated by the test pattern generation unit 171 (hereinafter also referred to as a generation test pattern as appropriate), and a test pattern reproduced by the data reception unit 161, that is, a transmission processing unit. A test pattern (hereinafter, also referred to as a reception test pattern as appropriate) obtained by the data reception unit 161 receiving and reproducing the test pattern transmitted by 101 is supplied.

  The error rate calculation unit 172 compares the generated test pattern from the test pattern generation unit 171 with the reception test pattern from the data reception unit 161, so that the test pattern is transmitted from the transmission processing unit 101 to the reception processing unit 112. When this is done, an error rate at which the Nth bit which is the latest 1 bit of the test pattern is erroneous is obtained, and the error rate of each test pattern is supplied to the error rate expected value calculation unit 173.

  That is, when a certain test pattern generated by the test pattern generation unit 171 is noticed as an attention test pattern, the error rate calculation unit 172 counts an occurrence frequency that is the number of times the test pattern generation unit 171 has generated the attention test pattern. To do.

  Further, the error rate calculation unit 172 compares the target test pattern with the received test pattern corresponding to the target test pattern, and the number of times the latest bit of the received test pattern does not match the Nth bit of the target test pattern. That is, the number of errors that is the number of times the Nth bit is incorrect is counted.

  Then, the error rate calculation unit 172 obtains the division value (quotient) as the error rate of the target test pattern by dividing the number of errors of the target test pattern by the occurrence frequency of the target test pattern.

  The error rate expected value calculation unit 173 calculates an error rate expected value that is an expected value of the error rate for the latest bit of the transmission bit string due to the appearance of the bit pattern for each bit pattern of the unit bit string. An error rate expected value table in which each bit pattern is associated with an expected error rate value for the bit pattern is obtained by using the error rate from the calculation unit 172.

  The expected error rate value table created by the expected error rate value calculation unit 173 is stored in the expected error rate value storage unit 152 of the transmission processing unit 101.

  Next, an outline of wireless communication (in-casing wireless communication) performed between the transmission processing unit 101 and the reception processing unit 112 in FIG. 12 will be described.

  Data exchanged by communication looks random at first glance, but for data such as images, for example, if the unit bit string is a pixel value of one pixel, the appearance frequency of each bit pattern of the unit bit string is biased.

  Further, in in-casing wireless communication, there is a bias in the expected error rate for bit patterns. That is, in the in-casing wireless communication, as described above, there are a bit pattern with a high error rate expectation value and a bit pattern with a low error rate expectation value.

  In in-housing wireless communication performed between the transmission processing unit 101 and the reception processing unit 112, the appearance frequency of the unit bit string (each bit pattern thereof) is biased and the expected error rate is biased Is used to convert the unit bit string into a converted bit string so as to reduce the sum of the expected number of errors for each bit pattern of the unit bit string constituting the transmission bit string, thereby reducing the occurrence of errors.

  Here, FIG. 13 to FIG. 15 show the frequency distribution of each pixel value of a certain image.

  13 to 15, the horizontal axis represents the pixel value, and the vertical axis represents the frequency (appearance frequency).

  In FIGS. 13 to 15, the pixel value is 8 bits (0 to 255).

  FIG. 13 shows the frequency distribution of the Y component of the pixel values represented by YUV, FIG. 14 shows the frequency distribution of the U component, and FIG. 15 shows the frequency distribution of the V component.

  According to FIGS. 13 to 15, it can be seen that the appearance frequency (frequency) of each pixel value is biased.

  Such appearance frequency deviation often exists in various data such as voice and text data in addition to images.

  In in-housing wireless communication performed between the transmission processing unit 101 and the reception processing unit 112, a bit pattern (unit bit string) having a high appearance frequency as a unit bit string of a transmission bit string and a bit pattern having a small error rate expectation value By converting into (conversion bit string), the number of errors occurring in the entire transmission bit string is reduced.

  Next, FIG. 16 is a flowchart for explaining processing (transmission processing) when the transmission processing unit 101 in FIG. 12 performs communication in the normal communication mode.

  Here, communication modes of communication performed by the transmission processing unit 101 and the reception processing unit 112 in FIG. 12 include a normal mode and a learning mode. In the learning mode, the error rate expected value table described above is created, and in the normal mode, communication is performed using the error rate expected value table.

  In the transmission processing in the normal mode, the data storage unit 151 waits for the transmission bit string that is an arrangement of one unit bit string representing the pixel value of the image, for example, to be supplied from the signal processing unit 103 (FIG. 4). In step S11, the transmission bit string for one frame from the signal processing unit 103 is stored, and the process proceeds to step S12.

  In step S12, the appearance frequency calculation unit 153 obtains the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string stored in the data storage unit 151, and associates each bit pattern with the appearance frequency of the bit pattern. Create an attached appearance frequency table. Furthermore, in step S12, the appearance frequency calculation unit 153 supplies the appearance frequency table to the data conversion unit 154, and the process proceeds to step S13.

  In step S13, the data conversion unit 154 and the data transmission unit 156 perform conversion / transmission processing, and the processing proceeds to step S14.

  Here, in the conversion / transmission processing, the data conversion unit 154 uses the error rate expected value table stored in the error rate expected value storage unit 152 and the appearance frequency table supplied from the appearance frequency calculation unit 153, and data For each bit pattern of the unit bit string constituting the transmission bit string stored in the storage unit 151, an expected number of errors is obtained, and the data storage unit 151 is configured to reduce the sum of the expected number of errors for each bit pattern. The unit bit string constituting the stored transmission bit string is converted into a converted bit string and supplied to the data transmission unit 156.

  Then, the data transmission unit 156 modulates the converted bit string from the data conversion unit 154 and transmits a modulation signal obtained by the modulation from the antenna 37a.

  In the conversion / transmission process, all the unit bit strings constituting the transmission bit string stored in the data storage unit 151 are converted into a converted bit string and transmitted.

  In step S14, the data conversion unit 154 initializes (clears) the storage contents of the data storage unit 151, and the process proceeds to step S15.

  In step S15, the data storage unit 151 determines whether a transmission bit string for the next one frame is supplied from the signal processing unit 103 (FIG. 4).

  If it is determined in step S15 that the transmission bit string for the next one frame has been supplied from the signal processing unit 103 to the data storage unit 151, the processing returns to step S11, and the same processing is repeated thereafter.

  In step S15, when it is determined that the transmission bit string for the next one frame has not been supplied from the signal processing unit 103 to the data storage unit 151, the transmission processing unit 101 ends the transmission processing in the normal mode.

  Next, FIG. 17 is a flowchart for explaining processing (reception processing) when the reception processing unit 112 in FIG. 12 performs communication in the normal communication mode.

  In the normal mode reception process, in step S21, the data reception unit 161 and the data reverse conversion unit 162 perform the reception / inverse conversion process, and the normal mode reception process ends.

  Here, in the reception / inverse conversion process, the data receiving unit 161 receives the modulated signal transmitted from the transmission processing unit 101 via the antenna 36a and demodulates the received signal into a baseband received signal. Further, the data reception unit 161 reproduces the converted bit string by comparing the received signal with a predetermined threshold value, and supplies the converted bit string to the data inverse conversion unit 162.

  In the data reverse conversion unit 162, the converted bit string from the data reception unit 161 is reversely converted into a unit bit string and supplied to the signal processing unit 113 (FIG. 4).

  Next, FIG. 18 is a flowchart for explaining processing (transmission processing) when the transmission processing unit 101 in FIG. 12 performs communication in which the communication mode is the learning mode.

  Here, as described above, an error rate expected value table is created in communication in the learning mode. In the learning mode communication, for example, when the power of the signal processing device 31 (FIG. 2) is turned on or in the housing 32 (FIG. 2), the substrates 34 to 37 are removed, and a new substrate is mounted. Error rate of data received by the reception processing unit 112 in communication in the normal mode when a change in the communication environment in the housing 32 occurs, such as the arrangement of the boards 34 to 37 being changed. When the value exceeds a predetermined threshold value, when there is a command from the user, it is performed at other necessary timing.

  In the learning mode transmission process, in step S41, the data transmission unit 156 transmits a test pattern generation command for requesting the generation of the test pattern to the reception processing unit 112 from the antenna 37a. Proceed to

  In step S42, for example, the test pattern generation unit 155 generates an N-bit random number that is the same as the unit bit string using a predetermined value as a seed, and supplies it as a test pattern to the data transmission unit 156 for processing. Advances to step S43.

  Here, the value used as a seed by the test pattern generation unit 155 is included in the test pattern generation command and transmitted to the reception processing unit 112 in step S41 described above. In the reception processing unit 112 (FIG. 12), the test pattern generation unit 171 generates a random number as a test pattern by using the value included in the test pattern generation command as a seed, and thereby the test pattern of the transmission processing unit 101 is generated. Synchronizing with the test pattern generated by the generation unit 155, that is, the same test pattern as that generated by the test pattern generation unit 155 of the transmission processing unit 101 can be obtained in the same order.

  In step S43, the data transmission unit 156 modulates the test pattern from the test pattern generation unit 155, transmits a modulation signal obtained by the modulation from the antenna 37a, and the process proceeds to step S44.

  In step S44, the test pattern generator 155 determines whether or not to end the test pattern generation.

  If it is determined in step S44 that the test pattern generation is not finished, the process returns to step S42, and the same process is repeated thereafter.

  If it is determined in step S44 that the generation of the test pattern is to be terminated, that is, for example, if the test pattern is generated for a sufficient number of times or time for creating the error rate expected value table, the process proceeds to step S45. The data transmission unit 156 transmits a test pattern end command for requesting the end of the generation of the test pattern to the reception processing unit 112 from the antenna 37a, and the transmission processing unit 101 performs the transmission processing in the learning mode. finish.

  Next, FIG. 19 is a flowchart for explaining processing (reception processing) when the reception processing unit 112 in FIG. 12 performs communication in which the communication mode is the learning mode.

  In the learning mode reception process, in step S51, the information processing unit 163 determines whether or not the data reception unit 161 has received the test pattern generation command. If it is determined that the test pattern generation command has not been received, the process proceeds to step S51. Return.

  If it is determined in step S51 that the data reception unit 161 has received the test pattern generation command, that is, the bit string output from the data reception unit 161, that is, the data reception unit 161 transmits from the transmission processing unit 101. When the modulated signal is received, demodulated into a baseband received signal, and a bit string reproduced by comparing the received signal with a predetermined threshold is a test pattern generation command, the process In step S52, the test pattern generation unit 171 generates a random number using the value included in the test pattern generation command as a seed, so that the test pattern generation unit 155 of the transmission processing unit 101 is generated in step S42 of FIG. The same test pattern is generated and the error rate is calculated as the generated test pattern. Supplied to the portion 172.

  Thereafter, after waiting for the transmission of the test pattern (modulated signal) from the transmission processing unit 101, the process proceeds from step S52 to step S53, and the data reception unit 161 receives the test pattern from the transmission processing unit 101. The received test pattern is received and supplied to the error rate calculation unit 172, and the process proceeds to step S54.

  In step S54, the error rate calculation unit 172 compares the generated test pattern from the test pattern generation unit 171 with the reception test pattern from the data reception unit 161, thereby obtaining the latest bit of the test pattern (reception test pattern). It is determined whether or not the Nth bit is incorrect, and the process proceeds to step S55.

  In step S55, the error rate calculation unit 172 updates the appearance frequency and the number of errors for the generated test pattern from the test pattern generation unit 171, and the process proceeds to step S56.

  That is, in step S55, the error rate calculation unit 172 increments a variable representing the appearance frequency by 1 for the generated test pattern from the test pattern generation unit 171. Furthermore, in step S55, the error rate calculation unit 172 determines the generated test pattern from the test pattern generation unit 171 when the error determination result in the previous step S54 indicates that the Nth bit is incorrect. The variable representing the number of errors is incremented by 1.

  Note that the variable representing the appearance frequency and the variable representing the number of errors are initialized (set to 0) when the reception processing in the learning mode is started.

  In step S56, the information processing unit 163 determines whether or not the data reception unit 161 has received the test pattern end command, and if it is determined that the data reception unit 161 has not received the test pattern, the process returns to step S52.

  In step S56, when it is determined that the data reception unit 161 has received the test pattern end command, that is, the bit string output from the data reception unit 161, that is, the data reception unit 161 transmits from the transmission processing unit 101. When the modulated signal is received, demodulated into a baseband received signal, and the bit string reproduced by comparing the received signal with a predetermined threshold is a test pattern end command, the process In S57, the information processing unit 163 performs an error rate expected value calculation process for creating an error rate expected value table, and the reception processing unit 112 ends the learning mode reception process.

  In the learning mode, the expected error rate value table created by the reception processing unit 112 of the functional block 46 is transmitted from the functional block 46 to the signal router 45 by, for example, low-speed wireless communication or wired communication. In the transmission processing unit 101 of the signal router 45, it is stored in the error rate expected value storage unit 152. In the transmission processing unit 101, the error rate expected value table stored in the error rate expected value storage unit 152 is used for normal mode communication with the reception processing unit 112 of the functional block 46.

  The communication in the learning mode includes the transmission processing unit 101 of the signal router 45 (FIG. 4) and the reception processing unit 112 of the functional block 46, the transmission processing unit 111 of the functional block 46, and the reception processing unit of the signal router 45. The reception processing unit 102 creates an error rate expected value table. The expected error rate table created in the reception processing unit 102 of the signal router 45 is transmitted to the functional block 46, and the normal mode between the transmission processing unit 111 of the functional block 46 and the reception processing unit 102 of the signal router 45 is transmitted. Used for communication.

  Next, the error rate expected value calculation process performed in step S57 of FIG. 19 will be described with reference to FIG.

  In the error rate expected value calculation process, in step S71, the error rate calculation unit 172 (FIG. 12) divides, for the unit bit string of each bit pattern, the number of errors of the test pattern that matches the bit pattern by the appearance frequency. Thus, the division value is obtained as an error rate (of the Nth bit), supplied to the error rate expected value calculation unit 173, and the process proceeds to step S72.

  In step S72, the error rate expectation value calculation unit 173 selects one bit pattern that is not the target bit string from among bit patterns that can be unit bit strings of N bits, and the process is as follows. Proceed to step S73.

  In step S73, the error rate expected value calculation unit 173 initializes an extracted bit number (a variable representing i), which is the number of bits extracted from the bit string of interest, to 0, and also relates to the bit string of interest (as a bit pattern). The error rate expected value (a variable representing) E is initialized to 0, and the process proceeds to step S74.

  In step S74, the error rate expectation value calculation unit 173 extracts the latest Ni bits (N−i + 1 to Nth bits) out of the N bits of the bit string of interest, By adding an i-bit indefinite value, the N-bit expected value calculation target bit string described in FIG. 10 is formed, and the process proceeds to step S75.

  In step S75, the error rate expected value calculation unit 173 determines an error rate expected value in which the latest bit of the expected value calculation target bit string is incorrect (an error rate in which the latest bit is incorrect when only the expected value calculation target bit string is transmitted). The expected value) EE is obtained as described with reference to FIG. 10 using the error rate of the expected value calculation target bit string among the error rates from the error rate calculation unit 172, and the process proceeds to step S76.

  In step S76, the expected error rate value calculation unit 173 calculates the expected error rate value E for the target bit string and the expected error rate value EE in which the latest bit of the expected value calculation target bit string obtained in the previous step S75 is erroneous. And the process proceeds to step S77 with the result of the addition as the expected error rate value E for the target bit string.

  In step S77, the error rate expected value calculation unit 173 determines whether or not the number of extracted bits i is equal to the affected bit length L described in FIG.

  If it is determined in step S77 that the extracted bit number i is not equal to the affected bit length L, that is, if the extracted bit number i is less than the affected bit length L, the process proceeds to step S78 and the error rate is increased. The expected value calculation unit 173 increments the number of extracted bits i by 1.

  Then, the process returns from step S78 to step S74. Hereinafter, the processes of steps S74 to S78 are repeated until it is determined in step S77 that the extracted bit number i is equal to the affected bit length L.

As described above, by repeating the processes of steps S74 to S78, as described with reference to FIG. 10, the error rate expected value EE _{i in} which the latest bit of the expected value calculation target bit string is erroneous is integrated, and the target bit string appears. Thereafter, due to the appearance of the bit sequence of interest, an expected error rate E for the bit sequence of interest in which the latest bit of the transmission bit sequence is incorrect is obtained.

  On the other hand, when it is determined in step S77 that the number of extracted bits i is equal to the affected bit length L, that is, when the error rate expected value E for the target bit string is obtained, the process proceeds to step S79, and an error occurs. The rate expected value calculation unit 173 registers the attention bit string and the error rate expectation value E for the attention bit string in association with each other in the error rate expectation value table.

  Then, the process proceeds from step S79 to step S80, and the error rate expected value calculation unit 173 determines whether or not all bit patterns that can be an N-bit unit bit string are the target bit strings.

  In step S80, when it is determined that there is a bit pattern that can be an N-bit unit bit string that has not yet been set as the target bit string, the process returns to step S72, and a bit that can be an N-bit unit bit string. Of the patterns, one of the bit patterns that are not the target bit string is newly selected as the target bit string, and the same processing is repeated thereafter.

  If it is determined in step S80 that all bit patterns that can be an N-bit unit bit string are the target bit strings, the process returns.

  Next, details of the conversion of the unit bit string into the converted bit string (and the inverse conversion of the converted bit string into the unit bit string in the data inverse converting unit 162 in FIG. 12) in the data converting unit 154 in FIG. explain.

  When a unit bit string having a predetermined bit pattern appears in a transmission bit string, an error rate expectation value (predetermined by the latest bit of the transmission bit string appearing later due to the appearance of the unit bit string of the predetermined bit pattern) The expected error rate for the unit bit string of the bit pattern of (1) appears when the unit bit string appears in the transmitted bit string, and the error rate expected value that the latest bit (Nth bit) of the unit bit string is incorrect is followed by This is the sum of the error rate expectation value that the latest bit is wrong.

  The expected number of errors, which is the expected number of errors that cause an error due to the appearance of a predetermined bit pattern, is an error rate expected value for a unit bit string of a predetermined bit pattern and a predetermined bit in a transmission bit string. It is represented by the product (value corresponding to) the appearance frequency of the unit bit string of the pattern.

  The data conversion unit 154 converts the unit bit string into a converted bit string so that the sum of the expected number of error times for each bit pattern of the unit bit string (converted converted bit string) constituting the transmission bit string is as small as possible. The number of errors (number of bits) occurring in the transmission bit string is reduced.

  In the data conversion unit 154, as a conversion method for converting an N-bit unit bit string into an N-bit converted bit string, each bit pattern of the unit bit string is individually associated with a converted bit string (its bit pattern). A first conversion method for converting a unit bit string into a converted bit string in accordance with the association, and a second conversion method for converting a unit bit string into a converted bit string uniformly according to a certain rule, that is, each bit of the unit bit string There is a second conversion method for converting a pattern into a converted bit string of a bit pattern obtained by performing the same bit operation on the bit pattern.

  First, the first conversion method will be described.

  FIG. 21 shows a configuration example of the data converter 154 of FIG. 12 that converts a unit bit string into a converted bit string by the first conversion method.

  In FIG. 21, the data conversion unit 154 includes a conversion table creation unit 201 and a conversion unit 202.

  The conversion table creation unit 201 uses the error rate table stored in the error rate expected value storage unit 152 (FIG. 12) and the appearance frequency table supplied from the appearance frequency calculation unit 153 (FIG. 12) to generate a data storage unit. 151 (FIG. 12), a bit pattern with a higher appearance frequency (unit bit string) is a pre-conversion bit pattern before conversion, and a bit pattern with a smaller error rate expectation value. As a post-conversion bit pattern after conversion, a conversion table in which the pre-conversion bit pattern and the post-conversion bit pattern are associated with each other is created and supplied to the conversion unit 202.

  In accordance with the conversion table from the conversion table creation unit 201, the conversion unit 202 converts the unit bit string constituting the transmission bit string stored in the data storage unit 151 to the conversion corresponding to the pre-conversion bit pattern that matches the unit bit string. The data is converted into a later bit pattern and output to the data transmission unit 156 (FIG. 12) as a converted bit string.

  Next, the conversion / transmission process performed in step S13 of FIG. 15 when the data conversion unit 154 is configured as shown in FIG. 21 will be described with reference to FIG.

  In the conversion / transmission process, first, in step S91, the conversion table creation unit 201 includes an error rate table stored in the error rate expected value storage unit 152, and an appearance frequency table supplied from the appearance frequency calculation unit 153. Is used to perform a conversion table creation process for creating a conversion table, the conversion table obtained as a result is supplied to the conversion unit 202, and the process proceeds to step S92.

  In step S92, the conversion unit 202 reads a unit bit string that has not yet been transmitted (hereinafter also referred to as an untransmitted bit string) from the unit bit strings that constitute the transmission bit string stored in the data storage unit 151 (FIG. 12). The untransmitted bit string is converted into a converted bit string in accordance with the conversion table from the conversion table creating unit 201 and supplied to the data transmitting unit 156.

  Thereafter, the process proceeds from step S92 to step S93, where the data transmission unit 156 modulates the converted bit string from the data conversion unit 154, transmits a modulation signal obtained by the modulation from the antenna 37a, Proceed to step S94.

  In step S94, the conversion unit 202 determines whether or not an untransmitted bit string is stored in the data storage unit 151 (FIG. 12).

  If it is determined in step S94 that an untransmitted bit string is stored in the data storage unit 151, the process returns to step S92, and thereafter the same process is repeated.

  If it is determined in step S94 that no untransmitted bit string is stored in the data storage unit 151, that is, if transmission of all the transmission bit strings stored in the data storage unit 151 is completed, the process returns. .

  Next, the conversion table creation process performed by the conversion table creation unit 201 (FIG. 21) in step S91 of FIG. 22 will be described with reference to FIG.

  In the conversion table creation process, the conversion table creation unit 201 updates the appearance frequency of the post-conversion bit pattern to the appearance frequency of the pre-conversion bit pattern, and sets the appearance frequency and the expected error rate for the post-conversion bit pattern. Until the sum of the expected number of errors corresponding to the product is minimized, the conversion is performed by repeatedly associating the pre-conversion bit pattern with a higher appearance frequency with the post-conversion bit pattern with a smaller error rate expected value. Create a table.

  That is, in the conversion table creation process, in step S101, the conversion table creation unit 201 acquires the error rate expected value table from the error rate expected value storage unit 152 (FIG. 12) and is supplied from the appearance frequency calculation unit 153. The appearance frequency table is acquired, and the process proceeds to step S102.

  In step S102, the conversion table creating unit 201 performs entries (records) in the error rate expected value table in which bit patterns and error rate expected values for the bit patterns are associated in ascending order of error rate expected values. In addition to sorting, the entries in the appearance frequency table in which the bit pattern and the appearance frequency of the bit pattern are associated are sorted in descending order of appearance frequency, and the process proceeds to step S103.

  Here, with regard to the error rate expected value table and the appearance frequency table, the higher the order, the higher the order after sorting (previous) (bit pattern, error rate expected value, appearance frequency).

  In the error rate expectation value table, for bit patterns having the same error rate expectation value, for example, a bit pattern having a lower appearance frequency has a higher rank.

  In the appearance frequency table, for bit patterns having the same appearance frequency, for example, a bit pattern having a smaller expected error rate has a higher rank.

  In step S103, the conversion table creation unit 201 creates a conversion table in which each bit pattern that can be a unit bit string is directly associated as a pre-conversion bit pattern and a post-conversion bit pattern.

  Here, if the unit bit string is converted into a converted bit string using the conversion table created in step S103, the converted bit string matches the unit bit string, and therefore the unit bit string is not substantially converted. .

  In step S103, the conversion table creation unit 201 further obtains the sum of the expected number of error times of the converted bit pattern as the sum of the expected worst number of error times described later for the conversion table.

  That is, the conversion table creation unit 201 calculates the product of the error rate expected value of the converted bit pattern of the conversion table and the appearance frequency, and the expected number of errors for the converted bit pattern, that is, the converted bit pattern is After the appearance, it is obtained as an expected value of the number of errors in which an error occurs in the latest bit of the transmission bit string.

  Then, the conversion table creation unit 201 adds up the expected number of error times for all the converted bit patterns of the conversion table to obtain the sum of the expected number of error times, and calculates the sum of the expected number of error times for the conversion table. Is the sum of the expected number of worst errors.

  Thereafter, the process proceeds from step S103 to step S104, and the conversion table creation unit 201 minimizes the expected error rate from the bit patterns that can be unit bit strings that have not yet been set as the target bit string (error rate). A bit pattern (hereinafter also referred to as the minimum error rate expected value bit pattern) having the highest expected value order and a bit pattern having the maximum appearance frequency (first appearance frequency order) (hereinafter, the highest appearance frequency). (Also referred to as a bit pattern) is selected as the target bit string, and the process proceeds to step S105.

  In step S105, the conversion table creation unit 201 determines whether the expected error rate value of the minimum expected error rate bit pattern is equal to or higher than the expected error rate value of the maximum appearance frequency bit pattern.

  If it is determined in step S105 that the minimum error rate expected value bit pattern error rate expected value is equal to or greater than the maximum appearance frequency bit pattern error rate expected value, that is, the minimum error rate expected value bit pattern error rate expected Even if the value is equal to or greater than the expected error rate value of the maximum appearance frequency bit pattern and the unit bit string of the maximum appearance frequency bit pattern is converted into the converted bit string of the minimum expected error rate bit pattern in step S106 described later, If it is not possible to expect a decrease in the number of errors that occur in the bit string, the process returns to step S104, and the same process is repeated thereafter.

  Here, when the error rate expectation value of the minimum error rate expected value bit pattern is equal to or greater than the error rate expectation value of the maximum appearance frequency bit pattern, and as described above, when returning from step S105 to step S104, the minimum error rate expectation value The bit pattern is excluded from the bit pattern set as the target bit string. Therefore, when returning from step S105 to step S104, the bit pattern selected as the minimum error rate expected value bit pattern immediately before is selected again as the minimum error rate expected value bit pattern in step S104.

  On the other hand, if it is determined in step S105 that the error rate expectation value of the minimum error rate expected value bit pattern is not equal to or greater than the error rate expectation value of the maximum appearance frequency bit pattern, that is, the minimum error rate expectation value bit pattern is more The expected error rate value is smaller than the maximum appearance frequency bit pattern. Therefore, the maximum appearance frequency bit pattern is used as a pre-conversion bit pattern, and the minimum error rate expected value bit pattern is registered in the conversion table as a post-conversion bit pattern. If the unit bit string of the maximum appearance frequency bit pattern is converted to the converted bit string of the minimum expected error rate bit pattern according to the conversion table, a reduction in the number of errors of errors occurring in the transmission bit string can be expected. The process proceeds to step S106, and the conversion table creation unit 201 is processed. A temporary pattern in which the maximum appearance frequency bit pattern is used as a pre-conversion bit pattern, and the minimum error rate expected value bit pattern is used as a post-conversion bit pattern. A temporary table, which is a conversion table, is created, and the process proceeds to step S107.

  In other words, in step S106, the conversion table creation unit 201 copies the (current) conversion table into a temporary table, and sets the minimum error in the pre-conversion bit pattern that is the maximum appearance frequency bit pattern in the temporary table. The rate expected value bit pattern is associated with the converted bit pattern, and the maximum appearance frequency bit pattern is associated with the pre-conversion bit pattern that is the minimum error rate expected value bit pattern as the converted bit pattern.

  Further, in step S106, the conversion table creation unit 201 sets (updates) the appearance frequency of the post-conversion bit pattern in the temporary table as the appearance frequency of the pre-conversion bit pattern associated with the post-conversion bit pattern.

  In step S107, the conversion table creation unit 201 obtains the sum of the worst-case expected number of times of the converted bit pattern for the temporary table, and the process proceeds to step S108.

  That is, the conversion table creation unit 201 calculates the product of the error rate expected value of the converted bit pattern of the temporary table and the appearance frequency, and the expected number of errors for the converted bit pattern, that is, the converted bit pattern is After the appearance, it is obtained as an expected value of the number of errors in which an error occurs in the latest bit of the transmission bit string.

  Furthermore, the conversion table creation unit 201 obtains, as the worst error count expected value, a value obtained by multiplying the expected error count by N for each converted bit pattern of the temporary table.

  Here, in the first conversion method, as described with reference to FIG. 22, in the conversion / transmission processing performed by the transmission processing unit 101 (FIG. 12), the N-bit unit bit string is converted to N-bit according to the conversion table. Since it is converted into a bit string and transmitted, in the reception processing unit 112, the conversion bit string from the transmission processing unit 101 is inversely converted into a unit bit string according to the conversion table, as will be described later.

  In the inverse conversion of the conversion bit string according to the conversion table, if even one bit of the conversion bit string is incorrect, the unit bit string obtained by reverse conversion of the conversion bit string may be erroneous, and the conversion bit string If one bit is wrong, it is equivalent to two or more bits in the converted bit string being wrong.

  In other words, when a correct unit bit string cannot be obtained due to an error in the converted bit string, that is, when the unit bit string is incorrect, the error may be caused by the fact that only one bit of the converted bit string is incorrect. There is also a possibility that all N bits of the conversion bit string are wrong.

  The expected number of worst errors is the maximum value of the number of bits that cause an error in the converted bit string when the unit bit string is incorrect due to an error in the converted bit string, that is, the worst N bit error occurs. This is a value that takes into account the expected number of errors, and is obtained by multiplying the expected number of errors by N.

  When the conversion table creation unit 201 calculates the worst-case error count expectation value, the conversion table creation unit 201 calculates the sum of the worst-case error count expectation values for the temporary table by accumulating the worst-error count expected values for all the converted bit patterns of the temporary table. .

  In step S108, the conversion table creation unit 201 determines whether or not the sum of the worst error count expectation values for the temporary table is smaller than the sum of the worst error count expectation values for the conversion table.

  If it is determined in step S108 that the sum of the worst error count expected value for the temporary table is smaller than the sum of the worst error count expected value for the conversion table, that is, the conversion obtained by converting the unit bit string according to the temporary table Expecting that the number of error errors occurring in the bit string will be less than the number of error errors occurring in the conversion bit string obtained by converting the unit bit string according to the current conversion table (current conversion table). If it is possible, the process proceeds to step S109, and the conversion table creation unit 201 updates the conversion table using the temporary table as the conversion table.

  Thereafter, the process returns from step S109 to step S104, and the conversion table creation unit 201 selects the minimum error rate expected value bit pattern and the maximum appearance frequency from among the bit patterns that can be unit bit strings that have not yet been set as the target bit string. A bit pattern is newly selected as the target bit string, and the same processing is repeated thereafter.

  On the other hand, if it is determined in step S108 that the sum of the worst error count expected value for the temporary table is not smaller than the sum of the worst error count expected value for the conversion table, that is, the unit bit string is converted according to the temporary table. If it is not possible to expect that the number of error errors occurring in the resulting converted bit string will be less than the number of error errors occurring in the converted bit string obtained by converting the unit bit string according to the current conversion table, The process proceeds to step S110.

  In addition, although not shown in FIG. 23, in step S104, there is no bit pattern that can be a unit bit string that is not a target bit string, that is, all bit patterns that can be unit bit strings are a target bit string. However, the process proceeds from step S104 to step S110.

  In step S110, the conversion table creation unit 201 supplies the current conversion table (the conversion table created in step S103 or the latest conversion table updated in step S109) to the conversion unit 202.

  Further, in step S110, the conversion table creation unit 201 supplies the current conversion table to the data transmission unit 156 (FIG. 12) via the conversion unit 202, and transmits the data to the reception processing unit 112. Return.

  Note that the transmission of the conversion table to the reception processing unit 112 is performed by low-rate wireless communication or wired communication in order to perform reliably. Further, the conversion table 202 does not convert the conversion table.

  Next, the conversion table creation processing will be further described with reference to FIGS.

  Here, the unit bit string is assumed to be 4 bits.

FIG. 24 shows a bit pattern of each bit pattern 16 (= 2 ⁴ ) pattern of a 4-bit unit bit string constituting a certain transmission bit string, and an expected error rate, appearance frequency, and expected number of errors for the bit pattern. An example is shown.

  As described above, the expected number of errors is the product of the expected error rate and the appearance frequency.

  In FIG. 24, the sum of the expected number of errors is 149.40, and initially, 149.40 is the sum of the worst expected number of errors for the current conversion table.

  In the conversion table creation process, as described with reference to FIG. 23, the conversion table in which each bit pattern that can be a unit bit string is directly associated with the pre-conversion bit pattern and the post-conversion bit pattern is, so to speak, a conversion table. Created as an initial value.

  Further, in the conversion table creation process, the bit rate “0000” to “1111” that can be a unit bit string, among those not yet set as the target bit string, includes the minimum error rate expected value bit pattern and the maximum appearance frequency bit pattern. If the error rate expected value of the minimum error rate expected value bit pattern is smaller than the error rate expected value of the maximum appearance frequency bit pattern, a copy of the current conversion table is used as the temporary table. In the table, the pre-conversion bit pattern that is the maximum appearance frequency bit pattern is associated with the minimum error rate expected value bit pattern as the post-conversion bit pattern, and the pre-conversion bit pattern that is the minimum error rate expected value bit pattern The maximum appearance frequency bit pattern is converted to the converted bit pattern. To associate with.

  Then, the appearance frequency of the post-conversion bit pattern in the temporary table is updated to the appearance frequency of the pre-conversion bit pattern associated with the post-conversion bit pattern, and the above processing minimizes the sum of the worst expected number of errors. Repeat until.

  In FIG. 24, a bit pattern “1111” with an expected error rate value of 0.00 is a minimum expected error rate value bit pattern, and a bit pattern “0110” with an appearance frequency of 1000 is a maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “1111” is 0.00, and the expected error rate value of the maximum appearance frequency bit pattern “0110” is 0.03. Therefore, the expected minimum error rate bit pattern “1111” The expected error rate value is smaller than the expected error rate value of the maximum appearance frequency bit pattern “0110”, and the pre-conversion bit pattern “0110” that is the maximum appearance frequency bit pattern in the temporary table has the minimum error rate. The expected value bit pattern "1111" is associated with the post-conversion bit pattern, and the maximum appearance frequency bit pattern "0110" is converted to the pre-conversion bit pattern "1111", which is the minimum error rate expected value bit pattern. Corresponding as a later bit pattern.

  FIG. 25 shows a temporary table after the above association is performed.

  Here, in FIG. 25 (the same applies to FIGS. 26 to 31 described later), for convenience of explanation, in addition to the pre-conversion bit pattern and the post-conversion bit pattern, the expected error rate, appearance frequency, and expected error rate. The expected number of errors and the worst number of expected errors are also shown in the figure.

  Note that the worst expected number of errors is a value obtained by multiplying the expected number of errors by four times the number of bits of the unit bit string (conversion bit string).

  Further, in FIG. 25, “expected error rate value” is an expected error rate value for the post-conversion bit pattern when the pre-conversion bit pattern is converted to the post-conversion bit pattern. For a bit pattern that is not the target bit string, the pre-conversion bit pattern and the post-conversion bit pattern match, so the “error rate expectation value” is also the error rate expectation value for the pre-conversion bit pattern.

  Furthermore, in FIG. 25, “appearance frequency” is the appearance frequency of the post-conversion bit pattern when the pre-conversion bit pattern is converted into the post-conversion bit pattern, and is equal to the appearance frequency of the pre-conversion bit pattern.

  For the temporary table of FIG. 25, the sum of the worst error count expectation value is 120.0, which is smaller than 149.40 (FIG. 24), which is the sum of the worst error count expectation values for the current conversion table described above. The conversion table is updated to the temporary table of FIG.

  Then, among the bit patterns “0000” to “1111” that can be unit bit strings, the bit pattern “0000” to “1111” that has not yet been set as the target bit string (bit pattern not hatched in FIG. 25) If the maximum appearance frequency bit pattern is selected as the target bit string and the error rate expected value of the minimum error rate expected value bit pattern is smaller than the error rate expected value of the maximum appearance frequency bit pattern, the current conversion table, In this case, a copy of the conversion table in FIG. 25 is used as a temporary table, and the minimum error rate expected value bit pattern is converted into a bit after conversion into the pre-conversion bit pattern that is the maximum appearance frequency bit pattern in the temporary table. A variable that is mapped as a pattern and has the minimum expected bit rate bit pattern Before bit pattern, the maximum frequency bit pattern, associated as converted bit pattern.

  In the conversion table of FIG. 25, since bit patterns “0110” and “1111” are already considered bit strings of interest, bit patterns “0110” and “0110” out of bit patterns “0000” to “1111” that can be unit bit strings. Among “1111”, the minimum expected error rate bit pattern and the maximum appearance frequency bit pattern are selected as the target bit string.

  That is, in FIG. 25, a bit pattern “0000” with an expected error rate of 0.00 is the minimum expected error rate bit pattern, and a bit pattern “1101” with an appearance frequency of 890 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “0000” is 0.00, and the expected error rate value of the maximum appearance frequency bit pattern “1101” is 0.03. Therefore, the expected minimum error rate bit pattern “0000” The expected error rate value is smaller than the expected error rate value of the maximum appearance frequency bit pattern “1101”, and the pre-conversion bit pattern “1101” that is the maximum appearance frequency bit pattern in the temporary table has the minimum error rate. The expected value bit pattern “0000” is associated with the post-conversion bit pattern, and the maximum appearance frequency bit pattern “1101” is converted to the pre-conversion bit pattern “0000” which is the minimum error rate expected value bit pattern. Corresponding as a later bit pattern.

  FIG. 26 shows a temporary table after the above association is performed.

  For the temporary table in FIG. 26, the sum of the worst error count expectation values is 96.9, which is smaller than 120.0, which is the sum of the worst error count expectation values for the current conversion table (FIG. 25) described above. The conversion table is updated to the temporary table of FIG.

  Then, among the bit patterns “0000” to “1111” that can be unit bit strings, the bit pattern “0000” to “1111” that has not yet been set as the target bit string (the bit pattern that is not hatched in FIG. 26) If the maximum appearance frequency bit pattern is selected as the target bit string and the error rate expected value of the minimum error rate expected value bit pattern is smaller than the error rate expected value of the maximum appearance frequency bit pattern, the current conversion table, In this case, a copy of the conversion table of FIG. 26 is used as a temporary table, and the minimum error rate expected value bit pattern is converted into a bit after conversion in the pre-conversion bit pattern that is the maximum appearance frequency bit pattern in the temporary table. A variable that is mapped as a pattern and has the minimum expected bit rate bit pattern Before bit pattern, the maximum frequency bit pattern, associated as converted bit pattern.

  In the conversion table of FIG. 26, the bit patterns “0000”, “0110”, “1101”, and “1111” have already been set as the target bit strings, and therefore the bit patterns “0000” to “1111” that can be unit bit strings. Among these, except for the bit patterns “0000”, “0110”, “1101”, and “1111”, the minimum error rate expected value bit pattern and the maximum appearance frequency bit pattern are selected as the target bit string.

  That is, in FIG. 26, the bit pattern “0101” with an expected error rate of 0.01 is the minimum expected bit rate bit pattern, and the bit pattern “1000” with an appearance frequency of 360 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “0101” is 0.01, and the expected error rate value of the maximum appearance frequency bit pattern “1000” is 0.07. Therefore, the expected minimum error rate bit pattern “0101” The expected error rate is smaller than the expected error rate of the maximum appearance frequency bit pattern “1000”, and the minimum error rate is set to the pre-conversion bit pattern “1000” that is the maximum appearance frequency bit pattern in the temporary table. The expected value bit pattern “0101” is associated with the post-conversion bit pattern, and the maximum appearance frequency bit pattern “1000” is converted to the pre-conversion bit pattern “0101” that is the minimum error rate expected value bit pattern. Corresponding as a later bit pattern.

  FIG. 27 shows a temporary table after the above association is performed.

  In the temporary table of FIG. 27, the sum of the worst error count expectation values is 88.8, which is smaller than 96.9, which is the sum of the worst error count expectation values for the current conversion table (FIG. 26) described above. The conversion table is updated to the temporary table of FIG.

  Then, among the bit patterns “0000” to “1111” that can be unit bit strings, the bit pattern “0000” to “1111” that has not yet been set as the target bit string (the bit pattern not hatched in FIG. 27) If the maximum appearance frequency bit pattern is selected as the target bit string and the error rate expected value of the minimum error rate expected value bit pattern is smaller than the error rate expected value of the maximum appearance frequency bit pattern, the current conversion table, In this case, a copy of the conversion table in FIG. 27 is used as a temporary table, and the minimum error rate expected value bit pattern is converted into a bit after conversion in the pre-conversion bit pattern that is the maximum appearance frequency bit pattern in the temporary table. A variable that is mapped as a pattern and has the minimum expected bit rate bit pattern Before bit pattern, the maximum frequency bit pattern, associated as converted bit pattern.

  In the conversion table of FIG. 27, the bit patterns “0000”, “0101”, “0110”, “1000”, “1101”, and “1111” are already the bit strings of interest, so the bit patterns that can be unit bit strings Bit pattern "0000", "0101", "0110", "1000", "1101", and "1111" out of "0000" to "1111", and the expected minimum error rate bit pattern Then, the maximum appearance frequency bit pattern is selected as the target bit string.

  That is, in FIG. 27, the bit pattern “1110” with an expected error rate of 0.01 is the minimum expected error rate bit pattern, and the bit pattern “1010” with an appearance frequency of 350 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “1110” is 0.01, and the expected error rate value of the maximum appearance frequency bit pattern “1010” is also 0.01, so that the expected minimum error rate bit pattern “1110” Since the expected error rate value is not smaller than the expected error rate value of the maximum appearance frequency bit pattern “1010”, the conversion table remains as in FIG. 27 and is not updated.

  Further, in this case, as described with reference to FIG. 23, the minimum error rate expected value bit pattern “1110” is excluded from the bit string set as the target bit string and is selected again as the minimum error rate expected value bit pattern.

  In other words, in this case, the bit patterns “0000”, “0101”, “0110”, “1000”, “1010”, “1101”, and “1111” are already the target bit strings, and thus become unit bit strings. Of the obtained bit patterns "0000" to "1111", except for bit patterns "0000", "0101", "0110", "1000", "1010", "1101", and "1111" The minimum error rate expected value bit pattern and the maximum appearance frequency bit pattern are selected as the target bit string.

  In FIG. 27, the bit pattern “1110” with an expected error rate of 0.01 is the minimum expected error rate bit pattern, and the bit pattern “0011” with an appearance frequency of 300 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “1110” is 0.01, and the expected error rate value of the maximum appearance frequency bit pattern “0011” is also 0.01, so that the expected minimum error rate bit pattern “1110” Since the expected error rate value is not smaller than the expected error rate value of the maximum appearance frequency bit pattern “0011”, the conversion table remains as in FIG. 27 and is not updated. Furthermore, the minimum error rate expected value bit pattern “1110” is excluded from the bit string that is the target bit string, and is selected again as the minimum error rate expected value bit pattern.

  In other words, in this case, the bit patterns “0000”, “0011”, “0101”, “0110”, “1000”, “1010”, “1101”, and “1111” are already the bit strings of interest. Bit patterns "0000", "0011", "0101", "0110", "1000", "1010", "1101", and "of bit patterns" 0000 "to" 1111 "that can be unit bit strings Among 1111 ", the minimum error rate expected value bit pattern and the maximum appearance frequency bit pattern are selected as the target bit string.

  In FIG. 27, the bit pattern “1110” with an expected error rate of 0.01 is the minimum expected error rate bit pattern, and the bit pattern “1011” with an appearance frequency of 240 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “1110” is 0.01, and the expected error rate value of the maximum appearance frequency bit pattern “1011” is also 0.01, so that the expected minimum error rate bit pattern “1110” Since the expected error rate value is not smaller than the expected error rate value of the maximum appearance frequency bit pattern “1011”, the conversion table remains as in FIG. 27 and is not updated. Furthermore, the minimum error rate expected value bit pattern “1110” is excluded from the bit string that is the target bit string, and is selected again as the minimum error rate expected value bit pattern.

  Here, FIG. 28 shows the conversion table after the bit patterns “1010”, “0011”, and “1011” are sequentially selected as the maximum appearance frequency bit pattern as described above. Show.

  When each of the bit patterns “1010”, “0011”, and “1011” is selected as the maximum appearance frequency bit pattern, the conversion table is not updated as described above. This is the same as the conversion table of FIG.

  In FIG. 28, bit patterns “0000”, “0011”, “0101”, “0110”, “1000”, “1010”, “1011”, “1101”, and “1111” have already been set as the target bit strings. Therefore, the bit patterns “0000”, “0011”, “0101”, “0110”, “1000”, “1010”, “1011”, among the bit patterns “0000” to “1111” that can be a unit bit string, Among “1101” and “1111”, the minimum error rate expected value bit pattern and the maximum appearance frequency bit pattern are selected as the target bit string.

  That is, in FIG. 28, the bit pattern “1110” with an expected error rate value of 0.01 is the minimum expected error rate bit pattern, and the bit pattern “1001” with an appearance frequency of 180 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern “1110” is 0.01, and the expected error rate value of the maximum appearance frequency bit pattern “1001” is 0.12, so the expected minimum error rate bit pattern “1110” The expected error rate is smaller than the expected error rate of the maximum appearance frequency bit pattern “1001”, and the minimum error rate is set to the pre-conversion bit pattern “1001” that is the maximum appearance frequency bit pattern in the temporary table. The expected value bit pattern “1110” is associated with the post-conversion bit pattern, and the maximum appearance frequency bit pattern “1001” is converted to the pre-conversion bit pattern “1110” that is the minimum expected error rate bit pattern. Corresponding as a later bit pattern.

  FIG. 29 shows a temporary table after the above association is performed.

  In the temporary table of FIG. 29, the total sum of the worst expected number of errors is 88.5. From the above-mentioned 88.8 which is the sum of the expected worst number of errors for the current conversion table (FIGS. 27 and 28). Since it is small, the conversion table is updated to the temporary table of FIG.

  Then, among the bit patterns “0000” to “1111” that can be a unit bit string, the bit pattern “0000” to “1111” that has not yet been set as the target bit string (the bit pattern not hatched in FIG. 29) If the maximum appearance frequency bit pattern is selected as the target bit string and the error rate expected value of the minimum error rate expected value bit pattern is smaller than the error rate expected value of the maximum appearance frequency bit pattern, the current conversion table, In this case, a copy of the conversion table in FIG. 29 is used as a temporary table, and the minimum error rate expected value bit pattern is converted into a bit after conversion into the pre-conversion bit pattern that is the maximum appearance frequency bit pattern in the temporary table. A variable that is mapped as a pattern and has the minimum expected bit rate bit pattern Before bit pattern, the maximum frequency bit pattern, associated as converted bit pattern.

  In the conversion table of FIG. 29, the bit patterns “0000”, “0011”, “0101”, “0110”, “1000”, “1001”, “1010”, “1011”, “1101”, “1110”, and Since “1111” is already the target bit string, the bit patterns “0000”, “0011”, “0101”, “0110”, “of the bit patterns“ 0000 ”to“ 1111 ”that can be unit bit strings With the exception of 1000 "," 1001 "," 1010 "," 1011 "," 1101 "," 1110 ", and" 1111 ", attention is paid to the minimum expected error rate bit pattern and the maximum appearance frequency bit pattern. Selected as a bit string.

  That is, in FIG. 29, the bit pattern “1100” with an expected error rate value of 0.02 is the minimum expected error rate bit pattern, and the bit pattern “0010” with an appearance frequency of 150 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum error rate expected value bit pattern “1100” is 0.02, and the expected error rate value of the maximum appearance frequency bit pattern “0010” is 0.20. Therefore, the expected minimum error rate bit pattern “1100” The expected error rate value is smaller than the expected error rate value of the maximum appearance frequency bit pattern “0010”, and the pre-conversion bit pattern “0010” that is the maximum appearance frequency bit pattern in the temporary table has the minimum error rate. The expected value bit pattern “1100” is associated with the post-conversion bit pattern, and the maximum appearance frequency bit pattern “0010” is converted into the pre-conversion bit pattern “1100” that is the minimum error rate expected value bit pattern. Corresponding as a later bit pattern.

  FIG. 30 shows a temporary table after the above association is performed.

  For the temporary table of FIG. 30, the sum of the worst expected number of errors is 86.1, which is smaller than 88.5, which is the sum of the worst expected number of errors for the current conversion table (FIG. 29) described above. The conversion table is updated to the temporary table of FIG.

  Then, among the bit patterns “0000” to “1111” that can be unit bit strings, the bit pattern “0000” to “1111” that has not yet been set as the target bit string (the bit pattern not hatched in FIG. 30) If the maximum appearance frequency bit pattern is selected as the target bit string and the error rate expected value of the minimum error rate expected value bit pattern is smaller than the error rate expected value of the maximum appearance frequency bit pattern, the current conversion table, In this case, a copy of the conversion table of FIG. 30 is used as a temporary table, and the minimum error rate expected value bit pattern is converted to a converted bit bit in the temporary table, which is the maximum appearance frequency bit pattern in the temporary table. A variable that is mapped as a pattern and has the minimum expected bit rate bit pattern Before bit pattern, the maximum frequency bit pattern, associated as converted bit pattern.

  In the conversion table of FIG. 30, the bit patterns “0000”, “0010”, “0011”, “0101”, “0110”, “1000”, “1001”, “1010”, “1011”, “1100”, “ Since 1101 "," 1110 ", and" 1111 "are already bit strings of interest, bit patterns" 0000 "," 0010 "," of bit patterns "0000" to "1111" that can be unit bit strings Excluding 0011 "," 0101 "," 0110 "," 1000 "," 1001 "," 1010 "," 1011 "," 1100 "," 1101 "," 1110 ", and" 1111 " The expected error rate value bit pattern and the maximum appearance frequency bit pattern are selected as the target bit string.

  That is, in FIG. 30, the bit pattern “0100” with an expected error rate value of 0.02 is the minimum expected error rate value bit pattern, and the bit pattern “0111” with an appearance frequency of 80 is the maximum appearance frequency bit pattern.

  The expected error rate value of the minimum expected error rate bit pattern "0100" is 0.02, and the expected error rate value of the maximum appearance frequency bit pattern "0111" is 0.06. Therefore, the expected minimum error rate bit pattern "0100" The expected error rate value is smaller than the expected error rate value of the maximum appearance frequency bit pattern “0111”, and the minimum error rate is set to the pre-conversion bit pattern “0111” which is the maximum appearance frequency bit pattern in the temporary table. The expected value bit pattern “0100” is associated with the post-conversion bit pattern, and the maximum appearance frequency bit pattern “0111” is converted to the pre-conversion bit pattern “0100”, which is the minimum error rate expected value bit pattern. Corresponding as a later bit pattern.

  FIG. 31 shows a temporary table after the above association is performed.

  In the provisional table of FIG. 31, the sum of the worst expected number of errors is 92.1, and is not smaller than 86.1, which is the sum of the expected worst errors for the current conversion table (FIG. 30). The conversion table is not updated as it is in FIG. 30, and the conversion table creation process (FIG. 23) ends (returns).

  Therefore, in the conversion unit 202 (FIG. 21), the unit bit string is converted into a converted bit string in accordance with the conversion table of FIG.

  FIG. 32 illustrates a configuration example of the data reverse conversion unit 162 in FIG. 12 when the data conversion unit 154 is configured as illustrated in FIG.

  In FIG. 32, the data reverse conversion unit 162 includes a conversion table storage unit 211 and an reverse conversion unit 212.

  The conversion table storage unit 211 stores a conversion table (as a bit string) among the bit strings supplied from the data reception unit 161 to the data reverse conversion unit 162.

  The inverse conversion unit 212 inversely converts the conversion bit string in the bit string supplied from the data reception unit 161 to the data reverse conversion unit 162 into a unit bit string according to the conversion table stored in the conversion table storage unit 211 and outputs the converted bit string. To do.

  Next, with reference to FIG. 33, the reception / inverse conversion process performed in step S21 of FIG. 17 when the data reverse conversion unit 162 is configured as shown in FIG. 32 will be described.

  In the reception / inverse conversion process, in step S <b> 121, the data reception unit 161 receives the modulated signal transmitted from the transmission processing unit 101, demodulates it into a bit string, and outputs it to the data inverse conversion unit 162.

  Thereafter, the process proceeds from step S121 to step S122, and the data reverse conversion unit 162 determines whether the bit string from the data reception unit 161 is a conversion table (as a bit string).

  Here, for example, the transmission processing unit 101 adds a unique identification code that can identify the conversion table to the conversion table, and transmits the conversion table with the identification code. In step S122, the data reverse conversion unit 162 determines whether the bit string from the data reception unit 161 is a conversion table based on the presence or absence of the identification code.

  If it is determined in step S122 that the bit string from the data reception unit 161 is a conversion table, the process proceeds to step S123, and the data reverse conversion unit 162 converts the conversion table from the data reception unit 161 to the conversion table. The data is supplied to the storage unit 211.

  The conversion table storage unit 211 stores the conversion table from the data reception unit 161 in an overwritten form, and the process returns.

  If it is determined in step S122 that the bit string from the data reception unit 161 is not a conversion table, that is, if the bit string from the data reception unit 161 is a conversion bit string, the process proceeds to step S124. The inverse conversion unit 162 supplies the conversion table from the data reception unit 161 to the inverse conversion unit 212.

  The inverse conversion unit 212 converts the conversion bit string from the data reception unit 161 into a unit bit string according to the conversion table stored in the conversion table storage unit 211 and outputs it, and the process returns.

  Here, it is assumed that the transmission of the conversion table from the transmission processing unit 101 to the reception processing unit 112 is performed by wireless communication. However, when the conversion table is transmitted by wired communication, conversion is performed. The table storage unit 211 stores a conversion table transmitted by the wired communication, and the processes of steps S121 and S124 are performed in the reception / inverse conversion process.

  Next, the second conversion method will be described.

  FIG. 34 shows a configuration example of the data converter 154 of FIG. 12 that converts a unit bit string into a converted bit string by the second conversion method.

  In FIG. 34, the data conversion unit 154 includes a bit operation detection unit 221 and a conversion unit 222.

  The bit operation detection unit 221 uses the error rate table stored in the error rate expected value storage unit 152 (FIG. 12) and the appearance frequency table supplied from the appearance frequency calculation unit 153 (FIG. 12) to generate a data storage unit. 151 (FIG. 12), the frequency of appearance of the post-conversion bit pattern obtained by performing the predetermined bit operation on the pre-conversion bit pattern before performing the predetermined bit operation is determined as the pre-conversion bit pattern. Update to the appearance frequency of the bit pattern, and detect a predetermined bit operation that minimizes the sum of the expected number of error times corresponding to the product of the appearance frequency and the expected error rate for the converted bit pattern. The bit calculation information representing the bit calculation is supplied to the conversion unit 222.

  The conversion unit 222 uses the unit bit string constituting the transmission bit string stored in the data storage unit 151 as a pre-conversion bit pattern, and performs a bit operation represented by the bit operation information from the bit operation detection unit 221 on the pre-conversion bit pattern. As a result, the pre-conversion bit pattern is converted into a post-conversion bit pattern, and is output to the data transmission unit 156 (FIG. 12) as a conversion bit string.

  Next, with reference to FIG. 35, the conversion / transmission process performed in step S13 of FIG. 15 when the data conversion unit 154 is configured as shown in FIG. 34 will be described.

  In the conversion / transmission process, first, in step S141, the bit calculation detection unit 221 includes an error rate table stored in the error rate expected value storage unit 152, and an appearance frequency table supplied from the appearance frequency calculation unit 153. Is used to perform a bit operation detection process that detects a predetermined bit operation that minimizes the sum of the expected number of errors for the converted bit pattern, and represents the bit operation (hereinafter also referred to as a detected bit operation). The information is supplied to the conversion unit 222, and the process proceeds to step S142.

  In step S142, the conversion unit 222 reads a unit bit string (untransmitted bit string) that has not yet been transmitted from the unit bit strings that constitute the transmission bit string stored in the data storage unit 151 (FIG. 12), and transmits the untransmitted unit bit string. The bit string is subjected to detection bit calculation represented by the bit calculation information from the bit calculation detection unit 221 to be converted into a converted bit string and supplied to the data transmission unit 156.

  Thereafter, the process proceeds from step S142 to step S143. The data transmission unit 156 modulates the converted bit string from the data conversion unit 154, transmits a modulation signal obtained by the modulation from the antenna 37a, and the process The process proceeds to step S144.

  In step S144, the conversion unit 222 determines whether or not an untransmitted bit string is stored in the data storage unit 151 (FIG. 12).

  If it is determined in step S144 that an untransmitted bit string is stored in the data storage unit 151, the process returns to step S142, and the same process is repeated thereafter.

  Further, when it is determined in step S144 that no untransmitted bit string is stored in the data storage unit 151, that is, when transmission of all unit bit strings constituting the transmission bit string stored in the data storage unit 151 is completed, Processing returns.

  Next, with reference to FIG. 36, the bit operation detection process performed by the bit operation detection unit 221 (FIG. 34) in step S141 of FIG. 35 will be described.

  In the bit operation detection process, the bit operation detection unit 221 determines the appearance frequency of the post-conversion bit pattern obtained by performing the predetermined bit operation on the pre-conversion bit pattern before performing the predetermined bit operation. Update to the bit pattern appearance frequency, and detect a bit operation (detection bit operation) that minimizes the sum of the expected number of error times corresponding to the product of the appearance frequency and the expected error rate for the converted bit pattern. .

  That is, as a predetermined bit operation, for example, cyclic bit shift (cyclic shift) (for example, in 1-bit cyclic shift in the right direction, all bits except N-bit LSB are shifted to the right by 1 bit. In the bit operation detection process, each bit pattern that can be a unit bit string is used as a pre-conversion bit pattern and cyclic shift is performed by 0 to N-1 bits. Using the converted bit pattern as a converted bit pattern, a cyclic shift of the number of bits that minimizes the total sum of the expected number of errors for the converted bit pattern is detected.

  Specifically, in the bit calculation detection process, in step S151, the bit calculation detection unit 221 acquires an error rate expected value table from the error rate expected value storage unit 152 (FIG. 12) and also from the appearance frequency calculation unit 153. The supplied appearance frequency table is acquired, and the process proceeds to step S152.

  In step S152, the bit calculation detection unit 221 uses a conversion table (hereinafter referred to as a reference table as appropriate) in which each bit pattern that can be a unit bit string is directly associated with the pre-conversion bit pattern and the post-conversion bit pattern. The total of the expected number of times of error of the converted bit pattern is obtained for the conversion table using the reference table as a conversion table.

  Here, if the unit bit string is converted into a converted bit string using the conversion table created in step S152, the converted bit string matches the unit bit string, and therefore the unit bit string is not substantially converted. .

  Further, in the bit operation detection process performed by the second conversion method, the expected number of errors is set to N, which is the number of bits of the converted bit string, as in the conversion table creation process (FIG. 23) performed by the first conversion method. It is not necessary to calculate the expected number of times of worst error times.

  That is, in the second conversion method, as described with reference to FIG. 35, in the conversion / transmission processing performed in the transmission processing unit 101 (FIG. 12), the detection bit calculation represented by the bit calculation information is performed on the unit bit string of N bits. As a result, the N-bit unit bit string is converted into an N-bit converted bit string and transmitted, so that the reception processing unit 112 performs bit operation on the converted bit string from the transmission processing unit 101 as described later. A converted bit string is inversely converted into a unit bit string by performing a bit operation (hereinafter also referred to as an inverse bit operation as appropriate) of the detection bit operation represented by information (inverse function).

  In the reverse conversion of the converted bit string by the reverse bit operation, if any one bit of the converted bit string is erroneous as in the first conversion method described with reference to FIG. 23, which unit bit string is obtained by reversely converting the converted bit string. It does not mean that the bits may be wrong.

  That is, in the inverse conversion of the converted bit string by the inverse bit operation, the 1-bit error of the converted bit string appears as it is as the 1-bit error of the unit bit string.

  Therefore, when the unit bit string is incorrect due to an error in the converted bit string, the number of bits in which the error is generated in the converted bit string matches the number of bits in which the error is generated in the unit bit string. As in the first conversion method, there is no need to consider the possibility that all N bits of the conversion bit string are erroneous, that is, the worst-case expected number of times of error.

  After step S152, the process proceeds to step S153, and the bit operation detection unit 221 performs the number of bits to perform a cyclic shift as a predetermined bit operation on the pre-conversion bit pattern (hereinafter also referred to as a shift bit number). (Representing variable) k is initialized to 1, and the number of shift bits that minimizes the sum of the expected number of errors in the pre-conversion bit pattern (hereinafter also referred to as the optimum bit shift number) (variable representing) K , 0, and the process proceeds to step S154.

  In step S154, the bit operation detection unit 221 corresponds to the bit pattern before conversion in the reference table, as a bit pattern after conversion, which is obtained by cyclically shifting the pre-conversion bit pattern to the right (or left) by k bits. A temporary table that is a temporary conversion table is created.

  Further, in step S154, the bit operation detection unit 221 sets (updates) the appearance frequency of the post-conversion bit pattern in the temporary table as the appearance frequency of the pre-conversion bit pattern associated with the post-conversion bit pattern. Advances to step S155.

  Here, a k-bit cyclic shift in the right (left) direction is referred to as a k-bit right (left) cyclic shift.

  In step S155, the bit operation detection unit 221 obtains the sum of the expected number of errors of the converted bit pattern for the temporary table, and the process proceeds to step S156.

  That is, the bit operation detection unit 221 calculates the product of the error rate expected value of the converted bit pattern of the temporary table and the appearance frequency, and the expected number of errors for the converted bit pattern, that is, the converted bit pattern is After the appearance, it is obtained as an expected value of the number of errors in which an error occurs in the latest bit of the transmission bit string.

  In step S156, the bit operation detection unit 221 determines whether or not the sum of the expected number of errors for the temporary table is smaller than the sum of the expected number of errors for the conversion table.

  If it is determined in step S156 that the sum of the expected number of errors for the provisional table is smaller than the sum of the expected number of errors for the conversion table, that is, the conversion obtained by cyclically shifting the unit bit string by k bits to the right. If it can be expected that the number of error errors occurring in the bit string will be less than the number of error errors occurring in the converted bit string obtained by right-shifting the unit bit string by K bits, the process proceeds to step S157. The bit operation detection unit 221 updates the conversion table using the temporary table as the conversion table.

  Further, in step S157, the bit operation detection unit 221 updates the optimum bit shift K to the bit shift number k, and the process proceeds to step S158.

  On the other hand, if it is determined in step S156 that the sum of the expected number of errors for the temporary table is not smaller than the sum of the expected number of errors for the conversion table, that is, the unit bit string is cyclically shifted k bits to the right. If the error number of errors occurring in the resulting converted bit string cannot be expected to be less than the number of error errors occurring in the converted bit string obtained by K-bit cyclic shifting the unit bit string, the process Step S157 is skipped and the process proceeds to step S158.

  In step S158, the bit operation detection unit 221 increments the bit shift number k by 1, and the process proceeds to step S159.

  In step S159, the bit operation detection unit 221 determines whether the bit shift number k is equal to the bit number N of the unit bit string.

  If it is determined in step S159 that the bit shift number k is not equal to the bit number N of the unit bit string, that is, if the bit shift number k is less than the bit number N of the unit bit string, the process proceeds to step S154. Thereafter, the same processing is repeated thereafter.

  If it is determined in step S159 that the bit shift number k is equal to the bit number N of the unit bit string, that is, the pre-conversion bit pattern is represented by 0 to N-1 bits in 0 to N-1 bits. When the optimum bit shift number K that minimizes the sum of the expected number of errors for the converted bit pattern obtained by cyclic shifting to the right is obtained, the process proceeds to step S160, where the bit operation detection unit 221 supplies bit conversion information representing a K-bit right cyclic shift to the conversion unit 222.

  Further, in step S160, the bit operation detection unit 221 supplies bit operation information representing the K-bit right cyclic shift to the data transmission unit 156 (FIG. 12) via the conversion unit 222, and the reception processing unit 112. And the process returns.

  Note that the bit calculation information is transmitted to the reception processing unit 112 by low-rate wireless communication or wired communication in order to ensure the transmission. In addition, the bit calculation information is not converted by the conversion unit 222.

  Next, the bit operation detection process will be further described with reference to FIGS. 37 and 38.

  Here, the unit bit string is assumed to be 4 bits.

  FIG. 37 shows an example of each bit pattern of a 4-bit unit bit string that constitutes a transmission bit string, and an expected error rate value, appearance frequency, and expected error count value for that bit pattern.

  Note that the expected error rate, appearance frequency, and expected number of errors for the 4-bit bit pattern in FIG. 37 are the same as in FIG. 24, and the sum of the expected number of errors is also the case in FIG. It is the same as 149.40.

  Therefore, the sum of the expected number of times of error of the bit pattern after conversion for the conversion table that uses the bit pattern of FIG. 37 as it is as the bit pattern before conversion and the bit pattern after conversion is 149.40.

  FIG. 38 is obtained by making each bit pattern of FIG. 37 a pre-conversion bit pattern and cyclically shifting the pre-conversion bit pattern to the right by the optimum bit shift number K (K-bit right cyclic shift). The conversion table which made the bit pattern the bit pattern after conversion is shown.

  Here, in FIG. 38, similarly to FIGS. 25 to 31, in addition to the pre-conversion bit pattern and the post-conversion bit pattern, the error rate expectation value, the appearance frequency, and the error count expectation value are also illustrated.

  In FIG. 38, the optimum bit shift number K is 1 bit out of 0 to 3 bits that can cyclically shift the 4-bit pre-conversion bit pattern. A bit pattern obtained by cyclically shifting the pattern by 1 bit to the right is a bit pattern after conversion.

  In the conversion table of FIG. 38, the sum of the expected number of errors of the converted bit pattern is 92.60 which is the minimum value.

  FIG. 39 shows a configuration example of the data reverse conversion unit 162 in FIG. 12 when the data conversion unit 154 is configured as shown in FIG.

  In FIG. 39, the data inverse conversion unit 162 includes a bit operation instruction unit 231 and an inverse conversion unit 232.

  The bit operation instruction unit 231 performs a bit operation (inverse bit operation) that is the reverse of the detected bit operation represented by the bit operation information (as the bit string) in the bit string supplied from the data receiving unit 161 to the data inverse conversion unit 162. Instructing the inverse transformation unit 232 to do this.

  The inverse conversion unit 232 performs an inverse bit operation according to an instruction from the bit operation instruction unit 231 on the conversion bit string in the bit string supplied from the data reception unit 161 to the data inverse conversion unit 162, thereby converting the converted bit string. Is converted back to a unit bit string and output.

  Next, with reference to FIG. 40, the reception / inverse conversion process performed in step S21 of FIG. 17 when the data reverse conversion unit 162 is configured as shown in FIG. 39 will be described.

  In the reception / inverse conversion process, in step S171, the data reception unit 161 (FIG. 12) receives the modulated signal transmitted from the transmission processing unit 101, demodulates it into a bit string, and outputs it to the data inverse conversion unit 162. Then, the process proceeds to step S172.

  In step S172, the data reverse conversion unit 162 determines whether the bit string from the data reception unit 161 is bit operation information (as a bit string).

  Here, for example, the transmission processing unit 101 adds a unique identification code that can identify the bit operation information to the bit operation information, and transmits the bit operation information with the identification code. In step S172, the data reverse conversion unit 162 determines whether the bit string from the data reception unit 161 is bit operation information based on the presence / absence of an identification code.

  If it is determined in step S172 that the bit string from the data reception unit 161 is bit operation information, the process proceeds to step S173, and the data inverse conversion unit 162 converts the bit operation information from the data reception unit 161 to The bit calculation instruction unit 231 is supplied.

  The bit operation instruction unit 231 instructs the inverse conversion unit 232 to perform the inverse bit operation of the detection bit operation represented by the bit operation information from the data reception unit 161, and the process returns.

  That is, when the detected bit calculation represented by the bit calculation information from the data reception unit 161 is, for example, a 1-bit right cyclic shift, the bit calculation instruction unit 231 is an inverse bit calculation of 1-bit right cyclic shift. The inverse conversion unit 232 is instructed to perform bit left cyclic shift.

  On the other hand, if it is determined in step S172 that the bit string from the data receiving unit 161 is not bit operation information, that is, if the bit string from the data receiving unit 161 is a converted bit string, the process proceeds to step S174. The data reverse conversion unit 162 supplies the bit operation information from the data reception unit 161 to the reverse conversion unit 232.

  The inverse conversion unit 232 performs an inverse bit operation on the converted bit string from the data reception unit 161 according to the instruction from the bit operation instruction unit 231 to inversely convert the converted bit string into a unit bit string and output the processed bit string. Will return.

  Here, the bit calculation information is transmitted by wireless communication. However, when the bit calculation information is transmitted by wired communication, the bit calculation instruction unit 231 is transmitted by the wired communication. Based on the incoming bit operation information, the inverse conversion unit 232 is instructed to perform the inverse bit operation.

  As described above, the information processing unit 163 (FIG. 12) obtains an error rate in which the latest bit out of the N bits of the test pattern is erroneous, and causes each bit pattern of the unit bit string to be attributed to the appearance of the bit pattern. Thus, an expected error rate value in which the latest bit of the transmission bit string is erroneous is obtained using the error rate.

  Then, the transmission processing unit 101 (FIG. 12) uses the error rate expected value obtained by the information processing unit 163 and the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string, , A unit bit string constituting a transmission bit string by obtaining a value corresponding to a product of an error rate expectation value for a bit pattern as an error count expectation value that is an expected number of error occurrences due to the appearance of the bit pattern The unit bit string is converted into an N-bit converted bit string and transmitted so as to reduce the sum of the expected number of errors for each bit pattern.

  Therefore, the error rate expectation value for each bit pattern as an effect of steady waveform collapse in in-chassis wireless communication is learned in advance, and the unit bit string constituting the transmission bit string is determined to be error by using the learning result. Since it is converted into a converted bit string that reduces the total number of expected times, the occurrence of data errors due to multipath can be easily reduced.

  That is, by converting the unit bit string into a converted bit string and transmitting it, the communication quality is improved compared to the case where the unit bit string is transmitted as it is, and communication can be performed with a communication efficiency higher than the average error characteristic of the communication channel. It becomes possible.

  For example, a bit pattern with a higher appearance frequency is a pre-conversion bit pattern before conversion, and a bit pattern with a smaller error rate expected value is a post-conversion bit pattern after conversion, Create a conversion table associating the converted bit pattern, convert the unit bit string to the converted bit pattern associated with the pre-conversion bit pattern that matches the unit bit string, and convert the bit string according to the conversion table. According to the first conversion method that is output as a bit pattern, a bit pattern with a biased appearance frequency is transmitted so that the appearance frequency of bit patterns that are less likely to be error is increased. Compared with the above, the error rate characteristics can be greatly improved.

  In addition, the appearance frequency of the post-conversion bit pattern obtained by performing the predetermined bit operation on the pre-conversion bit pattern before performing the predetermined bit operation is updated to the appearance frequency of the pre-conversion bit pattern to perform conversion. The unit bit string is converted by detecting the detection bit operation that minimizes the sum of the expected number of error times corresponding to the product of the appearance frequency and the expected error rate for the subsequent bit pattern, and performing the detection bit operation. According to the second conversion method for converting into a bit string, the unit bit string constituting the transmission bit string is converted into a converted bit string that reduces the total sum of expected number of errors, and the converted bit string is the same as the unit bit string. Since it is obtained by performing bit operations, the independence of each bit of the converted bit string is maintained, so when one bit of the converted bit string is incorrect, All bits in the unit bit string obtained by converting bit strings to inverse transform can be prevented from becoming an error.

  Next, the series of processes described above can be performed by hardware or software. When a series of processing is performed by software, a program constituting the software is installed in a general-purpose computer or the like.

  Therefore, FIG. 41 shows a configuration example of an embodiment of a computer in which a program for executing the series of processes described above is installed.

  The program can be recorded in advance on a hard disk 305 or a ROM 303 as a recording medium built in the computer.

  Alternatively, the program is stored (recorded) temporarily or permanently in a removable recording medium 311 such as a flexible disk, a CD-ROM (Compact Disc Read Only Memory), an MO (Magneto Optical) disk, a DVD (Digital Versatile Disc), a magnetic disk, or a semiconductor memory. Can be kept. Such a removable recording medium 311 can be provided as so-called package software.

  The program is installed in the computer from the removable recording medium 311 as described above, and is transferred from the download site to the computer wirelessly via a digital satellite broadcasting artificial satellite, LAN (Local Area Network), the Internet, etc. The program can be transferred to a computer via a network by wire, and the computer can receive the program transferred in this way by the communication unit 308 and install it in the built-in hard disk 305.

  The computer includes a CPU (Central Processing Unit) 302. An input / output interface 310 is connected to the CPU 302 via the bus 301, and the CPU 302 is operated by an input unit 307 including a keyboard, a mouse, a microphone, and the like by the user via the input / output interface 310. When a command is input as a result of the equalization, a program stored in a ROM (Read Only Memory) 303 is executed accordingly. Alternatively, the CPU 302 can also read from a program stored in the hard disk 305, a program transferred from a satellite or a network, received by the communication unit 308 and installed in the hard disk 305, or a removable recording medium 311 attached to the drive 309. The program read and installed in the hard disk 305 is loaded into a RAM (Random Access Memory) 304 and executed. Thereby, the CPU 302 performs processing according to the above-described flowchart or processing performed by the configuration of the above-described block diagram. Then, the CPU 302 outputs the processing result as necessary, for example, via the input / output interface 310, from the output unit 306 configured with an LCD (Liquid Crystal Display), a speaker, or the like, or transmitted from the communication unit 308. Further, it is recorded on the hard disk 305.

  Here, in this specification, the processing steps for describing a program for causing a computer to perform various types of processing do not necessarily have to be processed in time series according to the order described in the flowchart, but in parallel or individually. This includes processing to be executed (for example, parallel processing or processing by an object).

  Further, the program may be processed by one computer or may be distributedly processed by a plurality of computers.

  As described above, the case where the present invention is applied to the communication performed in the housing 32 has been described. However, the present invention is not limited to, for example, a wireless LAN performed in a condominium, a detached house, etc. It is represented by communication between board-to-board harnesses and cables in electronic devices that are not used, communication via communication cables used in telephony telephones, and wireless communication between buildings in which multipath does not change significantly because the wireless station is fixed. It can be applied to fixed wireless communication and other communications in which the communication environment is constant for a certain period of time and a constant error occurs. By applying the present invention to such communication, a bit having a high appearance frequency is generated in a communication path having multipath interference caused by reflection or diffraction of a signal transmitted by a transmission device or interference by reflection on a cable. It is possible to easily prevent an error from occurring, thereby improving the overall communication quality.

  The embodiment of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.

  That is, in this embodiment, an image (pixel value) is a transmission target, but as a bit string to be transmitted, an appearance frequency is biased in addition to an image, for example, audio data or the like is adopted. Can do.

  The present invention can also be applied to communications performed between LSIs in addition to between boards.

  Furthermore, in the present embodiment, the error rate expected value table is created by the reception processing unit 112, but the error rate expected value table can be created by the transmission processing unit 101. That is, for example, the error rate calculated by the error rate calculation unit 172 is transmitted from the reception processing unit 112 to the transmission processing unit 101, and the transmission processing unit 101 creates an error rate expected value table using the error rate. Is possible.

  In this embodiment, cyclic shift is adopted as the predetermined bit operation. However, as the predetermined bit operation, the bit operation result (conversion bit string) is converted into the original bit string (converted bit string) by the inverse bit operation. It is possible to employ a bit operation that can be returned to (unit bit string), that is, an exclusive OR with a predetermined N bits, for example.

In the case where an exclusive OR with a predetermined N bit is adopted as the predetermined bit operation, when the unit bit string is, for example, 4 (= N) bits, the bit operation detection unit 221 (FIG. 34) converts Each of the exclusive ORs of the previous bit pattern and 16 (= 2 ⁴ ) patterns of 4 bits is used as a converted bit pattern, and a 4-bit pattern that minimizes the sum of the expected number of errors of the converted bit pattern is minimized. An exclusive OR is detected as a bit operation to be performed by the converter 222 (FIG. 34).

It is a block diagram which shows the structure of an example of the conventional signal processing apparatus. It is a perspective view which shows the structural example of one Embodiment of the signal processing apparatus to which this invention is applied. It is a block diagram which shows the electrical structural example of one Embodiment of the signal processing apparatus to which this invention is applied. 3 is a block diagram illustrating a configuration example of a communication system including a signal router 45 and a function block 46 in a housing 32. FIG. It is a figure explaining the distortion of the signal which arises by multipath. It is a wave form diagram which shows the received signal received by radio | wireless communication in a housing | casing. It is a wave form diagram which shows the received signal received by radio | wireless communication in a housing | casing. It is a wave form diagram which shows the received signal received by radio | wireless communication in a housing | casing. It is a figure which shows the error rate of the 7th bit in the 8 bits when 8 bits are transmitted. It is a figure explaining how to obtain | require the error rate expected value which originates in the appearance of a certain bit pattern and the newest bit which appears after that mistakes. It is a figure which shows the error rate of each bit pattern of an 8-bit unit bit string, and the error rate expectation value about each bit pattern. 3 is a block diagram illustrating a configuration example of a transmission processing unit 101 and a reception processing unit 112. FIG. It is a figure which shows the frequency distribution of a Y component. It is a figure which shows the frequency distribution of U component. It is a figure which shows the frequency distribution of V component. It is a flowchart explaining the transmission process of normal mode. It is a flowchart explaining the reception process of normal mode. It is a flowchart explaining the transmission process of learning mode. It is a flowchart explaining the reception process of learning mode. It is a flowchart explaining an error rate expected value calculation process. 3 is a block diagram illustrating a first configuration example of a data conversion unit 154. FIG. It is a flowchart explaining a conversion / transmission process. It is a flowchart explaining a conversion table creation process. It is a figure which shows the example of each bit pattern of a 4-bit unit bit sequence, the error rate expectation value, appearance frequency, and error frequency expectation value about the bit pattern. It is a figure which shows a temporary table. It is a figure which shows a temporary table. It is a figure which shows a temporary table. It is a figure which shows a temporary table. It is a figure which shows a temporary table. It is a figure which shows a temporary table. It is a figure which shows a temporary table. 6 is a block diagram illustrating a first configuration example of a data reverse conversion unit 162. FIG. It is a flowchart explaining a reception / inverse conversion process. 6 is a block diagram illustrating a second configuration example of a data conversion unit 154. FIG. It is a flowchart explaining a conversion / transmission process. It is a flowchart explaining a bit calculation detection process. It is a figure which shows the example of each bit pattern of a 4-bit unit bit sequence, the error rate expectation value, appearance frequency, and error frequency expectation value about the bit pattern. It is a figure which shows the conversion table which made the bit pattern obtained by carrying out the K bit right cyclic shift the bit pattern before conversion into the bit pattern after conversion. 6 is a block diagram illustrating a second configuration example of a data reverse conversion unit 162. FIG. It is a flowchart explaining a reception / inverse conversion process. It is a block diagram which shows the structural example of one Embodiment of the computer to which this invention is applied.

Explanation of symbols

13 ₁ to 13 ₄ , 19 connector, 20 remote commander, 21 operation unit, 31 signal processing device, 32 housing, 33 power supply module, 34 platform board, 35 input board, 35a antenna, 36 ₁ to 36 ₃ signal processing board, 36a ₁ to 36a ₃ antennas, 37 output board, 37a antenna, 44 an input selector, 45 signal router 46 ₁ to 46 ₃ functional blocks, 36a ₁ to 36a ₃ antennas, 50 system control block, 50a antenna, 101 transmission processor, 102 reception processing unit, 103 signal processing unit, 104 control unit, 111 transmission processing unit, 112 reception processing unit, 113 signal processing unit, 114 control unit, 151 data storage unit, 152 error rate expected value table storage unit, 153 appearance frequency Calculation unit, 154 Data conversion , 155 test pattern generation unit, 156 data transmission unit, 161 data reception unit, 162 data inverse conversion unit, 163 information processing unit, 171 test pattern generation unit, 172 error rate calculation unit, 173 error rate expected value calculation unit, 201 conversion Table creation unit, 202 conversion unit, 211 conversion table storage unit, 212 reverse conversion unit, 221 bit calculation detection unit, 222 conversion unit, 231 bit calculation instruction unit, 232 reverse conversion unit, 301 bus, 302 CPU, 303 ROM, 304 RAM, 305 hard disk, 306 output unit, 307 input unit, 308 communication unit, 309 drive, 310 input / output interface, 311 removable recording medium

Claims (16)

In a transmission device that transmits a transmission bit string that is an array of unit bit strings of N bits that are multiple bits,
For each bit pattern of the unit bit string, due to the appearance of the bit pattern, error rate expected value storage means for storing an error rate expected value that is an expected error rate of the latest bit of the transmission bit string,
Appearance frequency calculating means for determining the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string;
A value corresponding to a product of the appearance frequency of the bit pattern and an expected error rate value for the bit pattern is an expected number of error times that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern. Conversion means for converting the unit bit string into an N-bit converted bit string so as to reduce the total sum of expected number of errors for each bit pattern of the unit bit string constituting the transmission bit string;
A transmission device comprising: transmission means for transmitting the converted bit string. The expected error rate is
For the test pattern that is an N-bit bit pattern that can be the unit bit string, the error rate of the latest bit out of the N bits is determined,
For each bit pattern of the unit bit string, due to the appearance of the bit pattern, an error rate expected value that is an expected value of an error rate in which the latest bit of the transmission bit string is erroneous is obtained using the error rate. The transmission device according to claim 1 obtained. The bit pattern having a higher appearance frequency is a pre-conversion bit pattern before conversion, and the bit pattern having a smaller error rate expectation value is a post-conversion bit pattern after conversion. , Further comprising a conversion table creating means for creating a conversion table in which the converted bit patterns are associated with each other,
The conversion means converts the unit bit string into the post-conversion bit pattern associated with the pre-conversion bit pattern that matches the unit bit string according to the conversion table, and outputs the converted bit pattern as the conversion bit string. The transmitting device according to 1. The conversion table creating means updates the appearance frequency of the post-conversion bit pattern to the appearance frequency of the pre-conversion bit pattern, and the product of the appearance frequency and the expected error rate for the post-conversion bit pattern Until the sum of the expected number of error times corresponding to is minimized, associating the pre-conversion bit pattern with a higher appearance frequency with the post-conversion bit pattern with a smaller error rate expected value The transmission device according to claim 3. Update the appearance frequency of the post-conversion bit pattern obtained by performing the predetermined bit operation on the pre-conversion bit pattern before performing the predetermined bit operation to the appearance frequency of the pre-conversion bit pattern, Bit conversion detection means for detecting the predetermined bit calculation that minimizes the sum of the expected number of error times corresponding to the product of the appearance frequency and the expected error rate value for the converted bit pattern,
The transmission device according to claim 1, wherein the conversion unit converts the unit bit string into the converted bit string by performing a bit operation detected by the bit operation detection unit on the unit bit string. The transmission device according to claim 5, wherein the predetermined bit operation is a bit shift of a predetermined number of bits or an exclusive OR with a predetermined N bits of the pre-conversion bit pattern. In the transmission method of the transmission device for transmitting a transmission bit string that is an array of unit bit strings of N bits that are multiple bits,
The transmitting device is
Obtaining the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string,
Appearance frequency of the bit pattern;
A value corresponding to the product of the error rate expectation value, which is the expected error rate value of the latest bit of the transmission bit string, resulting from the appearance of the bit pattern obtained for each bit pattern of the unit bit string. The error number expected value that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern is obtained, and the sum of the expected number of error times for each bit pattern of the unit bit string constituting the transmission bit string is reduced. As described above, the unit bit string is converted into an N-bit converted bit string,
A transmission method including the step of transmitting the converted bit string. In a program that causes a computer to function as a transmission device that transmits a transmission bit string that is an array of unit bit strings of N bits that are multiple bits,
For each bit pattern of the unit bit string, due to the appearance of the bit pattern, error rate expected value storage means for storing an error rate expected value that is an expected error rate of the latest bit of the transmission bit string,
Appearance frequency calculating means for determining the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string;
A value corresponding to a product of the appearance frequency of the bit pattern and an expected error rate value for the bit pattern is an expected number of error times that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern. Conversion means for converting the unit bit string into an N-bit converted bit string so as to reduce the total sum of expected number of errors for each bit pattern of the unit bit string constituting the transmission bit string;
A program for causing a computer to function as transmission means for transmitting the converted bit string. In a receiving apparatus that receives a bit string transmitted from a transmitting apparatus that transmits a transmission bit string that is an arrangement of unit bit strings of N bits that are multiple bits,
The transmitting device is
Obtaining the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string,
Appearance frequency of the bit pattern;
A value corresponding to the product of the error rate expectation value, which is the expected error rate value of the latest bit of the transmission bit string, resulting from the appearance of the bit pattern obtained for each bit pattern of the unit bit string. The error number expected value that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern is obtained, and the sum of the expected number of error times for each bit pattern of the unit bit string constituting the transmission bit string is reduced. As described above, the unit bit string is converted into an N-bit converted bit string,
In the case of transmitting the converted bit string,
Receiving means for receiving the converted bit string from the transmitting device;
A receiving apparatus comprising: inverse conversion means for inversely converting the converted bit string into the unit bit string. The transmitting device is
The bit pattern having a higher appearance frequency is a pre-conversion bit pattern before conversion, and the bit pattern having a smaller error rate expectation value is a post-conversion bit pattern after conversion. , Create a conversion table associating the converted bit pattern,
According to the conversion table, the unit bit string is converted into the converted bit pattern associated with the pre-conversion bit pattern that matches the unit bit string, and is output as the converted bit string.
The receiving device according to claim 9, wherein the inverse conversion unit inversely converts the converted bit string into the unit bit string in accordance with the conversion table. The transmitting device is
Update the appearance frequency of the post-conversion bit pattern obtained by performing the predetermined bit operation on the pre-conversion bit pattern before performing the predetermined bit operation to the appearance frequency of the pre-conversion bit pattern, Detecting the predetermined bit operation that minimizes the sum of the expected number of error times corresponding to the product of the appearance frequency and the expected error rate for the converted bit pattern;
In the case of converting the unit bit string to the converted bit string by performing the predetermined bit operation on the unit bit string,
The receiving device according to claim 9, wherein the inverse conversion unit performs inverse conversion of the converted bit string into the unit bit string by performing bit operation on the converted bit string that is the reverse of the predetermined bit operation. In the receiving method of the receiving apparatus that receives the bit string transmitted from the transmitting apparatus that transmits the transmission bit string that is an arrangement of the unit bit string of N bits that is a plurality of bits,
The transmitting device is
Obtaining the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string,
Appearance frequency of the bit pattern;
A value corresponding to the product of the error rate expectation value, which is the expected error rate value of the latest bit of the transmission bit string, resulting from the appearance of the bit pattern obtained for each bit pattern of the unit bit string. The error number expected value that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern is obtained, and the sum of the expected number of error times for each bit pattern of the unit bit string constituting the transmission bit string is reduced. As described above, the unit bit string is converted into an N-bit converted bit string,
In the case of transmitting the converted bit string,
The receiving device is
Receiving the converted bit string from the transmitting device;
A receiving method comprising the step of inversely converting the converted bit string into the unit bit string. In a program that causes a computer to function as a receiving device that receives a bit string transmitted from a transmitting device that transmits a transmission bit sequence that is an array of unit bit sequences of N bits that are multiple bits,
The transmitting device is
Obtaining the appearance frequency of each bit pattern of the unit bit string constituting the transmission bit string,
Appearance frequency of the bit pattern;
A value corresponding to the product of the error rate expectation value, which is the expected error rate value of the latest bit of the transmission bit string, resulting from the appearance of the bit pattern obtained for each bit pattern of the unit bit string. The error number expected value that is an expected value of the number of errors in which an error occurs due to the appearance of the bit pattern is obtained, and the sum of the expected number of error times for each bit pattern of the unit bit string constituting the transmission bit string is reduced. As described above, the unit bit string is converted into an N-bit converted bit string,
In the case of transmitting the converted bit string,
Receiving means for receiving the converted bit string from the transmitting device;
A program for causing a computer to function as inverse conversion means for inversely converting the converted bit string into the unit bit string. In an information processing apparatus for obtaining an error rate expectation value used for converting the unit bit string of a transmission bit string that is an array of N-bit unit bit strings that are a plurality of bits into a predetermined conversion bit string,
A test pattern generated by a test pattern generating means for generating a test pattern which is an N-bit bit pattern that can be the unit bit string, and a received test pattern obtained by receiving the test pattern transmitted by a transmitting apparatus that transmits the test pattern And an error rate calculating means for obtaining an error rate in which the latest bit of the N bits of the test pattern is erroneous,
For each bit pattern of the unit bit string, an error rate is obtained by using the error rate to obtain an expected error rate that is an expected error rate of the latest bit of the transmission bit string due to the appearance of the bit pattern. An information processing apparatus comprising: an expected value calculation unit. In the information processing method of the information processing apparatus for obtaining an error rate expected value used for converting the unit bit string of the transmission bit string that is an array of N bit unit bit strings that are a plurality of bits into a predetermined conversion bit string,
The information processing apparatus is
A test pattern generated by a test pattern generating means for generating a test pattern which is an N-bit bit pattern that can be the unit bit string, and a received test pattern obtained by receiving the test pattern transmitted by a transmitting apparatus that transmits the test pattern To determine the error rate that the latest bit of the N bits of the test pattern is erroneous,
For each bit pattern of the unit bit string, due to the appearance of the bit pattern, an error rate expected value that is an expected error rate of the latest bit of the transmission bit string is determined using the error rate. Information processing method including. In a program that causes a computer to function as an information processing device that calculates an expected error rate used to convert a unit bit string of a transmission bit string that is a sequence of N-bit unit bit strings that are a plurality of bits into a predetermined conversion bit string,
A test pattern generated by a test pattern generating means for generating a test pattern which is an N-bit bit pattern that can be the unit bit string, and a received test pattern obtained by receiving the test pattern transmitted by a transmitting apparatus that transmits the test pattern And an error rate calculating means for obtaining an error rate in which the latest bit of the N bits of the test pattern is erroneous,
For each bit pattern of the unit bit string, an error rate is obtained by using the error rate to obtain an expected error rate that is an expected error rate of the latest bit of the transmission bit string due to the appearance of the bit pattern. A program that causes a computer to function as expected value calculation means.

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