JP2009147784A5 - - Google Patents
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- JP2009147784A5 JP2009147784A5 JP2007324500A JP2007324500A JP2009147784A5 JP 2009147784 A5 JP2009147784 A5 JP 2009147784A5 JP 2007324500 A JP2007324500 A JP 2007324500A JP 2007324500 A JP2007324500 A JP 2007324500A JP 2009147784 A5 JP2009147784 A5 JP 2009147784A5
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- Prior art keywords
- resistor
- mos transistor
- gate
- drain
- source
- Prior art date
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- 239000004065 semiconductor Substances 0.000 claims 4
Claims (3)
駆動信号のオン期間及びオフ期間を決める信号を生成するＩＣの出力がゲートまたはベースに印加される第１のトランジスタと、
前記第１のトランジスタと縦続接続され、前記ＩＣの出力がツェナーダイオードを介してゲートまたはベースに印加される第２のトランジスタとからなり、
前記第１及び第２のトランジスタはＭＯＳトランジスタからなり、
前記第１のＭＯＳトランジスタのドレインまたはソースにゲートが接続された第３のＭＯＳトランジスタと、
前記第２のＭＯＳトランジスタのドレインまたはソースと、一端が電源電圧に接続された第２の抵抗と、
前記第２の抵抗の他端に、ゲートが接続された第４のＭＯＳトランジスタとを有する半導体素子の駆動回路。 A drive circuit for generating a drive signal for switching a semiconductor element,
A first transistor in which an output of an IC that generates a signal for determining an on period and an off period of a drive signal is applied to a gate or a base;
Said first cascaded with transistors, the output of the IC is Ri Do and a second transistor applied to the gate or base via a Zener diode,
The first and second transistors are MOS transistors,
A third MOS transistor having a gate connected to the drain or source of the first MOS transistor;
A drain or source of the second MOS transistor; a second resistor having one end connected to a power supply voltage;
The other end of the second resistor, the drive circuit of a semiconductor device that have a a fourth MOS transistor having a gate connected.
前記第３のＭＯＳトランジスタのソースは第３の抵抗の一端に接続され、ドレインは前記第４のＭＯＳトランジスタのドレインに接続され、
前記第３の抵抗の他端は前記電源電圧に接続され、
前記第４のＭＯＳトランジスタのソースは第４の抵抗を介して接地され、
前記第１の抵抗の値は、前記第３の抵抗及び前記第４の抵抗の値に比べて大きな値である請求項１記載の半導体素子の駆動回路。 The first and second MOS transistors are cascaded through a first resistor,
The source of the third MOS transistor is connected to one end of a third resistor, the drain is connected to the drain of the fourth MOS transistor,
The other end of the third resistor is connected to the power supply voltage,
The source of the fourth MOS transistor is grounded via a fourth resistor;
2. The semiconductor element driving circuit according to claim 1 , wherein a value of the first resistor is larger than values of the third resistor and the fourth resistor .
前記第２のＭＯＳトランジスタのゲートまたはベースには、第２のダイオードと第２のツェナーダイオードが直列に接続されている請求項１または２記載の半導体素子の駆動回路。 A first diode and a first Zener diode are connected in series to the gate or base of the first MOS transistor,
3. The semiconductor element drive circuit according to claim 1, wherein a second diode and a second Zener diode are connected in series to the gate or base of the second MOS transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007324500A JP5130896B2 (en) | 2007-12-17 | 2007-12-17 | Semiconductor device drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007324500A JP5130896B2 (en) | 2007-12-17 | 2007-12-17 | Semiconductor device drive circuit |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009147784A JP2009147784A (en) | 2009-07-02 |
| JP2009147784A5 true JP2009147784A5 (en) | 2011-02-03 |
| JP5130896B2 JP5130896B2 (en) | 2013-01-30 |
Family
ID=40917849
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007324500A Expired - Fee Related JP5130896B2 (en) | 2007-12-17 | 2007-12-17 | Semiconductor device drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5130896B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015208111A (en) * | 2014-04-21 | 2015-11-19 | ニチコン株式会社 | gate drive circuit |
| CN108512403B (en) * | 2018-04-10 | 2020-02-14 | 峰岹科技（深圳）有限公司 | MOS tube driving circuit, driving chip and motor |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01305618A (en) * | 1988-06-02 | 1989-12-08 | Mitsubishi Electric Corp | Cmos inverter output circuit |
| JP2731049B2 (en) * | 1991-06-24 | 1998-03-25 | 三菱電機株式会社 | CMOS output circuit |
| JP4727360B2 (en) * | 2005-09-20 | 2011-07-20 | 東芝三菱電機産業システム株式会社 | Gate circuit of insulated gate semiconductor device |
-
2007
- 2007-12-17 JP JP2007324500A patent/JP5130896B2/en not_active Expired - Fee Related
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