JP2009143242A - Drive method of self-scan light-emitting element array, optical writing head and optical printer - Google Patents

Drive method of self-scan light-emitting element array, optical writing head and optical printer Download PDF

Info

Publication number
JP2009143242A
JP2009143242A JP2009079009A JP2009079009A JP2009143242A JP 2009143242 A JP2009143242 A JP 2009143242A JP 2009079009 A JP2009079009 A JP 2009079009A JP 2009079009 A JP2009079009 A JP 2009079009A JP 2009143242 A JP2009143242 A JP 2009143242A
Authority
JP
Japan
Prior art keywords
light
emitting element
optical writing
self
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009079009A
Other languages
Japanese (ja)
Other versions
JP4998501B2 (en
Inventor
Seiji Ono
誠治 大野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP2009079009A priority Critical patent/JP4998501B2/en
Publication of JP2009143242A publication Critical patent/JP2009143242A/en
Application granted granted Critical
Publication of JP4998501B2 publication Critical patent/JP4998501B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Facsimile Heads (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driving method which can reduce bias light in a non-separating type self-scan light-emitting element array. <P>SOLUTION: Two drivers 60 drive clock pulses 1, ϕ2, respectively, and the output terminals 63 of the respective drivers are respectively connected to a ϕ1 terminal 11 and a ϕ2 terminal 12. Each GND terminal 64 is connected to a GND. Further, in the drawing, 71 indicates a ϕ1 non-writing time signal input terminal, 72 indicates a ϕ1 writing time signal input terminal, 73 indicates a ϕ2 non-writing time signal input terminal, 74 indicates a ϕ2 writing time signal input terminal, 75 indicates a start signal terminal, and 76 indicates a power supply for giving a voltage V<SB>GA</SB>. To reduce the bias voltage, pulses are intermittently give ϕn as a ϕ1 non-writing time signal and a ϕ2 non-writing time signal. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、自己走査型発光素子アレイの駆動方法、特に非分離型の自己走査型発光素子アレイの駆動方法に関する。本発明は、さらに、このような駆動方法を実行する駆動回路を備える光書込みヘッドに関する。   The present invention relates to a method for driving a self-scanning light-emitting element array, and more particularly to a method for driving a non-separable self-scanning light-emitting element array. The present invention further relates to an optical writing head comprising a driving circuit for executing such a driving method.

多数個の発光素子を同一基板上に集積した発光素子アレイは、その駆動用ICと組み合わせて光プリンタヘッド等の光書込みヘッドとして利用されている。本発明者らは、発光素子アレイの構成要素としてPNPN構造を持つ3端子発光サイリスタに注目し、発光点の自己走査が実現できることを既に提案し(特許文献1,2,3,4参照)、光プリンタヘッドとして実装上簡便となること、発光素子ピッチを細かくできること、コンパクトな自己走査型発光素子アレイを作製できること等を示した。   A light emitting element array in which a large number of light emitting elements are integrated on the same substrate is used as an optical writing head such as an optical printer head in combination with a driving IC. The present inventors have already focused on a three-terminal light-emitting thyristor having a PNPN structure as a component of the light-emitting element array, and have already proposed that self-scanning of the light-emitting point can be realized (see Patent Documents 1, 2, 3, and 4). It has been shown that the optical printer head can be easily mounted, the light emitting element pitch can be made fine, and a compact self-scanning light emitting element array can be produced.

さらに本発明者らは、スイッチ素子(発光サイリスタ)アレイをシフト部として、発光部である発光素子(発光サイリスタ)アレイと分離した構造の自己走査型発光素子アレイを提案している(特許文献5参照)。   Furthermore, the present inventors have proposed a self-scanning light-emitting element array having a structure separated from a light-emitting element (light-emitting thyristor) array, which is a light-emitting part, using a switch element (light-emitting thyristor) array as a shift part (Patent Document 5). reference).

以下、前者のシフト機能と発光機能の両方を同じ素子に担わせた自己走査型発光素子アレイを非分離型と言い、後者のシフト機能(転送機能)と発光機能を別々のサイリスタに担わせた自己走査型発光素子アレイを分離型と言うものとする。   Hereinafter, the former self-scanning light emitting element array in which both the shift function and the light emitting function are assigned to the same element is referred to as a non-separable type, and the latter shift function (transfer function) and the light emitting function are assigned to separate thyristors. The self-scanning light emitting element array is referred to as a separation type.

特開平1−238962号公報JP-A-1-238996 特開平2−14584号公報Japanese Patent Laid-Open No. 2-14584 特開平2−92650号公報Japanese Patent Laid-Open No. 2-92650 特開平2−92651号公報JP-A-2-92651 特開平2−263668号公報JP-A-2-263668

非分離型の自己走査型発光素子アレイでは、書込みの位置情報を記憶しておくため、画像データが0(非書込み)の所でもわずかながら発光してしまう(バイアス光)。このため、非分離型の自己走査型発光素子アレイを光書込みヘッドに利用すると、画質の低下を招いてしまう。そこで、発光が漏れないように遮蔽したサイリスタにシフト機能をもたせ、画像データが0のときには全く発光しないようにしたのが分離型である。分離型は、バイアス光は低減できるが、次のような問題がある。
1.回路が複雑になりチップ寸法が大きくなる。すなわち、高価になる。
2.シフト部駆動用に別に電力が必要となる。シフト部の電力は、クロックラインの電流制限抵抗の大きさで決まるが、高速で転送させるためには電流制限抵抗を小さくしてクロックラインの時定数を小さくする必要がある。このため、転送速度によっては光書込みに寄与する電流の数分の1の電流を流す必要があり、チップの消費電力を引き上げ、温度上昇を招いていた。
In the non-separable self-scanning light emitting element array, since the writing position information is stored, the light is emitted slightly even when the image data is 0 (non-writing) (bias light). For this reason, when the non-separable self-scanning light emitting element array is used for the optical writing head, the image quality is deteriorated. Therefore, the separation type is such that a thyristor shielded so as not to emit light has a shift function so that no light is emitted when the image data is zero. The separation type can reduce the bias light, but has the following problems.
1. The circuit becomes complicated and the chip size increases. That is, it becomes expensive.
2. Separate power is required for driving the shift unit. The power of the shift unit is determined by the size of the current limiting resistor of the clock line, but in order to transfer at high speed, it is necessary to reduce the time constant of the clock line by reducing the current limiting resistor. For this reason, depending on the transfer speed, it is necessary to pass a current that is a fraction of the current that contributes to optical writing, raising the power consumption of the chip and increasing the temperature.

本発明の目的は、上記のような問題点を有する分離型の自己走査型発光素子アレイではなく、非分離型の自己走査型発光素子アレイにおいて、バイアス光を低減できる駆動方法を提供することにある。   An object of the present invention is to provide a driving method capable of reducing bias light in a non-separable self-scanning light-emitting element array rather than a separate self-scanning light-emitting element array having the above-described problems. is there.

本発明の他の目的は、このような駆動方法を実現する駆動回路を有する光書込みヘッドを提供することにある。   Another object of the present invention is to provide an optical writing head having a driving circuit that realizes such a driving method.

請求項1に記載の発明は、発光サイリスタよりなる発光素子が直線状に配列され、発光素子の発光を光書込み用として利用する転送機能を持った自己走査型発光素子アレイであって、前記発光素子のそれぞれを順に光書込み可能な状態とする転送動作において、当該発光素子が光書込み可能な期間に、光書込みを行わないときは、オンした当該発光素子が再びオンするように電流を間欠的に与えることを特徴とする自己走査型発光素子アレイの駆動方法である。The invention according to claim 1 is a self-scanning light-emitting element array in which light-emitting elements composed of light-emitting thyristors are linearly arranged and have a transfer function that uses light emission of the light-emitting elements for optical writing. In the transfer operation in which each of the elements is sequentially writable, when the light writing is not performed during the period in which the light emitting element is capable of optical writing, the current is intermittently turned on so that the turned on light emitting element is turned on again. The self-scanning light-emitting element array driving method is characterized by:

請求項2に記載の発明は、前記発光素子の駆動において、2値以上の出力電流値をとることの可能な定電流回路で駆動することを特徴とする請求項1に記載の自己走査型発光素子アレイの駆動方法である。According to a second aspect of the invention, in the driving of the light emitting element, the light emitting element is driven by a constant current circuit capable of taking two or more output current values. This is a driving method of the element array.
請求項3に記載の発明は、転送のために必要な重なり時間を十分大きくとった場合に、転送動作が可能な電圧の絶対値をVAccording to the third aspect of the present invention, the absolute value of the voltage at which the transfer operation can be performed when the overlap time necessary for the transfer is sufficiently long is set to V 0 、クロックラインの容量をC、光書込みを行わないときの電流値をI, C is the capacity of the clock line, and I is the current value when optical writing is not performed. n としたときに、転送のために必要な重なり時間tThe overlap time t required for transfer a を、The
CV      CV 0 /I/ I n <t<T a <5×CV<5 x CV 0 /I/ I n
とすることを特徴とする請求項2に記載の自己走査型発光素子アレイの駆動方法である。The method for driving a self-scanning light emitting element array according to claim 2, wherein:
請求項4に記載の発明は、前記発光素子の駆動において、2値以上の抵抗値をとることの可能な抵抗選択回路と定電圧回路とで駆動すること特徴とする請求項1に記載の自己走査型発光素子アレイの駆動方法である。  According to a fourth aspect of the present invention, in the driving of the light emitting element, the light emitting element is driven by a resistance selection circuit capable of taking a resistance value of two or more and a constant voltage circuit. This is a method for driving a scanning light emitting element array.
請求項5に記載の発明は、転送のために必要な重なり時間を十分大きくとった場合に、転送動作が可能な電圧の絶対値をVAccording to the fifth aspect of the present invention, the absolute value of the voltage at which the transfer operation can be performed when the overlap time required for the transfer is sufficiently long is set to V 0 、クロックラインの容量をC、光書込みを行わないときの出力抵抗値をR, C is the capacity of the clock line, and R is the output resistance value when optical writing is not performed. n 、クロックラインの電圧をV, The clock line voltage to V S としたときに、転送のために必要な重なり時間tThe overlap time t required for transfer a を、The
−R  -R n Cln(1−VCln (1-V 0 /V/ V S )<t) <T a <−5×R<-5xR n Cln(1−VCln (1-V 0 /V/ V S )
とすることを特徴とする請求項4に記載の自己走査型発光素子アレイの駆動方法である。  The self-scanning light-emitting element array driving method according to claim 4, wherein:
請求項6に記載の発明は、光書込みを行わないときの電流を、光書込みを行うときの電流に重畳して印加することを特徴とする請求項2または4に記載の自己走査型発光素子アレイの駆動方法である。  6. The self-scanning light-emitting element according to claim 2, wherein the current when optical writing is not performed is applied so as to overlap the current when optical writing is performed. An array driving method.

請求項7に記載の発明は、発光サイリスタよりなる発光素子が直線状に配列され、発光素子の発光を光書込み用として利用する転送機能を持った自己走査型発光素子アレイと、前記発光素子を順に光書込み可能な状態とする転送動作において、当該発光素子のそれぞれが光書込み可能な期間に、光書込みを行わないときは、オンした当該発光素子が再びオンするように電流を間欠的に与える定電流回路とを備えることを特徴とする光書込みヘッドである。According to a seventh aspect of the present invention, there is provided a self-scanning light-emitting element array having a transfer function in which light-emitting elements including light-emitting thyristors are linearly arranged and using light emission of the light-emitting elements for optical writing, and the light-emitting elements In the transfer operation to sequentially enable optical writing, when optical writing is not performed in a period in which each of the light emitting elements can be optically written, current is intermittently applied so that the turned on light emitting elements are turned on again. An optical writing head comprising a constant current circuit.
請求項8に記載の発明は、前記定電流回路は、カレントミラーにより構成されていることを特徴とする請求項7に記載の光書込みヘッドである。The invention according to claim 8 is the optical writing head according to claim 7, wherein the constant current circuit is constituted by a current mirror.
請求項9に記載の発明は、前記定電流回路は、抵抗選択回路と定電圧回路とで構成されていることを特徴とする請求項7に記載の光書込みヘッドである。The invention according to claim 9 is the optical write head according to claim 7, wherein the constant current circuit is constituted by a resistance selection circuit and a constant voltage circuit.

請求項10に記載の発明は、請求項7,8または9に記載の光書込みヘッドを備えることを特徴とする光プリンタである。According to a tenth aspect of the present invention, there is provided an optical printer comprising the optical writing head according to the seventh, eighth or ninth aspect.

本発明によれば、非分離型の自己走査型発光素子アレイの利点であるチップサイズを小さくできるという点を生かしながら、バイアス光を低減することができる。   According to the present invention, bias light can be reduced while taking advantage of the fact that the chip size, which is an advantage of the non-separable self-scanning light emitting element array, can be reduced.

非分離型自己走査型発光素子アレイチップの等価回路を示す図である。It is a figure which shows the equivalent circuit of a non-separation type self-scanning light emitting element array chip. 図1の発光素子の電流−光出力特性を示す図である。It is a figure which shows the electric current-light output characteristic of the light emitting element of FIG. 代表的な光書込みヘッドの主要部を示す斜視図である。It is a perspective view which shows the principal part of a typical optical writing head. 光書込みヘッドを備える光プリンタの構成を示す図である。It is a figure which shows the structure of an optical printer provided with an optical writing head. 非書込み時発光量と画像濃度の関係を調べた結果を示す図である。It is a figure which shows the result of having investigated the relationship between the light emission quantity at the time of non-writing, and image density. 定電流駆動回路を示す図である。It is a figure which shows a constant current drive circuit. 定電流駆動回路を、自己走査型発光素子アレイのドライバとして用いた場合の接続図を示す図である。It is a figure which shows the connection diagram at the time of using a constant current drive circuit as a driver of a self-scanning light emitting element array. 図7の回路の動作を説明するための駆動波形を示す図である。It is a figure which shows the drive waveform for demonstrating operation | movement of the circuit of FIG. 抵抗選択回路の一例を示す図である。It is a figure which shows an example of a resistance selection circuit. 抵抗選択回路の他の例を示す図である。It is a figure which shows the other example of a resistance selection circuit.

図1に、本発明の駆動方法が適用される非分離型自己走査型発光素子アレイチップ10の等価回路図を示す。この自己走査型発光素子アレイチップは、直線状に配列された3端子発光サイリスタである発光素子L,L,L,…を備え、これら発光素子のゲート電極間は、ダイオードD,D,…で結合されている。VGAは電源であり、VGA端子15から延びるVGAラインおよび負荷抵抗Rを経て各発光素子のゲート電極に接続されている。発光素子Lのゲート電極は、スタートパルスφ端子13に接続されている。発光素子のカソード電極は、転送用クロックパルスφ1,φ2端子11,12から延びるクロックラインに交互に接続されている。各発光素子のアノードは、基板裏面共通電極に接続されている。図中、14は裏面共通電極端子である。抵抗Rは、スタートパルスラインに挿入された電流制限用抵抗である。 FIG. 1 shows an equivalent circuit diagram of a non-separable self-scanning light emitting element array chip 10 to which the driving method of the present invention is applied. This self-scanning light-emitting element array chip includes light-emitting elements L 1 , L 2 , L 3 ,... That are linearly arranged three-terminal light-emitting thyristors, and diodes D 1 ,. D 2 ,... Are connected. V GA is a power source, and is connected to the gate electrode of each light emitting element through a V GA line extending from the V GA terminal 15 and a load resistance RL . The gate electrode of the light-emitting element L 1 is connected to a start pulse phi S terminal 13. The cathode electrodes of the light emitting elements are alternately connected to clock lines extending from the transfer clock pulse φ1, φ2 terminals 11, 12. The anode of each light emitting element is connected to the substrate back surface common electrode. In the figure, reference numeral 14 denotes a back surface common electrode terminal. The resistor RS is a current limiting resistor inserted in the start pulse line.

図1の発光サイリスタの電流−光出力特性を図2に示す。発光サイリスタの電流−光出力特性は、電流が小さいときは傾きが小さく、大きくなるにつれて傾きが大きくなり、傾きは一定値となる。電流をx、光出力をyとすると、電流が小さいときは、特性は、y=0.5x2.4で表され、電流が大きいときは、y=11x−44で表される。これは、電流が小さいときは発光サイリスタの活性層内での電流拡がりが小さく、電極直下での発光の割合が大きいために、光取り出し効率が下がるためである。この特性を利用することで、バイアス光を減らすことができる。 FIG. 2 shows current-light output characteristics of the light emitting thyristor of FIG. The current-light output characteristics of the light-emitting thyristor have a small slope when the current is small, and the slope increases as the current increases, and the slope has a constant value. When current x, the light output and y, when the current is small, the characteristic is represented by y = 0.5x 2.4, when the current is large, it is represented by y = 11x-44. This is because when the current is small, the current spread in the active layer of the light-emitting thyristor is small and the ratio of light emission just below the electrode is large, so that the light extraction efficiency decreases. By utilizing this characteristic, the bias light can be reduced.

実際には、非書込み時の電流を0.5mA、書込み時の電流13mAとした。この条件では、非書込み時の光出力は約0.1μW、書込み時の光出力は100μWである。書込み時と非書込み時の光量比は1000倍となった。   Actually, the non-writing current was 0.5 mA, and the writing current was 13 mA. Under this condition, the light output at the time of non-writing is about 0.1 μW, and the light output at the time of writing is 100 μW. The light quantity ratio between writing and non-writing was 1000 times.

このチップを使い光書込みヘッドを作製する。図3に、代表的な光書込みヘッドの主要部を示す斜視図を示す。光書込みヘッド30は、実装基板20上に複数個の自己走査型発光素子アレイチップ22を千鳥配置で配列して構成された自己走査型発光素子アレイ24と、複数個の正立等倍レンズ(ロッドレンズ)26を配列して構成された正立等倍レンズアレイ28とを備えている。発光素子アレイ24から出た光は、レンズアレイ28により集光されて、感光ドラム(図示せず)上に照射される。   An optical write head is manufactured using this chip. FIG. 3 is a perspective view showing a main part of a typical optical writing head. The optical writing head 30 includes a self-scanning light-emitting element array 24 configured by arranging a plurality of self-scanning light-emitting element array chips 22 in a staggered arrangement on the mounting substrate 20 and a plurality of erecting equal-magnification lenses ( Rod lens) 26 and an erecting equal-magnification lens array 28. The light emitted from the light emitting element array 24 is collected by the lens array 28 and irradiated onto a photosensitive drum (not shown).

図4は、このような光書込みヘッド30を備える光プリンタの構成を示す。円筒形の感光ドラム32の表面に、アモルファスSi等の光導電性を持つ材料(感光体)が作られている。このドラムはプリントの速度で回転している。回転しているドラムの感光体表面を、帯電器34で一様に帯電させる。そして、光書込みヘッド30で、印字するドットイメージの光を感光体上に照射し、光の当たったところの帯電を中和する。続いて、現像器38で感光体上の帯電状態にしたがって、トナーを感光体上につける。そして、転写器40でカセット42中から送られてきた用紙44上に、トナーを転写する。用紙は、定着器46にて熱等を加えられ定着され、スタッカ48に送られる。一方、転写の終了したドラムは、消去ランプ50で帯電が全面にわたって中和され、清掃器52で残ったトナーが除去される。   FIG. 4 shows a configuration of an optical printer including such an optical writing head 30. A photoconductive material (photosensitive member) such as amorphous Si is made on the surface of the cylindrical photosensitive drum 32. This drum rotates at the speed of printing. The surface of the photosensitive drum of the rotating drum is uniformly charged by the charger 34. Then, the optical writing head 30 irradiates the photosensitive member with the light of the dot image to be printed, and neutralizes the charging where the light hits. Subsequently, toner is applied on the photosensitive member by the developing unit 38 in accordance with the charged state on the photosensitive member. Then, the toner is transferred onto the paper 44 fed from the cassette 42 by the transfer device 40. The sheet is heated and fixed by the fixing unit 46 and sent to the stacker 48. On the other hand, the drum after the transfer is neutralized by the erasing lamp 50 over the entire surface, and the remaining toner is removed by the cleaner 52.

以上のような光プリンタにおいて、書込み時の100μWの光出力で、最適となる露光条件(プロセス速度)での画像形成を行った。その結果、前述の条件でのバイアス光は、画像に悪影響を与えないことを確認できた。非書込み時の光出力を増やしていったところ、0.5μWを越えるあたりから画像の画質の低下が見られ始め、1μWでははっきりと劣化が見られた。これを定量的に見るために、3on−1offおよび2on−2offのパターンのベタ画像をプリントアウトして、非書込み時発光量と画像濃度の関係を調べた。結果を、図5に示す。   In the optical printer as described above, an image was formed under an optimum exposure condition (process speed) with a light output of 100 μW at the time of writing. As a result, it was confirmed that the bias light under the above conditions did not adversely affect the image. When the light output at the time of non-writing was increased, a decrease in the image quality of the image started to be observed around 0.5 μW, and the deterioration was clearly observed at 1 μW. In order to see this quantitatively, solid images of 3on-1off and 2on-2off patterns were printed out, and the relationship between the light emission amount during non-writing and the image density was examined. The results are shown in FIG.

白黒2階調の画像で、灰色を出すときには、白と黒の面積比率により濃淡を表現する。ここで、3on−1offは、3ドット黒,1ドット白の繰り返しパターンを、2on−2offは、2ドット黒,2ドット白の繰り返しパターンを意味している。図中、●は、3on−1offの濃度、○は、2on−2offの濃度を示す。画像濃度は、非書込み時発光量最小値である0.1μWでの濃度で規格化した。濃度は、プリントアウトされた紙をスキャナで再び読み込み、全面積での平均値を取った。   When a gray image is produced in a black and white two-tone image, the shade is expressed by the area ratio of white and black. Here, 3on-1off means a repeating pattern of 3 dots black and 1 dot white, and 2on-2off means a repeating pattern of 2 dots black and 2 dots white. In the figure, ● represents the concentration of 3on-1off, and ○ represents the concentration of 2on-2off. The image density was normalized by the density at 0.1 μW, which is the minimum light emission amount during non-writing. For the density, the printed paper was read again with a scanner, and the average value over the entire area was taken.

非書込み時発光光量が増えるにつれて、画像濃度は増える傾向にあるが、1μWを越えると、3on−1offおよび2on−2offといったパターンによっても濃度変化の様子が変わってきており、画質劣化を裏付けている。これは、バイアス光によりドラムの暗電流が増えたのと等価となり、書込み/非書込みの電位差が減ったためと考えられる。この実験の結果、非書込みと書込みの光出力の比(光量比)は1/100以下でなければならないことがわかった。更に望ましくは、1/200以下であることがわかった。   The image density tends to increase as the amount of light emitted at the time of non-writing increases. However, when it exceeds 1 μW, the state of density change also varies depending on the patterns such as 3on-1off and 2on-2off, which supports image quality degradation. . This is considered to be equivalent to an increase in the dark current of the drum due to the bias light and a decrease in the potential difference between writing and non-writing. As a result of this experiment, it was found that the ratio of light output between non-writing and writing (light quantity ratio) must be 1/100 or less. More desirably, it was found to be 1/200 or less.

一方、自己走査型発光素子アレイでは、オン状態を記憶するためには、少なくともサイリスタの保持電流以上の電流を流さなければならない。この保持電流値は主に素子構造で決まるが、通常0.1〜1mA程度の値を取る。このため、書込み時の電流を13mAとしたとき、保持電流が0.5mAの場合、電流比は高々26倍しかとれない。したがって、100倍の光量比を取るには、非書込み時の発光効率が、書込み時の発光効率の1/4以下である必要がある。実際には前述したように、非書込み時の電流が0.5mAのとき光出力は0.1μWであるから、発光効率は0.1/0.5=0.2(μW/mA)、書込み時の電流が13mAのとき光出力は100μWであるから、発光効率は100/13=7.7(μW/mA)であり、非書込み時の発光効率は書込み時の発光効率の約1/38であり、上記条件を満たしている。   On the other hand, in the self-scanning light emitting element array, in order to memorize the ON state, it is necessary to pass a current that is at least equal to the holding current of the thyristor. This holding current value is mainly determined by the element structure, but usually takes a value of about 0.1 to 1 mA. For this reason, when the current at the time of writing is 13 mA, the current ratio can only be 26 times at most when the holding current is 0.5 mA. Therefore, to obtain a light quantity ratio of 100 times, the light emission efficiency at the time of non-writing needs to be ¼ or less of the light emission efficiency at the time of writing. Actually, as described above, when the non-writing current is 0.5 mA, the light output is 0.1 μW, so the luminous efficiency is 0.1 / 0.5 = 0.2 (μW / mA), writing Since the light output is 100 μW when the current at the time is 13 mA, the light emission efficiency is 100/13 = 7.7 (μW / mA), and the light emission efficiency at the time of non-writing is about 1/38 of the light emission efficiency at the time of writing. And satisfies the above conditions.

実施例1の電流比(26倍)での駆動を実現するために、図6に示す定電流駆動回路をドライバとした。この定電流駆動回路60は、非書込み電流を決めるカレントミラー67と、書込み電流を決めるカレントミラー68と、抵抗65,66とを備えている。カレントミラー67,68は、それぞれ、複数個のバイポーラトランジスタで構成される。すなわち、カレントミラー67は4個のトランジスタで、カレントミラー68は6個のトランジスタで構成される。   In order to realize driving at the current ratio (26 times) of the first embodiment, the constant current driving circuit shown in FIG. 6 is used as a driver. The constant current drive circuit 60 includes a current mirror 67 that determines a non-write current, a current mirror 68 that determines a write current, and resistors 65 and 66. Current mirrors 67 and 68 are each composed of a plurality of bipolar transistors. That is, the current mirror 67 is composed of four transistors, and the current mirror 68 is composed of six transistors.

図中、61は非書込み時信号入力端子、62は書込み時信号入力端子、63はドライバ出力端子、64はドライバGND端子を示している。   In the figure, 61 is a non-write signal input terminal, 62 is a write signal input terminal, 63 is a driver output terminal, and 64 is a driver GND terminal.

非書込み用入力端子61に、Hレベル(たとえば、3.3V)が加えられると、この電圧は抵抗65によって電流に変換され、この電流の1/4を出力電流として出力端子63から吸い込む。一方、書込み用入力端子62にHレベルが加えられると、抵抗66により電流に変換され、この電流の6倍の電流を出力電流として出力端子63から吸い込む。抵抗65,66および、各カレントミラーを構成するトランジスタの数によって、出力端子63から吸い込む電流値および電流比を決めることができる。なお、出力端子63から吸い込む電流値には、0は含まない。   When an H level (for example, 3.3 V) is applied to the non-write input terminal 61, this voltage is converted into a current by the resistor 65, and ¼ of this current is sucked from the output terminal 63 as an output current. On the other hand, when the H level is applied to the write input terminal 62, it is converted into a current by the resistor 66, and a current six times this current is sucked from the output terminal 63 as an output current. The current value and current ratio drawn from the output terminal 63 can be determined by the resistors 65 and 66 and the number of transistors constituting each current mirror. The current value drawn from the output terminal 63 does not include 0.

また、この例では、カレントミラー2個を組み合わせているが、他の方式でも良い。   In this example, two current mirrors are combined, but other methods may be used.

このような定電流駆動回路60を、自己走査型発光素子アレイのドライバとして用いた場合の接続図を、図7に示す。10は、図1で示した自己走査型発光素子アレイチップである。   FIG. 7 shows a connection diagram when such a constant current driving circuit 60 is used as a driver of a self-scanning light emitting element array. Reference numeral 10 denotes the self-scanning light emitting element array chip shown in FIG.

2個のドライバ60は、クロックパルスφ1,φ2を駆動するものであり、各ドライバの出力端子63は、φ1端子11,φ2端子12にそれぞれ接続されている。各GND端子64は、GNDに接続されている。なお図中、71はφ1非書込み時信号入力端子、72はφ1書込み時信号入力端子、73はφ2非書込み時信号入力端子、74はφ2書込み時信号入力端子、75はスタート信号端子、76は電圧VGAを与える電源である。 The two drivers 60 drive clock pulses φ1 and φ2, and the output terminals 63 of the drivers are connected to the φ1 terminal 11 and the φ2 terminal 12, respectively. Each GND terminal 64 is connected to GND. In the figure, 71 is a signal input terminal when φ1 is not written, 72 is a signal input terminal when φ1 is written, 73 is a signal input terminal when φ2 is not written, 74 is a signal input terminal when φ2 is written, 75 is a start signal terminal, 76 is This is a power supply for applying the voltage VGA .

図7の回路の動作を、図8に示す駆動波形を参照しながら説明する。図8のV(71),V(72),V(73),V(74),V(75)は、端子71,72,73,74,75における電圧をそれぞれ示している。   The operation of the circuit of FIG. 7 will be described with reference to the drive waveform shown in FIG. V (71), V (72), V (73), V (74), and V (75) in FIG. 8 indicate voltages at terminals 71, 72, 73, 74, and 75, respectively.

図8において、非書込みパルス電圧V(71)とV(73)の重なり時間tは、転送のために必要な重なり時間を十分大きくとった場合(たとえば、1秒)に、転送動作が可能な、クロックパルス端子11,12に印加されるクロック電圧波形のLレベルの電圧の絶対値の最小値(点弧電圧)をV、クロックラインの寄生容量をC、非書込み電流の値をIとしたときに、
>CV/I
となるように選ぶ。これは、寄生容量Cを一定電流Iで充電したときに、時間t後には、点弧電圧Vに至ると言うことを示している。いま、C=15pF、V=−2.8V、I=0.5mAとして、CV/I=84ns程度となる。
8, the overlap time t a of the non-write pulse voltage V (71) and V (73), when taken overlapped sufficiently large time required for the transfer (e.g., 1 second), can transfer operation The absolute value (ignition voltage) of the absolute value of the L level voltage of the clock voltage waveform applied to the clock pulse terminals 11 and 12 is V 0 , the parasitic capacitance of the clock line is C, and the non-write current value is I. n ,
t a> CV 0 / I n
Choose to be. This is because, when charging the parasitic capacitance C with a constant current I n, and after the time t a, it is shown that to say that leads to ignition voltage V 0. Now, assuming C = 15 pF, V 0 = −2.8 V, and I n = 0.5 mA, CV 0 / I n = about 84 ns.

一方、時間tを大きくすると言うことは、非書込み状態での点灯時間を大きくすることとなり、バイアス光の増加となる。この点を考慮すると、時間tはCV/Iの5倍以下が望ましい。 Meanwhile, to say that increasing the time t a becomes a increasing the lighting time of the non-written state, an increase of the bias light. In view of this, the time t a is CV 0 / I n 5 times or less is desirable.

実施例3では、バイアス光を低減させるため、V(71),V(73)として間欠的にパルスを与えた。V(71),V(73)がHとなるパルスの長さtはtと同様、
>CV/I
で選ばれ、Lとなるパルスの長さtは、ふたたびオン状態とするために必要な時間tとの和Tが、サイリスタのゲート電圧がV−Vまで低下するのに必要な時間より短く選ばれる。すなわち、
In Example 3, pulses were applied intermittently as V (71) and V (73) in order to reduce the bias light. V (71), the length t H of the pulse V (73) becomes the H similar to the t a,
t H> CV 0 / I n
The length T L of the pulse that becomes L and is the sum T with the time t H required to turn it on again is necessary for the gate voltage of the thyristor to drop to V s −V D. Selected shorter than time. That is,

Figure 2009143242
Figure 2009143242

ただし、Rはサイリスタのゲートから見込んだインピーダンス、Cはサイリスタのゲート寄生容量である。また、Vはクロックパルス端子11,12に印加されるクロック電圧波形のLレベルの電圧、Vはサイリスタのゲートを接続するダイオード1段あたりの電圧降下であり、ゲート電圧がV−Vにまで落ちると言うことは、隣接サイリスタがオンしている状態と同じである。いま、R=30kΩ、C=10pF、V=1.4V、V=−3.3Vとして、約166nsとなった。t=100ns、t=40nsと選ぶことによって、実質的な非書込み点灯時間を少なくとも40/140削減できた。 Here, R g is the impedance expected from the gate of the thyristor, and C g is the gate parasitic capacitance of the thyristor. Further, V S is an L level voltage of the clock voltage waveform applied to the clock pulse terminals 11 and 12, V D is a voltage drop per one stage of the diode connecting the gate of the thyristor, and the gate voltage is V S −V. Saying falling to D is the same as the state in which the adjacent thyristor is on. Now, R g = 30 kΩ, C g = 10 pF, V D = 1.4 V, and V S = -3.3 V, which is about 166 ns. By selecting t H = 100 ns and t L = 40 ns, the substantial non-writing lighting time could be reduced by at least 40/140.

実施例2の回路はバイポーラトランジスタを使い、定電流駆動を可能としたが、定電流回路を、抵抗選択回路と定電圧回路とで構成することもできる。抵抗選択回路は、MOSまたはC−MOSを使って、抵抗を切り替える構成とすることができる。図9,図10にその回路例を示す。   Although the circuit of the second embodiment uses bipolar transistors and can be driven at a constant current, the constant current circuit can be constituted by a resistance selection circuit and a constant voltage circuit. The resistance selection circuit can be configured to switch the resistance using MOS or C-MOS. 9 and 10 show circuit examples.

図9(a)に示す抵抗選択回路は、オープンドレイン型のインバータであり、MOS−FET81,82と、抵抗83,84とにより構成される。MOS−FET81,82は、2個の抵抗83,84を選択する回路である。   The resistance selection circuit shown in FIG. 9A is an open drain type inverter, and includes MOS-FETs 81 and 82 and resistors 83 and 84. The MOS-FETs 81 and 82 are circuits for selecting the two resistors 83 and 84.

図6と同様、61は非書込み時信号入力端子、62は書込み時信号入力端子、63はドライバ出力端子、64はドライバGND端子である。ドライバ出力端子63は、入力端子61,62の信号に応じて、抵抗83または84を介してGNDに接続される。   As in FIG. 6, 61 is a non-write signal input terminal, 62 is a write signal input terminal, 63 is a driver output terminal, and 64 is a driver GND terminal. The driver output terminal 63 is connected to GND via a resistor 83 or 84 in accordance with signals from the input terminals 61 and 62.

図9(b)に示す抵抗選択回路は、(a)の回路のMOS−FET81,82のドレインを抵抗85を介して電源端子69でプルアップしている。このプルアップにより、φ1,φ2ラインのオフ速度を速くできる。   In the resistance selection circuit shown in FIG. 9B, the drains of the MOS-FETs 81 and 82 in the circuit of FIG. By this pull-up, the off speed of the φ1 and φ2 lines can be increased.

図10(a)に示す抵抗選択回路は、図9(b)の回路において、抵抗85の代わりにMOS−FET86を用い、入力端子61,62がともにL信号のとき、電源端子69に接続する。なお、87はオフ信号入力端子を示している。   The resistance selection circuit shown in FIG. 10A uses the MOS-FET 86 instead of the resistance 85 in the circuit of FIG. 9B, and is connected to the power supply terminal 69 when both the input terminals 61 and 62 are L signals. . Reference numeral 87 denotes an off signal input terminal.

図10(b)に示す抵抗選択回路は、図10(a)におけるオフ信号入力を、OR回路88で入力端子61,62の信号のORをとることで合成している。   The resistance selection circuit shown in FIG. 10B combines the off signal input in FIG. 10A by ORing the signals of the input terminals 61 and 62 with the OR circuit 88.

以上のような構成の抵抗選択回路を定電圧回路(図示せず)と組み合わせて定電流駆動回路(ドライバ)を構成できる。   A constant current drive circuit (driver) can be configured by combining the resistance selection circuit having the above configuration with a constant voltage circuit (not shown).

図9(a)の抵抗選択回路を含むドライバは、図7で示したドライバ60と全く同じ接続で、図8の波形で同様に駆動できる。このドライバを用いた場合、図6の定電流型のドライバと重なり時間tの選び方が異なる。すなわち、図8において、非書込み電流の重なり時間tは、転送のために必要な重なり時間を十分大きくとった場合(たとえば、1秒)に、転送動作が可能な電圧の絶対値をV、クロックラインの容量をC、光書込みを行わないときの出力抵抗値をR(抵抗84)、クロックラインの電圧をVとしたときに、転送のために必要な重なり時間tは、
−RCln(1−V/V)<t
となるように選ぶ。これは、クロックラインを時定数RCの積分回路として充電したときに、時間t後には、点弧電圧Vに至ると言うことを示している。いま、C=15pF、V=−2.8V、V=−3.3V、R=5kΩとして、−RCln(1−V/V)=140ns程度となる。
The driver including the resistance selection circuit of FIG. 9A can be driven in the same manner with the waveform of FIG. 8 with the same connection as the driver 60 shown in FIG. When using this driver, the choice of the time t a overlaps the constant current driver of Figure 6 differs. That is, in FIG. 8, the overlap time t a non write current, when taken sufficiently large overlap time required for the transfer (e.g., 1 second), the absolute value of the voltage that can transfer operations V 0 , the capacity of the clock line C, and when the output resistance value when not performing optical writing and R n (resistor 84), the voltage of the clock line and V S, the overlap time t a required for transfer,
-R n Cln (1-V 0 / V S) <t a
Choose to be. This is because, when charging the clock line as the integrating circuit of the time constant R n C, and after the time t a, it is shown that to say that leads to ignition voltage V 0. Now, assuming that C = 15 pF, V 0 = −2.8 V, V S = −3.3 V, R n = 5 kΩ, −R n Cln (1−V 0 / V S ) = about 140 ns.

一方、重なり時間tを大きくすると言うことは、非書込み状態での点灯時間を大きくすることとなり、バイアス光の増加となる。この点を考慮すると、重なり時間tは−RCln(1−V/V)の5倍以下が望ましい。 On the other hand, to say that increasing the overlap time t a, becomes possible to increase the lighting time of the non-written state, an increase of the bias light. With this in mind, the overlap time t a is -R n Cln (1-V 0 / V S) 5 times or less is desirable.

実施例2,4で示したドライバで、非書込み電流Iと書込み電流Iの比を20〜50倍程度に設定すると、Iのオン/オフにより、書込み光出力を変化させることができる。さらに、IをIが流れるタイミングに対し、適当な時間点灯させることで、発光点毎の光量補正を行うことができる。実施例1に示したように、I単独で流すときはほとんど発光しないが、発光効率の高くなっているIに重畳することで、電流を効率よく使える。 In driver shown in Examples 2 and 4, setting the ratio of the non-write current I n and the write current I w to about 20 to 50 times, by I n on / off, it is possible to change the writing light output . Further, with respect to the timing of flowing the I n is I w, by turning on the appropriate time, it is possible to perform light amount correction for each light emitting point. As shown in Example 1, but hardly emission when passing by I n alone, by superimposing the I w which is higher in luminous efficiency, use efficiently current.

11,12…クロックパルスφ1,φ2端子、13…スタートパルスφ端子、14…裏面共通電極端子、15…VGA端子、30…光書込みヘッド、60…定電流駆動回路、61…非書込み時信号入力端子、62…書込み時信号入力端子、63…ドライバ出力端子、64…ドライバGND端子、65,66…抵抗、67…カレントミラー、81,82…MOS−FET DESCRIPTION OF SYMBOLS 11, 12 ... Clock pulse (phi) 1, (phi) 2 terminal, 13 ... Start pulse (phi) S terminal, 14 ... Back surface common electrode terminal, 15 ... VGA terminal, 30 ... Optical writing head, 60 ... Constant current drive circuit, 61 ... At the time of non-writing Signal input terminal, 62 ... Signal input terminal at the time of writing, 63 ... Driver output terminal, 64 ... Driver GND terminal, 65, 66 ... Resistor, 67 ... Current mirror, 81, 82 ... MOS-FET

Claims (10)

発光サイリスタよりなる発光素子が直線状に配列され、発光素子の発光を光書込み用として利用する転送機能を持った自己走査型発光素子アレイであって、
前記発光素子のそれぞれを順に光書込み可能な状態とする転送動作において、当該発光素子が光書込み可能な期間に、光書込みを行わないときは、オンした当該発光素子が再びオンするように電流を間欠的に与える
ことを特徴とする自己走査型発光素子アレイの駆動方法。
A self-scanning light-emitting element array having a transfer function in which light-emitting elements composed of light-emitting thyristors are linearly arranged and the light emission of the light-emitting elements is used for optical writing ,
In the transfer operation in which each of the light emitting elements is sequentially optically writable, when optical writing is not performed during the period in which the light emitting element can be optically written, a current is supplied so that the turned on light emitting element is turned on again. A method of driving a self-scanning light-emitting element array, characterized by being intermittently applied.
前記発光素子の駆動において、2値以上の出力電流値をとることの可能な定電流回路で駆動することを特徴とする請求項に記載の自己走査型発光素子アレイの駆動方法。 2. The method of driving a self-scanning light emitting element array according to claim 1 , wherein the light emitting element is driven by a constant current circuit capable of taking an output current value of two or more values. 転送のために必要な重なり時間を十分大きくとった場合に、転送動作が可能な電圧の絶対値をV、クロックラインの容量をC、光書込みを行わないときの電流値をIとしたときに、転送のために必要な重なり時間tを、
CV/I<t<5×CV/I
とすることを特徴とする請求項に記載の自己走査型発光素子アレイの駆動方法。
When taken sufficiently large overlap time required for the transfer, the absolute value of the transfer operation which can voltage V 0, the capacitance of the clock line C, and the current value when not performing optical writing was I n when to, the overlap time t a required for the transfer,
CV 0 / I n <t a <5 × CV 0 / I n
The method of driving a self-scanning light emitting element array according to claim 2 , wherein:
前記発光素子の駆動において、2値以上の抵抗値をとることの可能な抵抗選択回路と定電圧回路とで駆動すること特徴とする請求項1に記載の自己走査型発光素子アレイの駆動方法。   2. The method of driving a self-scanning light-emitting element array according to claim 1, wherein the light-emitting element is driven by a resistance selection circuit capable of taking a resistance value of 2 or more and a constant voltage circuit. 転送のために必要な重なり時間を十分大きくとった場合に、転送動作が可能な電圧の絶対値をV、クロックラインの容量をC、光書込みを行わないときの出力抵抗値をR、クロックラインの電圧をVとしたときに、転送のために必要な重なり時間tを、
−RCln(1−V/V)<t<−5×RCln(1−V/V
とすることを特徴とする請求項に記載の自己走査型発光素子アレイの駆動方法。
When the overlap time required for transfer is sufficiently long, the absolute value of the voltage at which the transfer operation can be performed is V 0 , the capacity of the clock line is C, the output resistance value when optical writing is not performed is R n , the voltage of the clock line is taken as V S, the overlap time t a required for transfer,
-R n Cln (1-V 0 / V S) <t a <-5 × R n Cln (1-V 0 / V S)
The method of driving a self-scanning light emitting element array according to claim 4 .
光書込みを行わないときの電流を、光書込みを行うときの電流に重畳して印加することを特徴とする請求項またはに記載の自己走査型発光素子アレイの駆動方法。 The current when not performing optical writing method for driving a self-scanning light-emitting element array according to claim 2 or 4, wherein the applying superimposed on current when performing optical writing. 発光サイリスタよりなる発光素子が直線状に配列され、発光素子の発光を光書込み用として利用する転送機能を持った自己走査型発光素子アレイと、
前記発光素子を順に光書込み可能な状態とする転送動作において、当該発光素子のそれぞれが光書込み可能な期間に、光書込みを行わないときは、オンした当該発光素子が再びオンするように電流を間欠的に与える定電流回路
を備えることを特徴とする光書込みヘッド。
A self-scanning light-emitting element array having a transfer function in which light-emitting elements made of light-emitting thyristors are linearly arranged and light emission of the light-emitting elements is used for optical writing;
In the transfer operation in which the light emitting elements are sequentially in a state where optical writing can be performed, when optical writing is not performed during a period in which each of the light emitting elements can be optically written, a current is supplied so that the turned on light emitting elements are turned on again. a constant current circuit for supplying intermittently
Optical writing head, characterized in that it comprises a.
前記定電流回路は、カレントミラーにより構成されていることを特徴とする請求項に記載の光書込みヘッド。 The optical writing head according to claim 7 , wherein the constant current circuit includes a current mirror. 前記定電流回路は、抵抗選択回路と定電圧回路とで構成されていることを特徴とする請求項に記載の光書込みヘッド。 The optical writing head according to claim 7 , wherein the constant current circuit includes a resistance selection circuit and a constant voltage circuit. 請求項またはに記載の光書込みヘッドを備えることを特徴とする光プリンタ。 An optical printer comprising the optical writing head according to claim 7 , 8 or 9 .
JP2009079009A 2009-03-27 2009-03-27 Self-scanning light emitting element array driving method, optical writing head, and optical printer Expired - Lifetime JP4998501B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009079009A JP4998501B2 (en) 2009-03-27 2009-03-27 Self-scanning light emitting element array driving method, optical writing head, and optical printer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009079009A JP4998501B2 (en) 2009-03-27 2009-03-27 Self-scanning light emitting element array driving method, optical writing head, and optical printer

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2003069062A Division JP2004276349A (en) 2003-03-14 2003-03-14 Driving method of self-scanning light emitting element array and optical writing head

Publications (2)

Publication Number Publication Date
JP2009143242A true JP2009143242A (en) 2009-07-02
JP4998501B2 JP4998501B2 (en) 2012-08-15

Family

ID=40914423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009079009A Expired - Lifetime JP4998501B2 (en) 2009-03-27 2009-03-27 Self-scanning light emitting element array driving method, optical writing head, and optical printer

Country Status (1)

Country Link
JP (1) JP4998501B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012076407A (en) * 2010-10-05 2012-04-19 Fuji Xerox Co Ltd Light emitting device, method of driving light emitting device, light emitting chip, print head, and image forming apparatus
JP2015074195A (en) * 2013-10-10 2015-04-20 富士ゼロックス株式会社 Optical scanner, and image forming apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288375A (en) * 1989-04-28 1990-11-28 Ricoh Co Ltd Light emission control circuit device for light emitting diode
JPH04296579A (en) * 1991-03-26 1992-10-20 Nippon Sheet Glass Co Ltd Driving of light-emitting element array
JP2001077421A (en) * 1999-09-06 2001-03-23 Nippon Sheet Glass Co Ltd Method of designing mask for self-scanning light emitting devices
JP2001119071A (en) * 1999-10-22 2001-04-27 Nippon Sheet Glass Co Ltd Drive circuit for self-scanning light emitting element array
JP2002079704A (en) * 2000-09-05 2002-03-19 Nippon Sheet Glass Co Ltd Method and circuit for driving self scanning type light- emitting element array
JP2004276349A (en) * 2003-03-14 2004-10-07 Nippon Sheet Glass Co Ltd Driving method of self-scanning light emitting element array and optical writing head

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288375A (en) * 1989-04-28 1990-11-28 Ricoh Co Ltd Light emission control circuit device for light emitting diode
JPH04296579A (en) * 1991-03-26 1992-10-20 Nippon Sheet Glass Co Ltd Driving of light-emitting element array
JP2001077421A (en) * 1999-09-06 2001-03-23 Nippon Sheet Glass Co Ltd Method of designing mask for self-scanning light emitting devices
JP2001119071A (en) * 1999-10-22 2001-04-27 Nippon Sheet Glass Co Ltd Drive circuit for self-scanning light emitting element array
JP2002079704A (en) * 2000-09-05 2002-03-19 Nippon Sheet Glass Co Ltd Method and circuit for driving self scanning type light- emitting element array
JP2004276349A (en) * 2003-03-14 2004-10-07 Nippon Sheet Glass Co Ltd Driving method of self-scanning light emitting element array and optical writing head

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012076407A (en) * 2010-10-05 2012-04-19 Fuji Xerox Co Ltd Light emitting device, method of driving light emitting device, light emitting chip, print head, and image forming apparatus
JP2015074195A (en) * 2013-10-10 2015-04-20 富士ゼロックス株式会社 Optical scanner, and image forming apparatus
US9030514B2 (en) * 2013-10-10 2015-05-12 Fuji Xerox Co., Ltd. Light scanning device and image forming apparatus

Also Published As

Publication number Publication date
JP4998501B2 (en) 2012-08-15

Similar Documents

Publication Publication Date Title
US20070296803A1 (en) Self-scanning light-emitting element array and driving method and circuit of the same
US8305415B2 (en) Light-emitting device including a light-up controller, driving method of self-scanning light-emitting element array and print head including the same
JP4543487B2 (en) Lighting method of optical printer head
US8274539B2 (en) Light-emitting element array drive device, print head, image forming apparatus and signal supplying method
US6184971B1 (en) Exposure apparatus and image formation apparatus
JP4929794B2 (en) Optical writing head
JP4998501B2 (en) Self-scanning light emitting element array driving method, optical writing head, and optical printer
JP5245897B2 (en) Self-scanning light emitting element array chip, optical writing head, and optical printer
US6657651B2 (en) Optical writing head and method of correcting the deviation of a line of light spots
JP2004181741A (en) Self-scan type light emitting element array chip and optical writing head
US6642950B2 (en) Optical printer head and driving method thereof
JP2007223166A (en) Method for driving optical writing head using self-scanning type light-emitting element array
JP4281240B2 (en) Self-scanning light emitting element array and driving method thereof
JP4281237B2 (en) Self-scanning light emitting device array chip
JP2004276349A (en) Driving method of self-scanning light emitting element array and optical writing head
JP2006305892A (en) Driving circuit, print head and image forming apparatus using it
JP2006305892A5 (en)
JP2007250853A (en) Self-scanning type light-emitting element array
JP4165003B2 (en) Self-scanning light emitting element array driving method and image forming apparatus
JP2005026617A (en) Self-scanning type light emitting element array chip, and optical write head
JP2003182142A (en) Method for driving optical write head
JP4356489B2 (en) Light emitting element array driving apparatus and print head
JP4843307B2 (en) Light emitting device and image forming apparatus
JP2003226042A (en) Driving circuit for optical writing head
JPH06312536A (en) Light emitting diode array, light emitting diode printer and printing method therefor

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090327

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111122

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120117

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120417

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120430

R150 Certificate of patent or registration of utility model

Ref document number: 4998501

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150525

Year of fee payment: 3

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

EXPY Cancellation because of completion of term