JP2009141126A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of imprinting mark information on a limited space without impairing viewability, and to provide a method of manufacturing the same. <P>SOLUTION: The semiconductor device 100 has a sealing portion 10 to cover a semmiconductor chip 6 formed on a wiring board 1, and also has a first mark 11 formed on the upper surface of the sealing portion 10 and a second mark 12, smaller in size than the first mark 11, formed in the formation region of the first mark 11. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a sealing portion that covers a semiconductor chip formed on a wiring substrate and a manufacturing method thereof, and more particularly to a semiconductor device having a predetermined mark on the upper surface of the sealing portion and a manufacturing method thereof. .

  With the development of technology in recent years, semiconductor devices have been downsized to be mounted on small and thin electronic devices such as mobile phones. Along with this, a space for forming marks or the like imprinted on the semiconductor device is reduced. However, there is a need to add information other than the product model number (production information such as a production lot number) to the product in order to improve the traceability of the product.

  Conventionally, as a technique for marking production information such as a product lot number on a semiconductor device, for example, there is JP-A-2000-183238 (Patent Document 1). The outline is that a display area for displaying an identification mark is composed of a plurality of areas divided vertically and horizontally, and an identification mark is formed in each area.

  However, since the display area for displaying the mark is divided into a plurality of parts, production information such as a product lot number can be added to the semiconductor device, but the area displayed in one area is also reduced. As a result, identification marks such as manufacturer names and product names are also reduced. This may make it difficult to identify the manufacturer name or product name. Furthermore, in recent years, semiconductor devices have been miniaturized and the mark display area has also been reduced.

  Japanese Patent Application Laid-Open No. 11-162800 (Patent Document 2) discloses a technique for marking information in a limited space, although it is not a mark of a semiconductor package (PKG). As its outline, 2D-coded dot marks are marked on a scribe line of a semiconductor wafer. However, although it is possible to write information in a space-saving part, the 2D-coded dot mark deteriorates the visibility of identification marks such as manufacturer names and product names. In addition, with a 2D dot mark, it is difficult to form a mark indicating a plurality of information in the same area.

  Furthermore, since a mask is used for marking according to the present technology, there is a problem that it cannot be applied to marking of information that is desired to be flexibly changed, such as a manufacturing lot number and a manufacturing date.

  Further, as a laser marking technique for forming a mark on the surface of a semiconductor device by irradiating the surface of the semiconductor device with a laser beam, there is, for example, Japanese Patent Application Laid-Open No. 2002-113484 (Patent Document 3). Engraving by this technique is as follows: (1) Since the engraving layer is only one layer, the number of imprints per unit area is small. (2) A color underlayer and a surface layer are formed on the PKG sealing layer. There is a problem that the number of man-hours for layer formation increases.

JP 2000-183238 A Japanese Patent Laid-Open No. 11-162800 JP 2002-113484 A

  Accordingly, the present invention has been made in view of the above-described problems of the prior art, and an object of the present invention is to provide a semiconductor device capable of marking mark information in a limited space without impairing visibility, and It is in providing the manufacturing method.

  Another object of the present invention is to provide a semiconductor device capable of imprinting a plurality of pieces of mark information by adjusting the size, depth, color or location in a certain area, and a method for manufacturing the same.

  Still another object of the present invention is to provide a semiconductor device applicable to the marking of information to be changed flexibly such as a manufacturing lot number and a manufacturing date, and a manufacturing method thereof.

  In order to achieve the above object, according to the present invention, in a semiconductor device having a sealing portion that covers a semiconductor chip formed on a wiring substrate, a first mark formed on the upper surface of the sealing portion, And a second mark formed smaller than the first mark in the mark formation region.

  Preferably, the second mark is formed in the formation area of the first mark without impairing the visibility of the first mark.

  Preferably, fixed identification information is added to the first mark, and variable production information is added to the second mark.

  For example, the identification information of the first mark includes a manufacturer name or a product name, and the production information of the second mark includes a manufacturing lot number or a manufacturing date of the product.

  Preferably, the second mark is formed in a margin in the first mark formation region.

  Further, the second mark may be formed by dots.

  Further, the second mark may be formed at a plurality of locations in the first mark formation region.

  Preferably, the wiring board and the semiconductor chip are connected by a wire, and the second mark is formed in a region having no wire connecting portion.

  Preferably, the first mark is formed as a first marking surface at a first depth in the sealing portion, and the second mark is deeper than the first depth in the sealing portion. A second marking surface is formed at the second depth.

  Here, it is preferable that the information added to the first mark and the second mark is recognized by changing the focus position of the optical recognition device.

  Further, an angle at which the second mark is formed may be set to an angle different from an angle at which the first mark is formed.

  In this case, it is preferable that the information added to the first mark and the second mark is recognized by changing the angle of the optical recognition device.

  Further, at least the second mark is an invisible mark, and may be recognized using an ultrasonic imaging apparatus.

  Further, the second mark may be given a color different from that of the first mark.

  In the method for manufacturing a semiconductor device of the present invention, a semiconductor chip is formed on a wiring substrate, a sealing portion is formed so as to cover the semiconductor chip, a first mark is formed on the upper surface of the sealing portion, A second mark smaller than the first mark is formed in the formation area of the first mark.

  Preferably, the first mark and the second mark are formed by a laser mark device having a glass mask on which information to be displayed is formed.

  It is preferable that the first mark and the second mark are not formed on a defective product.

  For example, the second mark may be directly printed with a laser.

  In this case, it is preferable that the information added to the second mark is variably set by changing the apparatus program.

  For example, the information added to the second mark includes production information.

  Further, in the step of forming the sealing portion, a convex portion is formed in the cavity portion of the upper mold of the mold, and a sealing resin is poured into the cavity portion to mold, thereby forming an upper surface of the sealing portion. The first mark may be formed as a recess.

  According to the present invention, mark information can be imprinted in a limited space without impairing visibility.

  In addition, a plurality of pieces of mark information can be imprinted by adjusting the size, depth, color or location in a certain area.

  In addition, information to be changed flexibly such as a production lot number and a production date can be stamped.

  Next, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a plan view illustrating a BGA (Ball Grid Array) type semiconductor device (package) according to the first embodiment. FIG. 2 is a cross-sectional view taken along FIG. 1A-A '. FIG. 3 is a partially enlarged view of the surface of the semiconductor device of FIG.

  As shown in FIGS. 1 and 2, the semiconductor device 100 according to the first embodiment includes a wiring board 1 having a substantially rectangular shape on which predetermined wiring is formed. The wiring board 1 is, for example, a 0.25 mm glass epoxy board, on which predetermined wiring is formed. A plurality of connection pads 2 are formed on one surface of the wiring board 1. A plurality of lands 3 are formed in a lattice pattern on the other surface of the wiring board 1. The connection pad 2 and the wiring end adjacent to the land 3 corresponding thereto are electrically connected by the wiring 4 of the wiring board 1. In addition, solder balls serving as external terminals 5 are respectively mounted on the plurality of lands 3, and the external terminals 5 are arranged in a grid at predetermined intervals.

  A semiconductor chip 6 is bonded and fixed to an approximately central portion of one surface of the wiring board 1 via an insulating adhesive 7. For example, a logic circuit, a memory circuit, and the like (not shown) are formed on one surface of the semiconductor chip 6. A plurality of electrode pads 8 are formed in the vicinity of the periphery of the semiconductor chip 6.

  The electrode pads 8 of the semiconductor chip 6 are electrically connected by being connected to the corresponding connection pads 2 of the wiring substrate 1 by conductive wires 9. For example, Au, Cu, Al or the like is used for the wire 9.

  One surface of the wiring substrate 1 is covered with a sealing portion 10 so as to cover the semiconductor chip 6 and the wires 9. The sealing unit 10 is made of a thermosetting resin such as an epoxy resin.

  A first mark 11 and a second mark 12 are formed on the upper surface of the sealing portion 10. The first mark 11 is an identification mark such as a manufacturer name or a product name. A second mark 12 having a size smaller than that of the first mark 11 is formed on the first mark 11. The second mark 12 is, for example, production information such as a product production lot number and production date. The second mark 12 is formed on the first mark 11 to be smaller than the first mark 11. For this reason, production information or the like can be added to the formation area of the first mark 11 without impairing the visibility of the first mark 11 of the product (semiconductor device 100).

  As shown in FIG. 3, the first mark 11 is formed as a first marking surface 32 at a first depth (distance D 1 from the PKG surface 31) in the sealing portion 10. The second mark 12 is formed as a second marking surface 33 at a second depth (distance from the PKG surface 31 to D2) deeper than the first depth (D1) in the sealing portion 10. .

  Since the second mark 12 is formed at a depth different from that of the first mark 11, the first mark 11 (FIG. 4) is changed by changing the focal position of the optical recognition device 40 as shown in FIG. (See (a)) and the second mark 12 (see FIG. 4 (b)) can be recognized separately.

  Further, the mark may be recognized not by the optical recognition device 40 but by using an ultrasonic image device (not shown). In the case of using an ultrasonic imaging apparatus, it is possible to recognize even a minute stamp that cannot be visually recognized.

  Further, the second mark 12 can be formed without exposing the wire 9 from the sealing portion 10 (package) by providing the second mark 12 in an area without the wire connection portion.

  Next, a method for manufacturing the semiconductor device 100 according to the first embodiment will be described with reference to FIG.

  First, the wiring mother board 50 used for manufacturing the semiconductor device 100 of the first embodiment is a board made of a glass epoxy base material, and has a plurality of product formation regions 51. The product forming regions 51 are arranged in a matrix, and dicing lines 52 are formed between the product forming regions 51. By cutting the wiring mother board 50 along the dicing line 52, the wiring board 1 of the semiconductor device 100 is obtained.

  The product formation region 51 has the same structure as that of the wiring substrate 1 of the semiconductor device 100, and a plurality of connection pads 2 are formed around a portion where the semiconductor chip 6 on one surface is mounted, and on the other surface side. A plurality of lands 3 arranged in a lattice pattern are formed. The connection pad 2 and the corresponding land 3 are electrically connected via the wiring 4. In this way, the wiring mother board 50 is prepared (FIG. 5A).

  The wiring mother board 50 is transferred to the die bonding process, and the semiconductor chip 6 is mounted in the center area of each product forming area 51 as shown in FIG. The semiconductor chip 6 is fixed to the product formation region 51 by, for example, an insulating adhesive 7 by a die bonding apparatus (not shown).

  Next, the wiring mother board 50 is transferred to a wire bonding process, and as shown in FIG. 5B, the electrode pads 8 on the semiconductor chip 6 and the corresponding connection pads 2 of the wiring board 1 are connected to, for example, Au. It is connected by a conductive wire 9 made of Wire bonding is performed by ultrasonic thermocompression bonding of a wire having a ball formed at the tip thereof to the electrode pad 8 by a wire bonding apparatus (not shown), and then drawing the predetermined loop shape to connect the rear end to the connection pad of the wiring board 1. 2 is connected by ultrasonic thermocompression bonding. All electrode pads 8 and connection pads 2 are connected by wires 9.

  Next, the wiring mother board 50 in which the wire bonding is completed is transferred to a molding process. In the molding process, a state in which a molten sealing resin, for example, a thermosetting epoxy resin, is filled and filled in a state where the wiring mother board 50 is closed by an upper mold and a lower mold of a transfer mold apparatus (not shown) Cure with. As a result, the sealing resin is thermally cured, and as shown in FIG. 5C, the sealing portion 10 that collectively covers the plurality of product formation regions 51 is formed. By using a collective mold, the sealing part 10 can be formed efficiently.

  Next, as shown in FIG. 5D, the first mark 11 is formed on the sealing portion 10. In the marking step, the first mark 11 is formed on the upper part of the sealing body 10 for each product formation region 51 of the wiring mother board 50 by, for example, a laser mark device. In the laser mark apparatus, for example, as shown in FIG. 6, laser light oscillated from a laser oscillator 60 such as a YAG (Yttrium Aluminum Garnet) laser reaches a mask 62 via a reflecting mirror 61. As the mask 62, for example, a glass mask is used, and characters or the like to be displayed as marks are formed. The laser beam that has passed through the mask 62 reaches the surface of the sealing portion 10 in the product formation region 51 by the imaging lens 63 and the predetermined first mark 11 is imprinted thereon. In addition, by not forming a mark in the defective product formation region, it becomes easy to identify defective products.

  In the wiring mother board 50, since the product formation regions 51 are formed in a matrix shape, the first marks 11 may be collectively formed in all the product formation regions 51. Manufacturing efficiency is improved by batch marking.

  The second mark 12 is formed in the same manner as the first mark 11. The second mark 12 may be formed so as to be directly printed with a laser. When directly printing with a laser, different marks can be formed by changing the apparatus program, so that flexible information such as production information can be marked.

  Next, the wiring mother board 50 is transferred to a ball mounting process. In the ball mounting step, the external terminals 5 are formed by mounting solder balls on the lands 3 on the other surface of the wiring mother board 50 as shown in FIG. In the ball mounting process, for example, the solder balls are vacuum-sucked by the mount tool 53 of the ball mounter, and the solder balls are mounted on the lands 3 of the wiring board 1 through the flux. Thereafter, the solder balls are connected to the lands 3 as the external terminals 5 by reflowing the wiring mother board 50.

  Next, the wiring mother board 50 on which the solder balls as the external terminals 5 are mounted is transferred to a board dicing process. In the substrate dicing process, as shown in FIG. 5 (f), the sealing portion 10 is bonded and fixed to the dicing tape 54, and the dicing line 52 of the wiring mother board 50 is rotationally ground by the high-speed rotating dicing blade 55. Then, each product forming area 51 is cut and separated. Thereafter, by picking up the product formation region 51 from the dicing tape 54, the semiconductor device 100 as shown in FIG. 1 is obtained.

  According to the first embodiment, the production information such as the production lot number after the second layer (first mark 12) is obtained without impairing the visibility of the first mark 11 (first layer marking) such as the product model number. Can be applied to the semiconductor device 100. This improves the traceability of the product.

  In addition, even with existing mark equipment, this can be realized by engraving a plurality of times by changing the character size and depth.

  Furthermore, by providing an invisible mark, it is possible to print the mark with a size and depth with high distinguishability in a portion having a small impact on the semiconductor device 100.

  FIG. 7 is a cross-sectional view of main parts showing marks of the semiconductor device 100 of the second embodiment.

  As shown in FIG. 7, the angle of the optical recognition device 40 (see FIG. 4) is changed by configuring the angle for forming the second mark 12 to be different from the angle for forming the first mark 11. Thus, the recognition of the first mark 11 and the second mark 12 can be separated.

  Specifically, the first mark 11 is formed as a first marking surface 72 at a first angle at a first depth in the sealing portion 10 with respect to the PKG surface 71. Further, the second mark 12 is formed as a second marking surface 73 at a second angle in the second depth in the sealing portion 10 with the PKG surface 71 as a reference.

  FIG. 8 is a cross-sectional view showing a modification of the method for forming the first mark 11.

  As shown in FIG. 8A, the mold 80 is composed of an upper mold 81 and a lower mold 82, and a convex portion 84 that becomes the first mark 11 is formed in the cavity 83 of the upper mold 81 of the mold 80. Form it.

  And as shown in FIG.8 (b), sealing resin is poured in the cavity part 81 and it molds collectively. As a result, as shown in FIG. 8C, a recess 85 to be the first mark 11 is formed in each product formation region. Thus, in the molding process, the production efficiency can be improved by forming the first mark 11.

  FIG. 9 is a plan view showing a modification of the second mark 12.

  As shown in FIG. 9, the amount of information displayed on the small space of the first mark 11 can be increased by forming the second mark 12 with dots.

  FIG. 10 is a plan view showing a modification of the second mark 12.

  As shown in FIG. 10, the second marks 12 a and 12 b may be displayed at a plurality of locations of the first mark 11. Thereby, the amount of information added to the product (semiconductor device 100) can be further increased.

  According to the embodiment of the present invention, by forming the second mark 12 smaller than the first mark 11 on the first mark 11, without impairing the visibility of the first mark 11, Manufacturing information displayed on the semiconductor device 100 can be increased.

  Further, different marks can be recognized by changing the angle at which the first mark 11 and the second mark 12 are recognized.

  Further, by forming the second mark 12 by dot display, a lot of information can be added to the small space on the first mark 11.

  In addition, by providing the second mark 12 at a plurality of locations of the first mark 11, information to be formed on the first mark 11 can be increased.

  Further, by forming the second mark 12 deeper than the first mark 11, the recognition of the first mark 11 and the second mark 12 can be changed by changing the depth of focus of the recognition device.

  Further, the marking information can be set to be changeable by the apparatus program, and the production information held by the apparatus can be stamped as the marking information. Thereby, flexible information such as production information can be marked.

  In addition, the setting range of the marking depth and the marking color includes not only the optical recognition but also the readable range of the ultrasonic imaging apparatus, so that an invisible mark can be stamped. Thereby, the mark which cannot be visually recognized can also be provided to a product.

  Although the invention made by the present inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited to the above embodiments and can be variously modified without departing from the gist thereof. Yes.

  For example, in this embodiment, the present invention is applied to a BGA type semiconductor device. However, it is necessary to form a mark such as QFP (Quad Flat Package), QFN (Quad Flat Non-lead package), LGA (Land Grid Array), etc. Any package can be applied.

  Moreover, in the said Example 1, as shown in FIG. 3, the 1st mark 11 is formed in the 1st depth in the sealing part 10 as the 1st marking surface 32, and the 2nd mark 12 is The second marking surface 33 is formed at a second depth that is deeper than the first depth in the sealing portion 10, but the second mark 12 is colored differently from the first mark 11. You may do it.

It is a top view which shows the semiconductor device of Example 1 of this invention. It is sectional drawing between A-A 'of FIG. FIG. 3 is a partially enlarged view of the surface of the semiconductor device of FIG. 2. It is a figure which shows the method (a) which recognizes a 1st mark using an optical recognition apparatus, and the method (b) which recognizes a 2nd mark. It is a figure which shows the manufacturing method of the semiconductor device of Example 1 of this invention. It is a figure which shows the method of forming a 1st mark on the sealing body upper part of a wiring mother board using a laser mark apparatus. It is principal part sectional drawing which shows the mark of the semiconductor device of Example 2 of this invention. It is sectional drawing which shows the modification of the formation method of the 1st mark which concerns on Example 3 of this invention. It is a top view which shows the modification of the 2nd mark which concerns on Example 4 of this invention. It is a top view which shows the modification of the 2nd mark which concerns on Example 5 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wiring board 2 Connection pad 3 Land 4 Wiring 5 External terminal 6 Semiconductor chip 7 Adhesive 8 Electrode pad 9 Wire 10 Sealing part 11 1st mark 12 2nd mark 100 Semiconductor device

Claims (21)

In a semiconductor device having a sealing portion that covers a semiconductor chip formed on a wiring board,
A first mark formed on the upper surface of the sealing portion;
And a second mark formed smaller than the first mark in a region where the first mark is formed.   2. The semiconductor device according to claim 1, wherein the second mark is formed in a region where the first mark is formed without impeding visibility of the first mark.   3. The semiconductor device according to claim 1, wherein fixed identification information is added to the first mark, and variable production information is added to the second mark.   4. The semiconductor device according to claim 3, wherein the identification information of the first mark includes a manufacturer name or a product name, and the production information of the second mark includes a manufacturing lot number or a manufacturing date of the product.   5. The semiconductor device according to claim 1, wherein the second mark is formed in a margin in a formation area of the first mark. The semiconductor device according to claim 1, wherein the second mark is formed by a dot.   7. The semiconductor device according to claim 1, wherein the second mark is formed at a plurality of locations in a region where the first mark is formed.   The said wiring board and the said semiconductor chip are connected by the wire, The said 2nd mark is formed in the area | region without a wire connection part, The Claim 1 thru | or 7 characterized by the above-mentioned. Semiconductor device. The first mark is formed as a first marking surface at a first depth in the sealing portion,
The said 2nd mark is formed in the 2nd depth deeper than the said 1st depth in the said sealing part as a 2nd marking surface, The one in any one of Claim 1 thru | or 8 characterized by the above-mentioned. The semiconductor device described.   10. The semiconductor device according to claim 9, wherein the information added to the first mark and the second mark is recognized separately by changing a focal position of an optical recognition device.   10. The semiconductor device according to claim 9, wherein an angle for forming the second mark is set to an angle different from an angle for forming the first mark.   The semiconductor device according to claim 11, wherein the information added to the first mark and the second mark is recognized by changing an angle of an optical recognition device.   The semiconductor device according to claim 9, wherein at least the second mark is an invisible mark and is recognized using an ultrasonic imaging apparatus.   The semiconductor device according to claim 1, wherein the second mark has a different color from the first mark. A semiconductor chip is formed on the wiring board,
A sealing part is formed so as to cover the semiconductor chip,
Forming a first mark on the upper surface of the sealing portion;
A method of manufacturing a semiconductor device, wherein a second mark smaller than the first mark is formed in a first mark formation region.   16. The method of manufacturing a semiconductor device according to claim 15, wherein the first mark and the second mark are formed by a laser mark device having a glass mask on which information to be displayed is formed.   16. The method of manufacturing a semiconductor device according to claim 15, wherein the first mark and the second mark are not formed on a defective product.   The method of manufacturing a semiconductor device according to claim 15, wherein the second mark is directly printed by a laser.   19. The method of manufacturing a semiconductor device according to claim 18, wherein the information added to the second mark is variably set by changing an apparatus program.   20. The method of manufacturing a semiconductor device according to claim 19, wherein the information added to the second mark includes production information.   In the step of forming the sealing portion, a convex portion is formed in the cavity portion of the upper mold of the mold, and the sealing resin is poured into the cavity portion and molded, whereby the first portion is formed on the upper surface of the sealing portion. The method of manufacturing a semiconductor device according to claim 15, wherein one mark is formed as a recess.

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