JP2009129407A - Control device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a control device, wherein a plurality of arithmetic units control a plurality of control targets, that can correctly detect troubles in arithmetic functions. <P>SOLUTION: The control device, equipped with a plurality of arithmetic means for controlling a plurality of control targets, includes an arithmetic timing synchronizing means for synchronizing arithmetic timings of the plurality of arithmetic means, and a determining means to determining whether the results of mathematical operations of the plurality of arithmetic means coincide or not. At a prescribed arithmetic timing determined by the arithmetic timing synchronizing means, one of the plurality of arithmetic means performs calculations to control one of the plurality of control targets and outputs the results of mathematical operations to the determining means. Furthermore, one of the other arithmetic means performs the same calculations and outputs the results of mathematical operations to the determining means, and performs calculations to control the other control targets of the plurality of control targets. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a control device that controls a plurality of controlled objects by a plurality of arithmetic devices.

  A hybrid vehicle that has been widely put into practical use in recent years has a configuration in which a plurality of driving motors are mounted, and an arithmetic device such as a CPU (Central Processing Unit) generates a control signal for each. Unlike a servo motor or the like in an air conditioner or the like, the traveling motor is directly involved in the traveling of the vehicle, so that it is required to be driven without causing a control error from the viewpoint of safe driving.

In this regard, there is disclosed an invention relating to a power output device that includes two CPUs (first CPU and second CPU) for controlling two motors for traveling, respectively, and the two CPUs monitor each other's abnormality ( For example, see Patent Document 1). In this document, as a method for detecting an abnormality of the second CPU, (1) an electric signal (voltage waveform) generated by a resolver (rotation angle sensor) is input to the first CPU, and this electric signal is A / D A rotation angle is obtained from a value obtained by sampling by a converter (not shown), and the rotation angle converted by the R / D converter of the second CPU is compared to determine whether or not it is within a normal range. Method, (2) When performing current feedback control, the command current of the three-phase coil of the motor set based on the torque command value input from another control device and the rotation angle of the motor, and detected by the current sensor (3) A switching signal to the switching element of the inverter circuit is converted into a sinusoidal voltage waveform through a filter. A method of comparing the amplitude and phase with this and the motor command voltage. (4) A clock signal having a fixed period is output from the second CPU to the first CPU, and the abnormality of the second CPU is judged when this signal does not occur for a predetermined period or more. (5) An abnormality of the second CPU is determined by detecting the contents of the memory using an error detection code such as parity or checksum, or predetermined data is output to the first CPU via the communication line and A method is described in which an abnormality of the second CPU is determined by determining whether communication is performed.
JP 2003-32805 A

  However, all the methods described in the above-mentioned conventional patent documents detect that the CPU is in an abnormal state depending on whether or not various states resulting from the control by the CPU are within a normal range. However, it does not have a property that can directly and accurately determine whether or not the arithmetic function of the CPU is normal.

  The present invention has been made to solve such problems, and a main object of the present invention is to more accurately detect an abnormality in an arithmetic function in a control device that controls a plurality of controlled objects by a plurality of arithmetic devices.

In order to achieve the above object, one embodiment of the present invention provides:
A control device comprising a plurality of computing means for performing computations for controlling a plurality of controlled objects,
A calculation timing synchronization means for synchronizing calculation timings in the plurality of calculation means, a determination means for determining whether or not the calculation results of the plurality of calculation means are matched,
With
In the predetermined calculation timing determined by the calculation timing synchronization means,
One computing means among the plurality of computing means performs computation for controlling one control object among the plurality of control objects, and outputs a computation result to the determination means,
The other calculation means among the plurality of calculation means performs the same calculation as the calculation performed by the one calculation means and outputs the same to the determination means, and controls other control objects among the plurality of control objects. It is characterized by performing an operation for
It is a control device.

  According to this aspect of the present invention, in a control device that controls a plurality of objects to be controlled by a plurality of arithmetic devices, an abnormality in the arithmetic function can be detected more accurately.

In one embodiment of the present invention,
The calculation unit that performs the same calculation as the calculation performed by the one calculation unit and outputs the calculation to the determination unit, and the calculation unit that performs a calculation for controlling another control object among the plurality of control objects includes: The calculation means that performed only the calculation for controlling one control object among the control objects of the control object does not perform the same calculation as the calculation performed by the one calculation means at the next calculation timing. It is good also as what.

In one embodiment of the present invention,
The role of performing only the calculation for controlling one control object among the plurality of control objects, the same calculation as the calculation performed by the one calculation means, and outputting to the determination means and the plurality of controls It is good also as what is characterized by alternating the role which performs the calculation for controlling another control object among objects.

In one embodiment of the present invention,
The plurality of control objects are motors,
The calculation timing determining means controls a motor having a smaller rotation speed in accordance with a predetermined association between each calculation means and each motor when the rotation speed ratio of the plurality of motors is equal to or greater than a predetermined ratio. It may be a means for instructing the plurality of calculation means so that the calculation frequency of the calculation means for performing the calculation is small.

in this case,
When the rotation speed ratio of the plurality of motors is equal to or greater than a predetermined ratio by the calculation timing determination means, the motor with the lower rotation speed is controlled according to the predetermined association between the calculation means and each motor. When the plurality of calculation means are instructed to reduce the calculation frequency of the calculation means for performing the calculation,
The calculation means instructed to reduce the calculation frequency performs the same calculation as the calculation performed by the other calculation means and outputs it to the determination means, and controls the motor associated with the calculation means. It is characterized by performing an operation,
In one embodiment of the present invention,
When the determination means determines that the calculation results of the first and second calculation means are not consistent, the same calculation for which the correct calculation result is known in advance is performed as the first and second calculation means. To determine which computing means is in an abnormal state.

In one embodiment of the present invention,
When it is determined by the determination means that the calculation results by the plurality of calculation means are not consistent, the calculation means specified as being in an abnormal state is stopped, and the calculation result of the calculation means that is not stopped is displayed. The plurality of control objects may be used to control the plurality of control objects.

  ADVANTAGE OF THE INVENTION According to this invention, in the control apparatus which controls a several control object with a several arithmetic device, abnormality of a calculation function can be detected more correctly.

  Hereinafter, the best mode for carrying out the present invention will be described with reference to the accompanying drawings.

  Hereinafter, the control apparatus 1 which concerns on one Example of this invention is demonstrated. In the following embodiments, the control device 1 will be described as including a core 4 and a core 5 that are mounted on a hybrid vehicle and control the driving motors MG1 and MG2, respectively.

[1. Constitution]
FIG. 1 is a diagram illustrating an example of the overall configuration of the control device 1. The control device 1 includes a memory 2, an arbiter 3, cores 4 and 5, a result comparison circuit 8, and a carrier synchronization circuit 10 as main components.

  The memory 2 stores specification values of the motor MG1, logic, specification values for base calculation, specification values of the motor MG2, and the like.

  The arbiter 3 is an electronic circuit provided for adjusting access from the core 4 and the core 5 to the memory 2.

  The cores 4 and 5 are functional units having a function corresponding to a conventional CPU (Central Processing Unit). That is, it comprises an ALU (Logical Operation Unit), a control device, a register, a clock generator, and the like. The cores 4 and 5 may be configured as a single chip or may be configured as separate bodies. The cores 4 and 5 have carrier generation units 6 and 7 as their functions.

  The carrier generators 6 and 7 generate signal waves (carriers) representing current application timing, voltage value, current value, duty ratio, and the like used for driving the motors MG1 and MG2, and output the signal waves to the inverters 22 and 23. .

  The result comparison circuit 8 incorporates a base result 9. The base result 9 is a result (correct answer) to be output when the cores 4 and 5 perform the base calculation.

  The carrier synchronization circuit 10 synchronizes the timing of the carriers generated by the carrier generators 6 and 7. Specifically, for example, a clock signal used in common by the carrier generation units 6 and 7 is output. The frequency of the clock signal is generated and output so as to be as high as possible based on, for example, the rotational speeds of the motors MG1 and MG2 and the arithmetic functions of the cores 4 and 5. The carrier synchronization circuit 10 has a built-in carrier switching mechanism 11, and when the rotation speed ratio of the motors MG1 and MG2 is twice or more, the carrier frequency generated by the carrier generators 6 and 7 (carrier) A signal for changing the frequency is output to the cores 4 and 5.

  The difference holding circuits 12 and 13 temporarily hold the difference between the drive signals for the motors MG1 and MG2 that have been calculated most recently, and the cores 4 and 5 can perform calculation using this in the next calculation. I am doing so.

  The IO registers 14 and 15 are input / output interfaces between the control device 1 and the controlled objects and sensors. Output values of current sensors 16 and 17 and resolvers (rotation angle sensors) 18 and 19 attached to the motors MG1 and MG2 are input to the IO registers 14 and 15, respectively. The signals input to the IO registers 14 and 15 are output to inverters 22 and 23 that control the switching of the motors MG1 and MG2.

[2. Processing content]
Hereinafter, characteristic processing contents of the control device 1 of the present embodiment realized by such a configuration will be described.

[2_1. Basic control]
First, basic control will be described. This control is executed when the arithmetic functions of the cores 4 and 5 are in a normal state and the rotation speed ratio between the motors MG1 and MG2 is less than twice. In such a scene, the calculation timings of the cores 4 and 5 are synchronized, and the carrier timings generated by the carrier generation units 6 and 7 are synchronized. Then, calculation for one motor is performed by both cores, and the result comparison circuit 8 compares the calculation results. If this coincides, one core outputs the operation result to the IO register as it is, and the other core refers to the difference (the difference between the drive signals given to each motor) based on the value of the difference holding circuit. The difference between the torque and the duty ratio may be calculated), and the sum of the difference and the calculated calculation result for one motor is output to the IO register. At this time, the core on the side calculated using the difference does not perform the calculation performed by both cores. By doing so, it is possible to prevent an excessive calculation load on the side performing both the same calculation performed by both cores and the calculation using the difference.

  Then, the cores 4 and 5 execute such processing alternately. FIG. 2 is a diagram schematically illustrating a process in a scene where basic control is performed. In the figure, the motor MG1 for the core 4 and the motor MG2 for the core 5 are expressed as the own motor, and the motor MG2 for the core 4 and the motor MG1 for the core 5 are expressed as other motors (hereinafter the same).

  By such control, the calculation timings in each core can be matched every other time, and the same calculation can be performed, so it is possible to monitor whether or not the calculation function of the core is in a normal state. .

[2-2. Control when the speed ratio is large]
The carrier switching mechanism 11 instructs the core 4 or 5 so that the carrier frequency of the core that controls the motor on the low rotation side is halved when the rotation speed ratio of the motors MG1 and MG2 becomes twice or more. Output a signal. In such a scene, the calculation using the difference is performed in the core on the side where the carrier frequency is halved, similarly to the basic control. FIG. 3 is a diagram schematically illustrating a process in a scene where control is performed when the rotation speed ratio is large.

  With such control, the calculation frequency of each core and thus the carrier frequency can be changed according to the number of rotations of the motor. As a result, the calculation frequency on the high rotation side can be increased and the calculation timing is synchronized. This can prevent adverse effects (deterioration of control responsiveness).

[2-3. When the calculation results do not match]
In the case of [basic control] or [control when the rotation speed ratio is large], if the calculation results output by the respective cores to the result comparison circuit 8 do not match, the result calculation circuit 8 applies the base calculation to each core. An instruction signal is output so that the same calculation (base calculation) is performed using the specification values and map values. Then, the result comparison circuit 8 compares the base calculation result output from each core with the base result 9 to identify which core's calculation function is in an abnormal state.

  By such processing, it is possible to accurately identify which core's arithmetic function is in an abnormal state. In general, it is difficult to specify which is abnormal between the cores when one of the arithmetic functions is in an abnormal state.

[2-4. Control when computation function is abnormal]
The result comparison circuit 8 instructs each core to stop the core in the abnormal state specified as a result of the base calculation and to control the motors MG1 and MG2 with respect to the core in the normal state. For example, when the core 2 is in a normal state, the core 2 performs an operation for controlling the motor MG2, outputs the result to the IO register 15, and then uses the value from the difference holding circuit 12 to use the motor MG1. An operation for controlling the output is performed and the result is output to the IO register 14. FIG. 4 is a diagram schematically showing the state of processing in a scene where control is performed when the arithmetic function is abnormal.

  With such control, even when the calculation function of one core becomes an abnormal state, the minimum control can be performed on both motors. For example, it is possible to perform control for slow driving the vehicle to a safe place.

[3. Process flow]
Hereinafter, the flow of processing when the control device 1 performs the above-described processing will be described. 5 and 6 are flowcharts showing a flow of characteristic processing executed by the control device 1. For convenience of space, a series of flowcharts are divided and shown in both figures.

  First, it is determined whether or not the rotational speed of the motor MG2 is twice or more the rotational speed of the motor MG1 or the rotational speed of the motor MG1 is two or more times the rotational speed of the motor MG2 (S100).

  When a negative determination is obtained in S100, first, at a timing when the carrier becomes “valley”, the core 4 and the core 5 perform an operation for controlling the motor MG1 (S102). Then, it is determined whether or not the calculation results of the cores match (S104).

  When the calculation results of the respective cores match, the core 4 outputs the calculation result to the IO register 14 (S106).

  Next, at the timing when the carrier becomes “mountain”, the core 4 executes an operation for controlling the motor MG1, outputs the operation result to the IO register 14, and the core 5 controls the motor MG2 using the difference value. An operation result is executed and an operation result is output to the IO register 15 (S108).

  Here, the difference value is, for example, a difference between a calculation result for controlling the motor MG1 calculated in S102 last time and a calculation result for controlling the motor MG2 calculated in S116 described later. That is, it refers to the difference between the most recently calculated results. By performing the calculation using the difference, although a slight error occurs, the calculation load can be reduced.

  Subsequently, at the timing when the carrier becomes “valley”, the core 4 and the core 5 perform an operation for controlling the motor MG2 (S110). Then, it is determined whether or not the calculation results of the respective cores match (S112).

  If the calculation results of the respective cores match, the core 5 outputs the calculation result to the IO register 15 (S114).

  Next, at the timing when the carrier becomes “mountain”, the core 4 performs an operation for controlling the motor MG1 using the difference value, and outputs it to the IO register 14, so that the core 5 controls the motor MG2. The calculation is executed and output to the IO register 15 (S116). When the process of S116 is completed, the process returns to S100 and the above-described process is repeatedly executed.

  When a process-like determination is obtained in S100, control when the rotation speed ratio shown in FIG. 6 is large is executed.

  First, the calculation frequency and the carrier frequency of the core on the low rotation side are switched to 1/2 (S200). When the motor rotation speed ratio becomes three times, four times, etc., the carrier frequency may be lowered to 1/3, 1/4,. In the following description, it is assumed that the motor MG1 has a low rotation.

  At a timing when the carrier becomes “valley”, the core 4 and the core 5 execute a calculation for controlling the motor MG2 (S202). Then, it is determined whether or not the calculation results of the cores match (S204).

  When the calculation results of the respective cores match, the core 5 outputs the calculation result to the IO register 15 (S206).

  Next, at the timing when the carrier becomes “mountain”, the core 4 executes an operation for controlling the motor MG1 using the difference value, outputs the operation result to the IO register 14, and the core 5 controls the motor MG2. An operation result is executed and an operation result is output to the IO register 15 (S208).

  Then, it is determined whether the rotational speed of the motor MG2 is twice or more the rotational speed of the motor MG1 or whether the rotational speed of the motor MG1 is twice or more the rotational speed of the motor MG2 (S210). If an affirmative determination is obtained in S210, that is, if the state where the rotation speed ratio is twice or more continues, the process returns to S202.

  On the other hand, if a negative determination is obtained in S210, the carrier frequency of the core on the low speed side is restored (S212), and the process returns to S102.

  By the way, when a calculation result does not correspond in S104 or S112, the control at the time of the calculation function abnormality in S300 or less is performed. Also, if the calculation results do not match in S204, the carrier frequency of the core on the low rotation speed side is restored (S214), and control is performed when the calculation function is abnormal following S300.

  First, the cores 4 and 5 execute the same calculation based on the specification value and map value for base calculation (S300).

  Then, the operation result is compared with the base result 9 to identify the core that has failed (the operation function is in an abnormal state) (S302), and the operation (operation) in the failed core is stopped (S304).

  After that, at the timing when the carrier becomes “valley”, the core that has not failed has its own motor (MG1 if core 4 has not failed, MG5 if core 5 has not failed as described above). An operation for control is performed, and the operation result is output to the IO register (S306).

  At the timing when the carrier becomes “mountain”, the above-mentioned core that has not failed uses another difference (if the core 4 has not failed, MG2 and core 5 have not failed, as described above). In this case, an operation for controlling MG1) is performed, and the operation result is output to the IO register (S308).

  According to the control device 1 of the present embodiment described above, an abnormality in the arithmetic function can be detected more accurately in the control device that controls a plurality of controlled objects by a plurality of arithmetic devices.

  The best mode for carrying out the present invention has been described above with reference to the embodiments. However, the present invention is not limited to these embodiments, and various modifications can be made without departing from the scope of the present invention. And substitutions can be added.

  For example, the calculation may be performed without using the difference in the core that performs the same calculation as the other cores and the calculation for the own motor.

  In addition, although two cores that are calculation means and two motors that are control targets are provided, three or more calculation means and control targets may be provided.

  In addition, the present invention is not limited to the one that performs vehicle control, and can be applied to any device that controls a plurality of controlled objects by a plurality of arithmetic devices.

  The present invention can be used in the automobile manufacturing industry, the automobile parts manufacturing industry, and the like.

2 is a diagram illustrating an example of an overall configuration of a control device 1. FIG. It is a figure which shows typically the mode of the process in the scene where basic control is performed. It is a figure which shows typically the mode of the process in the scene where control in case a rotation speed ratio is large is performed. It is a figure which shows typically the mode of the process in the scene where the control at the time of arithmetic function abnormality is performed. It is a flowchart which shows the flow of the characteristic process which the control apparatus 1 performs. It is a flowchart which shows the flow of the characteristic process which the control apparatus 1 performs.

Explanation of symbols

1 Control device
2 memory
3 Arbiter 4, 5 Core 6, 7 Carrier generator
8 Result comparison circuit
9 Base results
10 Carrier synchronization circuit
11 Carrier switching mechanism 12, 13 Difference holding circuit 14, 15 IO register 16, 17 Current sensor 18, 19 Resolver (rotation angle sensor)
22, 23 Inverter MG1, MG2 Motor

Claims (7)

A control device comprising a plurality of computing means for performing computations for controlling a plurality of controlled objects,
A calculation timing synchronization means for synchronizing calculation timings in the plurality of calculation means, a determination means for determining whether or not the calculation results of the plurality of calculation means are matched,
With
In the predetermined calculation timing determined by the calculation timing synchronization means,
One computing means among the plurality of computing means performs computation for controlling one control object among the plurality of control objects, and outputs a computation result to the determination means,
The other calculation means among the plurality of calculation means performs the same calculation as the calculation performed by the one calculation means and outputs the same to the determination means, and controls other control objects among the plurality of control objects. It is characterized by performing an operation for
Control device. The calculation unit that performs the same calculation as the calculation performed by the one calculation unit and outputs the calculation to the determination unit, and the calculation unit that performs a calculation for controlling another control object among the plurality of control objects includes: The calculation means that performed only the calculation for controlling one control object among the control objects of the control object does not perform the same calculation as the calculation performed by the one calculation means at the next calculation timing. And
The control device according to claim 1. The role of performing only the calculation for controlling one control object among the plurality of control objects, the same calculation as the calculation performed by the one calculation means, and outputting to the determination means and the plurality of controls The role of performing computations for controlling other control objects among the objects, and alternately replacing,
The control device according to claim 1 or 2. The plurality of control objects are motors,
The calculation timing determining means controls a motor having a smaller rotation speed in accordance with a predetermined association between each calculation means and each motor when the rotation speed ratio of the plurality of motors is equal to or greater than a predetermined ratio. Means for instructing the plurality of calculation means to reduce the calculation frequency of the calculation means for performing calculation for
The control device according to any one of claims 1 to 3. When the rotation speed ratio of the plurality of motors is equal to or greater than a predetermined ratio by the calculation timing determination means, the motor with the lower rotation speed is controlled according to the predetermined association between the calculation means and each motor. When the plurality of calculation means are instructed to reduce the calculation frequency of the calculation means for performing the calculation,
The calculation means instructed to reduce the calculation frequency performs the same calculation as the calculation performed by the other calculation means and outputs it to the determination means, and controls the motor associated with the calculation means. It is characterized by performing an operation,
The control device according to claim 4. When the determination means determines that the calculation results of the first and second calculation means are not consistent, the same calculation for which the correct calculation result is known in advance is performed as the first and second calculation means. To identify which computing means is in an abnormal state,
The control device according to any one of claims 1 to 5. When the determination means determines that the calculation results of the plurality of calculation means are not consistent, the calculation means specified as being in an abnormal state is stopped, and the calculation result of the calculation means that is not stopped is Using the plurality of control objects to control,
The control device according to any one of claims 1 to 6.

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