JP2009122169A - Drive circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a drive circuit of a capacitive load and a drive circuit for a capacitive switching element, in which a circuit configuration is made simpler by reducing the number of components, and power recovery can be performed by reducing the loss of power consumption. <P>SOLUTION: The driving circuit includes a voltage-clamping section which is constituted of a first switching element connected between the capacitive load, a first power supply line, and a second switching element connected between the capacitive load, and a grounding line, and a transformer which is provided with a first winding, a second winding of the polarity reverse from that of the first winding, in which the second winding is constituted of a first portion, and a second portion, and a connection point of a second terminal of the first portion and the first terminal of the second portion are grounded; the first terminal of the second winding is connected via a third switching element to the first power supply line and is connected via a fourth switching electrode to the grounding line; and the second terminal of the first winding of the transformer is connected to the capacitive load. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a drive circuit for a capacitive load and a drive circuit for a capacitive switching element.

  Currently, an AC type (AC discharge type) plasma display panel has been commercialized as a thin display device. In the plasma display panel, two substrates, that is, a front glass substrate and a rear glass substrate are arranged to face each other with a predetermined gap. On the inner surface of the front glass substrate as the display surface (the surface facing the rear glass substrate), a plurality of row electrode pairs extending in parallel with each other are formed as sustain electrode pairs. On the rear glass substrate, a plurality of column electrodes are extended as address electrodes so as to cross the row electrode pairs, and further, a phosphor is applied. When viewed from the display surface side, display cells corresponding to the pixels are formed at the intersections between the row electrode pairs and the column electrodes. For such a plasma display panel, gradation driving using a subfield method is performed in order to obtain halftone display luminance corresponding to an input video signal (see Patent Document 1).

  In gradation driving based on the subfield method, display driving is performed on a video signal for one field in each of a plurality of subfields to which the number of times (or periods) of light emission is assigned. In each subfield, an address process and a sustain process are executed sequentially. In the addressing process, a row pulse and a column electrode in each display cell are selectively applied by applying a data pulse to the column electrode while applying a scan pulse to one electrode of the row electrode pair for each row in accordance with an input video signal. A selective discharge is generated between them to form (or erase) a predetermined amount of wall charges. In the sustain process, a sustain pulse is alternately applied to each of the row electrode pairs to repeatedly discharge only display cells in which a predetermined amount of wall charges are formed, and to maintain the light emission state associated with the discharge. Further, an initialization process is executed prior to the address process in at least the first subfield. In such an initialization process, a reset process is performed to initialize the amount of wall charges remaining in all the display cells by applying a reset pulse between paired row electrodes in all the display cells to cause a reset discharge. Execute.

  FIG. 1 shows a specific circuit configuration of a drive circuit for supplying a sustain pulse to each display cell for one display line of a plasma display panel. This drive circuit comprises a circuit portion for each of the row electrodes X and Y. The circuit section on the row electrode Y side includes switch elements S1, S2, S11, S12, coils L1, L2, diodes D1, D2, and a capacitor C1. In the circuit unit on the row electrode Y side, a series circuit including the switch element S11, the diode D1, and the coil L1 and a series circuit including the switch element S12, the diode D2, and the coil L2 are connected in parallel. One end of each of these series circuits is connected to the row electrode Y, and the other end is grounded via a capacitor C1 in common. One end thereof is connected to the supply line of the voltage Vs via the switch element S1 and grounded via the switch element S2.

  The circuit portion on the row electrode X side includes switch elements S3, S4, S13, S14, coils L3 and L4, diodes D3 and D4, and a capacitor C2, and the components are connected in the same manner as the circuit portion on the row electrode Y side. Has been. The display cell is shown as an equivalent circuit in which a resistor Rp and a capacitor Cp are connected in series between the row electrodes X and Y. The resistor Rp is a bus resistor, and the capacitance of each of the capacitors C1 and C2 is sufficiently larger than the capacitance of the capacitor Cp.

  In such a drive circuit, when a sustain pulse is applied to the row electrode Y, the switch element S4 is turned on. It is assumed that the voltages of the capacitors C1 and C2 are Vs / 2. When the switch element S11 is turned on when the voltage of the capacitor Cp is 0V, the resonance action by the coil L1 and the capacitor Cp causes the switch element S11, the diode D1, the coil L1, the resistor Rp, the capacitor Cp, and the switch element S4 from the capacitor C1. Resonant current Ip flows through a path to the ground via, so that the voltage Vy of the row electrode Y rises as shown in FIG. 2 and forms a rising portion of the sustain pulse. Thereafter, the switch element S11 is turned off, the switch element S1 is turned on, and the voltage Vs is applied to the row electrode Y. When the switch element S12 is turned on when the voltage at one end of the capacitor Cp is Vs, the switch S4, the capacitor Cp, the resistor Rp, the coil L2, the diode D2, A resonance current Ip flows along the path to the switch element S12 and the capacitor C1, whereby the voltage Vy of the row electrode Y drops, forming a falling portion of the sustain pulse. FIG. 2 shows the waveform of the resonance current Ip, where the current flowing from the row electrode Y in the direction of the row electrode X is a positive current, and vice versa.

  Similarly, when the sustain pulse is applied to the row electrode X, the switch element S2 is turned on. When the switch element S13 is turned on when the voltage of the capacitor Cp is 0V, the resonance action by the coil L3 and the capacitor Cp causes the switch element S13, the diode D3, the coil L3, the capacitor Cp, the resistor Rp, and the switch element S2 to be switched. The resonance current Ip flows through the path to the ground via the voltage, whereby the voltage Vx of the row electrode X rises as shown in FIG. 2 to form the rising portion of the sustain pulse. Thereafter, the switch element S13 is turned off, the switch element S3 is turned on, and the voltage Vs is applied to the row electrode X. When the switch element S14 is turned on when the voltage at the other end of the capacitor Cp is Vs, the switch S2, the resistor Rp, the capacitor Cp, the coil L4, and the diode D4 from the ground are caused by the resonance action of the coil L4 and the capacitor Cp. Then, the resonance current Ip flows through the path to the switch element S14 and the capacitor C2, whereby the voltage Vx of the row electrode X drops to form the falling portion of the sustain pulse.

Thus, when the sustain pulse is applied, the voltage of the capacitor Cp of the panel can be changed using the resonance action, so that the power loss of the circuit is only the loss of the path through which the resonance current flows, and the power loss is reduced. Can do.
JP 2003-233343 A

  However, such a conventional display panel drive circuit requires a drive circuit for each pair of row electrodes. For this reason, in order to generate a sustain pulse as a drive pulse in one drive circuit, control inputs are respectively provided to the four switching elements, and to the four switching elements in order to generate a sustain pulse in the other drive circuit. Each requires a control input. Further, as shown in FIG. 2, the sustain pulses applied to the paired row electrodes are shifted from each other in half-cycle phase, so that the control input is created by a separate circuit, There were many control inputs.

  Such a problem is not limited to a drive circuit for a capacitive load such as a plasma display panel or EL (electroluminescence), but also exists in a drive circuit for driving a switching element such as a MOSFET whose gate is a capacitive.

  The problem to be solved by the present invention includes the above-mentioned problem as an example, and a capacity capable of reducing the number of parts to make a simpler circuit configuration and reducing power consumption loss and recovering power. It is an object of the present invention to provide a capacitive load drive circuit and a capacitive switching element drive circuit.

  The capacitive load driving circuit according to the first aspect of the present invention is connected between the capacitive load and the ground line, and the first switching element connected between the capacitive load and the first power supply line. A voltage clamping unit including a second switching element; a first winding; and a second winding having a polarity opposite to that of the first winding, wherein the second winding includes a first portion and a second winding. And a transformer having a connection point between the second terminal of the first part and the first terminal of the second part grounded, the first terminal of the first part of the second winding of the transformer Is connected to the second power supply line, the second terminal of the second part of the second winding of the transformer is connected to the third power supply line, and the first terminal of the first winding of the transformer is the third switching element. And connected to the first power supply line via a fourth switching element. Connected to the line, a second terminal of the first winding of the transformer is characterized in that it is connected to the capacitive load.

  According to a fourth aspect of the present invention, there is provided a capacitive load driving circuit including a first switching element connected between the capacitive load and the first power supply line, and connected between the capacitive load and the ground line. A voltage clamping unit including a second switching element; a first winding; and a second winding having a polarity opposite to that of the first winding, wherein the first winding includes a first portion and a second winding. A transformer having a connection point between the second terminal of the first part and the first terminal of the second part connected to the capacitive load, and a first winding of the first winding of the transformer. The first terminal of the portion is connected to the first power supply line via a third switching element, and the second terminal of the second portion of the first winding of the transformer is connected to the ground line via a fourth switching element. The first terminal of the second winding of the transformer is connected to the second power line. The second terminal of the second winding of the transformer is characterized in that it is connected to the ground line while being.

  A capacitive load driving circuit according to an eighth aspect of the present invention is a power supply that outputs a voltage between a first power supply line and a second power supply line, and is connected between the capacitive load and the first power supply line. A first switching element, a second switching element connected between the capacitive load and the second power supply line, and a third switching element connected between the second power supply line and the ground line And a first winding and a second winding having a polarity opposite to that of the first winding, wherein the second winding is composed of a first portion and a second portion, and a second portion of the first portion. A transformer having a connection point between the terminal and the first terminal of the second part connected to the second power supply line, and the first terminal of the first part of the second winding of the transformer via the first diode. Connected to the first power supply line and of the second part of the second winding of the transformer. A terminal is connected to the first power supply line via a second diode, a first terminal of the first winding of the transformer is connected to the second power supply line, and a second terminal of the first winding of the transformer Is connected to the ground line.

  According to a tenth aspect of the present invention, there is provided a capacitive load driving circuit comprising: a first switching element connected between one end of the capacitive load and the first power supply line; and one end of the capacitive load and the ground line. A second switching element connected to the first winding, a first winding, and a second winding having a polarity opposite to that of the first winding, wherein the second winding includes a first portion and a second portion. And a transformer having a connection point between the second terminal of the first part and the first terminal of the second part grounded, and the first terminal of the first part of the second winding of the transformer is a second power source. And the second terminal of the second part of the second winding of the transformer is connected to a third power supply line, and the first terminal of the first winding of the transformer is connected to the other end of the capacitive load. And a second terminal of the first winding of the transformer is connected to the ground line. It is.

  According to a thirteenth aspect of the present invention, there is provided a drive circuit for a capacitive switching element, wherein a pulse generating means for generating a drive pulse having a predetermined peak voltage, the first winding, and the first winding are of opposite polarity The second winding is composed of a first portion and a second portion, and a connection point between the second terminal of the first portion and the first terminal of the second portion is grounded A first terminal of the first part of the second winding of the transformer is connected to a first power supply line, and a second terminal of the second part of the second winding of the transformer is a second power source. A first terminal of the first winding of the transformer is connected to a gate of the switching element, and a second terminal of the first winding of the transformer is connected to a pulse output terminal of the pulse generating means. It is characterized by having.

  According to a sixteenth aspect of the present invention, there is provided a driving circuit for a capacitive switching element, wherein a pulse generating means for generating a driving pulse having a predetermined peak voltage, the first winding, and the first winding are of opposite polarity The first winding is composed of a first portion and a second portion, and a connection point between the second terminal of the first portion and the first terminal of the second portion is the switching element. A pulse output terminal of the pulse generating means is connected to the first terminal of the first portion of the first winding of the transformer via a first diode in a forward direction. The second diode is connected in the reverse direction to the second terminal of the second part of the first winding of the transformer, the first terminal of the second winding of the transformer is connected to the first power line and the The second terminal of the second winding of the transformer is connected to the ground line It is characterized in that it is.

  In the capacitive load driving circuit according to the first aspect of the present invention, when the third switching element is turned on, the power supply voltage is applied to the first winding from the first power supply line, and the resonance current is supplied from the first power supply line to the first power supply line. 3 flows into the ground line through the switching element, the first winding, and the capacitive load, and at the same time, a current flows through the first portion of the second winding to the second power supply line, whereby the applied voltage of the capacitive load Gradually rises. Further, when the first switching element is turned on, the applied voltage of the capacitive load becomes equal to the power supply voltage of the first power supply line. Thereafter, when the first and third switching elements are turned off and the fourth switching element is turned on, the resonance current flows from the ground line to the ground line through the capacitive load, the first winding, and the fourth switching element. At the same time, a current flows to the third power supply line through the second portion of the second winding, whereby the applied voltage of the capacitive load gradually decreases. Furthermore, when the second switching element is turned on, the applied voltage of the capacitive load becomes equal to the ground potential of the ground line.

  In the capacitive load driving circuit according to the fourth aspect of the present invention, when the third switching element is turned on, the power supply voltage is applied from the first power supply line to the first portion of the first winding, and the resonance current is the first. The current flows from the power supply line to the ground line via the third switching element, the first part of the first winding, and the capacitive load, and at the same time, the current flows to the second power supply line via the second winding. The applied voltage of the load gradually increases. Further, when the first switching element is turned on, the applied voltage of the capacitive load becomes equal to the power supply voltage of the first power supply line. Thereafter, when the first and third switching elements are turned off and the fourth switching element is turned on, the resonance current is grounded from the ground line through the capacitive load, the second part of the first winding, and the fourth switching element. The current flows into the line and the current flows to the second power supply line through the second winding at the same time, whereby the applied voltage of the capacitive load gradually decreases. Furthermore, when the second switching element is turned on, the applied voltage of the capacitive load becomes equal to the ground potential of the ground line.

  In the capacitive load drive circuit according to the eighth aspect of the present invention, when the first switching element is turned on, the resonance current flows from the ground line through the first winding, the power source, the first switching element, and the capacitive load. The current flows into the ground line, and at the same time, a current flows through the first portion of the second winding to the second power supply line, whereby the applied voltage of the capacitive load gradually increases. Further, when the third switching element is turned on, the applied voltage of the capacitive load becomes equal to the power supply voltage of the first power supply line. Thereafter, when the first and third switching elements are turned off and the second switching element is turned on, resonance current flows from the ground line to the ground line through the capacitive load, the second switching element, and the first winding. At the same time, a current flows to the second power supply line through the second portion of the second winding, and the applied voltage of the capacitive load gradually decreases. Furthermore, when the second switching element is turned on, the applied voltage of the capacitive load becomes equal to the ground potential of the ground line.

  In the capacitive load driving circuit of the invention according to claim 10, when the first switching element is turned on, the resonance current is grounded from the first power supply line through the first switching element, the capacitive load, and the first winding. At the same time, a current flows into the second power line through the first portion of the second winding. When the first switching element is turned off and the second switching element is turned on instead, the resonance current flows from the ground line to the ground line via the first winding, the capacitive load, and the second switching element. Current flows to the third power line through the second portion of the line. Thereby, the applied voltage of the capacitive load rises and then falls.

  Therefore, according to the capacitive load driving circuit of the inventions according to claims 1, 4, 8, and 10, the capacitor is present only in the transformer and the switching element except for the capacitor component of the display panel in the path through which the resonance current flows. Therefore, power loss can be reduced with a simple circuit configuration.

  In the drive circuit for the capacitive switching element according to the thirteenth aspect of the invention, when a drive pulse is generated from the pulse generating means, a resonance current flows into the gate from the pulse generating means via the first winding, and at the same time, A current flows to the first power supply line via the first part of the two windings, and thereby the gate voltage of the switching element gradually increases. When the generation of the drive pulse from the pulse generating means is stopped, a resonance current flows from the gate of the switching element to the pulse generating means via the first winding, and at the same time, the first power supply via the second portion of the second winding. A current flows through the line, and the gate voltage of the switching element gradually decreases.

  In the drive circuit for a capacitive switching element according to the sixteenth aspect of the present invention, when a drive pulse is generated from the pulse generating means, a resonance current is applied to the gate from the pulse generating means via the first portion of the first winding. At the same time, a current flows through the second winding to the first power supply line, whereby the gate voltage of the switching element gradually increases. When the generation of the driving pulse from the pulse generating means is stopped, a resonance current flows from the gate of the switching element to the pulse generating means through the second portion of the first winding, and at the same time, the first power supply through the second winding. A current flows through the line, which gradually reduces the gate voltage of the switching element.

  Therefore, according to the drive circuit for the capacitive switching element according to the thirteenth and sixteenth aspects of the present invention, a capacitor exists only in the transformer and the switching element except for the capacitor component of the switching element in the path through which the resonance current flows. Therefore, power loss can be reduced with a simple circuit configuration.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 3 shows a plasma display device to which the invention according to claim 1 is applied. This plasma display device includes a PDP 50 as a plasma display panel, an X row electrode drive circuit 51, a Y row electrode drive circuit 53, a column electrode drive circuit 55, and a drive control circuit 56.

The PDP 50 includes column electrodes D _{1 to} D _m arranged to extend in the vertical direction (vertical direction) of the two-dimensional display screen, and row electrodes X ₁ to X _m arranged to extend in the horizontal direction (horizontal direction). X _n and row electrodes Y _{1 to} Y _n are formed. In this case, row electrode pairs (Y ₁ , X ₁ ), (Y ₂ , X ₂ ), (Y ₃ , X ₃ ),..., (Y _n , X _n ) that form pairs between adjacent ones. Are responsible for the first display line to the nth display line in the PDP 50, respectively. A display cell PC serving as a pixel is formed at each crossing portion (a region surrounded by an alternate long and short dash line in FIG. 1) between each display line and each of the column electrodes D _{1 to} D _m . That is, the PDP 50 belongs to the display cells PC1, ₁ to PC1, _m belonging to the first display line, the display cells PC2, _{1 to} PC2, _m , ... belonging to the second display line, to the nth display line. display cell PC _n, 1~PC _n, is the respective _m are arranged in a matrix.

Each of the column electrodes D _{1 to} D _{m of the} PDP 50 is connected to a column electrode drive circuit 55, each of the row electrodes X _{1 to} X _n is connected to an X row electrode drive circuit 51, and each of the row electrodes Y _{1 to} Y _n is connected to a Y row. It is connected to the electrode drive circuit 53.

  The drive control circuit 56 supplies various control signals to drive the PDP 50 having the above structure in accordance with a light emission drive sequence employing a subfield method (subframe method) as shown in FIG. This is supplied to each of the circuit 53 and the column electrode drive circuit 55. The X row electrode drive circuit 51, the Y row electrode drive circuit 53, and the column electrode drive circuit 55 generate various drive pulses for driving the PDP 50 in accordance with the light emission drive sequence and supply them to the PDP 50.

  In the light emission drive sequence shown in FIG. 4, the address process W and the sustain process I are executed in each of the subfields SF1 to SF12 in the display period of one field (one frame). Further, the reset process R is executed prior to the address process W only in the first subfield SF1. The duration of the sustain process I of the subfields SF1 to SF12 is increased in the order of SF1 to SF12. The period during which the address process W is executed is an address period, and the period during which the sustain process I is executed is a sustain period.

  FIG. 5 is a diagram showing application timings of various drive pulses applied to the column electrodes D and the row electrodes X and Y of the PDP 50 by extracting SF1 and SF2 from the subfields SF1 to SF12.

In the reset process R performed prior to the address process W only in the first subfield SF1, the X-row electrode drive circuit 51 simultaneously applies negative reset pulses RP _X as shown in FIG. 5 to the row electrodes X _{1 to} X _n. Apply. The reset pulse RP _X has a pulse waveform gently voltage value reaches the peak voltage value rises with the lapse of time. Further, simultaneously with the application of the reset pulse RP _X , the Y-row electrode driving circuit 53 gradually increases with time and reaches a peak voltage value as in the reset pulse RP _X as shown in FIG. simultaneously applies a pulse waveform of positive polarity reset pulse RP _Y to the row electrodes Y ₁ to Y _n. The simultaneous application of the reset pulse RP _Y and the reset pulse RP _X, all the display cells PC1, ₁ ~PC _n, reset discharge is generated between the row electrodes X and Y in the _m each. After the end of the reset discharge, a positive charge is formed in the vicinity of the row electrode X, and a negative charge is formed in the vicinity of the row electrode Y, so-called wall charge is formed.

Next, in the address process W of each of the subfields SF1 to SF12, the Y row electrode driving circuit 53 applies a positive voltage to all the row electrodes Y _{1 to} Y _n and superimposes it on the negative voltage to apply the negative voltage. The scanning pulse SP having the same is sequentially applied to each of the row electrodes Y _{1 to} Y _n . During this time, the X electrode drive circuit 51 sets each of the row electrodes X _{1 to} X _n to 0V. The column electrode drive circuit 55 converts each data bit in the pixel drive data bit group DB1 corresponding to the subfield SF1 into a pixel data pulse DP having a pulse voltage corresponding to the logic level. For example, the column electrode drive circuit 55 converts a pixel drive data bit of logic level 0 into a positive high voltage pixel data pulse DP, while converting a pixel drive data bit of logic level 1 to a low voltage (0 volt) pixel. Convert to data pulse DP. Then, the pixel data pulse DP is applied to the column electrodes D _{1 to} D _m by one display line (m) in synchronization with the application timing of the scanning pulse SP. In other words, the column electrode drive circuit 55 first applies a pixel data pulse group DP ₁ composed of m pixel data pulses DP corresponding to the first display line to the column electrodes D _{1 to} D _m , and then the second it is going to apply the pixel data pulse group DP ₂ comprised of m pixel data pulses DP corresponding to the display line to the column electrodes D ₁ to D _m. A selective erasing discharge is generated between the column electrode D and the row electrode Y in the display cell PC to which the scanning pulse SP having a negative voltage and the high-voltage pixel data pulse DP are simultaneously applied, and is formed in the display cell PC. The wall charge that was made disappears. On the other hand, the selective erasure discharge as described above does not occur in the display cell PC to which the pixel data pulse DP of low voltage (0 volt) is applied although the scan pulse SP is applied. Therefore, the wall charge formation state in the display cell PC is maintained. That is, if there is a wall charge in the display cell PC, it remains as it is, and if there is no wall charge, the wall charge non-forming state is maintained.

  As described above, in the address process W based on the selective erasure address method, a selective erasure address discharge is selectively generated in each display cell PC in accordance with each data bit of the pixel drive data bit group corresponding to the subfield. Erase the charge. As a result, the display cell PC in which the wall charges remain is set in the lit state, and the display cell PC from which the wall charges are erased is set in the unlit state.

Next, in the sustain process I of each subfield, X row each electrode driving circuit 51 and the Y-row electrode drive circuit 53, the positive polarity sustain pulse IP of alternately repeating _X and IP _Y to the row electrodes X ₁ to X _n And Y _{1 to} Y _n . The number of times that the sustain pulses IP _X and IP _Y are applied depends on the luminance weighting in each subfield. At this time, each time the sustain pulses IP _X and IP _Y are applied, only the display cell PC in the lighting state in which a predetermined amount of wall charges is formed undergoes a sustain discharge, and the phosphor layer 17 accompanies this discharge. Emits light and an image is formed on the panel surface.

  FIG. 6 shows a sustain pulse generation circuit formed in the Y row electrode drive circuit 53.

  This sustain pulse generation circuit shows one display line of the PDP 50, and includes switching elements S1, S2, S11, S12, a coil L1, a transformer T1, and diodes D1, D2.

  The transformer T1 has a primary winding Lp and two secondary windings Ls1, Ls2 electromagnetically coupled to each other. In FIG. 6, the same polarity in the windings Lp, Ls1, and Ls2 is indicated by black circles. When the number of turns of the primary winding Lp is n, the number of turns of the secondary winding Ls1 is n1, and the number of turns of the secondary winding Ls2 is n2, there is a relationship of n1> n and n2> n.

  The row electrode Y on one display line is connected to the power supply line of the power supply voltage Vs via the switching element S1 (first switching element), and is grounded via the switching element S2 (second switching element).

  The switching elements S11, S12 (third and fourth switching elements) constitute a voltage clamp unit, and are connected in series between the power supply line of the voltage Vs and the ground point, and the connection line of the switching elements S11, S12 is It is connected to one end (first terminal) of the primary winding Lp of the transformer T1. Further, the row electrode Y is connected to the other end (second terminal) of the primary winding Lp of the transformer T1 via the coil L1.

  One end (first terminal) of the secondary winding Ls1 of the transformer T1 is connected to the power supply line of the voltage Vs via the diode D1 in the forward direction. Similarly, one end (second terminal) of the secondary winding Ls2 is the diode. D2 is connected to the power supply line of voltage Vs through the forward direction. The other ends of the secondary windings Ls1, Ls2 are both grounded.

  The display cell is shown as an equivalent circuit in which a resistor Rp and a capacitor Cp are connected in series between the row electrodes X and Y. The resistor Rp is mainly a bus resistance for one display line of the PDP 50.

  A sustain pulse generating circuit having the same configuration as that shown in FIG. The operation cycle of the sustain pulse generation circuit in which the sustain pulse is formed in the row electrode Y and the sustain pulse generation circuit in which the sustain pulse is formed in the row electrode X are shifted by 180 degrees. When the sustain pulse is applied by the sustain pulse generation circuit, the row electrode X is at the ground potential, so that one end of the equivalent circuit on the row electrode X side is shown in the ground state.

  In the sustain pulse generating circuit having such a configuration, as shown in FIG. 7, on / off of the switching elements S1, S2, S11, and S12 is controlled in accordance with a command from the drive control circuit 56. As shown in FIG. 7, the current Ip flows through the primary winding Lp of the transformer T1 and the currents Id1 and Id2 flow through the secondary windings Ls1 and Ls2 as shown in FIG. A voltage Vy forming a sustain pulse is generated in Y.

  Next, a specific operation of the sustain pulse generation circuit will be described.

  When the switching element S11 is turned on in a state where both ends of the capacitor Cp are 0V, the power supply voltage Vs is applied to the primary winding Lp of the transformer T1. As a result, the current Ip flows from the power supply line of the voltage Vs to the ground via the switching element S11, the primary winding Lp, the coil L1, the resistor Rp, and the capacitor Cp. A voltage proportional to the number of turns n and n1 of the primary and secondary windings Lp and Ls1 is generated at both ends of the secondary winding Ls1. Since the number of turns n1 is larger than n, the voltage across the secondary winding Ls1 becomes Vs × n1 / n, which is larger than the voltage Vs, so that the diode D1 is immediately turned on. When the diode D1 is turned on, the voltage across the secondary winding Ls1 becomes Vs.

  When the voltage across the secondary winding Ls1 is Vs, the voltage across the primary winding Lp is Vs × n / n1 according to the ratio of the number of turns n and n1. Therefore, a voltage of Vs−Vs × n / n1 = Vs (1−n / n1) is applied to the capacitor Cp and the coil L1, and the resonance current Ip flows through the resonance operation based on this voltage, and the row electrode Y The voltage Vy gradually increases due to the time constant of the capacitor Cp and the coil L1.

  When the voltage Vy of the row electrode Y approaches the power supply voltage Vs, the switching element S1 is turned on. When the switching element S1 is turned on, the voltage Vy of the row electrode Y is fixed to the power supply voltage Vs.

  The current Id1 flowing through the diode D1 is proportional to the number of turns n and n1 with respect to the current Ip flowing through the primary winding Lp. That is, Id1 = Ip × n / n1. While the diode D1 is on, a voltage is also induced in the secondary winding Ls2 of the transformer T1, but the diode D2 remains off because the polarity of the winding is different.

  Next, when the switching elements S11 and S1 are turned off while the switching element S12 is turned on, a current flows from the ground to the capacitor Cp, the resistor Rp, the coil L1, the primary winding Lp, and the switching element S12 to the ground. Ip flows, and a voltage close to the voltage Vs is applied to the primary winding Lp of the transformer T1, and the diode D2 is turned on by the voltage induced in the secondary winding Ls2. When the diode D2 is turned on, the voltage across the secondary winding Ls2 becomes Vs. Therefore, the voltage across the primary winding Lp becomes Vs × n / n2 proportional to the number of turns n and n2, and the resonance operation is based on this voltage. As a result, the resonance current Ip flows, and the voltage Vy of the row electrode Y gradually decreases due to the time constant of the capacitor Cp and the coil L1.

  When the voltage Vy of the row electrode Y approaches 0V, the switching element S2 is turned on. When the switching element S2 is turned on, the voltage Vy of the row electrode Y becomes 0V.

  The current Id2 flowing through the diode D2 is proportional to the number of turns n and n2 with respect to the current Ip flowing through the primary winding Lp. That is, Id2 = Ip × n / n2.

  While the diode D2 is on, a voltage is also induced in the secondary winding Ls1 of the transformer T1, but the diode D1 remains off because the polarity of the winding is different.

  As described above, the resonance operation is performed based on the voltage generated by the transformer T1, whereby the voltage Vy of the row electrode Y can be increased and then decreased, thereby forming a sustain pulse.

  In the drive circuit of this embodiment, capacitors such as C1 and C2 in FIG. 1 that provide the reference voltage for resonance in the resonance operation are not required. Since it can be set freely in each of the rise and fall, the voltage reached by resonance can be controlled.

  Further, in the drive circuit of this embodiment, since there is no capacitor or diode in the path through which the resonance current Ip flows except for the panel capacitor Cp, only the transformer and the switching element are present, thereby reducing the power loss with a simple circuit configuration. be able to.

  Further, the coil L1 is equivalent to the leakage inductance of the transformer T1, and the coil L1 can be deleted if it resonates with the leakage inductance of the transformer T1 in the resonance operation.

Further, as shown in FIG. 8, a coil L2 is inserted between one end of the secondary winding Ls1 of the transformer T1 and the anode of the diode D1, and between the one end of the secondary winding Ls2 and the anode of the diode D2. A coil L3 may be inserted. In the sustain pulse generation circuit having the configuration shown in FIG. 8, the inductances of these coils L2 and L3 are converted to the primary winding Lp side by the square of the turns ratio, and therefore equivalent to the case where the row electrode voltage is increased. The inductance is L1 + L2 (n / n1) ² , and the equivalent inductance when lowered is L1 + L3 (n / n2) ² .

  Therefore, since the equivalent inductance at the rise and fall of the voltage of the row electrode can be changed, the waveform at the rise and fall, that is, the slope of the sustain pulse waveform can be changed.

  Further, if the winding ratio of the transformer T1 is changed, the connection destination of the secondary side windings Ls1 and Ls2 can be set to arbitrary power supply voltages V1 and V2 as shown in FIG. There are benefits to spread.

  FIG. 9 shows another example of the sustain pulse generating circuit formed in the Y-row electrode driving circuit 53 as an embodiment of the invention according to claim 4. The sustain pulse generation circuit of FIG. 9 shows one display line of the PDP 50, and includes switching elements S1, S2, S11, S12, a coil L1, a transformer T2, and diodes D1, D2, D3.

  The transformer T2 has a configuration in which the primary and secondary of the transformer T1 in the circuit of FIG. 6 are reversed, and two primary windings Lp1, Lp2 and secondary winding Ls that are electromagnetically coupled to each other. have. In FIG. 9, the same polarity in the windings Lp1, Lp2, and Ls is indicated by black circles. When the number of turns of the primary winding Lp1 is n1, the number of turns of the primary winding Lp2 is n2, and the number of turns of the secondary winding Ls is n, there is a relationship of n1 <n and n2 <n.

  The switching elements S11 and S12 (third and fourth switching elements) are connected in series between the power supply line of the voltage Vs and the ground point, and the connection line (common line) of the switching elements S11 and S12 is the diode D1 ( The first diode is connected to one end of the primary winding Lp1 of the transformer T2 via the forward direction, and the diode D2 (second diode) is connected to one end of the primary winding Lp2 of the transformer T2 via the reverse direction. It is connected. Further, the row electrode Y is connected to the other ends of the primary windings Lp1 and Lp2 of the transformer T2 via the coil L1.

  One end of the secondary winding Ls of the transformer T2 is connected to the power supply line of the voltage Vs through the diode D3 (third diode) in the forward direction, and the other end is grounded.

  Other configurations are the same as those of the sustain pulse generation circuit of FIG.

  In the sustain pulse generation circuit of FIG. 9 having such a configuration, on / off of the switching elements S1, S2, S11, and S12 is controlled in accordance with a command from the drive control circuit 56, as shown in FIG. As shown in FIG. 10, the current Ip flows through the primary windings Lp1 and Lp2 of the transformer T2, and the current Id3 flows through the secondary winding Ls. A voltage Vy forming a sustain pulse is generated.

  Next, a specific operation of the sustain pulse generation circuit will be described.

  When the switching element S11 is turned on in a state where both ends of the capacitor Cp are 0V, the power supply voltage Vs is applied to the primary winding Lp1 of the transformer T2. As a result, the current Ip flows from the power supply line of the voltage Vs to the ground via the switching element S11, the primary winding Lp1, the coil L1, the resistor Rp, and the capacitor Cp. A voltage proportional to the number of turns n1 and n of the primary and secondary windings Lp1 and Ls is generated at both ends of the secondary winding Ls. Since the number of turns n is greater than n1, the voltage across the secondary winding Ls is Vs × n / n1, and since it is greater than the voltage Vs, the diode D3 is immediately turned on. When the diode D3 is turned on, the voltage across the secondary winding Ls becomes Vs.

  When the voltage across the secondary winding Ls is Vs, the voltage across the primary winding Lp1 is Vs × n1 / n according to the ratio of the number of turns n1 and n. Therefore, a voltage of Vs−Vs × n1 / n = Vs (1−n1 / n) is applied to the capacitor Cp and the coil L1, and the resonance current Ip flows through the resonance operation with this voltage as a reference. The voltage Vy gradually increases due to the time constant of the capacitor Cp and the coil L1.

  When the voltage Vy of the row electrode Y approaches the power supply voltage Vs, the switching element S1 is turned on. When the switching element S1 is turned on, the voltage Vy of the row electrode Y is fixed to the power supply voltage Vs.

  The current Id3 flowing through the diode D3 is proportional to the number of turns n1 and n with respect to the current Ip flowing through the primary winding Lp1. That is, Id3 = Ip × n1 / n.

  Next, when the switching elements S11 and S1 are turned off while the switching element S12 is turned on, the capacitor Cp, the resistor Rp, the coil L1, the primary winding Lp2, the diode D2, and the switching element S12 to the ground are referred to from the ground. A current Ip flows through the path, and a voltage close to the voltage Vs is applied to the primary winding Lp2 of the transformer T2, and the diode D3 is turned on by the voltage induced in the secondary winding Ls. When the diode D3 is turned on, the voltage across the secondary winding Ls becomes Vs. Therefore, the voltage across the primary winding Lp2 becomes Vs × n2 / n proportional to the number of turns n2 and n, and the resonance operation is based on this voltage. As a result, the resonance current Ip flows, and the voltage Vy of the row electrode Y gradually decreases due to the time constant of the capacitor Cp and the coil L1.

  When the voltage Vy of the row electrode Y approaches 0V, the switching element S2 is turned on. When the switching element S2 is turned on, the voltage Vy of the row electrode Y becomes 0V.

  The current Id3 flowing through the diode D3 is proportional to the number of turns n2 and n with respect to the current Ip flowing through the primary winding Lp2. That is, Id3 = Ip × n2 / n.

  As described above, by causing the resonance operation based on the voltage generated by the transformer T2, the voltage Vy of the row electrode Y can be raised and then lowered, thereby forming a sustain pulse.

  FIG. 11 shows still another example of the sustain pulse generating circuit formed in the Y-row electrode driving circuit 53 as an embodiment of the invention according to claim 8. The sustain pulse generation circuit of FIG. 11 shows one display line of the PDP 50, and includes switching elements S2, S11, S12, a coil L1, a transformer T1, and diodes D1, D2.

  The switching elements S11 and S12 (first and second switching elements) are connected in series, and the connection line is connected to the row electrode Y. One end of the series circuit of the switching elements S11 and S12 on the switching element S11 side is connected to the positive terminal (first power supply line) of the power source B of the voltage Vs, and the other end on the switching element S12 side is the primary winding Lp of the transformer T1. And a negative terminal (second power supply line) of the power source B.

  One end of the primary winding Lp of the transformer T1 is grounded via a switching element S2 (third switching element), and the other end is grounded via a coil L1.

  One end of the secondary winding Ls1 of the transformer T1 is connected via the diode D1, and one end of the secondary winding Ls2 is connected via the diode D2 to one end on the switching element S11 side of the series circuit, that is, the positive terminal of the power supply B. Has been. The other ends of the secondary windings Ls1 and Ls2 are connected to the other end of the series circuit on the switching element S12 side, that is, the negative terminal of the power source B.

  In the sustain pulse generating circuit of FIG. 11, on / off of the switching elements S2, S11, S12 is controlled in accordance with a command from the drive control circuit 56, as shown in FIG. As shown in FIG. 12, the current Ip flows through the primary winding Lp of the transformer T1 and the currents Id1 and Id2 flow through the secondary windings Ls1 and Ls2 as shown in FIG. A voltage Vy forming a sustain pulse is generated in Y.

  Next, a specific operation of the sustain pulse generation circuit of FIG. 11 will be described.

  When the switching element S11 is turned on in a state where both ends of the capacitor Cp are 0V, the current Ip flows from the ground through the coil L1, the primary winding Lp, the power source B, the switching element S11, the resistor Rp, and the capacitor Cp. Flow into the ground. A voltage proportional to the number of turns n and n1 of the primary and secondary windings Lp and Ls1 is generated at both ends of the secondary winding Ls1. Since the number of turns n1 is larger than n, the voltage across the secondary winding Ls1 becomes Vs × n1 / n, which is larger than the voltage Vs, so that the diode D1 is immediately turned on. When the diode D1 is turned on, the voltage across the secondary winding Ls1 becomes Vs.

  When the voltage across the secondary winding Ls1 is Vs, the voltage across the primary winding Lp is Vs × n / n1 according to the ratio of the number of turns n and n1. Therefore, a voltage of Vs−Vs × n / n1 = Vs (1−n / n1) is applied to the capacitor Cp and the coil L1, and the resonance current Ip flows through the resonance operation based on this voltage, and the row electrode Y The voltage Vy gradually increases due to the time constant of the capacitor Cp and the coil L1.

  When the voltage Vy of the row electrode Y approaches the power supply voltage Vs, the switching element S2 is turned on. When the switching element S2 is turned on, the voltage Vy of the row electrode Y is fixed to the power supply voltage Vs.

  The current Id1 flowing through the diode D1 is proportional to the number of turns n and n1 with respect to the current Ip flowing through the primary winding Lp. That is, Id1 = Ip × n / n1.

  Next, when the switching elements S11 and S2 are turned off, and the switching element S12 is turned on, the current flows along the path from the ground to the capacitor Cp, the resistor Rp, the switching element S12, the primary winding Lp, and the coil L1 to the ground. Ip flows, and a voltage close to the voltage Vs is applied to the primary winding Lp of the transformer T1, and the diode D2 is turned on by the voltage induced in the secondary winding Ls2. When the diode D2 is turned on, the voltage across the secondary winding Ls2 becomes Vs. Therefore, the voltage across the primary winding Lp becomes Vs × n / n2 proportional to the number of turns n and n2, and the resonance operation is based on this voltage. As a result, the resonance current Ip flows, and the voltage Vy of the row electrode Y gradually decreases due to the time constant of the capacitor Cp and the coil L1.

  When the voltage Vy of the row electrode Y approaches 0V, the switching element S2 is turned on. When the switching element S2 is turned on, the voltage Vy of the row electrode Y becomes 0V.

  The current Id2 flowing through the diode D2 is proportional to the number of turns n and n2 with respect to the current Ip flowing through the primary winding Lp. That is, Id2 = Ip × n / n2.

  As described above, the resonance operation is performed based on the voltage generated by the transformer T1, whereby the voltage Vy of the row electrode Y can be increased and then decreased, thereby forming a sustain pulse.

  In the drive circuit of this embodiment, since there is no capacitor or diode in the path through which the resonance current Ip flows except for the panel capacitor Cp, only the transformer and the switching element are present, so that power loss can be reduced with a simple circuit configuration. it can.

  FIG. 13 shows an example of a sustain pulse generation circuit formed in the X row electrode drive circuit 51 and the Y row electrode drive circuit 53 as an embodiment of the invention according to claim 10. The sustain pulse generation circuit of FIG. 13 shows one display line of the PDP 50, and includes switching elements S11 and S12 (first and second switching elements), a coil L1, a transformer T1, and diodes D1 and D2. The switching elements S11 and S12 are provided in the X row electrode drive circuit 51, and the coil L1, the transformer T1, and the diodes D1 and D2 are provided in the Y row electrode drive circuit 53.

  The switching elements S11 and S12 are connected in series between a power supply line (first power supply line) of voltage Vs and a ground point, and the connection line of the switching elements S11 and S12 is connected to the row electrode X of the display cell. .

  One end of the primary winding Lp of the transformer T1 is connected to the row electrode Y of the display cell. The other end of the primary winding Lp is grounded via the coil L1.

  One end of the secondary winding Ls1 of the transformer T1 is connected to the power supply line (second power supply line) of the voltage V1 via the diode D1 in the forward direction. Similarly, one end of the secondary winding Ls2 forwards the diode D2 to the forward direction. Is connected to a power supply line (third power supply line) of voltage V1. The other ends of the secondary windings Ls1, Ls2 are both grounded.

  In the sustain pulse generating circuit having such a configuration, as shown in FIG. 14, when the switching element S11 is turned on in a state where both ends of the capacitor Cp are 0 V, the voltage Vs is applied to the voltage Vx of the row electrode X. Since the voltage Vy of the row electrode Y rapidly rises, the current Ip flows into the ground through the switching element S11, the capacitor Cp, the resistor Rp, the primary winding Lp, and the coil L1. A voltage proportional to the number of turns n and n1 of the primary and secondary windings Lp and Ls1 is generated at both ends of the secondary winding Ls1. Since the number of turns n1 is larger than n, the voltage across the secondary winding Ls1 is Vs × n1 / n, which is larger than the voltage V1, so that the diode D1 is immediately turned on. When the diode D1 is turned on, the voltage across the secondary winding Ls1 becomes V1.

  When the voltage across the secondary winding Ls1 is V1, the voltage across the primary winding Lp is V1 × n / n1 according to the ratio of the number of turns n and n1. Therefore, a voltage of Vs−V1 × n / n1 is applied to the capacitor Cp and the coil L1, and the voltage Vy of the row electrode Y gradually decreases due to the time constant by the capacitor Cp and the coil L1.

  Next, when the switching element S11 is turned off while the switching element S12 is turned on, the voltage Vx of the row electrode X becomes the ground level, and the voltage Vy of the row electrode Y drops suddenly. A current Ip flows through a path from the winding Lp, the resistor Rp, the capacitor Cp, and the switching element S12 to the ground, and a voltage close to the voltage −Vs is applied to the primary winding Lp of the transformer T1. The Y voltage Vy drops rapidly. The diode D2 is turned on by the voltage induced in the secondary winding Ls2. When the diode D2 is turned on, the voltage across the secondary winding Ls2 becomes V1, so the voltage across the primary winding Lp becomes V1 × n / n2 proportional to the number of turns n and n2, and the voltage Vy of the row electrode Y is a capacitor It descends gradually due to the time constant by Cp and coil L1.

  Since the voltage Vx−Vy between the row electrodes X and Y of the display cell changes as shown in FIG. 14, as a result, sustain pulses are alternately formed on the row electrodes X and Y.

  In the drive circuit of this embodiment, since there is no capacitor or diode in the path through which the resonance current Ip flows except for the panel capacitor Cp, only the transformer and the switching element are present, so that power loss can be reduced with a simple circuit configuration. it can.

  FIG. 15 shows, as an embodiment of the invention according to claim 13, a drive circuit for driving an N-type MOSFET Q1 whose gate is a capacitive switching element. MOSFET Q1 has a gate capacitance Cg. This drive circuit reduces the gate charge loss when the MOSFET Q1 is driven. The gate charge loss is given by Qg × Vs × f where Qg is the gate charge of the MOSFET, Vs is the drive voltage, and f is the repetition frequency.

  The drive circuit in FIG. 15 includes a coil L1, a transformer T1, diodes D1 and D2, and a driver M1. The transformer T1 is the same as that shown in FIG.

  The gate of the MOSFET Q1 is connected to one end of the primary winding Lp of the transformer T1 through the coil L1. The driver M1 is a pulse generating means, and outputs a pulse of the voltage Vs that drives the MOSFET Q1. The drive output terminal of the driver M1 is connected to the other end of the primary winding Lp.

  One end of the secondary winding Ls1 of the transformer T1 is connected to the power supply line (first power supply line) of the voltage Vs via the diode D1 in the forward direction. Similarly, one end of the secondary winding Ls2 forwards the diode D2 to the forward direction. To the power supply line (second power supply line) of voltage Vs. The other ends of the secondary windings Ls1, Ls2 are both grounded.

  In the drive circuit having such a configuration, when a pulse is output from the driver M1 with both ends of the capacitor Cg being 0 V, the power supply voltage Vs is applied to the primary winding Lp of the transformer T1. As a result, the current Ip flows from the driver M1 to the ground via the primary winding Lp, the coil L1, and the gate and source (capacitor Cg) of the MOSFET Q1. A voltage proportional to the number of turns n and n1 of the primary and secondary windings Lp and Ls1 is generated at both ends of the secondary winding Ls1. Since the number of turns n1 is larger than n, the voltage across the secondary winding Ls1 becomes Vs × n1 / n, which is larger than the voltage Vs, so that the diode D1 is immediately turned on. When the diode D1 is turned on, the voltage across the secondary winding Ls1 becomes Vs.

  When the voltage across the secondary winding Ls1 is Vs, the voltage across the primary winding Lp is Vs × n / n1 according to the ratio of the number of turns n and n1. Therefore, a voltage of Vs−Vs × n / n1 = Vs (1−n / n1) is applied to the capacitor Cg and the coil L1, and the resonance current Ip flows by the resonance operation based on this voltage, and the gate of the MOSFET Q1 The voltage Vg gradually rises as shown in FIG. 16 by the time constant by the capacitor Cg and the coil L1.

  When the gate voltage Vg rises due to resonance and the resonance current becomes zero, the diode D1 is turned off. When the diode D1 is turned off, the inductance of the primary winding Lp of the transformer T1 becomes a magnetizing inductance and becomes a large value. As a result, as shown in FIG. 16, the gate voltage Vg becomes substantially equal to the power supply voltage Vs after rising.

  Next, when the pulse output of the driver M1 is stopped, a current Ip flows through a path from the ground to the capacitor Cg, the coil L1, and the primary winding Lp to the driver M1, and a voltage is applied to the primary winding Lp of the transformer T1. A voltage close to Vs is applied, and the diode D2 is turned on by the voltage induced in the secondary winding Ls2. When the diode D2 is turned on, the voltage across the secondary winding Ls2 becomes Vs. Therefore, the voltage across the primary winding Lp becomes Vs × n / n2 proportional to the number of turns n and n2, and the resonance operation is based on this voltage. As a result, the resonance current Ip flows, and the gate voltage Vg of the MOSFET Q1 gradually decreases due to the time constant due to the capacitor Cg and the coil L1, and reaches almost the ground level 0V.

  In FIG. 16, t1 is a resonance period by the gate capacitance Cg of the MOSFET Q1 and the coil L1, and t2 is a period in which the high level or the low level is maintained through the exciting inductance of the transformer T1.

  As described above, by causing the resonance operation based on the voltage generated by the transformer T1 in response to the output pulse of the driver M1, the gate voltage Vg of the MOSFET Q1 can be raised and then lowered, thereby causing the pulse Is formed.

  In the drive circuit of this embodiment, since there is no capacitor or diode in the path through which the resonance current Ip flows except for the panel capacitor Cp, only the transformer and the switching element are present, so that power loss can be reduced with a simple circuit configuration. it can.

  FIG. 17 shows a drive circuit for driving an N-type MOSFET Q1, whose gate is a capacitive switching element, as an embodiment of the invention according to claim 16. MOSFET Q1 is the same as that shown in FIG.

  The drive circuit of FIG. 17 includes a coil L1, a transformer T2, diodes D1, D2, D3, and a driver M1. The transformer T2 is the same as that shown in FIG. 9 and has a configuration in which the primary and secondary of the transformer T1 are opposite to each other, and two primary windings Lp1, Lp2 and 2 that are electromagnetically coupled to each other. And a secondary winding Ls.

  The output terminal of the driver M1 is connected to one end of the primary winding Lp1 of the transformer T2 via the diode D1 (first diode) in the forward direction, and the transformer T2 via the diode D2 (second diode) in the reverse direction. Is connected to one end of the primary winding Lp2. Further, the gate of the MOSFET Q1 is connected to the other ends of the primary windings Lp1 and Lp2 of the transformer T2 via the coil L1.

  One end of the secondary winding Ls of the transformer T2 is connected to the power supply line of the voltage Vs through the diode D3 (third diode) in the forward direction, and the other end is grounded.

  In the drive circuit having such a configuration, when a pulse is output from the driver M1 with both ends of the capacitor Cg being 0 V, the power supply voltage Vs is applied to the primary winding Lp1 of the transformer T2. As a result, the current Ip flows from the driver M1 to the ground via the diode D1, the primary winding Lp1, the coil L1, and the gate and source (capacitor Cg) of the MOSFET Q1. A voltage proportional to the number of turns n1 and n of the primary and secondary windings Lp and Ls1 is generated at both ends of the secondary winding Ls. Since the number of turns n is greater than n1, the voltage across the secondary winding Ls is Vs × n / n1, and since it is greater than the voltage Vs, the diode D3 is immediately turned on. When the diode D3 is turned on, the voltage across the secondary winding Ls becomes Vs.

  When the voltage across the secondary winding Ls is Vs, the voltage across the primary winding Lp1 is Vs × n1 / n according to the ratio of the number of turns n1 and n. Therefore, a voltage of Vs−Vs × n1 / n = Vs (1−n1 / n) is applied to the capacitor Cg and the coil L1, and the resonance current Ip flows by the resonance operation based on this voltage, and the gate of the MOSFET Q1 The voltage Vg gradually rises as shown in FIG. 16 by the time constant by the capacitor Cg and the coil L1.

  When the gate voltage Vg rises due to resonance and the resonance current becomes zero, the diode D3 is turned off. When the diode D3 is turned off, the inductance of the primary winding Lp1 of the transformer T2 becomes a magnetizing inductance and becomes a large value. As a result, as shown in FIG. 16, the gate voltage Vg becomes substantially equal to the power supply voltage Vs after rising.

  Next, when the pulse output of the driver M1 is stopped, a current Ip flows through a path from the ground to the capacitor Cg, the coil L1, the primary winding Lp2, and the diode D2 to the driver M1, and the primary winding Lp2 of the transformer T2 A voltage close to the voltage Vs is applied to the diode D3, and the diode D3 is turned on by the voltage induced in the secondary winding Ls. When the diode D3 is turned on, the voltage across the secondary winding Ls becomes Vs. Therefore, the voltage across the primary winding Lp2 becomes Vs × n2 / n proportional to the number of turns n2 and n, and the resonance operation is based on this voltage. As a result, the resonance current Ip flows, and the gate voltage Vg of the MOSFET Q1 gradually decreases due to the time constant due to the capacitor Cg and the coil L1, and reaches almost the ground level 0V.

  In the drive circuits shown in FIGS. 15 and 17, MOSFETs are used as capacitive switching elements. However, the present invention is not limited to this, and other types such as IGBTs (Insulate D Gate Bipolar Transistors) are used. A switching element can be used.

It is a circuit diagram which shows the drive circuit of the conventional display panel. It is a figure which shows the voltage waveform and resonance current waveform of a row electrode by the drive circuit of FIG. It is a figure which shows schematic structure of the plasma display apparatus to which this invention was applied. It is a figure which shows the light emission drive sequence. It is a figure which shows the application timing of each drive pulse in each of a reset process, an address process, and a sustain process. It is a circuit diagram which shows a sustain pulse generation circuit. It is a figure which shows the voltage waveform of the row electrode by the circuit of FIG. 6, a resonance current waveform, and ON / OFF of each switching element. FIG. 7 is a circuit diagram showing a modification of the sustain pulse generation circuit of FIG. 6. It is a circuit diagram which shows the other example of a sustain pulse generation circuit. It is a figure which shows the voltage waveform of a row electrode by the circuit of FIG. 9, a resonance current waveform, and ON / OFF of each switching element. It is a circuit diagram which shows the other example of a sustain pulse generation circuit. It is a figure which shows the voltage waveform of the row electrode by the circuit of FIG. 11, a resonance current waveform, and ON / OFF of each switching element. It is a circuit diagram which shows the other example of a sustain pulse generation circuit. It is a figure which shows each row electrode voltage waveform by the circuit of FIG. 13, and the voltage waveform between row electrodes. It is a circuit diagram which shows the drive circuit of N type MOSFET. It is a wave form diagram which shows the gate voltage of MOSFET by the drive circuit of FIG. FIG. 6 is a circuit diagram showing another example of a drive circuit for an N-type MOSFET.

Explanation of main part codes

50 PDP
51 X-row electrode drive circuit 53 Y-row electrode drive circuit 55 Column electrode drive circuit 56 Drive control circuit T1, T2 Transformer

Claims (18)

A drive circuit for driving a capacitive load,
A voltage clamping unit including a first switching element connected between the capacitive load and a first power line, and a second switching element connected between the capacitive load and a ground line;
A first winding and a second winding having a polarity opposite to that of the first winding, wherein the second winding is composed of a first portion and a second portion, and a second terminal of the first portion; A transformer whose connection point with the first terminal of the second part is grounded,
A first terminal of a first portion of the second winding of the transformer is connected to a second power supply line and a second terminal of a second portion of the second winding of the transformer is connected to a third power supply line;
A first terminal of the first winding of the transformer is connected to the first power line via a third switching element and connected to the ground line via a fourth switching element;
A drive circuit, wherein a second terminal of the first winding of the transformer is connected to the capacitive load.   The drive circuit according to claim 1, wherein a second terminal of the first winding of the transformer is connected to the capacitive load via a coil.   The first terminal of the first portion of the second winding of the transformer is connected to the second power supply line via the first diode, and the second terminal of the second portion of the second winding of the transformer is the second. 2. The drive circuit according to claim 1, wherein the drive circuit is connected to the third power supply line via a diode. A drive circuit for driving a capacitive load,
A voltage clamping unit including a first switching element connected between the capacitive load and a first power supply line; and a second switching element connected between the capacitive load and a ground line;
A first winding and a second winding having a polarity opposite to that of the first winding, wherein the first winding is composed of a first portion and a second portion, and a second terminal of the first portion; A connection point of the second portion with the first terminal is connected to the capacitive load,
A first terminal of the first portion of the first winding of the transformer is connected to the first power supply line via a third switching element, and a second terminal of the second portion of the first winding of the transformer is the second terminal. 4 connected to the ground line via a switching element,
A drive circuit, wherein a first terminal of a second winding of the transformer is connected to the second power supply line, and a second terminal of the second winding of the transformer is connected to the ground line.   5. The drive circuit according to claim 4, wherein a connection point between the second terminal of the first portion of the transformer and the first terminal of the second portion is connected to the capacitive load via a coil.   The first terminal of the first part of the first winding of the transformer is connected to the common line through the first diode in the reverse direction, and the second terminal of the second part of the first winding of the transformer is the second diode. The third switching element is connected between the first power supply line and the common line, and the fourth switching element is connected between the ground line and the common line. The drive circuit according to claim 4, wherein the drive circuit is connected in between.   5. The drive circuit according to claim 4, wherein a first terminal of the second winding of the transformer is connected to the second power supply line via a third diode. A drive circuit for driving a capacitive load,
A power supply that outputs a voltage between the first power supply line and the second power supply line;
A first switching element connected between the capacitive load and the first power line;
A second switching element connected between the capacitive load and the second power supply line;
A third switching element connected between the second power line and the ground line;
A first winding and a second winding having a polarity opposite to that of the first winding, wherein the second winding is composed of a first portion and a second portion, and a second terminal of the first portion; A transformer having a connection point with the first terminal of the second part connected to the second power supply line,
The first terminal of the first portion of the second winding of the transformer is connected to the first power supply line via the first diode, and the second terminal of the second portion of the second winding of the transformer is the second. Connected to the first power line via a diode;
A drive circuit, wherein a first terminal of the first winding of the transformer is connected to the second power supply line, and a second terminal of the first winding of the transformer is connected to the ground line.   9. The drive circuit according to claim 8, wherein the second terminal of the first winding of the transformer is connected to the ground line via a coil. A drive circuit for driving a capacitive load,
A first switching element connected between one end of the capacitive load and a first power supply line;
A second switching element connected between one end of the capacitive load and a ground line;
A first winding and a second winding having a polarity opposite to that of the first winding, wherein the second winding is composed of a first portion and a second portion, and a second terminal of the first portion; A transformer whose connection point with the first terminal of the second part is grounded,
A first terminal of a first portion of the second winding of the transformer is connected to a second power supply line and a second terminal of a second portion of the second winding of the transformer is connected to a third power supply line;
A drive characterized in that a first terminal of the first winding of the transformer is connected to the other end of the capacitive load and a second terminal of the first winding of the transformer is connected to the ground line. circuit.   11. The drive circuit according to claim 10, wherein the second terminal of the first winding of the transformer is connected to the ground line via a coil.   The first terminal of the first part of the second winding of the transformer is connected to the second power supply line via the first diode, and the second terminal of the second part of the second winding of the transformer is the second. The drive circuit according to claim 10, wherein the drive circuit is connected to the third power supply line via a diode. A driving circuit in which a gate drives a capacitive switching element;
Pulse generating means for generating a drive pulse having a predetermined peak voltage;
A first winding and a second winding having a polarity opposite to that of the first winding, wherein the second winding is composed of a first portion and a second portion, and a second terminal of the first portion; A transformer whose connection point with the first terminal of the second part is grounded,
A first terminal of a first portion of the second winding of the transformer is connected to a first power supply line and a second terminal of a second portion of the second winding of the transformer is connected to a second power supply line;
The first terminal of the first winding of the transformer is connected to the gate of the switching element, and the second terminal of the first winding of the transformer is connected to the pulse output terminal of the pulse generating means. Drive circuit.   The drive circuit according to claim 13, wherein a first terminal of the first winding of the transformer is connected to a gate of the switching element through a coil.   The first terminal of the first portion of the second winding of the transformer is connected to the first power supply line via the first diode, and the second terminal of the second portion of the second winding of the transformer is the second. The drive circuit according to claim 13, wherein the drive circuit is connected to the second power supply line via a diode. A driving circuit in which a gate drives a capacitive switching element;
Pulse generating means for generating a drive pulse having a predetermined peak voltage;
A first winding and a second winding having a polarity opposite to that of the first winding, wherein the first winding is composed of a first portion and a second portion, and a second terminal of the first portion; A transformer having a connection point with the first terminal of the second part connected to the gate of the switching element,
The pulse output terminal of the pulse generating means is connected to the first terminal of the first part of the first winding of the transformer via the first diode in the forward direction, and to the first terminal of the transformer via the second diode in the reverse direction. Connected to the second terminal of the second part of the first winding;
A drive circuit, wherein a first terminal of a second winding of the transformer is connected to a first power supply line, and a second terminal of a second winding of the transformer is connected to the ground line.   The drive circuit according to claim 16, wherein a connection point between the second terminal of the first portion of the transformer and the first terminal of the second portion is connected to the gate of the switching element via a coil.   17. The drive circuit according to claim 16, wherein a first terminal of the second winding of the transformer is connected to the second power supply line via a third diode.

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