JP2009117925A - Receiver, method, and program for sampling data, taking in account system clocks of a plurality of system signals - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiver, or the like, capable of obtaining sampling data which is an integral multiple of respective system clocks, while suppressing the operation clocks to be low in an A/D converter and a signal processing portion. <P>SOLUTION: The receiver comprises a down-sampler means for thinning out data output from a first filter means, bsed on the down-sample ratio, and an up-sampler means for inserting null value data into data output from a down-sampler means according to an up-sample ratio. A sampling frequency determining means of the receiver calculates the down- and up-sample ratios for one or more sampling frequencies Fs, which is an integral multiple of the largest common divisor of the system clocks of a plurality of system signals in an available sampling frequency range F, and derives a minimum sampling frequency Fs from among one or more sampling frequencies F at a sampling rate after up-sampling. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a receiver, a method, and a program for sampling in consideration of a system clock of a plurality of system signals. In particular, the present invention relates to a technique for simultaneously sampling a plurality of system signals at once by a single A / D converter (Analog / Digital Converter).

  There is an undersampling technique for realizing an RF sampling configuration for sampling a received system signal in a high frequency state. In addition, there is a technology that applies undersampling technology to simultaneously undersample RF (Radio Frequency) signals of a plurality of systems with a single A / D converter (see, for example, Patent Document 1). According to this technique, it is possible to simultaneously sample the system bands of a plurality of system signals with a sampling frequency as low as possible using a single A / D converter. Since the low sampling frequency Fs is used, a high-speed A / D converter is not required, the amount of data for digital signal processing can be reduced, and power consumption is reduced. Moreover, since the number of A / D converters can be reduced, an effect of cost reduction is also brought about.

  Undersampling refers to a method of intentionally generating an aliasing image by sampling a received signal at a frequency lower than the Nyquist frequency and converting a high frequency carrier wave to a low frequency. Since the sampling frequency is low, the processing capability of the receiver can be relatively low, but the design of the filter for noise removal becomes complicated. Conversely, oversampling refers to a method of sampling a received signal at a frequency higher than the Nyquist frequency. Since the sampling frequency is high, the design of a filter for noise removal can be simplified, but a high processing capability is required for the receiver.

  There is also a technique of a sampling frequency conversion device that converts input data sampled at a sampling frequency of frequency M into data sampled at a sampling frequency of frequency N (see, for example, Patent Document 2). According to this technique, it is possible to convert to a non-integer multiple sampling frequency using upsampling and downsampling.

  Furthermore, it is a transmission / reception device that is compatible with a digital / analog mode mounted on a car or a mobile phone, and has a frequency corresponding to an inter-channel frequency, a digital mode modulation rate, an analog mode data rate, and an audio sampling rate. There is also a technique in which a frequency that is a common multiple of is used as a reference clock (see, for example, Patent Document 3). According to this technique, signals having a large number of required frequencies can be obtained from the output of one reference clock signal generation circuit.

  As described above, when sampling a plurality of system signals at once, it is necessary to select a sampling frequency in consideration of the system clock of each system signal. Usually, in order to reproduce the symbol rate of the system clock, it is possible to reproduce the system clock by performing sampling at a sampling frequency having a least common multiple component for each system clock.

  FIG. 1 is a functional configuration diagram of a receiver in the prior art. FIG. 2 shows a spectrum in the functional configuration of FIG.

  FIG. 1 shows a receiver 1 that samples two system signals (system clocks: Clk2, Clk2) at once. For example, the first system signal is a CDMA2000 signal, and the second system signal is a WiMAX signal. The receiver 1 includes antennas 101 and 102 for each system signal, amplifiers 111 and 112 for amplifying the RF signal output from each antenna, a band-pass filter 121 for filtering each amplified RF signal for each system band, and 122 and an adder 13 for adding each RF signal.

  The spectrum of the RF signal output from the adder 13 is represented by [SP1] in FIG. FIG. 2 shows a CDMA2000 system signal with a channel center frequency of 2.1213 GHz and a WiMAX system signal with a channel center frequency of 2.4900 GHz.

  The synthesized RF signal output from the adder 13 is sampled collectively by a single A / D converter 14. The sampling frequency Fs in the A / D converter 14 is supplied from the sampling clock generator 15. The sampling frequency Fs is calculated by the CPU 16. The sampling frequency Fs may be based on undersampling for both system signals, or may be based on undersampling and oversampling.

  The spectrum of the digital signal output from the A / D converter 14 is represented by [SP2] in FIG. According to FIG. 2, the two system signals are undersampled (sampling frequency Fs = 160 MHz). The center frequency of the aliasing image of the CDMA2000 system signal is 41.25 MHz. The center frequency of the aliasing image of the WiMAX system signal is 70.00 MHz. Since undersampling is used, the center frequency of the system band in the digital signal output from the A / D converter 14 varies depending on the value of the sampling frequency Fs.

  The digital signal sampled by the A / D converter 14 is separated into two duplicated digital signals by the signal separation unit 17. Each digital signal is quadrature demodulated by quadrature demodulation sections 181 and 182 and outputs I-channel and Q-channel baseband signals. The baseband signals output from the quadrature demodulation units 181 and 182 are processed by the signal processing units 191 and 192 after the high frequency components are removed, respectively.

JP 2006-180373 A JP-A-6-104764 JP-A-5-066798

  For the subsequent processing of the A / D converter, it is preferable to set the operation clock of the signal processing units 191 and 192 to an integral multiple of the system clock. In order to sample signals of a plurality of systems simultaneously with a single A / D converter, the frequency of a common multiple of the system clocks of the plurality of system signals can be configured as the sampling frequency of the A / D converter.

  However, the sampling frequency as the least common multiple is not always low. Depending on the combination of system signals, the least common multiple may be several GHz. When a plurality of system signals are sampled collectively by undersampling, the sampling frequency as the least common multiple is not necessarily lower than the frequency at which undersampling is possible.

  By using the technique described in Patent Document 2, the sampling rate can be converted. However, depending on the set value of the sampling frequency, the upsampling ratio and downsampling ratio may be high. In this case, the number of cascade connections of the up-sample circuit and the down-sample circuit increases.

  Accordingly, the present invention provides a receiver capable of obtaining sampling data that is an integral multiple of each system clock while keeping the operating clock in the A / D converter and the signal processing unit low and further reducing the upsampling ratio and downsampling ratio. It is an object to provide a method and a program.

According to the present invention, in a receiver having an A / D converter that simultaneously samples a plurality of system signals based on the sampling frequency Fs,
First filter means for separating the digital signal for each system signal from the digital signal output from the A / D converter;
Down-sampler means for thinning out the data output from the first filter means based on the down-sample ratio;
Up-sampler means for inserting zero value data into data output from the down-sampler means based on the up-sample ratio;
Second filter means for separating only one low-frequency system band corresponding to the system signal from the digital signal output from the upsampler means;
Sampling frequency determination means for outputting a sampling frequency Fs, a downsampling ratio, and an upsampling ratio;
The sampling frequency determining means calculates a downsampling ratio and an upsampling ratio for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals within the usable sampling frequency range F. The sampling rate after upsampling is characterized in that a minimum sampling frequency Fs is derived among one or more sampling frequencies F.

According to another embodiment of the receiver of the present invention, the sampling frequency determining means is for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor.
The upsample ratio is a value obtained by dividing the system clock Clk by the sampling frequency Fs and the greatest common divisor of the system clock Clk.
The downsampling ratio is a divisor of a value obtained by dividing the sampling frequency Fs by the greatest common divisor of the sampling frequency Fs and the system clock Clk, and may be a value in which aliasing due to aliasing is not superimposed when downsampling is performed. preferable.

According to the present invention, an A / D converter that simultaneously samples a plurality of system signals based on the sampling frequency Fs;
First filter means for separating the digital signal for each system signal from the digital signal output from the A / D converter;
Down-sampler means for thinning out the data output from the first filter means based on the down-sample ratio;
Up-sampler means for inserting zero value data into data output from the down-sampler means based on the up-sample ratio;
Second filter means for separating only one low-frequency system band corresponding to the system signal from the digital signal output from the upsampler means;
A sampling method of sampling frequency determining means for a receiver having sampling frequency Fs, sampling frequency determining means for outputting a downsampling ratio and an upsampling ratio, comprising:
Within the usable sampling frequency range F, the downsampling ratio and the upsampling ratio are calculated for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals. The minimum sampling frequency Fs is derived among the sampling rates of one or more sampling frequencies F.

According to another embodiment of the sampling method of the present invention, for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor,
The upsample ratio is a value obtained by dividing the system clock Clk by the sampling frequency Fs and the greatest common divisor of the system clock Clk.
The downsampling ratio is a divisor of a value obtained by dividing the sampling frequency Fs by the greatest common divisor of the sampling frequency Fs and the system clock Clk, and may be a value in which aliasing due to aliasing is not superimposed when downsampling is performed. preferable.

According to the present invention,
An A / D converter that simultaneously samples a plurality of system signals based on the sampling frequency Fs;
First filter means for separating the digital signal for each system signal from the digital signal output from the A / D converter;
Down-sampler means for thinning out the data output from the first filter means based on the down-sample ratio;
Up-sampler means for inserting zero value data into data output from the down-sampler means based on the up-sample ratio;
A program for causing a computer mounted in a receiver to function from a digital signal output from an upsampler means and having a second filter means for separating only one low-frequency system band corresponding to the system signal. ,
Function the computer to output the sampling frequency Fs, downsample ratio and upsample ratio,
Within the usable sampling frequency range F, the downsampling ratio and the upsampling ratio are calculated for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals. The computer is made to function so as to derive a minimum sampling frequency Fs among one or more sampling frequencies F.

According to another embodiment of the program of the present invention, for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor,
The upsample ratio is a value obtained by dividing the system clock Clk by the sampling frequency Fs and the greatest common divisor of the system clock Clk.
The downsampling ratio is a divisor of a value obtained by dividing the sampling frequency Fs by the greatest common divisor of the sampling frequency Fs and the system clock Clk so that aliasing due to aliasing is not superimposed when downsampling is performed. It is also preferable to make the computer function.

  According to the receiver, method, and program of the present invention, by adjusting the down-sampling ratio and the up-sampling ratio for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals. In order to derive the lowest sampling frequency Fs at which sampling data that is an integral multiple of each system clock is obtained, the up-sampling ratio and down-sampling ratio are further reduced while keeping the operation clock in the A / D converter and the signal processing unit low. Sampling data that is an integral multiple of each system clock can be obtained while keeping it low.

  Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.

  FIG. 3 is a functional configuration diagram of a receiver according to the present invention. 4 and 5 are spectra in the functional configuration of FIG.

  The receiver 1 of FIG. 3 further includes band pass filters 201 and 202, down samplers 211 and 212, up samplers 221 and 222, and low pass filters 231 and 232, as compared with FIG.

  The CPU 16 functions as a sampling frequency determination unit. Here, the sampling frequency determination unit 16 does not necessarily perform arithmetic processing in real time. For example, sampling frequency determination processing is performed in advance outside the receiver, and the value is stored in a storage unit (for example, ROM (Read Only Memory)), and the sampling frequency Fs, the downsampling ratio, and the like stored in the storage unit are stored. It may output an upsample ratio.

  The sampling frequency determination unit 16 calculates the down-sampling ratio and the up-sampling ratio for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals within the usable sampling frequency range F. calculate. Then, the minimum sampling frequency Fs is derived from the sampling rate after upsampling among one or more sampling frequencies F. A specific processing flow will be described later with reference to FIG. The sampling frequency determination unit 16 outputs the sampling frequency Fs to the sampling clock generation unit 15, outputs the down sample ratio to the down samplers 211 and 222, and outputs the up sample ratio to the up samplers 221 and 222.

  The band pass filters 201 and 202 filter the digital signal output from the signal separation unit 17 according to the system band. Each filtered digital signal is output to downsamplers 211 and 212.

  The spectrum of the CDMA2000 digital signal output from the band pass filter 201 is represented by [SP3-1] in FIG. The center frequency of the aliasing image of the CDMA2000 system signal is 41.25 MHz. The spectrum of the WiMAX digital signal output from the band pass filter 202 is represented by [SP3-2] in FIG. The center frequency of the aliasing image of the WiMAX system signal is 70.00 MHz.

  The down samplers 211 and 212 are components that reduce the rate of the digital signal by thinning out D-1 data for D sample data based on the down sample ratio D. The downsampling ratio D is output from the CPU 16. The digital signal down-sampled based on the down-sampling ratio D is output to the up-samplers 221 and 222.

  The spectrum of the CDMA2000 digital signal output from the downsampler 211 is represented by [SP4-1] in FIG. The center frequency in this system band is a frequency (41.25 / D1 [MHz]) obtained by dividing 41.25 MHz by the downsample ratio D1. The spectrum of the WiMAX digital signal output from the down sampler 212 is represented by [SP4-2] in FIG. The center frequency in this system band is a frequency (70.00 / D2 [MHz]) obtained by dividing 70.00 MHz by the downsample ratio D2.

  Up-samplers 221 and 222 are components that increase the rate of a digital signal by inserting U-1 zero-value data between U sample data based on an up-sample ratio U. The upsample ratio U is output from the CPU 16. The digital signal up-sampled based on the up-sampling ratio D is output to the low-pass filters 231 and 232.

  The spectrum of the CDMA2000 digital signal output from the upsampler 221 is represented by [SP5-1] in FIG. The spectrum of the WiMAX digital signal output from the upsampler 222 is represented by [SP5-2] in FIG.

  The low-pass filters 231 and 232 extract only the lowest digital signal corresponding to the system band. The filtered digital signal is output to quadrature demodulation sections 181 and 182.

  The spectrum of the CDMA2000 digital signal output from the low-pass filter 231 is represented by [SP6-1] in FIG. 5, and the spectrum of the WiMAX digital signal output from the low-pass filter 232 is illustrated in FIG. [SP6-2]. According to FIG. 5, only the lowest digital signal corresponding to the system band is extracted.

  FIG. 6 is a flowchart executed by the CPU.

  The CPU calculates the sampling frequency Fs, the downsampling ratio, and the upsampling ratio based on the system clock of at least two system signals.

(S601) The greatest common divisor Gcd of the two system clocks Clk1 and Clk2 is calculated. For example, it is assumed that the first system signal is a CDMA2000 signal and the second system signal is a WiMAX signal.
First system signal [CDMA2000]
Center frequency: 2121.3MHz
System clock Clk1: 1.2288 MHz (1,228,800 Hz)
Second system signal [WiMAX]
Center frequency: 2490.0 MHz
System clock Clk2: 10 MHz (10,000,000 Hz)
At this time, the greatest common divisor Gcd is 3.2 KHz (3,200 Hz).

If prime factorization is applied to the CDMA2000 system clock Clk1 (= 1.2288 MHz) and the WiMAX system clock Clk2 (= 10.00000 MHz), the following is obtained. Note that factor (a) means a prime factorization function of a.
factor (Clk1) = 2 ¹⁴ · 3 · 5 ²
factor (Clk2) = 2 ⁷ · 5 ⁷

(S602) A sampling frequency Fs that is an integral multiple of the greatest common divisor Gcd of the system clock Clk1 and the system clock Clk2 is selected from the frequency range F that is desired to be used as the sampling frequency.
Fs = Gcd × j (j is an integer)
The minimum value of the frequency range F is at least twice the sum of the bandwidth of the first system signal and the bandwidth of the second system signal. Incidentally, when selecting the sampling frequency Fs as a factor of j, the system clock Clk1 is divided by Gcd ^{2 7.3} factor and a system clock Clk2 ^{5 5} of a divided by Gcd By selecting a large number of factors, the upsampling ratio can be kept low.

(S603) For this sampling frequency Fs, the greatest common divisor Gcd is calculated for each system clock. Gcd (a, b) is a function for calculating the greatest common divisor of a and b.
Gcd1 = Gcd (sampling frequency Fs, system clock Clk1)
Gcd2 = Gcd (sampling frequency Fs, system clock Clk2)

According to the examples of CDMA2000 and WiMAX, when the frequency range is Fs = 160 MHz, the digital signal output from the A / D converter is as follows.
Center frequency of the first system signal: 41.25 MHz
Center frequency of second system signal: 70 MHz
Further, the greatest common divisor of the frequency range Fs and each system clock is as follows.
Gcd1 = 51,200
Gcd2 = 10,000,000

(S604) The downsample ratio and the upsample ratio are calculated. The upsample ratio is a value obtained by dividing the system clock by Gcd, and the downsample ratio is a value obtained by dividing the sampling frequency by Gcd.
Upsample1 = Clk1 / Gcd1
Upsample2 = Clk2 / Gcd2
Downsample1 = Fs / Gcd1
Downsample2 = Fs / Gcd2

According to the examples of CDMA2000 and WiMAX, the upsample ratio and the downsample ratio are calculated as follows.
Upsample1 = Clk1 / Gcd1 = 24
Downsample1 = Fs / Gcd1 = 3,125
Upsample2 = Clk2 / Gcd2 = 1
Downsample2 = Fs / Gcd2 = 8

(S605) Next, among a set of divisors of Downsample1 and Downsample2, when used as a downsampling ratio, a set of elements (A1, A2) is derived.
A1 = {n: n | Downsample1, n <Fs / (2 × Clk1)}
A2 = {n: n | Downsample2, n <Fs / (2 × Clk2)}
Here, n | N represents that n is a divisor of N.

(S606) From among the elements n of A1 and A2, one that does not cause aliasing due to the return of the system band by frequency conversion at the time of downsampling is selected. Assume that the sets are A′1 and A′2. For the digital signal output from the A / D converter, the center frequency of the first system signal is F1, the center frequency of the system 2 is F2, and the bandwidths are B1 and B2, respectively.
When n1εA1, ((Fs / 2) / n1) × k, {k = 1, 2,..., n1} is not included in the section [F1-B1 / 2, F1 + B1 / 2] n1 Is the element of A′1.
Similarly, when n2εA2, ((Fs / 2) / n2) × k, {k = 1, 2,..., N2} is included in the section [F2−B2 / 2, F2 + B2 / 2]. N2 which is not present is an element of A′2.

  FIG. 7 is an explanatory diagram showing superimposition of a folded image when down-sampled in the band after frequency conversion.

  According to FIG. 7, it is necessary to select an element in which ((Fs / 2) / n1) × k does not overlap in the system band. That is, when adjacent folded images are superimposed, the element cannot be used.

According to the examples of CDMA2000 and WiMAX, when aliasing due to down-sampling is considered, the following is obtained.
A′1 = {1, 5, 25}
A′2 = {1, 2, 4, 8}

(S607) The largest elements of A'1 and A'2 are defined as Downsample'1 and Downsample'2, respectively.

According to the examples of CDMA2000 and WiMAX, it is as follows.
Downsample '1 = 25
Downsample'2 = 8

(S608) S603 to S607 are repeated for all j satisfying Gcd × j (= Fs) εF (S611). As a result, Downsample'1, Downsample'2, Upsample1, Upsample2 are calculated for all j.

(S609) After repeating S603 to S607 for all j for which Gcd × jεF, j is the maximum j of the following three values and is j ′.
Gcd × j
Gcd × j × Upsample1 / Downsample'1
Gcd × j × Upsample2 / Downsample'2

(S610) The sampling frequency of the A / D converter is set to Fs = Gcd × j ′, and the downsampler downsampler ratio and the upsampler upsampler ratio are determined.
Sampling frequency Fs = Gcd × j ′
Down sample ratio D1 = Downsample'1
Upsample ratio U1 = Upsample1
Downsample ratio D2 = Downsample'2
Upsample ratio U1 = Upsample2

  According to the above-described examples of CDMA2000 and WiMAX, two system signals are simultaneously sampled by the A / D converter at the sampling frequency Fs = 160 MHz. For digital signals in CDMA2000, 25 times downsampling and 24 times upsampling are performed. For digital signals in WiMAX, downsampling is performed 8 times.

  At this time, the maximum value of the operating frequency in the A / D converter and the signal processing unit is 160 MHz which is the operating frequency of the A / D converter and the band pass filter that separates the output signal. This makes it possible to obtain sampling data that is an integral multiple of each system clock while keeping the operating frequency low.

  In the specific example described above, oversampling is performed on the output of the low-pass filter after upsampling at 125 times the system clock 1.2288 Mbps with respect to the CDMA2000 signal. If it is desired to lower the sampling rate, downsampling can be executed again.

  Further, when it is desired to perform even-number oversampling, for example, four-times sampling, the upsample ratio may be Upsample'1 × 4. Further, the upsampling may be performed again on the output signal of the filter after the upsampling.

According to the present invention, the number of vertical connections of the up-sample circuit and the down-sample circuit is not redundantly connected. According to the present invention, 160 MHz is derived as the sampling frequency. When the sampling rate is converted to 1.2288 MHz, the sampling rate is converted to (2 ³ × 3) / 5 ⁵ times. On the other hand, for example, when 100 MHz is used as the sampling frequency, if the sampling rate is converted to 1.2288 MHz, the sampling rate is converted to (2 ⁶ × 3) / 5 ⁶ times. In this case, an upsampling circuit of 8 times and a downsampling circuit of 1/5 times are connected in cascade as compared with the case of 160 MHz.

  As described above in detail, according to the receiver, the method, and the program of the present invention, the downsampling ratio and the upsampling are selected from the sampling frequency Fs that is an integer multiple of the greatest common divisor of the system clock of the plurality of system signals. A sampling frequency Fs is obtained that can obtain sampling data that is an integral multiple of each system clock while keeping the sampling ratio low and further reducing the upsampling ratio and downsampling ratio.

  In the various embodiments of the present invention described above, various changes, modifications, and omissions in the scope of the technical idea and the viewpoint of the present invention can be easily made by those skilled in the art. The above description is merely an example, and is not intended to be restrictive. The invention is limited only as defined in the following claims and the equivalents thereto.

It is a functional block diagram of the receiver in a prior art. It is a spectrum in the function structure of FIG. It is a functional block diagram of the receiver in this invention. It is a 1st spectrum in the function structure of FIG. It is a 2nd spectrum in the function structure of FIG. It is a flowchart performed by CPU in this invention. It is explanatory drawing showing the superimposition of the folding image at the time of downsampling in the band after frequency conversion.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Receiver 101, 102 Antenna 111, 112 Amplifier 121, 122 Band pass filter 13 Adder 14 A / D converter 15 Sampling clock generation part 16 CPU, Sampling frequency determination part 17 Signal separation part 181, 182 Orthogonal demodulation part 191, 192 Signal processing unit 201, 202 Band pass filter 211, 212 Down sampler 221, 222 Up sampler 231, 232 Low pass filter

Claims (6)

In a receiver having an A / D converter (Analog / Digital Converter) that simultaneously samples a plurality of system signals based on the sampling frequency Fs,
First filter means for separating a digital signal for each system signal from a digital signal output from the A / D converter;
Down-sampler means for thinning out the data output from the first filter means based on the down-sample ratio;
Up-sampler means for inserting zero-value data into the data output from the down-sampler means based on the up-sample ratio;
Second filter means for separating only one low-frequency system band corresponding to the system signal from the digital signal output from the upsampler means;
Sampling frequency determining means for outputting the sampling frequency Fs, the down-sampling ratio, and the up-sampling ratio;
The sampling frequency determination means calculates a downsampling ratio and an upsampling ratio for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals within the usable sampling frequency range F. A receiver characterized by calculating a sampling rate after up-sampling and deriving a minimum sampling frequency Fs among one or more sampling frequencies F. The sampling frequency determining means is for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor.
The upsampling ratio is a value obtained by dividing the system clock Clk by the sampling frequency Fs and the greatest common divisor of the system clock Clk.
The downsampling ratio is a divisor of a value obtained by dividing the sampling frequency Fs by the greatest common divisor of the sampling frequency Fs and the system clock Clk, and is a value in which aliasing due to aliasing is not superimposed when downsampling is performed. The receiver according to claim 1. An A / D converter that simultaneously samples a plurality of system signals based on the sampling frequency Fs;
First filter means for separating a digital signal for each system signal from a digital signal output from the A / D converter;
Down-sampler means for thinning out the data output from the first filter means based on the down-sample ratio;
Up-sampler means for inserting zero-value data into the data output from the down-sampler means based on the up-sample ratio;
Second filter means for separating only one low-frequency system band corresponding to the system signal from the digital signal output from the upsampler means;
A sampling method of the sampling frequency determining means for a receiver having sampling frequency determining means for outputting the sampling frequency Fs, the downsampling ratio and the upsampling ratio,
Within the usable sampling frequency range F, the downsampling ratio and the upsampling ratio are calculated for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals. A sampling method characterized by deriving a minimum sampling frequency Fs from among one or more sampling frequencies F. For one or more sampling frequencies Fs that are integer multiples of the greatest common divisor,
The upsampling ratio is a value obtained by dividing the system clock Clk by the sampling frequency Fs and the greatest common divisor of the system clock Clk.
The downsampling ratio is a divisor of a value obtained by dividing the sampling frequency Fs by the greatest common divisor of the sampling frequency Fs and the system clock Clk, and is a value in which aliasing due to aliasing is not superimposed when downsampling is performed. The sampling method according to claim 3. An A / D converter that simultaneously samples a plurality of system signals based on the sampling frequency Fs;
First filter means for separating a digital signal for each system signal from a digital signal output from the A / D converter;
Down-sampler means for thinning out the data output from the first filter means based on the down-sample ratio;
Up-sampler means for inserting zero-value data into the data output from the down-sampler means based on the up-sample ratio;
A program for causing a computer mounted in a receiver to function from a digital signal output from the upsampler means and having a second filter means for separating only one low-frequency system band corresponding to the system signal. And
Causing the computer to function to output the sampling frequency Fs, the downsample ratio, and the upsample ratio;
Within the usable sampling frequency range F, the downsampling ratio and the upsampling ratio are calculated for one or more sampling frequencies Fs that are integer multiples of the greatest common divisor of the system clocks of a plurality of system signals. A program for causing the computer to function so as to derive a minimum sampling frequency Fs from among one or more sampling frequencies F. For one or more sampling frequencies Fs that are integer multiples of the greatest common divisor,
The upsampling ratio is a value obtained by dividing the system clock Clk by the sampling frequency Fs and the greatest common divisor of the system clock Clk.
The downsampling ratio is a divisor of a value obtained by dividing the sampling frequency Fs by the greatest common divisor of the sampling frequency Fs and the system clock Clk, and is such a value that aliasing due to aliasing is not superimposed when downsampling is performed. 6. The program according to claim 5, which causes a computer to function.

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