JP2009111108A - Mounting structure and mounting method of chip component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problems in the existing mounting structure of chip component that poor conductivity is generated because crack occurs in conductive member (solder) to which electrode terminals of chip component are connected and that such crack resulting in this poor conductivity cannot easily be checked from external appearance making it difficult to predict possibility in occurrence of electrical poor conductivity of chip component. <P>SOLUTION: An electrode pad 4 on a wiring circuit board 6 corresponding to every electrode terminal 2 of the chip component 7 is divided into an external side pad 4a and an internal side pad 4b in the direction of the electrode terminal 2 of the chip component and a slit 5 at the dividing area is filled with an insulating resin 9. The internal side pad 4b is connected to an inspection pad 11 and a wire 10 provided at the area other than the lower surface of the chip component 7. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a mounting structure and mounting method for a chip component, and in particular, after mounting a chip component on a wiring board using lead-free solder, the progress of a crack generated at a joint portion on the lower surface of an electrode terminal of the chip component is observed. The present invention relates to a mounting structure and a mounting method for a chip component which is delayed from the structure and improves the electrical conduction reliability of the chip component.

Fig. 6 (a) shows 2012R (2.0 mm long, 1.2 mm wide resistor), 3216R (3.2 mm long, 1.6 mm wide resistor), 5025R (5.0 mm long, 2.5 mm wide resistor) 1 shows a conventional mounting structure of a chip component that is called a rectangular shape in a planar direction of a wiring board.
As shown in FIG. 6A, a chip component 7 having a body part 1 and electrode terminals 2 is mounted on a wiring board 6 having electrode pads 4. Here, the electrode terminal 2 of the chip component 7 and the electrode pad 4 of the wiring substrate 6 are electrically connected via the conductive member 3. The conventional shape of the electrode pads 4 on the wiring board 6 is a square or a circle having a larger area than the lower surface of the electrode terminals 2 of the chip component 7, and the electrode pads 4 corresponding to the electrode terminals 2 have a single shape. Have. In the electrode terminal 2, most of the side surface portion from the lower surface portion is wetted by the conductive member 3, and the surface of the electrode pad 4 on the wiring substrate 6 is also wetted by the conductive member 3.
The material of the conductive member 3 is mostly solder, and in particular, a case of using tin-lead solder in which the mass ratio% of Sn and Pb is in the vicinity of a eutectic composition of Sn: Pb = 60 to 63%: 40 to 37%. Many.
For chip parts that have poor continuity due to cracks in the solder after mounting, especially when a high-layer, high-cost wiring board is used, the entire wiring board is not discarded. Repairs that replace only defective parts using hot air, heaters, etc.
FIG. 6 shows an example in which electrode pads having a single pattern are arranged corresponding to the electrode terminals of the chip component. However, as an example of dividing the electrode pad pattern formed on the wiring board, For example, those disclosed in Patent Documents 1 and 2 are known. In the device described in Patent Document 1, when the solder paste supplied on the electrode pad is heated and melted by dividing the electrode pad into a plurality of parts, the contact area of the molten solder with the atmosphere is expanded, and the solder fillet Air bubbles remaining inside are reduced. Moreover, in what was described in patent document 2, the electrode pad was divided | segmented into plurality, the stress added to the solder which connects an electronic component lead | read | reed and an electrode pad is relieve | moderated, and it suppresses that a crack enters a solder connection part. is doing.
Japanese Patent Laid-Open No. 10-075042 JP 2000-261131 A

Chip components mounted on a wiring board by soldering generate heat because electricity flows in the usage environment. Similarly, the wiring board itself is heated by the heat generated by the wiring pattern, chip parts, and other electronic parts. However, since the body part of the chip component and the material of the wiring board are generally different, the thermal expansion coefficients are different. For this reason, since the chip component and the wiring substrate have different thermal expansion / contraction amounts, stress is applied to the solder joint between the electrode terminal of the chip component and the electrode pad of the wiring substrate.
As for the amount of solder existing between the electrode terminal of the chip component and the electrode pad on the wiring board, a solder fillet is formed on the side surface portion of the electrode terminal of the chip component. There are also many. For this reason, cracks are generated from the solder joints on the lower surface of the electrode terminal of the chip component with the smallest amount of solder and close to the center of the chip component. That is, cracks are likely to occur in the vicinity of G shown in FIG. In the case of chip parts such as 3216R and 5025R chip parts that are rectangular in the shape of the wiring board plane direction, the cracks that have occurred are because the thermal expansion / contraction amount of the chip parts and the wiring board is maximized in the longitudinal direction. Cracks tend to propagate along the solder component on the lower surface of the electrode terminal in the longitudinal direction of the chip component. Thereafter, the crack reaches the solder fillet portion, and finally penetrates the solder fillet portion as shown in FIG. When the crack penetrates the solder fillet portion, the electrode terminal and the electrode pad of the chip component are completely separated, and an electrical conduction failure occurs.

  In particular, in recent years, environmental regulations are rapidly shifting from conventional tin-lead solders to lead-free solders that do not contain lead. This lead-free solder is mainly composed of tin and is composed of silver, copper, zinc, bismuth, indium, antimony, nickel, germanium, etc. Compared to conventional tin-lead eutectic solder (Sn63wt%, remaining Pb) It has the characteristics that the tensile strength and creep strength of the metal are strong and the ductility is small. For this reason, the lead-free solder has a smaller effect of absorbing stress in the solder itself than the tin-lead solder, and as a result, when a crack occurs in the solder joint, the crack easily develops. In addition, the melting temperature is 183 ° C for tin-lead eutectic solder, but it is as high as 190 ° C to 230 ° C for lead-free solder. It is necessary to heat the part to 200 ° C to 300 ° C. Due to this heat, there is a possibility that an electronic component existing around the defective component will fail.

In addition, since the warping of the wiring board becomes large, the wiring pattern may be disconnected. In particular, wiring boards that mount high-density components such as lead components such as QFP and TSOP, chip components, surface mount components such as CSP and BGA, and flip chip components are expensive, so repair only defective components. However, there is a concern about the adverse effects on the surrounding components and wiring pattern due to the heat load of repair.
In addition, if it is possible to confirm the appearance of cracks generated on the lower surface of the electrode terminal of the chip component, it is possible to predict the possibility of a defective electrical continuity of the chip component to some extent. It is difficult to confirm cracks in appearance because the gap between the electrode pad and the electrode pad is small. For this reason, it is difficult to predict from the appearance observation the possibility of a defective electrical continuity of the chip component.

  An object of the present invention is to solve the above-mentioned problems of the prior art. The purpose of the present invention is to firstly, cracks generated at the solder joints on the lower surface of the electrode terminal of the chip component, particularly the longitudinal direction of the chip component. By suppressing the progress in the direction, the electrical continuity life is extended and the generation of defective parts is prevented as much as possible. Secondly, it is possible to predict the possibility of failure in electrical conduction of chip components.

  In order to achieve the above object, according to the present invention, a chip component having a plurality of electrode terminals is mounted on a wiring board having electrode pads at positions corresponding to the electrode terminals, and the electrode terminals and the electrode pads are mounted. In the mounting structure of the chip component connected to each other by the conductive member, the electrode pad is divided into two or more in the direction between the electrode terminals of the chip component, and the slit formed at the divided portion is made of an insulating resin. There is provided a mounting structure for chip parts, which is filled.

Preferably, the insulating resin is in contact with the electrode terminals of the chip component.
Preferably, of the divided electrode pads, the innermost pad closest to the center of the chip component is connected to an inspection pad provided at a location other than the lower surface of the chip component on the wiring board. Yes.

  In order to achieve the above object, according to the present invention, a wiring board on which a chip component having a plurality of electrode terminals is mounted is formed at a position corresponding to the electrode terminal of the chip component when mounted. In addition, the slit formed in the divided part of the electrode pad divided into two or more in the direction between the electrode terminals of the chip component when mounted, or the space between the slit and the electrode pad is filled with insulating resin There is provided a mounting method for a chip component, comprising: a step of supplying a conductive member onto the electrode pad; and a step of mounting the chip component on the wiring board.

  In order to achieve the above object, according to the present invention, a wiring board on which a chip component having a plurality of electrode terminals is mounted is formed at a position corresponding to the electrode terminal when mounted. A step of supplying a conductive member onto the electrode pads divided into two or more in the direction between the electrode terminals of the chip component when being formed, a step of mounting the chip component on the wiring substrate, There is provided a chip component mounting method comprising a step of filling a slit formed in a divided portion of the electrode pad or filling an insulating resin in a space between the slit and the electrode pad.

According to the chip component mounting structure of the present invention, the electrode pad on the wiring board provided at the position corresponding to the electrode terminal provided at the body end of the chip component is provided at the body end of the chip component. It is divided into two or more in the direction of the electrode terminal, and the slit formed by the division is filled with an insulating resin. With this structure, there is no conductive member connecting the electrode terminal and the electrode pad in the slit portion of the divided part, and cracks generated at the joint of the electrode pad closest to the chip center on the lower surface of the electrode terminal of the chip component Progress is stopped at the slits at this division. And generation | occurrence | production of a new crack is suppressed by the stress relaxation effect | action of the insulating resin with which the slit is filled. Therefore, it takes time until the crack penetrates the solder fillet portion, and as a result, there is an effect of extending the electrical conduction life of the chip component. Therefore, according to the present invention, the number of repairs for replacing parts can be reduced.
In addition, the inner pad that is closest to the center of the chip component among the electrode pads is connected to the test pad provided at a location other than the lower surface of the chip component on the wiring board, whereby the test pad and the outer pad It is possible to measure the electrical continuity of the chip component, and it is possible to easily check for the presence or absence of cracks at the joint of the inner pad, which was very difficult in the visual inspection. It is possible to predict a conduction failure.

  Next, an embodiment of the present invention will be described with respect to a chip component mounting structure in which a chip component having a rectangular shape in the wiring substrate plane direction is mounted on an electrode pad on the wiring substrate via a conductive member. However, any form may be used as long as the chip component provided with the electrode terminal for electrical connection to the end of the body is mounted on the electrode pad on the wiring board via the conductive member. The present invention is not limited to the embodiment.

[First Embodiment]
FIG. 1A is a top view showing a first embodiment of a chip component mounting structure according to the present invention, and FIG. 1B is a cross-sectional view thereof. A chip component 7 composed of a body part 1 and electrode terminals 2 formed at the end of the body part 1 is mounted on a wiring board 6 having electrode pads 4. Here, the electrode terminal 2 is connected to the electrode pad 4 through the conductive member 3. According to the present invention, the electrode pad 4 is divided into two in the direction between the electrode terminals 2 of the chip component 7, that is, the outer pad 4a and the inner pad 4b. In the case of chip parts called 2012R, 3216R, 5025R whose shape in the plane direction of the wiring board is rectangular as in the present embodiment, the body part 1 is divided into two in the direction between the electrode terminals 2. It will be divided into two in the longitudinal direction. In the division, a slit 5 formed between the outer pad 4a and the inner pad 4b crosses under the chip component 7. The slit 5 is filled with an insulating resin 9 whose upper surface is in contact with the chip component 7. Therefore, the conductive member 3 is divided at the slit 5 formation portion.

As the conductive member, solder or a conductive adhesive is used. Solder materials include Sn—Pb, Sn—Ag—Cu, Sn—Ag, Sn—Cu, Sn—Sb, Sn—Zn, Sn—In, etc. Any of these may be used. The insulating resin 9 can be formed of a solder resist that is widely used in wiring boards. Or you may make it inject | pour insulating resin into a slit part using a dispenser etc. after a solder reflow process (or conductive adhesive curing process).
Under the environment where the electronic device is used, the electronic component is heated by the self-heating caused by the flow of electricity and the heat generated by the peripheral components. Similarly, the wiring board itself is heated by the heat generated by the wiring pattern, chip parts, and other electronic parts. Since the material of the body part of the chip component and the wiring board are generally different, the thermal expansion coefficients of the two are different. For this reason, stress is applied to the joint between the electrode terminal of the chip component and the electrode pad.
As for the amount of solder that exists between the electrode terminal of the chip component and the electrode pad on the wiring board, a solder fillet is formed on the side surface of the electrode terminal of the chip component. More than. For this reason, cracks are generated from the solder joints on the lower surface of the electrode terminal of the chip component and near the center of the chip component.
Here, the situation in the chip component mounting structure according to the present invention when a crack occurs and further develops will be described, and the effect of the present invention will be clarified as compared with the conventional mounting structure. FIG. 1C shows the form of crack propagation in the chip component mounting structure of the present invention. In the mounting structure of the chip component 7 according to the present invention, in the conductive member 3 between the inner pad 4b and the electrode terminal 2 of the chip component 7, a crack 8 is generated from the side close to the center of the chip component. The generated crack 8 progresses in the longitudinal direction of the body part 1 of the chip part 7 where the thermal expansion / contraction amount of the body part 1 of the chip part 7 and the wiring substrate 6 is maximum. However, when the crack 8 reaches the insulating resin 9 formed at the divided portion of the electrode pad, there is no conductive member 3 to which the crack 8 should progress, so the stress is released here, and the crack progresses temporarily. Stop. Then, the stress relaxation action by the insulating resin 9 suppresses the cracks from developing on the outer pad 4a. As a result, it takes a long time for the crack to propagate on the outer pad 4a and penetrate the solder fillet portion.

On the other hand, in the conventional mounting structure in which the electrode pad is not divided and the insulating resin is not formed between the wiring board and the chip component, once the crack 8 occurs from the side close to the center of the chip component 7, Since the conductive member 3 is not divided in the middle and does not have a stress relaxation function, the generated crack 8 is mainly formed in the conductive member 3 between the electrode terminal 2 and the electrode pad 4 of the chip component 7. It progresses in the longitudinal direction of the body portion 1 of the component 7 and penetrates the solder fillet portion in a relatively short time as shown in FIG.
As described above, in the chip component mounting structure according to the present invention, the progress of cracks occurring at the joint surface close to the center of the chip component is suppressed by improving the electrical conduction reliability of the chip component. To do. In particular, the present invention is useful when a lead-free solder that is difficult to relieve stress by the solder itself is used for the conductive member 3. Further, when the thickness of the conductive member 3 existing between the lower surface of the electrode terminal of the chip component and the pad is as small as 50 μm or less, the stress relaxation in the conductive member itself becomes very small, and the crack progresses further faster. In particular, the present invention is useful. In the present embodiment, the size of the chip component is not particularly limited. However, the larger the body part of the chip component, the greater the stress applied to the conductive member joint between the electrode terminal and the electrode pad of the chip component. Thus, cracks are easily generated and propagated. In particular, a chip component having a rectangular shape in the plane direction of the wiring board and generally larger than the chip component called 5025R is likely to crack and easily develop in the conductive member joint. In some cases, the present invention is even more useful.

  Here, the manufacturing method of this Embodiment is demonstrated easily about the case where solder is used for the electroconductive member 3 and solder resist is used for insulating resin. A solder resist is applied to the wiring board on which the electrode pads 4 divided into the wiring board are formed by using a screen printing method or the like, and the slits 5 of the electrode pads 4 are filled with the insulating resin 9. After the resin is cured, a solder paste is supplied onto the outer pad 4a and the inner pad 4b using a screen printing method or the like. Then, the chip component 7 is positioned on the electrode pad 4 on the wiring substrate, and the chip component 7 is mounted on the wiring substrate. And the manufacturing process of the mounting structure of this Embodiment is completed through a solder reflow process.

[Second Embodiment]
FIG. 2A is a top view showing a second embodiment of the chip component mounting structure of the present invention, and FIG. 2B is a cross-sectional view thereof. In FIG. 2, the same reference numerals are given to the same parts as those of the first embodiment shown in FIG. 1, and a duplicate description will be omitted as appropriate (the same applies to the other embodiments below). . The difference of the present embodiment from the first embodiment shown in FIG. 1 is that a test pad 11 is provided on the wiring board 6 at a location other than the lower surface of the body part 1 of the chip component 7. Is connected to the inner pad 4 b via the wiring 10.
Now, assuming that a crack is generated from the side near the center of the chip component 7 in the conductive member 3 between the inner pad 4b and the electrode terminal 2 of the chip component 7, and the crack propagates to the insulating resin 9, the inner pad Connection between 4b and the electrode terminal 2 of the chip component 7 becomes defective due to a crack. At this time, the electrical resistance value between the test pad 11 and the outer pad 4a or between the test pads 11 [between A-B or B-C in FIG. 2A] increases as the crack progresses on the inner pad 4b. Therefore, by measuring the electrical resistance values between A and B and B and C, it is possible to determine the presence or absence of cracks and the progress of cracks, which were difficult to observe by appearance, It is possible to predict the possibility that a poor electrical continuity will occur.
Further, if the chip component 7 and other electronic components mounted on the wiring board 6 are connected via the outer pad 4a, the chip component can be developed even if the inner pad cracks and develops. The circuit can operate normally without problems with its own electrical conduction.

[Third Embodiment]
FIG. 3A is a top view showing a third embodiment of the chip component mounting structure of the present invention, and FIG. 3B is a cross-sectional view thereof. The second embodiment is different from the second embodiment shown in FIG. 2 in that, in this embodiment, the electrode pad 4 is divided into an outer pad 4a, an inner pad 4b, and an intermediate pad 4c. The two slits 5 formed in the electrode pad 4 are both filled with an insulating resin 9.
In the chip component mounting structure in the present embodiment, similarly to the chip component mounting structure in the first and second embodiments, in the conductive member 3 between the inner pad 4b and the electrode terminal 2 of the chip component 7, Cracks may occur from the side close to the center of the chip component 7. The generated crack progresses in the longitudinal direction of the body part 1 of the chip part 7 in the conductive member 3 between the electrode terminal 2 of the chip part 7 and the inner pad 4b. However, when the crack reaches the slit 5 formed between the inner pad 4b and the intermediate pad 4c, the progress of the crack is temporarily suppressed by the insulating resin 9 present in the slit.
In addition, by measuring the electrical resistance value between the test pad 11 and the pad 4a or between the test pads 11 (between A and B or between B and C in the top view of FIG. 3), The presence or absence of occurrence can be determined, and the same effect as in the case of the second embodiment can be obtained. In addition, as the number of divisions of the electrode pad 4 is increased, that is, as the number of slits 5 that are division portions is increased, the number of cracks to be suppressed is increased, so that the electrical conduction reliability of the chip component is improved.

[Fourth Embodiment]
FIG. 4A is a top view showing a fourth embodiment of the chip component mounting structure of the present invention, and FIG. 4B is a cross-sectional view thereof. The third embodiment is different from the third embodiment shown in FIG. 3 in that the insulating resin 9 is filled in the space between the wiring board 6 and the body portion 1 between the electrode pads 4 in the present embodiment. That is, the test pad 11 is also connected to the intermediate pad 4 c of the electrode pad 4 through the wiring 10.
In the chip component mounting structure according to the present embodiment, the conductive member 3 between the electrode terminal 2 and the electrode pad 4 is formed by the insulating resin 9 filled in the space between the wiring board 6 and the body portion 1 between the electrode pads 4. The stress applied to is relaxed. Therefore, the occurrence of cracks in the conductive member 3 on the side close to the center of the chip component 7 is suppressed. Further, even if a crack occurs and the crack progresses toward the outside of the electrode pad 4, it reaches the insulating resin 9 existing between the inner pad 4b and the intermediate pad 4c, where the crack progresses temporarily. Is stopped. In the present embodiment, the inspection pad 11 is attached to the intermediate pad 4c in addition to the inner pad 4b. Electrical resistance value between the test pad 11 and the outer pad 4a or between the test pads 11 (A-B, A-D, B-C, B-D, D-E in FIG. 4A). By measuring the above, it is possible to more accurately determine the occurrence and progress of cracks that have been difficult to observe in appearance.

  Here, the manufacturing method of the present embodiment will be briefly described with respect to the case where solder is used for the conductive member 3 and the insulating resin 9 is formed by injection resin. A solder paste is supplied onto the divided electrode pads 4 (4a, 4b, 4c) on the wiring board 6 by using a screen printing method or the like, and the chip component 7 is positioned on the electrode pads 4 on the wiring board. The chip component 7 is mounted on the wiring board. The chip component 7 is mounted on the wiring board 6 through a solder reflow process. Subsequently, by using a dispenser or the like, the insulating resin 9 is injected into the space between the slit 5 portion formed in the electrode pad 4 below the chip component 7 and the electrode pad 4, and the resin is cured, so that Complete the mounting method steps.

[Fifth Embodiment]
FIG. 5A is a sectional view showing a fifth embodiment of the chip component mounting structure of the present invention, and FIG. 5B is a bottom view of the chip component 7 to be mounted. (C)-(e) is the top view seen by the XX 'line | wire of Fig.5 (a). The planar shape of the chip component 7 mounted in FIGS. 5C to 5E is indicated by a dotted line. The difference of the present embodiment from the mounting structure of the second embodiment shown in FIG. 2 is that, in this embodiment, the chip part 7 having a rectangular planar shape has four corner portions of the body portion 1. 4 have electrode terminals 2, and accordingly, electrode pads 4 are also provided on the wiring board 6 at four locations.

  In the example shown in FIG. 5C, the electrode pad 4 is divided in the direction [Y direction shown in FIG. 5C] in which the distance between the electrode terminals 2 is the longest. In the example shown in FIG. 5D, the electrode pad 4 is divided in the long side direction of the planar shape of the body portion 1. In the example shown in FIG. 5E, the electrode pad 4 is divided in the long side direction and the short side direction of the planar shape of the body portion 1. That is, in the example shown in FIG. 5E, the electrode pad is divided into four. An inspection pad 11 is attached to the innermost inner pad 4b.

The top view (a) and sectional drawing (b) which show the mounting structure of the chip component concerning the 1st Embodiment of this invention, and sectional drawing (c) for demonstrating the effect of 1st Embodiment. The top view (a) and sectional drawing (b) which show the mounting structure of the chip component which concerns on the 2nd Embodiment of this invention. The top view (a) and sectional drawing (b) which show the mounting structure of the chip component which concerns on the 3rd Embodiment of this invention. The top view (a) and sectional drawing (b) which show the mounting structure of the chip component which concerns on the 4th Embodiment of this invention. The figure for demonstrating the 5th Embodiment of this invention. Sectional drawing (a) which shows the mounting structure of the conventional chip component, and sectional drawing (b) for demonstrating the problem of a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Body part of chip component 2 Electrode terminal 3 of chip component 3 Conductive member 4 Electrode pad 4a Outer pad 4b Inner pad 4c Intermediate pad 5 Slit 6 Wiring board 7 Chip component 8 Crack 9 Insulating resin 10 Wiring 11 Inspection pad

Claims (8)

  In a chip component mounting structure in which a chip component having a plurality of electrode terminals is mounted on a wiring board having electrode pads at positions corresponding to the electrode terminals, and the electrode terminals and the electrode pads are connected by a conductive member. The chip component mounting structure, wherein the electrode pad is divided into two or more in the direction between the electrode terminals of the chip component, and a slit formed in the divided portion is filled with an insulating resin. .   The chip component mounting structure according to claim 1, wherein the insulating resin is in contact with the electrode terminals of the chip component.   Among the divided electrode pads, the innermost pad closest to the center of the chip component is connected to an inspection pad provided at a location other than the lower surface of the chip component on the wiring board. The mounting structure of the chip part according to claim 1 or 2.   4. The chip component according to claim 1, wherein a shape of the chip component in the wiring board plane direction is a rectangle, and an electrode terminal is formed at a longitudinal end portion of the chip component. 5. Implementation structure.   The space between the electrode pads under the chip component on the wiring board is filled with a second insulating resin, and the second insulating resin is in contact with the lower surface of the chip component. The mounting structure for a chip part according to claim 1.   6. The chip component mounting structure according to claim 1, wherein the conductive member is lead-free solder.   A wiring board on which a chip component having a plurality of electrode terminals is mounted is formed at a position corresponding to the electrode terminal of the chip component when mounted, and in the direction between the electrodes of the chip component when mounted. A step of filling an insulating resin into a slit formed in a divided portion of the electrode pad divided into two or more, or a space between the slit and the electrode pad, and a step of supplying a conductive member on the electrode pad; And a step of mounting the chip component on the wiring board.   Two or more wiring substrates on which chip components having a plurality of electrode terminals are mounted are formed at positions corresponding to the electrode terminals when mounted, and in the direction between the electrode terminals of the chip components when mounted. A step of supplying a conductive member onto the electrode pad divided into two, a step of mounting the chip component on the wiring substrate, a slit formed at the divided portion of the electrode pad of the wiring substrate, or the slit And a step of filling the space between the electrode pads with an insulating resin.

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