JP2009105095A - Device and apparatus - Google Patents

Device and apparatus Download PDF

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JP2009105095A
JP2009105095A JP2007273000A JP2007273000A JP2009105095A JP 2009105095 A JP2009105095 A JP 2009105095A JP 2007273000 A JP2007273000 A JP 2007273000A JP 2007273000 A JP2007273000 A JP 2007273000A JP 2009105095 A JP2009105095 A JP 2009105095A
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substrate
electrodes
board
component mounting
mounting board
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Kosei Seki
孝生 関
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Advantest Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

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  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a means improving reliability without degrading a high-frequency characteristic of a BGA semiconductor device. <P>SOLUTION: The device 101 mounted on the upper surface of a device mounting board 2, and electrically connected to a plurality of electrodes 21 on the device mounting board includes: a component mounting board 1 having an electronic component 41 mounted thereon, and having, on the undersurface, a plurality of electrodes 14 to be respectively electrically connected to corresponding electrodes on the device mounting board; one or more intermediate boards 3 at least one of which is stacked and arranged between the component mounting board and the device mounting board, and which have a plurality of electrodes 31 and 33 on the upper surface and the lower surface, respectively, wherein the corresponding electrodes on the upper surface and the lower surface are electrically connected to each other; and a plurality of terminal balls 51a respectively connecting the corresponding electrodes between the respective boards such as the component mounting board, the intermediate board and the device mounting board. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、デバイス及び装置に関する。特に本発明はデバイス実装基板の上面に搭載されデバイス実装基板上の複数の電極に電気的に接続されるデバイス、およびそのデバイスとデバイス実装基板を備える装置に関する。   The present invention relates to a device and an apparatus. In particular, the present invention relates to a device mounted on the upper surface of a device mounting board and electrically connected to a plurality of electrodes on the device mounting board, and an apparatus including the device and the device mounting board.

BGA(Ball Grid Array)によりデバイス実装基板(例えば、プリント配線基板)上に実装される半導体デバイスは、例えば端子ボールによって、デバイス実装基板(プリント配線基板)上面の複数の電極と電気的および機械的に接続される。BGA半導体デバイス等が動作する時の発熱により温度が上昇する場合、BGA半導体デバイス自体も膨張するが、そのBGA半導体デバイスを実装するデバイス実装基板も膨張する。   A semiconductor device mounted on a device mounting board (for example, a printed wiring board) by a BGA (Ball Grid Array) is electrically and mechanically connected to a plurality of electrodes on the upper surface of the device mounting board (printed wiring board) by, for example, terminal balls. Connected to. When the temperature rises due to heat generated when a BGA semiconductor device or the like operates, the BGA semiconductor device itself expands, but the device mounting substrate on which the BGA semiconductor device is mounted also expands.

BGA半導体デバイスとデバイス実装基板の熱膨張率が異なり、且つ、温度が上昇する場合、端子ボール接続部には、熱膨張率の差により、BGA半導体デバイス側とデバイス実装基板との位置変化の差を解消しようとする応力(ストレス)が発生する。この応力が端子ボール接続部で吸収できる限度を超えた場合、端子ボール接続部にはクラックが発生する可能性がある。   When the thermal expansion coefficients of the BGA semiconductor device and the device mounting substrate are different and the temperature rises, the terminal ball connection portion has a difference in position change between the BGA semiconductor device side and the device mounting substrate due to the difference in the thermal expansion coefficient. A stress (stress) is generated that tries to eliminate this. If this stress exceeds the limit that can be absorbed by the terminal ball connecting portion, cracks may occur in the terminal ball connecting portion.

このクラックの発生を抑制することを目的として、端子ボールの直径を大きくすることも考えられる。BGA半導体デバイスの端子ボールの直径を大きくすると、BGA半導体デバイスとデバイス実装基板との間隔が増加するので、両者間の位置ずれをより吸収しやすくなり、クラックの発生を抑制できる。このように、BGA半導体デバイスの端子ボールの直径を大きくした場合、BGA半導体デバイスの信頼性は向上する。また、特許文献1には、半導体チップと基板の間に中間層を設けることが記載されている。
特開2000−77479号公報
In order to suppress the occurrence of this crack, it is conceivable to increase the diameter of the terminal ball. When the diameter of the terminal ball of the BGA semiconductor device is increased, the distance between the BGA semiconductor device and the device mounting substrate is increased, so that it is easier to absorb the misalignment between the two, and the generation of cracks can be suppressed. Thus, when the diameter of the terminal ball of the BGA semiconductor device is increased, the reliability of the BGA semiconductor device is improved. Patent Document 1 describes that an intermediate layer is provided between a semiconductor chip and a substrate.
JP 2000-77479 A

しかしながら、BGA半導体デバイスの端子ボールの直径を大きくすると、隣接する端子ボール間の容量成分が増加する。その結果、BGA半導体デバイスに入出力する信号の高周波成分が減衰し、BGA半導体デバイスの高周波特性が悪化することがある。   However, when the diameter of the terminal ball of the BGA semiconductor device is increased, the capacitance component between adjacent terminal balls increases. As a result, the high frequency component of the signal input / output to / from the BGA semiconductor device may be attenuated, and the high frequency characteristics of the BGA semiconductor device may be deteriorated.

上記課題を解決するために、本発明の第1の形態によると、デバイス実装基板の上面に搭載され、前記デバイス実装基板上の複数の電極に電気的に接続されるデバイスであって、電子部品を搭載し、それぞれが前記デバイス実装基板上の対応する電極に電気的に接続されるべき複数の電極を下面に有する部品搭載基板と、前記部品搭載基板と前記デバイス実装基板の間に少なくとも1つが重ねて設けられ、上面および下面のそれぞれに複数の電極を有し、上面および下面の対応する電極間が電気的に接続された中間基板と、前記部品搭載基板、前記中間基板、および前記デバイス実装基板の各基板間の対応する電極同士をそれぞれ接続する複数の端子ボールとを備えるデバイスを提供する。   In order to solve the above problems, according to a first aspect of the present invention, there is provided a device mounted on an upper surface of a device mounting board and electrically connected to a plurality of electrodes on the device mounting board, wherein the electronic component A component mounting board having a plurality of electrodes on the lower surface, each of which is to be electrically connected to a corresponding electrode on the device mounting board, and at least one between the component mounting board and the device mounting board. An intermediate board that is provided in an overlapping manner and has a plurality of electrodes on each of the upper surface and the lower surface, and the corresponding electrodes on the upper surface and the lower surface are electrically connected, the component mounting board, the intermediate board, and the device mounting Provided is a device comprising a plurality of terminal balls for connecting corresponding electrodes between substrates.

また、本発明の第2の形態によると、デバイス実装基板と、前記デバイス実装基板の上面に搭載され、前記デバイス実装基板上の複数の電極に電気的に接続されるデバイスとを備え、前記デバイスは、電子部品を搭載し、それぞれが前記デバイス実装基板上の対応する電極に電気的に接続されるべき複数の電極を下面に有する部品搭載基板と、前記部品搭載基板と前記デバイス実装基板の間に少なくとも1つが重ねて設けられ、上面および下面のそれぞれに複数の電極を有し、上面および下面の対応する電極間が電気的に接続された中間基板と、前記部品搭載基板、前記中間基板、および前記デバイス実装基板の各基板間の対応する電極同士をそれぞれ接続する複数の端子ボールとを有する装置を提供する。   According to a second aspect of the present invention, there is provided a device mounting substrate, and a device mounted on an upper surface of the device mounting substrate and electrically connected to a plurality of electrodes on the device mounting substrate. Is a component mounting board having a plurality of electrodes on the lower surface, each of which is mounted with an electronic component and each of which should be electrically connected to a corresponding electrode on the device mounting board, and between the component mounting board and the device mounting board At least one of the intermediate board having a plurality of electrodes on each of the upper surface and the lower surface, and the corresponding electrodes on the upper surface and the lower surface are electrically connected, the component mounting substrate, the intermediate substrate, And a device having a plurality of terminal balls respectively connecting corresponding electrodes between the substrates of the device mounting substrate.

なお、上記の発明の概要は、本発明の必要な特徴の全てを列挙したものではない。また、これらの特徴群のサブコンビネーションもまた、発明となりうる。   It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

以下、発明の実施の形態を通じて本発明を説明するが、以下の実施形態は特許請求の範囲にかかる発明を限定するものではない。また、実施形態の中で説明されている特徴の組み合わせの全てが発明の解決手段に必須であるとは限らない。   Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

図1は、本実施形態に係るデバイス101の構成の一例を示す。本発明の一実施形態によれば、デバイス101の信頼性を向上させながら、デバイス101の高周波特性を悪化させない端子ボール接続デバイスおよびそのデバイスを用いた装置を提供する。   FIG. 1 shows an example of the configuration of the device 101 according to the present embodiment. According to one embodiment of the present invention, a terminal ball connection device that improves the reliability of the device 101 and does not deteriorate the high-frequency characteristics of the device 101 and an apparatus using the device are provided.

本実施形態の装置100は、例えば半導体パッケージであり、デバイス101と、デバイス実装基板2とを備える。デバイス101は、例えばBGA半導体デバイスであり、部品搭載部91と、中間基板3と、複数の端子ボール51とを有する。デバイス101は、デバイス実装基板2の上面に搭載された状態で、最も下側層の複数の端子ボール51bにより、デバイス実装基板2上の複数の電極21と電気的に接続される。   The apparatus 100 of this embodiment is a semiconductor package, for example, and includes a device 101 and a device mounting board 2. The device 101 is, for example, a BGA semiconductor device, and includes a component mounting portion 91, the intermediate substrate 3, and a plurality of terminal balls 51. The device 101 is electrically connected to the plurality of electrodes 21 on the device mounting substrate 2 by a plurality of terminal balls 51b in the lowermost layer while being mounted on the upper surface of the device mounting substrate 2.

部品搭載部91は、それぞれがデバイス実装基板2上の対応する電極21に電気的に接続されるべき複数の電極14を下面に有する部品搭載基板1と、部品搭載基板1上に実装される複数の部品を含む。部品搭載部91の詳細については後述する。   The component mounting portion 91 includes a component mounting substrate 1 having a plurality of electrodes 14 on the lower surface, each of which is to be electrically connected to a corresponding electrode 21 on the device mounting substrate 2, and a plurality of components mounted on the component mounting substrate 1. Including parts. Details of the component mounting portion 91 will be described later.

中間基板3は、部品搭載基板1とデバイス実装基板2の間に、部品搭載基板1の下面及びデバイス実装基板2の上面と平行に設けられる。中間基板3は、部品搭載基板1およびデバイス実装基板2の熱膨張率の差による位置変化の差を吸収する。中間基板3は、例えば可撓性を有するポリイミドフィルム等を用いたフレキシブル基板であってよい。これに代えて、中間基板3は、部品搭載基板1とデバイス実装基板2の間の熱膨張率を有してもよい。   The intermediate substrate 3 is provided between the component mounting substrate 1 and the device mounting substrate 2 in parallel with the lower surface of the component mounting substrate 1 and the upper surface of the device mounting substrate 2. The intermediate board 3 absorbs a difference in position change due to a difference in thermal expansion coefficient between the component mounting board 1 and the device mounting board 2. The intermediate substrate 3 may be a flexible substrate using, for example, a flexible polyimide film. Instead, the intermediate substrate 3 may have a coefficient of thermal expansion between the component mounting substrate 1 and the device mounting substrate 2.

中間基板3は、例えば上面に配された複数の電極31と、下面に配された複数の電極33を有してよい。互いに対応する電極31と電極33は、例えば中間基板3を貫通する導電性のビア34により電気的に接続される。   For example, the intermediate substrate 3 may include a plurality of electrodes 31 disposed on the upper surface and a plurality of electrodes 33 disposed on the lower surface. The electrodes 31 and 33 corresponding to each other are electrically connected by, for example, conductive vias 34 penetrating the intermediate substrate 3.

また、電極31と電極33は、各々対応する電極同士が基板の面方向Aにおいて重なる位置に設けられ、さらにデバイス実装基板2の上面の対応する電極21、および、部品搭載基板1の下面の対応する電極14とも、基板の面方向Aにおいて重なる位置に設けられてよい。その場合、対応する電極14、端子ボール51a、電極31、電極33、端子ボール51bおよび電極21同士は、全て基板の垂直方向に一列に並ぶ。   Further, the electrodes 31 and 33 are provided at positions where the corresponding electrodes overlap each other in the surface direction A of the substrate, and further correspond to the corresponding electrodes 21 on the upper surface of the device mounting substrate 2 and the lower surface of the component mounting substrate 1. The electrode 14 to be formed may be provided at a position overlapping in the surface direction A of the substrate. In that case, the corresponding electrode 14, terminal ball 51 a, electrode 31, electrode 33, terminal ball 51 b and electrode 21 are all arranged in a line in the vertical direction of the substrate.

中間基板3の上側に設けられた複数の端子ボール51aは、部品搭載基板1および中間基板3の各基板間の対応する電極14と電極31同士をそれぞれ電気的及び機械的に接続する。中間基板3の下側に設けられた複数の端子ボール51bは、中間基板3およびデバイス実装基板2の各基板間の対応する電極33と電極21同士をそれぞれ電気的及び機械的に接続する。したがって、各々複数の電極14、端子ボール51a、電極31、電極33、端子ボール51bおよび電極21における対応する組み合わせ同士は、全て電気的に接続される。   The plurality of terminal balls 51a provided on the upper side of the intermediate substrate 3 electrically and mechanically connect the corresponding electrodes 14 and electrodes 31 between the component mounting substrate 1 and the intermediate substrate 3, respectively. The plurality of terminal balls 51b provided on the lower side of the intermediate substrate 3 electrically and mechanically connect the corresponding electrodes 33 and the electrodes 21 between the intermediate substrate 3 and the device mounting substrate 2 respectively. Accordingly, the corresponding combinations of the plurality of electrodes 14, terminal balls 51 a, electrodes 31, electrodes 33, terminal balls 51 b, and electrodes 21 are all electrically connected.

ここで、本実施形態における部品搭載部91の詳細を説明する。部品搭載基板1は、一例として誘電体の低温同時焼成セラミックス(LTCC)、あるいは他の種類のセラミックを使用して、その上面に各種の電気回路(特に高周波回路)の配線パターンが形成された基板(セラミック基板)であってもよい。部品搭載基板1は、下面に配された入出力用の複数の電極14を有する。それぞれの電極14は、それぞれが対応する電極21に電気的に接続される。   Here, details of the component mounting portion 91 in the present embodiment will be described. The component mounting substrate 1 is a substrate in which a dielectric low temperature co-fired ceramic (LTCC) or other types of ceramics are used as an example, and wiring patterns of various electric circuits (particularly high frequency circuits) are formed on the upper surface thereof. (Ceramic substrate) may be used. The component mounting substrate 1 has a plurality of input / output electrodes 14 arranged on the lower surface. Each electrode 14 is electrically connected to a corresponding electrode 21.

また、部品搭載基板1は、上面側にパターン配線44aが形成されており、実装部品43が当該パターン配線44aに接続する。実装部品43は、例えばトランジスタ、ダイオード、抵抗、コンデンサ、又はコイル等の電子部品、又は、電子部品等が集積された半導体集積回路のチップ41、又は、ヒートシンク等の機構部品であってよい。実装部品43は、対応するパターン配線44a上にはんだ等により電気的及び機械的に接続される。部品搭載基板1の上面に配されたパターン配線44a及び下面に配された電極14は、必要に応じて部品搭載基板を全て貫通するビア15aにより電気的に接続される。ビア15aは、例えば導電性材料により部品搭載基板1を貫通するように形成されたスルーホールであってよい。   Further, the component mounting board 1 has a pattern wiring 44a formed on the upper surface side, and the mounting component 43 is connected to the pattern wiring 44a. The mounting component 43 may be, for example, an electronic component such as a transistor, a diode, a resistor, a capacitor, or a coil, a semiconductor integrated circuit chip 41 on which the electronic component or the like is integrated, or a mechanical component such as a heat sink. The mounting component 43 is electrically and mechanically connected to the corresponding pattern wiring 44a by solder or the like. The pattern wiring 44a disposed on the upper surface of the component mounting substrate 1 and the electrode 14 disposed on the lower surface are electrically connected by vias 15a penetrating all the component mounting substrates as necessary. The via 15a may be a through hole formed so as to penetrate the component mounting board 1 with a conductive material, for example.

また、部品搭載基板1は、例えばセラミック製の上層基板11、中層基板12、下層基板13等の複数の基板が積層された多層基板であってよい。その場合、上層基板11及び中層基板12の間にパターン配線44b、中層基板12と下層基板13の間にパターン配線44cが形成されてよい。また、その場合、上層基板11の上面に配されたパターン配線44a及び下層基板13の下面に配された電極14は、パターン配線44b又はパターン配線44cと、必要に応じて部品搭載基板の個別基板を貫通するビア15bにより電気的に接続されてよい。ビア15bは、例えば上層基板11、中層基板12、下層基板13の少なくとも1層を貫通して、パターン配線44b、パターン配線44c等の上下の対応する各電極を電気的に接続することを目的として設けられる。   Further, the component mounting substrate 1 may be a multilayer substrate in which a plurality of substrates such as a ceramic upper layer substrate 11, a middle layer substrate 12, and a lower layer substrate 13 are laminated. In that case, a pattern wiring 44 b may be formed between the upper layer substrate 11 and the middle layer substrate 12, and a pattern wiring 44 c may be formed between the middle layer substrate 12 and the lower layer substrate 13. In this case, the pattern wiring 44a disposed on the upper surface of the upper layer substrate 11 and the electrode 14 disposed on the lower surface of the lower layer substrate 13 include the pattern wiring 44b or the pattern wiring 44c and, if necessary, an individual substrate of a component mounting substrate. They may be electrically connected by vias 15b penetrating through them. For example, the via 15b penetrates at least one layer of the upper layer substrate 11, the middle layer substrate 12, and the lower layer substrate 13 to electrically connect the corresponding upper and lower electrodes such as the pattern wiring 44b and the pattern wiring 44c. Provided.

また、部品搭載基板1が多層基板の場合、最上層の上層基板11の一部を切り欠いた凹部40が設けられてもよい。また、凹部40の上側には、当該凹部40を塞ぐように蓋部45が配されてよい。蓋部45と接続するパターン配線44aは、例えば部品搭載基板1に設けられた複数のビア15aを介して、部品搭載基板1の下面に形成された電極14のうちの接地電極と電気的に接続されてよい。これにより蓋部45を、接地電位とすることができる。   Further, when the component mounting board 1 is a multilayer board, a recess 40 in which a part of the upper layer board 11 is cut out may be provided. A lid 45 may be disposed on the upper side of the recess 40 so as to close the recess 40. The pattern wiring 44 a connected to the lid 45 is electrically connected to the ground electrode of the electrodes 14 formed on the lower surface of the component mounting board 1 through, for example, a plurality of vias 15 a provided in the component mounting board 1. May be. Thereby, the cover part 45 can be made into a grounding potential.

デバイス実装基板2は、ガラスエポキシ基板等であってよい。また、デバイス実装基板2の上面には、各種の電気回路の配線パターンが形成されてよい。また、デバイス実装基板2は、例えば複数の電極21を配線パターンにより形成してもよい。   The device mounting board 2 may be a glass epoxy board or the like. Moreover, wiring patterns of various electric circuits may be formed on the upper surface of the device mounting substrate 2. In addition, the device mounting substrate 2 may be formed with, for example, a plurality of electrodes 21 with a wiring pattern.

電極21は、端子ボール51とはんだ接続される電極であり、例えば端子ボール51の直径と同様な直径を有する円形、又は、その円に外接する正方形等の形状に形成されてよい。端子ボール51は、例えばはんだ等の導電性接合材料を微小な球形状に形成したもので、はんだボールとも称する。   The electrode 21 is an electrode that is solder-connected to the terminal ball 51, and may be formed in a shape such as a circle having a diameter similar to the diameter of the terminal ball 51, or a square circumscribing the circle. The terminal ball 51 is formed by forming a conductive bonding material such as solder into a minute spherical shape, and is also referred to as a solder ball.

本実施形態において、部品搭載基板1とデバイス実装基板2の間隔L1は、例えば各電極の厚さ寸法を無視すると、部品搭載基板1と中間基板3の間隔L2と、中間基板3とデバイス実装基板2の間隔L3と、中間基板3の厚さL4の和となる。例えば間隔L2と間隔L3が略同一である場合、間隔L2及び間隔L3は、各々間隔L1の略1/2より小さくなる。なお、本実施形態では間隔L2と間隔L3の値を略同一にしたが、これに限られるわけではなく、例えば上側の間隔L2を下側の間隔L3よりも小さくする等のように両者の値が異なる場合も本実施形態と同様な効果を得ることができる。   In the present embodiment, the distance L1 between the component mounting board 1 and the device mounting board 2 is, for example, the distance L2 between the component mounting board 1 and the intermediate board 3 and the intermediate board 3 and the device mounting board when the thickness dimension of each electrode is ignored. 2 is the sum of the interval L3 and the thickness L4 of the intermediate substrate 3. For example, when the interval L2 and the interval L3 are substantially the same, the interval L2 and the interval L3 are each smaller than approximately ½ of the interval L1. In the present embodiment, the values of the interval L2 and the interval L3 are substantially the same, but the present invention is not limited to this. For example, the values of both are set such that the upper interval L2 is smaller than the lower interval L3. Even when the values are different, the same effect as in the present embodiment can be obtained.

一方、間隔L2と間隔L3が略同一である場合には、端子ボール51aの直径D1と端子ボール51bの直径D2も略同一としてよい。端子ボール51aと端子ボール51bは、上下端部がつぶれて変形するが略球形とみなすことができるので、各電極の厚さを無視する場合には、間隔L2、間隔L3、直径D1、直径D2は、略同様な(又は近似した)値となる。この場合、直径D1、直径D2は、各々間隔L1の略1/2より小さい値となる。   On the other hand, when the distance L2 and the distance L3 are substantially the same, the diameter D1 of the terminal ball 51a and the diameter D2 of the terminal ball 51b may be substantially the same. Since the upper and lower ends of the terminal ball 51a and the terminal ball 51b are crushed and deformed, they can be regarded as substantially spherical. Therefore, when ignoring the thickness of each electrode, the distance L2, the distance L3, the diameter D1, and the diameter D2 Are substantially similar (or approximate) values. In this case, the diameter D1 and the diameter D2 are values smaller than approximately ½ of the distance L1.

これにより装置100によれば、中間基板3を用いずに1層の端子ボール51aを用いる場合と比較して、部品搭載基板1とデバイス実装基板2の間の間隔を大きくすることができ、応力をよりよく吸収できる。また、中間基板3を用いずに端子ボール51の直径を倍増させた場合、よりよく応力を吸収できるが、端子ボール51間の容量成分が増加してしまい、信号の高周波成分がより減衰してしまう。   Thereby, according to the apparatus 100, compared with the case where the single-layer terminal ball 51a is used without using the intermediate substrate 3, the interval between the component mounting substrate 1 and the device mounting substrate 2 can be increased. Can be absorbed better. Further, when the diameter of the terminal ball 51 is doubled without using the intermediate substrate 3, the stress can be absorbed better, but the capacitance component between the terminal balls 51 is increased, and the high frequency component of the signal is further attenuated. End up.

それに対して装置100によれば、部品搭載基板1とデバイス実装基板2の間隔L1を大きくとって維持してデバイス101の信頼性を向上でき、さらに、端子ボール51aの直径D1と端子ボール51bの直径D2を増加させないことから高周波特性を悪化させることがない。したがって、装置100によれば、デバイスの実装密度を高くすることができると共に高周波特性を悪化させず、信頼性を向上することができる。   On the other hand, according to the apparatus 100, the distance L1 between the component mounting board 1 and the device mounting board 2 can be kept large to improve the reliability of the device 101. Further, the diameter D1 of the terminal ball 51a and the terminal ball 51b Since the diameter D2 is not increased, the high frequency characteristics are not deteriorated. Therefore, according to the apparatus 100, it is possible to increase the device mounting density and improve the reliability without deteriorating the high frequency characteristics.

本実施形態のデバイス101においては、中央部分よりも周辺部分にいくほど、部品搭載基板1とデバイス実装基板2との熱膨張率による位置変化の差が大きくなる。したがって、端子ボールの接続部に発生する応力も、デバイス101の中央部分よりも周辺部分の方が大きい。この周辺部分の応力を緩和することを目的として、互いに分離した複数の中間部分基板の組として形成してもよい。その場合に、中間基板3を中央部分の中間部分基板と周辺部分の中間部分基板とに分離させてもよく、さらに、中央部分の中間部分基板と比較して周辺部分の中間部分基板を小さく形成してもよい。なお、中間部分基板を小さくする場合、その表面上の電極31の数は減少する。   In the device 101 of the present embodiment, the difference in position change due to the coefficient of thermal expansion between the component mounting substrate 1 and the device mounting substrate 2 increases as the distance from the central portion to the peripheral portion increases. Therefore, the stress generated in the terminal ball connection is also greater in the peripheral portion than in the central portion of the device 101. For the purpose of alleviating the stress in the peripheral portion, it may be formed as a set of a plurality of intermediate partial substrates separated from each other. In that case, the intermediate substrate 3 may be separated into an intermediate partial substrate in the central portion and an intermediate partial substrate in the peripheral portion, and the intermediate partial substrate in the peripheral portion is made smaller than the intermediate partial substrate in the central portion. May be. When the intermediate partial substrate is made smaller, the number of electrodes 31 on the surface is reduced.

図2は、中間基板3を複数の中間部分基板3cから3gに分割した構成を上面から見た一例を示す。例えば図1における符号3の部分が図2のB−B断面に相当する。なお、以下の説明における左前側、右前側、中央、左後側、右後側等は、複数の基板を判別することを目的としたもので、実際の製品等に適用された場合の前後左右とは異なる場合がある。   FIG. 2 shows an example in which the structure in which the intermediate substrate 3 is divided into a plurality of intermediate partial substrates 3c to 3g is viewed from above. For example, reference numeral 3 in FIG. 1 corresponds to the BB cross section in FIG. In the following description, the left front side, right front side, center, left rear side, right rear side, etc. are for the purpose of discriminating a plurality of substrates, and are the front, rear, left and right when applied to actual products etc. May be different.

中間部分基板3cは、デバイス101の中央部分に配される。中間部分基板3cは、中間部分基板3dから中間部分基板3gに対し、デバイス実装基板2の辺から遠い位置に設けられる。中間部分基板3dから中間部分基板3gは、中間部分基板3cに対し、デバイス実装基板2の辺に近い位置に設けられる。   The intermediate partial substrate 3 c is disposed in the central portion of the device 101. The intermediate partial board 3c is provided at a position far from the side of the device mounting board 2 with respect to the intermediate partial board 3g from the intermediate partial board 3d. The intermediate partial substrate 3d to the intermediate partial substrate 3g are provided at positions close to the sides of the device mounting substrate 2 with respect to the intermediate partial substrate 3c.

中間部分基板3dは、デバイス101の側端のうち左前側端部に配される中間基板であってよい。中間部分基板3eは、デバイス101の側端のうち右前側端部に配される中間基板であってよい。中間部分基板3fは、デバイス101の側端のうち右後側端部に配される中間基板であってよい。中間部分基板3gは、デバイス101の側端のうち左後側端部に配される中間基板であってよい。   The intermediate partial substrate 3d may be an intermediate substrate disposed at the left front end portion of the side ends of the device 101. The intermediate partial substrate 3e may be an intermediate substrate disposed at the right front end portion of the side ends of the device 101. The intermediate partial substrate 3f may be an intermediate substrate disposed at the right rear end portion of the side ends of the device 101. The intermediate partial substrate 3g may be an intermediate substrate disposed at the left rear end portion of the side ends of the device 101.

中間部分基板3dから中間部分基板3gは、デバイス実装基板2の辺に最も近い中間部分基板3cの電極31よりも、よりデバイス実装基板2の辺に近い電極31を有する。換言すると、中間部分基板3cは、中間部分基板3dから中間部分基板3gが有する少なくとも一つの電極31よりも、部品搭載基板1の辺部に近い位置に設けられた他の電極31を有さない。なお、各中間部分基板のうち、中間基板3dから3gのほうが、中央部分の中間基板3cよりも、端子ボール(電極31)の位置の平均が、部品搭載基板1の辺部に近い構成をとってよい。   The intermediate partial substrate 3d to the intermediate partial substrate 3g have the electrodes 31 closer to the sides of the device mounting substrate 2 than the electrodes 31 of the intermediate partial substrate 3c closest to the sides of the device mounting substrate 2. In other words, the intermediate partial substrate 3c does not have other electrodes 31 provided at positions closer to the side of the component mounting substrate 1 than at least one electrode 31 included in the intermediate partial substrate 3g to the intermediate partial substrate 3g. . Of the intermediate partial boards, the intermediate boards 3d to 3g have a configuration in which the average position of the terminal balls (electrodes 31) is closer to the side of the component mounting board 1 than the intermediate board 3c in the central part. It's okay.

また、本例のように、中間部分基板3cは、中間部分基板3dから中間部分基板3gが有する少なくとも一つの電極31よりも、部品搭載基板1の中心から離れた位置に設けられた他の電極31を有さない構成をとってよい。ここで部品搭載基板1の中心とは、一例として部品搭載基板1の重心であってよく、部品搭載基板1における複数の電極31の位置を平均した位置であってよい。なお、中間部分基板3cは、部品搭載基板1の辺部に近い位置に設けられた電極14には接続されない。   Further, as in the present example, the intermediate partial substrate 3c has other electrodes provided at positions farther from the center of the component mounting substrate 1 than at least one electrode 31 included in the intermediate partial substrate 3g from the intermediate partial substrate 3d. You may take the structure which does not have 31. FIG. Here, the center of the component mounting board 1 may be the center of gravity of the component mounting board 1 as an example, or may be a position obtained by averaging the positions of the plurality of electrodes 31 on the component mounting board 1. The intermediate partial board 3c is not connected to the electrode 14 provided at a position close to the side of the component mounting board 1.

中間部分基板3c、3d、3e、3f、及び3gは、互いに分離しており、それらを組み合わせることにより、部品搭載基板1に設けられた複数の電極14と、デバイス実装基板2に設けられた対応する各電極21とを接続する。それぞれの中間部分基板3c、3d、3e、3f、及び3gは、それぞれが対応する上面の電極31と下面の電極33の組を有する。   The intermediate partial boards 3c, 3d, 3e, 3f, and 3g are separated from each other, and by combining them, the plurality of electrodes 14 provided on the component mounting board 1 and the correspondence provided on the device mounting board 2 Each electrode 21 to be connected is connected. Each of the intermediate partial substrates 3c, 3d, 3e, 3f, and 3g has a pair of an upper electrode 31 and a lower electrode 33, respectively.

また、中央部分の中間部分基板3cと比較して周辺部分の中間部分基板3dから中間部分基板3gを小さく形成する場合、その表面上の電極31の数は減少するので、中間部分基板3d、3e、3f、及び3gは、中間部分基板3cより少ない数の電極14に接続される。これにより、中間基板の周辺部の端子ボールに対し、より大きく発生する応力を緩和することができる。   Further, when the intermediate partial substrate 3g is formed smaller than the intermediate partial substrate 3d in the peripheral portion as compared with the intermediate partial substrate 3c in the central portion, the number of the electrodes 31 on the surface is reduced, so the intermediate partial substrates 3d, 3e. 3f and 3g are connected to a smaller number of electrodes 14 than the intermediate partial substrate 3c. As a result, it is possible to relieve the stress generated more greatly with respect to the terminal balls in the peripheral portion of the intermediate substrate.

図3は、中間基板3を複数の中間部分基板3c'から3g'に分割した構成を上面から見た他の例を示す。なお、以下の説明における前側、後側、中央、右側、左側等は、複数の基板を判別することを目的としたもので、実際の製品等に適用された場合の前後左右とは異なる場合がある。   FIG. 3 shows another example in which the structure obtained by dividing the intermediate substrate 3 into a plurality of intermediate partial substrates 3c ′ to 3g ′ is viewed from above. The front side, rear side, center, right side, left side, etc. in the following description are for the purpose of discriminating a plurality of substrates, and may be different from the front, back, left and right when applied to actual products. is there.

中間部分基板3c'は、デバイス101の中央部分に配される。中間部分基板3c'は、中間部分基板3d'から中間部分基板3g'に対し、デバイス実装基板2の辺から遠い位置に設けられる。中間部分基板3d'から中間部分基板3g'は、中間部分基板3c'に対し、デバイス実装基板2の辺に近い位置に設けられる。   The intermediate partial substrate 3c ′ is disposed in the central portion of the device 101. The intermediate partial board 3c ′ is provided at a position far from the side of the device mounting board 2 with respect to the intermediate partial board 3g ′ from the intermediate partial board 3d ′. The intermediate partial substrate 3d ′ to the intermediate partial substrate 3g ′ are provided at a position close to the side of the device mounting substrate 2 with respect to the intermediate partial substrate 3c ′.

中間部分基板3d'は、デバイス101の側端のうち前側端部に配される中間基板であってよい。中間部分基板3e'は、デバイス101の側端のうち後側端部に配される中間基板であってよい。中間部分基板3f'は、デバイス101の側端のうち右側端部に配される中間基板であってよい。中間部分基板3g'は、デバイス101の側端のうち左側端部に配される中間基板であってよい。各部分基板における電極31の位置関係及び接続は上記した図2の例の場合と同様である。   The intermediate partial substrate 3 d ′ may be an intermediate substrate disposed at the front end portion of the side ends of the device 101. The intermediate partial substrate 3e ′ may be an intermediate substrate disposed at the rear end portion of the side ends of the device 101. The intermediate partial substrate 3f ′ may be an intermediate substrate disposed on the right end portion of the side ends of the device 101. The intermediate partial substrate 3g ′ may be an intermediate substrate disposed at the left end portion of the side ends of the device 101. The positional relationship and connection of the electrodes 31 on each partial substrate are the same as in the case of the above-described example of FIG.

図4は、本実施形態に係るデバイス101の接続部の変形例を示す。本変形例に係るデバイス101は、複数の中間基板3aと3bを有する。各中間基板3a、3bの間にはそれぞれ複数の端子ボール51cが設けられる。また、中間基板3aと中間基板3bは、上記した中間基板3と同様に、各々部品搭載基板1の下面及びデバイス実装基板2の上面と平行に、且つ、上下に重なるように配される。各中間基板3aと3bのその他の構成は、図1から図3に記載した中間基板3と同様である。   FIG. 4 shows a modification of the connection portion of the device 101 according to the present embodiment. The device 101 according to this modification includes a plurality of intermediate substrates 3a and 3b. A plurality of terminal balls 51c are provided between the intermediate substrates 3a and 3b. Similarly to the above-described intermediate substrate 3, the intermediate substrate 3 a and the intermediate substrate 3 b are arranged so as to be parallel to the upper surface of the component mounting substrate 1 and the upper surface of the device mounting substrate 2, and to be overlapped vertically. Other configurations of the intermediate substrates 3a and 3b are the same as those of the intermediate substrate 3 shown in FIGS.

この変形例の場合、部品搭載基板1とデバイス実装基板2の間が間隔L1をさらに増加させることができる。また、この変形例の場合、端子ボール51aと端子ボール51bと端子ボール51cの各直径については、逆に減少させることができる。つまり、この変形例では、端子ボールに発生する応力を吸収するための間隔を増加させると共に、高周波特性を悪化させる容量成分は減少させることができる。したがって、本変形例に係る部品搭載基板1においては、さらにデバイスの高周波特性を悪化させず、信頼性を向上させることができる。   In the case of this modification, the distance L1 between the component mounting board 1 and the device mounting board 2 can be further increased. In the case of this modification, the diameters of the terminal ball 51a, the terminal ball 51b, and the terminal ball 51c can be decreased. That is, in this modification, the interval for absorbing the stress generated in the terminal ball can be increased and the capacitance component that deteriorates the high-frequency characteristics can be reduced. Therefore, in the component mounting board 1 according to this modification, the high frequency characteristics of the device are not further deteriorated, and the reliability can be improved.

以上、本発明を実施の形態を用いて説明したが、本発明の技術的範囲は上記実施の形態に記載の範囲には限定されない。上記実施の形態に、多様な変更または改良を加えることが可能であることが当業者に明らかである。その様な変更または改良を加えた形態も本発明の技術的範囲に含まれ得ることが、特許請求の範囲の記載から明らかである。   As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

本実施形態に係る装置100の構成の一例を示す。An example of a structure of the apparatus 100 which concerns on this embodiment is shown. 図1の中間基板3を複数の中間部分基板3cから3gに分割した構成を上面から見た一例を示す。An example in which the structure obtained by dividing the intermediate substrate 3 of FIG. 1 into a plurality of intermediate partial substrates 3c to 3g is viewed from above is shown. 図1の中間基板3を複数の中間部分基板3c'から3g'に分割した構成を上面から見た他の例を示す。The other example which looked at the structure which divided | segmented the intermediate | middle board | substrate 3 of FIG. 1 into several intermediate | middle partial board | substrates 3c 'from 3g' from the upper surface is shown. 本実施形態に係るデバイス101の接続部の変形例を示す。The modification of the connection part of the device 101 which concerns on this embodiment is shown.

符号の説明Explanation of symbols

1 部品搭載基板
2 デバイス実装基板
3 中間基板
3a 中間基板
3b 中間基板
3c、3c' 中間部分基板
3d、3d' 中間部分基板
3e、3e' 中間部分基板
3f、3f' 中間部分基板
3g、3g' 中間部分基板
11 上層基板
12 中層基板
13 下層基板
14 電極
15 ビア
15a ビア
15b ビア
21 電極
31 電極
33 電極
34 ビア
34a ビア
34b ビア
40 凹部
41 チップ
42 ワイヤボンディング
43 実装部品
44 パターン配線
45 蓋部
51 端子ボール
51a 端子ボール
51b 端子ボール
51c 端子ボール
91 部品搭載部
100 装置
101 デバイス
L1 間隔
L2 間隔
L3 間隔
L4 厚さ
D1 直径
D2 直径
1 component mounting board 2 device mounting board 3 intermediate board 3a intermediate board 3b intermediate board 3c, 3c ′ intermediate partial board 3d, 3d ′ intermediate partial board 3e, 3e ′ intermediate partial board 3f, 3f ′ intermediate partial board 3g, 3g ′ intermediate Partial substrate 11 Upper layer substrate 12 Middle layer substrate 13 Lower layer substrate 14 Electrode 15 Via 15a Via 15b Via 21 Electrode 31 Electrode 33 Electrode 34 Via 34a Via 34b Via 40 Recess 41 Chip 42 Wire bonding 43 Mounting component 44 Pattern wiring 45 Lid 51 Terminal ball 51a terminal ball 51b terminal ball 51c terminal ball 91 component mounting part 100 device 101 device L1 interval L2 interval L3 interval L4 thickness D1 diameter D2 diameter

Claims (7)

デバイス実装基板の上面に搭載され、前記デバイス実装基板上の複数の電極に電気的に接続されるデバイスであって、
電子部品を搭載し、それぞれが前記デバイス実装基板上の対応する電極に電気的に接続されるべき複数の電極を下面に有する部品搭載基板と、
前記部品搭載基板と前記デバイス実装基板の間に少なくとも1つが重ねて設けられ、上面および下面のそれぞれに複数の電極を有し、上面および下面の対応する電極間が電気的に接続された中間基板と、
前記部品搭載基板、前記中間基板、および前記デバイス実装基板の各基板間の対応する電極同士をそれぞれ接続する複数の端子ボールと
を備えるデバイス。
A device mounted on an upper surface of a device mounting board and electrically connected to a plurality of electrodes on the device mounting board,
A component mounting board on which electronic components are mounted, each having a plurality of electrodes to be electrically connected to corresponding electrodes on the device mounting board; and
An intermediate substrate in which at least one is provided overlapping between the component mounting substrate and the device mounting substrate, has a plurality of electrodes on each of the upper surface and the lower surface, and the corresponding electrodes on the upper surface and the lower surface are electrically connected When,
A device comprising a plurality of terminal balls respectively connecting corresponding electrodes between the component mounting substrate, the intermediate substrate, and the device mounting substrate.
前記部品搭載基板、前記中間基板、および前記デバイス実装基板に設けられる互いに電気的に接続される電極同士は、基板の面方向において重なる位置に設けられる請求項1に記載のデバイス。   The device according to claim 1, wherein electrodes that are provided on the component mounting board, the intermediate board, and the device mounting board and that are electrically connected to each other are provided at positions that overlap each other in the surface direction of the board. 少なくとも1つの前記中間基板は、前記部品搭載基板および前記デバイス実装基板の熱膨張率の差を吸収するフレキシブル基板である請求項2に記載のデバイス。   The device according to claim 2, wherein the at least one intermediate substrate is a flexible substrate that absorbs a difference in coefficient of thermal expansion between the component mounting substrate and the device mounting substrate. 少なくとも1つの前記中間基板は、それぞれが対応する上面の電極および下面の電極の組を有する互いに分離した複数の中間部分基板の組を有する請求項3に記載のデバイス。   4. The device of claim 3, wherein at least one of the intermediate substrates has a plurality of separate sets of intermediate partial substrates each having a corresponding set of upper and lower electrodes. 前記部品搭載基板の一の電極に接続される一の前記中間部分基板は、前記一の電極より前記部品搭載基板の辺部に近い位置に設けられた他の電極に接続されない他の前記中間部分基板より少ない数の前記部品搭載基板の電極に接続される請求項4に記載のデバイス。   The one intermediate partial board connected to one electrode of the component mounting board is not connected to another electrode provided closer to the side of the component mounting board than the one electrode. The device according to claim 4, wherein the device is connected to a smaller number of electrodes of the component mounting board than the board. 前記部品搭載基板および前記デバイス実装基板の間に1つの前記中間基板を備える請求項4に記載のデバイス。   The device according to claim 4, comprising one intermediate substrate between the component mounting substrate and the device mounting substrate. デバイス実装基板と、
前記デバイス実装基板の上面に搭載され、前記デバイス実装基板上の複数の電極に電気的に接続されるデバイスと
を備え、
前記デバイスは、
電子部品を搭載し、それぞれが前記デバイス実装基板上の対応する電極に電気的に接続されるべき複数の電極を下面に有する部品搭載基板と、
前記部品搭載基板と前記デバイス実装基板の間に少なくとも1つが重ねて設けられ、上面および下面のそれぞれに複数の電極を有し、上面および下面の対応する電極間が電気的に接続された中間基板と、
前記部品搭載基板、前記中間基板、および前記デバイス実装基板の各基板間の対応する電極同士をそれぞれ接続する複数の端子ボールと
を有する装置。
A device mounting board,
A device mounted on an upper surface of the device mounting substrate and electrically connected to a plurality of electrodes on the device mounting substrate;
The device is
A component mounting board on which electronic components are mounted, each having a plurality of electrodes to be electrically connected to corresponding electrodes on the device mounting board; and
An intermediate substrate in which at least one is provided overlapping between the component mounting substrate and the device mounting substrate, has a plurality of electrodes on each of the upper surface and the lower surface, and the corresponding electrodes on the upper surface and the lower surface are electrically connected When,
And a plurality of terminal balls respectively connecting corresponding electrodes between the component mounting substrate, the intermediate substrate, and the device mounting substrate.
JP2007273000A 2007-10-19 2007-10-19 Device and apparatus Withdrawn JP2009105095A (en)

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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199029A (en) * 2010-03-19 2011-10-06 Fujitsu Ltd Circuit board, electronic apparatus, method of manufacturing circuit board, and method of replacing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199029A (en) * 2010-03-19 2011-10-06 Fujitsu Ltd Circuit board, electronic apparatus, method of manufacturing circuit board, and method of replacing semiconductor device

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