JP2009094115A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

Info

Publication number
JP2009094115A
JP2009094115A JP2007260569A JP2007260569A JP2009094115A JP 2009094115 A JP2009094115 A JP 2009094115A JP 2007260569 A JP2007260569 A JP 2007260569A JP 2007260569 A JP2007260569 A JP 2007260569A JP 2009094115 A JP2009094115 A JP 2009094115A
Authority
JP
Japan
Prior art keywords
gas
resist
removal step
wafer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007260569A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009094115A5 (enExample
Inventor
Makoto Hiyama
真 檜山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Denki Electric Inc
Original Assignee
Hitachi Kokusai Electric Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Kokusai Electric Inc filed Critical Hitachi Kokusai Electric Inc
Priority to JP2007260569A priority Critical patent/JP2009094115A/ja
Priority to US12/230,676 priority patent/US20090093124A1/en
Priority to KR1020080087264A priority patent/KR101014811B1/ko
Publication of JP2009094115A publication Critical patent/JP2009094115A/ja
Publication of JP2009094115A5 publication Critical patent/JP2009094115A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • G03F7/427—Stripping or agents therefor using plasma means only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H01J37/32449—Gas control, e.g. control of the gas flow
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0452—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers
    • H10P72/0454—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0462—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the construction of the processing chambers, e.g. modular processing chambers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0468—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP2007260569A 2007-10-04 2007-10-04 半導体装置の製造方法 Pending JP2009094115A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007260569A JP2009094115A (ja) 2007-10-04 2007-10-04 半導体装置の製造方法
US12/230,676 US20090093124A1 (en) 2007-10-04 2008-09-03 Method of manufacturing semiconductor device
KR1020080087264A KR101014811B1 (ko) 2007-10-04 2008-09-04 반도체 장치의 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007260569A JP2009094115A (ja) 2007-10-04 2007-10-04 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2009094115A true JP2009094115A (ja) 2009-04-30
JP2009094115A5 JP2009094115A5 (enExample) 2010-11-18

Family

ID=40523638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007260569A Pending JP2009094115A (ja) 2007-10-04 2007-10-04 半導体装置の製造方法

Country Status (3)

Country Link
US (1) US20090093124A1 (enExample)
JP (1) JP2009094115A (enExample)
KR (1) KR101014811B1 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013051416A (ja) * 2011-08-26 2013-03-14 Novellus Systems Incorporated 改良されたデバイスインテグリティのためのフォトレジスト剥離プロセス
JP2017085130A (ja) * 2010-11-30 2017-05-18 株式会社日立国際電気 基板処理装置、半導体装置の製造方法及びバッフル構造
US9911580B2 (en) 2010-11-30 2018-03-06 Hitachi Kokusai Electric Inc. Substrate processing apparatus, method of manufacturing semiconductor device, and baffle structure of the substrate processing apparatus
US9941108B2 (en) 2004-12-13 2018-04-10 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009164365A (ja) * 2008-01-08 2009-07-23 Hitachi Kokusai Electric Inc 半導体装置の製造方法及び基板処理装置
US8844793B2 (en) * 2010-11-05 2014-09-30 Raytheon Company Reducing formation of oxide on solder
CN102496592B (zh) * 2011-12-30 2016-04-06 上海集成电路研发中心有限公司 半导体硅片的去胶工艺腔及去胶方法
CN102522358B (zh) * 2011-12-30 2016-04-06 上海集成电路研发中心有限公司 半导体硅片的去胶工艺腔及去胶方法
KR200495358Y1 (ko) 2020-09-21 2022-05-06 조남규 구조자 보호용 구명기구

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160022A (ja) * 1991-12-09 1993-06-25 Mitsubishi Electric Corp 半導体装置の製造方法
JP2000286248A (ja) * 1999-01-28 2000-10-13 Canon Inc イオン注入されたホトレジストの残渣の処理方法及び半導体装置の製造方法
JP2001308078A (ja) * 2000-02-15 2001-11-02 Canon Inc 有機物除去方法、半導体装置の製造方法及び有機物除去装置並びにシステム
JP2008016811A (ja) * 2006-07-04 2008-01-24 Hynix Semiconductor Inc フォトレジストのストリップ方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5811358A (en) * 1997-01-03 1998-09-22 Mosel Vitelic Inc. Low temperature dry process for stripping photoresist after high dose ion implantation
US20010027023A1 (en) * 2000-02-15 2001-10-04 Shigenori Ishihara Organic substance removing methods, methods of producing semiconductor device, and organic substance removing apparatuses
US20070186953A1 (en) * 2004-07-12 2007-08-16 Savas Stephen E Systems and Methods for Photoresist Strip and Residue Treatment in Integrated Circuit Manufacturing

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160022A (ja) * 1991-12-09 1993-06-25 Mitsubishi Electric Corp 半導体装置の製造方法
JP2000286248A (ja) * 1999-01-28 2000-10-13 Canon Inc イオン注入されたホトレジストの残渣の処理方法及び半導体装置の製造方法
JP2001308078A (ja) * 2000-02-15 2001-11-02 Canon Inc 有機物除去方法、半導体装置の製造方法及び有機物除去装置並びにシステム
JP2008016811A (ja) * 2006-07-04 2008-01-24 Hynix Semiconductor Inc フォトレジストのストリップ方法

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9941108B2 (en) 2004-12-13 2018-04-10 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US10763084B2 (en) 2010-11-30 2020-09-01 Kokusai Electric Corporation Substrate processing apparatus, method of manufacturing semiconductor device, and baffle structure of the substrate processing apparatus
US9911580B2 (en) 2010-11-30 2018-03-06 Hitachi Kokusai Electric Inc. Substrate processing apparatus, method of manufacturing semiconductor device, and baffle structure of the substrate processing apparatus
JP2017085130A (ja) * 2010-11-30 2017-05-18 株式会社日立国際電気 基板処理装置、半導体装置の製造方法及びバッフル構造
JP2018142706A (ja) * 2010-11-30 2018-09-13 株式会社日立国際電気 基板処理装置、ガス供給構造及び半導体装置の製造方法
JP2019176163A (ja) * 2010-11-30 2019-10-10 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 基板処理装置および半導体装置の製造方法
JP2021036596A (ja) * 2010-11-30 2021-03-04 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 基板処理装置および半導体装置の製造方法
US11101111B2 (en) 2010-11-30 2021-08-24 Kokusai Electric Corporation Substrate processing apparatus, method of manufacturing semiconductor device, and baffle structure of the substrate processing apparatus
JP7121786B2 (ja) 2010-11-30 2022-08-18 株式会社Kokusai Electric 基板処理装置、半導体装置の製造方法および基板処理方法
JP2022166113A (ja) * 2010-11-30 2022-11-01 株式会社Kokusai Electric 基板処理装置および半導体装置の製造方法
JP7393488B2 (ja) 2010-11-30 2023-12-06 株式会社Kokusai Electric 基板処理装置および半導体装置の製造方法
US11948778B2 (en) 2010-11-30 2024-04-02 Kokusai Electric Corporation Substrate processing apparatus, method of manufacturing semiconductor device, and baffle structure of the substrate processing apparatus
US12505989B2 (en) 2010-11-30 2025-12-23 Kokusai Electric Corporation Substrate processing apparatus, and method of manufacturing semiconductor device
JP2013051416A (ja) * 2011-08-26 2013-03-14 Novellus Systems Incorporated 改良されたデバイスインテグリティのためのフォトレジスト剥離プロセス

Also Published As

Publication number Publication date
KR20090034722A (ko) 2009-04-08
US20090093124A1 (en) 2009-04-09
KR101014811B1 (ko) 2011-02-14

Similar Documents

Publication Publication Date Title
US12505989B2 (en) Substrate processing apparatus, and method of manufacturing semiconductor device
KR101014811B1 (ko) 반도체 장치의 제조 방법
KR101097723B1 (ko) 반도체 장치의 제조 방법 및 기판 처리 장치
US20100184299A1 (en) Substrate processing method
CN111952219A (zh) 基板处理装置、半导体装置的制造方法和存储介质
JP2025108733A (ja) 基板処理装置、基板処理方法、および半導体装置の製造方法
JP5848626B2 (ja) 半導体装置の製造方法及び基板処理装置
JP2010206139A (ja) 基板処理装置
JP2009043755A (ja) アッシャ装置及び半導体製造方法
JP2012069657A (ja) 基板処理方法及び基板処理装置
JP2009124069A (ja) 半導体製造装置
JP2010021166A (ja) プラズマ処理装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101001

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101001

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110729

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120904

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130129