JP2009092930A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of improving image quality without increasing power consumption. <P>SOLUTION: In the liquid crystal display device provided with a liquid crystal display panel having a first substrate, a second substrate and a liquid crystal interposed between the first and the second substrates and further having a plurality of pixels having pixels A and pixels B, each of the pixels A has a surface-shaped counter electrode A provided on the first substrate, an interlayer insulating film provided in an upper layer of the surface-shaped counter electrode and a pixel electrode A provided in an upper layer of the interlayer insulating film and having a line-shaped part, each of the pixels B has a surface-shaped pixel electrode B provided on the first substrate, an interlayer insulating film provided in an upper layer of the surface shaped pixel electrode and a counter electrode B provided in an upper layer of the interlayer insulating film and having a line-shaped part and the pixels A and the pixels B are disposed in a checker pattern. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device, and more particularly to a technique effective when applied to an IPS (In Plane Switching) type liquid crystal display device.

A TFT liquid crystal display device using a thin film transistor as an active element can display a high-definition image, and is therefore used as a display device for a television, a personal computer display, or the like.
As one of the TFT type liquid crystal display devices, an IPS type (also referred to as a horizontal electric field type) liquid crystal display device is known. In the liquid crystal display panel of the IPS liquid crystal display device (hereinafter referred to as IPS liquid crystal display panel), an electric field parallel to the substrate is generated at least partially between the pixel electrode and the counter electrode, and the liquid crystal is generated by the electric field. Is driven and the light transmitted through the liquid crystal layer is modulated to display an image.
In this IPS liquid crystal display panel, a planar lower layer electrode and an upper layer electrode having a linear portion are formed across an insulating film, and an electric field is generated between the lower layer electrode and the upper layer electrode. There is known a liquid crystal display panel that displays an image by driving liquid crystal by an electric field and modulating light transmitted through a liquid crystal layer.

Note that the transflective liquid crystal display panel has an electrode structure (hereinafter referred to as an electrode structure F) in which a planar lower electrode and an upper electrode having a linear portion are formed with an insulating film interposed therebetween. An IPS liquid crystal display panel is described in Patent Document 1 below.
JP 2007-121587 A

The electrode structure F can be roughly divided into the following two types.
(I) A structure (hereinafter referred to as a common electrode) in which an upper layer electrode having a linear portion is made independent for each pixel and connected to a source electrode of a thin film transistor to form a pixel electrode, and a planar lower electrode is also referred to as a common electrode. , S-TOP pixel structure.)
(II) A structure in which a planar lower electrode is made independent for each pixel and connected to a source electrode of a thin film transistor to be a pixel electrode, and an upper electrode having a linear portion is a counter electrode (hereinafter referred to as a C-TOP pixel structure). )
On the other hand, as a driving method of the liquid crystal display device, any one of the following four types of driving methods employed in a general TFT liquid crystal display device can be employed.
(1) Inversion driving method for each frame (2) Inversion driving method for each column (3) Inversion driving method for each line (4) Inversion driving method for each dot Further, the inversion driving method for each frame of (1) and for each line of (3) In the inversion driving method, the common voltage input to the counter electrode is combined with the common AC driving in which the AC is converted into an AC, so that the drive circuit can be reduced in voltage and power consumption in many cases.

Even in an IPS liquid crystal display panel, when a DC voltage component is superimposed on an AC rectangular wave voltage, a normal flicker (flickering) occurs. The (2) column-by-column inversion driving method, (3) line-by-line inversion driving method, and (4) dot-by-dot inversion driving method can be arranged in a distributed manner so as to spatially offset the flickering and darkness. Therefore, the image quality is improved in this order.
On the other hand, the power consumption of the drive circuit is not the same as the (1) frame-by-frame inversion driving method, and the common AC driving cannot be reduced and the voltage cannot be lowered. The high (3) line-by-line inversion driving method, and the (2) line-by-line inversion driving method and the (3) line-by-line inversion driving method are both larger.
For this reason, in particular, small and medium products that require low power consumption tend to employ the frame-by-frame inversion driving method (1) that consumes the least power among the four driving methods.
In addition, although there is an advanced type of the inversion driving method for each column (2) such as the simultaneous inversion driving method for every two lines, it is included in the inversion driving method for each line here.

As described above, image quality can be improved by employing the inversion driving method for each column (2), the inversion driving method for each line (3), and the inversion driving method for each dot (4). As described above, there is a problem that power consumption increases.
The present invention has been made to solve the above-described problems of the prior art, and an object of the present invention is to provide a liquid crystal display device capable of improving image quality without increasing power consumption. It is in.
The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
(1) A liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate, the liquid crystal display panel including a pixel A and a pixel A liquid crystal display device having a plurality of pixels having B and a plurality of scanning lines for inputting a scanning voltage to the plurality of pixels, wherein the pixel A is a planar facing provided on a first substrate. An electrode A; an interlayer insulating film provided above the planar counter electrode A; a pixel electrode A provided above the interlayer insulating film and having a linear portion; and the pixel B Includes a planar pixel electrode B provided on the first substrate, an interlayer insulating film provided in an upper layer than the planar pixel electrode B, and provided in a layer above the interlayer insulating film, The liquid crystal display panel includes a plurality of the pixels A in a row A. , And a line B comprised of a plurality of the pixel B, the A line A and the line B, is extended in the extending direction of the scanning lines, placing said row A and the row B alternately. (2) In (1), the counter electrode A of the plurality of pixels A in the row A and the counter electrode B of the plurality of pixels B in the row B are shared.
(3) In (2), the common counter electrode A in the row A is electrically connected to the common counter electrode B in the row B.

(4) In (2), the common counter electrode A in the row A and the common counter electrode B in the row B are independent of each other.
(5) In (4), the phase of the counter voltage supplied to the common counter electrode A in the row A and the phase of the counter voltage supplied to the common counter electrode B in the row B Is different.
(6) In (1), the liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixel A and the pixel B, and each video line is provided with the counter electrode for each frame. A positive video voltage having a higher potential than the supplied counter voltage and a negative video voltage having a lower potential than the counter voltage supplied to the counter electrode are alternately supplied.
(7) In (6), a high-potential counter voltage and a low-potential counter voltage are alternately supplied to the counter electrode for each frame.
(8) In (1), the liquid crystal display panel includes a plurality of video lines for inputting a video voltage to the pixel A and the pixel B, and one of the two video lines adjacent to each other includes the counter electrode. A positive video voltage having a higher potential than the counter voltage supplied to the counter electrode, and a negative video voltage having a lower potential than the counter voltage supplied to the counter electrode to the other. The positive video voltage and the negative video voltage are alternately supplied to each of the plurality of pixels A and the plurality of pixels B for each frame.

(9) A liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate, the liquid crystal display panel including a pixel A and a pixel A liquid crystal display device having a plurality of pixels having B and a plurality of video lines for inputting a video voltage to the plurality of pixels, wherein the pixel A is a planar facing provided on a first substrate. An electrode A; an interlayer insulating film provided above the planar counter electrode A; a pixel electrode A provided above the interlayer insulating film and having a linear portion; and the pixel B Includes a planar pixel electrode B provided on the first substrate, an interlayer insulating film provided in an upper layer than the planar pixel electrode B, and provided in a layer above the interlayer insulating film, The liquid crystal display panel includes a plurality of the pixels A and a column A. , And a column B comprising a plurality of the pixel B, the A column A and the array B, is extended in the extending direction of the video lines, placing said column A and the array B alternately.
(10) In (9), the counter electrode A of the plurality of pixels A in the column A and the counter electrode B of the plurality of pixels B in the column B are shared.
(11) In (10), the common counter electrode A in the column A and the common counter electrode B in the column B are electrically connected.
(12) In (10), the common counter electrode A in the column A and the common counter electrode B in the column B are independent of each other.

(13) In (12), the phase of the counter voltage supplied to the common counter electrode A of the column A and the phase of the counter voltage supplied to the common counter electrode B of the column B Is different.
(14) In (9), for each video line, a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode and a counter voltage supplied to the counter electrode for each frame. The negative polarity video voltage having a lower potential is alternately supplied.
(15) In (14), a high-potential counter voltage and a low-potential counter voltage are alternately supplied to the counter electrode for each frame.
(16) In (9), the liquid crystal display panel includes a plurality of scanning lines for inputting scanning voltages to the pixels A and B, and a selection scanning voltage is applied to n (n ≧ 1) scanning lines. Each time the video line is supplied, each video line has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode and a negative polarity having a lower potential than the counter voltage supplied to the counter electrode. Are alternately supplied, and each of the plurality of pixels A and the plurality of pixels B has the positive video voltage and the negative video voltage alternately for each frame. To be supplied.

(17) A liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate, the liquid crystal display panel including a pixel A and a pixel B is a liquid crystal display device having a plurality of pixels, and the pixel A is provided in a layer above the planar counter electrode A provided on the first substrate and the planar counter electrode A. An interlayer insulating film; and a pixel electrode A provided in a layer above the interlayer insulating film and having a linear portion. The pixel B includes a planar pixel electrode B provided on a first substrate; The pixel A and the pixel include: an interlayer insulating film provided above the planar pixel electrode B; and a counter electrode B provided above the interlayer insulating film and having a linear portion. B is arranged in a checkered pattern.
(18) In (17), the counter electrodes A of the plurality of pixels A are electrically connected and shared, and the counter electrodes B of the plurality of pixels B are electrically connected and shared.
(19) In (18), the liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B, and the plurality of pixels are arranged in an extending direction of the video lines. For each column (j ≧ 1), the counter electrodes A of the plurality of pixels A are electrically connected to be shared, and j (j ≧ 1) arranged in the extending direction of the video lines of the plurality of pixels. For each column, the counter electrodes B of the plurality of pixels B are electrically connected to be shared.
(20) In (18), the liquid crystal display panel includes a plurality of scanning lines for inputting a scanning voltage to the pixel A and the pixel B, and is arranged in an extension direction of the scanning lines of the plurality of pixels. For each row (k ≧ 1), the counter electrodes A of the plurality of pixels A are electrically connected and shared, and k (k ≧ 1) arranged in the extending direction of the scanning lines of the plurality of pixels. For each row, the counter electrodes B of the plurality of pixels B are electrically connected to be shared.

(21) In any one of (18) to (20), the counter electrodes A of the plurality of pixels A that are electrically connected and shared, and the plurality of pixels B that are electrically connected and shared. The counter electrode B is electrically connected.
(22) In any one of (18) to (20), the counter electrode A that is electrically connected and shared and the counter electrode B that is electrically connected and shared are independent of each other. is doing.
(23) In (22), the phase of the counter voltage supplied to the counter electrode A that is electrically connected and shared, and the counter electrode B that is electrically connected and shared are supplied to the counter electrode B It is different from the phase of the counter voltage.
(24) In (17), the plurality of pixels A and the plurality of pixels B each have a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode for each frame; A negative video voltage having a lower potential than the counter voltage supplied to the counter electrode is alternately supplied.
(25) In (24), a high-potential counter voltage and a low-potential counter voltage are supplied to the counter electrode alternately for each frame.
(26) In (17), the liquid crystal display panel includes a plurality of video lines for inputting a video voltage to the pixel A and the pixel B, and one of the two video lines adjacent to each other includes the counter electrode. A positive video voltage having a higher potential than the counter voltage supplied to the counter electrode, and a negative video voltage having a lower potential than the counter voltage supplied to the counter electrode to the other. The positive video voltage and the negative video voltage are alternately supplied to each of the plurality of pixels A and the plurality of pixels B for each frame.

(27) In (17), the liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B, and a plurality of scanning lines for inputting scanning voltages to the pixels A and B. Each time a selected scanning voltage is supplied to n (n ≧ 1) scanning lines, each video line has a positive polarity higher than the counter voltage supplied to the counter electrode. A video voltage and a negative video voltage having a lower potential than the counter voltage supplied to the counter electrode are alternately supplied, and each of the plurality of pixels A and the plurality of pixels B has one frame. Each time, the positive video voltage and the negative video voltage are alternately supplied.
(28) In (1), (9), or (17), a part of the counter electrode A of each pixel A and a part of the counter electrode B of each pixel B are the interlayer insulating film It is superimposed through.
(29) In (28), the second substrate has a light shielding film, and a part of the counter electrode A of each pixel A and one of the counter electrodes B of each pixel B in the light shielding film. At least a part of a region corresponding to a portion where the portion overlaps with the interlayer insulating film interposed therebetween is removed.
(30) In (1), (9), or (17), the interlayer insulating film is formed of a stacked body of a plurality of insulating films.
(31) In (1), (9), or (17), the number of linear portions of the pixel electrode A of each pixel A and the number of linear portions of the counter electrode B of each pixel B Are equal.
(32) In (1), (9), or (17), the number of intervals between the linear portions of the pixel electrode A of each pixel A and the linear portion of the counter electrode B of each pixel B The number of intervals is equal.
(33) In (1), (9), or (17), the pixel electrode A of each pixel A and the counter electrode B of each pixel B are made of the same material (for example, a transparent conductive member) The counter electrode A of each pixel A and the pixel electrode B of each pixel B are made of the same material (for example, a transparent conductive member).

(34) In (1), the first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B, and the counter electrode A and each pixel B of each pixel A. A counter electrode wiring provided in the same layer as the pixel electrode B; a counter electrode A of each pixel A; a first insulating film provided in a layer above the pixel electrode B of each pixel B; A first electrode of an active element provided above the first insulating film; a second insulating film provided above the first electrode of the active element; and more than the second insulating film. The pixel electrode A of each pixel A provided in the upper layer and the counter electrode B of each pixel B are provided, and the pixel electrode A of each pixel A is provided on the second insulating film The first power of the active element through a first contact hole. The counter electrode A of each pixel A is connected to the counter electrode wiring, and the pixel electrode B of each pixel B is connected via a second contact hole provided in the first insulating film. The counter electrode B of each pixel B is connected to the first electrode of the active element, and the counter electrode B is connected to the counter electrode B via a third contact hole provided in the first insulating film and the second insulating film. Connected to the electrode wiring, the interlayer insulating film is composed of the first insulating film and the second insulating film.
(35) In (34), the counter electrode B of each pixel B is opposed to the pixel A via a fourth contact hole provided in the first insulating film and the second insulating film. Connected to electrode A.
(36) In (1), the first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B, and the counter electrode A and each pixel B of each pixel A. A first insulating film provided above the pixel electrode B, a first electrode of an active element provided above the first insulating film, and an upper layer than the first electrode of the active element The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in a layer above the second insulating film, and The pixel electrode A of the pixel A is connected to the first electrode of the active element through a first contact hole provided in the second insulating film, and the pixel electrode B of each pixel B is A second contact hole provided in the first insulating film; And the counter electrode B of each pixel B is connected to the first electrode of the active element through the third contact hole provided in the first insulating film and the second insulating film. Connected to the counter electrode A of each pixel A, the interlayer insulating film is composed of the first insulating film and the second insulating film.

(37) In (9), the first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B, and the counter electrode A and each pixel B of each pixel A. A first electrode of an active element provided in the same layer as the pixel electrode B; a counter electrode wiring provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B; A first insulating film provided above the pixel electrode B of each pixel A and the pixel electrode B of each pixel B, and each pixel A provided above the first insulating film. The pixel electrode A and the counter electrode B of each pixel B, and the pixel electrode A of each pixel A is active through a first contact hole provided in the first insulating film. Connected to the first electrode of the element, and The counter electrode A is connected to the counter electrode wiring, the pixel electrode B of each pixel B is connected to the first electrode of the active element, and the counter electrode B of each pixel B is the first electrode The second insulating film is connected to the counter electrode wiring through a second contact hole provided in the first insulating film, and the interlayer insulating film is constituted by the first insulating film.
(38) In (37), the counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a third contact hole provided in the first insulating film.
(39) In (9), the first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B, and the counter electrode A and each pixel B of each pixel A. A first electrode of an active element provided in the same layer as the pixel electrode B, and a first insulating film provided in a layer above the counter electrode A of each pixel A and the pixel electrode B of each pixel B And the pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the first insulating film, and the pixel electrode A of each pixel A is The first electrode of the active element is connected to the first electrode through a first contact hole provided in the first insulating film, and the pixel electrode B of each pixel B is connected to the first electrode of the active element. The counter electrode B of each pixel B is Via said second contact hole formed in the first insulating film is connected to the counter electrode A of the pixels A, the interlayer insulating film is composed of the first insulating film.

(40) In (1), (9), or (17), the first substrate includes a first electrode of an active element and a first insulation provided in an upper layer than the first electrode of the active element. A film, the counter electrode A of each pixel A and the pixel electrode B of each pixel B provided above the first insulating film, and the counter electrode A and each pixel of each pixel A A counter electrode wiring provided in the same layer as the pixel electrode B of B, a second insulating film provided in a layer above the counter electrode A of each pixel A and the pixel electrode B of each pixel B; The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in a layer above the second insulating film, and the pixel electrode A of each pixel A includes the pixel electrode A First contact provided on the first insulating film and the second insulating film The hole is connected to the first electrode of the active element, the counter electrode A of each pixel A is connected to the counter electrode wiring, and the pixel electrode B of each pixel B is connected to the first electrode The counter electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in the insulating film, and the third contact hole provided in the second insulating film. The interlayer insulating film is configured by the second insulating film.
(41) In (40), the counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a fourth contact hole provided in the second insulating film.
(42) In (1), (9), or (17), the first substrate includes a first electrode of an active element, and a first insulation provided in an upper layer than the first electrode of the active element. A film, the counter electrode A of each pixel A and the pixel electrode B of each pixel B provided above the first insulating film, and the counter electrode A and each pixel of each pixel A A counter electrode wiring A provided in the same layer as the pixel electrode B of B, and a second insulating film provided in a layer above the counter electrode A of each pixel A and the pixel electrode B of each pixel B The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided above the second insulating film, and the pixel electrode A and each pixel B of each pixel A. The counter electrode wiring B provided in the same layer as the counter electrode B of The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film and the second insulating film, The counter electrode A of each pixel A is connected to the counter electrode wiring A, and the pixel electrode B of each pixel B is connected to the active element through a second contact hole provided in the first insulating film. The counter electrode B of each pixel B is connected to the counter electrode wiring B, and the interlayer insulating film is composed of the second insulating film.

(43) In (1), (9), or (17), the first substrate includes a first electrode of an active element and a first insulation provided in a layer above the first electrode of the active element. A film, the counter electrode A of each pixel A and the pixel electrode B of each pixel B provided above the first insulating film, and the counter electrode A and each pixel of each pixel A A second insulating film provided above the pixel electrode B of B, and the opposing of the pixel electrode A and the pixel B of each pixel A provided above the second insulating film The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film and the second insulating film. And the pixel electrode B of each pixel B is The counter electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in one insulating film, and the third electrode provided in the second insulating film. Connected to the counter electrode A of each pixel A through a contact hole, the interlayer insulating film is composed of the second insulating film.
(44) In any one of (40) to (43), provided above the first insulating film and below the counter electrode A of each pixel A and the pixel electrode B of each pixel B. It has an organic insulating film.
(45) In (1), (9), or (17), the width of the linear portion of the pixel electrode A of each pixel A and the width of the linear portion of the counter electrode B of each pixel B And the total length of the linear portions of the pixel electrode A of each pixel A is equal to the total length of the linear portions of the counter electrode B of each pixel B.
(46) In (1), (9), or (17), the interval between the linear portions of the pixel electrode A of each pixel A and the interval between the linear portions of the counter electrode B of each pixel B And the total length of the linear portions of the pixel electrode A of each pixel A is equal to the total length of the linear portions of the counter electrode B of each pixel B.
(47) In (16) or (27), each time a selection scan voltage is supplied to the n (n ≧ 1) scan lines, the counter electrode wiring has a high potential counter voltage and a low potential voltage. The counter voltage of the potential is supplied alternately.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
According to the liquid crystal display device of the present invention, the image quality can be improved without increasing the power consumption.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
In all the drawings for explaining the embodiments, parts having the same functions are given the same reference numerals, and repeated explanation thereof is omitted.
[Example 1]
FIG. 1 is a diagram illustrating a schematic structure of a pixel arrangement of a liquid crystal display panel in a liquid crystal display device according to Embodiment 1 of the present invention.
In the liquid crystal display panel of this embodiment, the (i-1) -th line has an S-TOP pixel structure, the (i) line has a C-TOP pixel structure, and the (i + 1) -th line has an S-TOP pixel structure. . . As described above, a row having an S-TOP pixel structure and a row having a C-TOP pixel structure are alternately arranged for each line. In FIG. 1 and the drawings to be described later, S-TOP indicates an S-TOP pixel structure, and C-TOP indicates a C-TOP pixel structure.
In the S-TOP pixel structure, a thin film transistor (TFT) is provided in the vicinity of the intersection of the scanning line (GL) and the video line (DL) on the first substrate, and the gate electrode (G) of the thin film transistor (TFT) is connected to the scanning line (GL). The drain electrode (D) is connected to the video line (DL). In this embodiment, one electrode connected to the video line (DL) of the thin film transistor (TFT) functions as the drain electrode (D) or the source electrode (S), and the other electrode connected to the pixel electrode. Functions as a source electrode (S) or a drain electrode (D). In this specification, one electrode connected to the video line (DL) is defined as the drain electrode (D) and the other electrode connected to the pixel electrode. The electrode is described as a source electrode (S).
A gate electrode (G) of a thin film transistor (TFT) having an S-TOP pixel structure on the same line adjacent in the scanning line direction is connected to the same scanning line (GL).

A planar counter electrode (LCOM) as a lower layer electrode is provided on a passivation film or an organic film laminated so as to cover the scanning line (GL), the video line (DL), and the thin film transistor (TFT).
An opening (THC) is formed in the counter electrode (LCOM) on the source electrode (S) of the thin film transistor (TFT). The counter electrodes of the S-TOP pixel structure on the same line adjacent in the scanning line direction are connected to each other to form a counter electrode wiring (COM).
An interlayer insulating film is laminated so as to cover the counter electrode (LCOM), and the opening (THC) of the counter electrode (LCOM) is formed in the interlayer insulating film, passivation film, and organic film on the source electrode (S) of the thin film transistor (TFT). A contact hole (THI) is formed so that the end of the thin film transistor is not exposed, and a part of the surface of the source electrode (S) of the thin film transistor (TFT) is exposed.
A pixel electrode (UPIX) having a linear portion as an upper layer electrode is provided for each pixel on the interlayer insulating film laminated so as to cover the counter electrode (LCOM), and the pixel electrode (UPI) is provided via a contact hole (THI). UPIX) is connected to the source electrode (S) of the thin film transistor (TFT). The pixel electrode (UPIX) is provided with a plurality of slit-like openings (SLTP) to form a comb-like planar shape.

In the C-TOP pixel structure, a thin film transistor (TFT) is provided in the vicinity of the intersection of the scanning line (GL) and the video line (DL) on the first substrate, and the gate electrode (G) of the thin film transistor (TFT) is connected to the scanning line (GL). ), The drain electrode (D) is connected to the video line (DL).
A gate electrode (G) of a thin film transistor (TFT) having a C-TOP pixel structure on the same line adjacent in the scanning line direction is connected to the same scanning line (GL).
A contact hole (THI) is formed on the source electrode (S) of the thin film transistor (TFT) of a passivation film or an organic film laminated so as to cover the scanning line (GL), the video line (DL), and the thin film transistor (TFT), A part of the surface of the source electrode (S) of the thin film transistor (TFT) is exposed.
In addition, a planar pixel electrode (LPIX) as a lower layer electrode is formed for each pixel on a passivation film or an organic film laminated so as to cover the scanning line (GL), the video line (DL), and the thin film transistor (TFT). And the pixel electrode (LPIX) is connected to the source electrode (S) of the thin film transistor (TFT) through the contact hole (THI). The pixel electrode (LPIX) is formed at the same time as the counter electrode (LCOM).
A counter electrode (UCOM) having a linear portion as an upper layer electrode is provided on the interlayer insulating film laminated so as to cover the pixel electrode (LPIX). The counter electrodes of the C-TOP pixel structure on the same line adjacent in the scanning line direction are connected to each other to form a counter electrode wiring (COM).
The counter electrode (UCOM) was provided with a plurality of slit-shaped openings (SLTC) to form a comb-like planar shape. The counter electrode (UCOM) was formed simultaneously with the pixel electrode (UPIX).
Further, the planar shapes of the pixel electrode (UPIX) and the counter electrode (UCOM) have the same comb tooth width, the same comb tooth interval, the same number of comb teeth, and the same number of comb tooth intervals. The total length is made equal to each other.
A first alignment film for aligning the liquid crystal layer in a predetermined direction was formed on the outermost surface.

Although illustration is omitted, on the second substrate, a light-shielding film, a color filter of a plurality of colors different for each pixel, a protective film, and a second alignment film are formed to be a counter substrate. The first alignment film and the second alignment film are each subjected to an alignment process in a predetermined direction.
The first substrate and the second substrate are arranged so that the alignment film forming surfaces face each other at a constant interval, and the gap is filled with a nematic liquid crystal composition having positive dielectric anisotropy to form a liquid crystal layer.
Accordingly, a component parallel to the surface of the first substrate is provided between the pixel electrode (UPIX) and the counter electrode (LCOM) and between the counter electrode (UCOM) and the pixel electrode (LPIX) via the liquid crystal layer. An electric field is generated to drive the liquid crystal layer.
Thus, the above-described electrode structure F is configured, and between the counter electrode (LCOM) and the pixel electrode (UPIX) of the S-TOP pixel structure portion and the pixel electrode (LPIX) of the C-TOP pixel structure portion. A pixel capacitor (Cpx) and a storage capacitor (Cst) were formed between the counter electrodes (UCOM).
A liquid crystal display device in a normally black (NB) display mode was configured by arranging a retardation plate and a polarizing plate outside the first substrate and the second substrate.
Further, the scanning line (GL), the video line (DL), the counter electrode (LCOM), and the counter electrode (UCOM) are connected to a drive circuit (not shown).

An equivalent circuit of the liquid crystal display panel of Example 1 is shown in FIG.
In each line, the counter electrode of each pixel was connected to form a counter electrode wiring (COM). The counter electrode wiring (COM) for each line is preferably connected between adjacent lines in order to reduce the resistance of the counter electrode wiring (COM), and a voltage is commonly applied to all pixels, but is separated for each line. The voltages may be applied independently.
Further, the storage capacitor (Cst) and the pixel capacitance (Cpx) of the S-TOP pixel structure of the (i-1) th line and the (i + 1) th line, and the storage capacitor (C) of the C-TOP pixel structure of the (i) line. Cst) and pixel capacitance (Cpx) are designed to be substantially equal to each other. This is because the planar shape of the pixel electrode (UPIX) of the S-TOP pixel structure portion and the counter electrode (UCOM) of the C-TOP pixel structure portion has the same comb tooth width, the same comb tooth spacing, and the number of comb teeth. Are equal to each other, the number of comb-teeth intervals is equal to each other, and the total comb-teeth length is equal to each other. Therefore, the interlayer insulating film is shared by the S-TOP pixel structure portion and the C-TOP pixel structure portion. Such a method is common to all the embodiments.
For this reason, the feedthrough voltage from the scanning line (GL) or the video line (DL) due to the parasitic capacitance to each pixel electrode to the voltage of the source electrode (S) of the thin film transistor is changed to the S-TOP pixel structure and the C-TOP. It can be made almost equal to the pixel structure.
Thereby, the difference in the voltage waveform applied to the liquid crystal layer of the S-TOP pixel structure and the C-TOP pixel structure can be suppressed. In particular, the planar shape of the pixel electrode (UPIX) of the S-TOP pixel structure portion and the counter electrode (UCOM) of the C-TOP pixel structure portion has the same comb tooth width, the same comb tooth spacing, and the same number of comb teeth. Since the number of comb teeth is equal to each other and the total length of the comb teeth is equal to each other, if the applied voltage to the liquid crystal layer is the same, the operation of the liquid crystal layer will be the same and the image quality will deteriorate. Can be prevented. Such an effect is common to all the embodiments.

In the liquid crystal display device according to the first embodiment, the frame-by-frame inversion driving method is adopted. FIG. 3 shows a schematic diagram of drive voltage waveforms in the liquid crystal display devices according to the first embodiment and the second to seventh embodiments to be described later. In FIG. 3 and the drawings to be described later, VG is a selection scanning voltage applied to the scanning line, VD is a video voltage applied to the video line, and VS is a voltage of the pixel electrode and the source electrode. , VCOM is a counter voltage applied to the counter electrode wiring, and (i-1) LINE, (i) LINE, (i + 1) LINE are (i-1) line, (i) line, (i + 1) line, respectively. Represents.
At time A in FIG. 3, in the S-TOP pixel structure of the (i−1) -th line and the (i + 1) -th line, VS (i−1) and VS (i + 1) which are voltages of the pixel electrode (UPIX) are respectively Since the voltage of the counter electrode (LCOM) is higher than VCOM (i−1) and VCOM (i + 1), the voltage application state to the liquid crystal layer is positive. (I) In the C-TOP pixel structure of the line, Since VCOM (i) which is the voltage of the counter electrode (UCOM) is lower than VS (i) which is the voltage of the pixel electrode (LPIX), the voltage application state to the liquid crystal layer is negative. In all the examples, the voltage application state to the liquid crystal layer is a case where the voltage of the upper electrode having a linear portion is higher than the voltage of the planar lower electrode as shown by the arrow in FIG. The case of positive polarity and low case will be described as negative polarity.
At time B in FIG. 3 corresponding to the next frame period, the reverse is true, and in the S-TOP pixel structure of the (i−1) -th line and the (i + 1) -th line, the voltage application state to the liquid crystal layer is negative. (I) In the C-TOP pixel structure in the line, the voltage application state to the liquid crystal layer is positive. Table 1 shows the state of voltage application to the liquid crystal layer.
As shown in Table 1, in this embodiment, the polarity of the voltage applied to the liquid crystal layer can always be reversed for each line while adopting the frame-by-frame inversion driving method. Corresponding to this, the flicker component is also arranged so that it is always inverted for each line, and it can be spatially offset to suppress the apparent flicker. Such an effect is common to all the embodiments. In this case, power consumption can be made smaller than in the case of the normal line-by-line inversion driving method.

FIG. 4 shows a schematic diagram of drive voltage waveforms when the same DC voltage component (Vdc) is superimposed on all VCOMs in this frame-by-frame inversion drive method.
In the S-TOP pixel structure on the (i-1) -th line, a voltage of + (Vac + Vdc) and − (Vac) are provided between the counter electrode (LCOM) as the lower layer electrode and the pixel electrode (UPIX) as the upper layer electrode. A voltage of −Vdc) is applied alternately.
On the other hand, in the C-TOP pixel structure on the (i) line, − (Vac + Vdc) and + (Vac−Vdc) are provided between the pixel electrode (LPIX) as the lower layer electrode and the counter electrode (UCOM) as the upper layer electrode. ) Are alternately applied.
Compared with the adjacent S-TOP pixel structure and C-TOP pixel structure, the effective value in each frame period varies substantially the same, so that the optical variation corresponding thereto is also substantially the same, and the DC voltage component ( Flicker components due to Vdc) are generated.
On the contrary, in this driving method, the flicker component caused by the DC voltage component (Vdc) can be suppressed by setting the DC voltage component (Vdc) to Vdc = 0.
Therefore, in this embodiment, by adjusting the level of VCOM so as to minimize flicker, Vdc = 0 can be easily realized, and the afterimage phenomenon can be prevented.
In this embodiment, the voltages of the VCOM of the S-TOP pixel structure and the VCOM of the C-TOP pixel structure are made variable independently. Even when the storage capacitor (Cst) and the pixel capacitor (Cpx) of the S-TOP pixel structure and the storage capacitor (Cst) and the pixel capacitor (Cpx) of the C-TOP pixel structure cannot be designed to be substantially equal, S Flicker can be suppressed by adjusting the VCOM voltage of the -TOP pixel structure and the VCOM voltage of the C-TOP pixel structure, respectively.

In this embodiment, an example of the voltage waveform of the inversion driving method for each frame that keeps the VCOM level constant is shown, but the video on the video line (DL) can be obtained by alternating the voltage of VCOM every frame period. A common AC drive capable of reducing the amplitude of the voltage can be used in combination. As a result, it is possible to achieve both a driving method with lower power consumption and flicker suppression.
Further, the phase of the voltage VCOM of the S-TOP pixel structure may be different from the phase of the voltage VCOM of the C-TOP pixel structure. This increases the degree of freedom in designing the peripheral drive circuit.
Further, in FIG. 1, in order to make the drawing easier to see, the counter electrode (LCOM) of the adjacent S-TOP pixel structure and the counter electrode (UCOM) of the C-TOP pixel structure are drawn with a gap, Actually, at least a part of the counter electrode (LCOM) and at least a part of the counter electrode (UCOM) are overlapped with each other via an interlayer insulating film.
For this reason, in the region where the counter electrode (LCOM) and the counter electrode (UCOM) overlap, the electric field leaking to the liquid crystal layer from the scanning line (GL) or the video line (DL) on the first substrate side is counter electrode (LCOM). And can be shielded by a counter electrode (UCOM).
Further, a planar shape is formed by removing a part of the light shielding film on the counter substrate side corresponding to the region where the counter electrode (LCOM) and the counter electrode (UCOM) overlap. Therefore, since an unintended operation of the liquid crystal layer due to a leakage electric field does not occur, image quality deterioration can be prevented even if there is no light shielding film in this region, and a bright display can be realized by improving the aperture ratio. Such an effect is common to all the embodiments.

[Modification of Example 1]
The present modification is a liquid crystal display device adopting the column-inversion driving method in the liquid crystal display device according to the first embodiment.
FIG. 5 is a diagram for explaining the distribution of the VCOM voltage and the VS voltage in each pixel when the column-inversion driving method is employed in the first embodiment.
Since this is an inversion driving method for each column, the voltages of VS (i−1, j−1), VS (i−1, j + 1) and VS (i−1, j) with respect to VCOM (i−1). Similarly, the polarity of VS (i, j-1), VS (i, j + 1) and VS (i, j) is opposite to VCOM (i), and VCOM (i + 1) On the other hand, the polarities of VS (i + 1, j-1), VS (i + 1, j + 1) and VS (i + 1, j) are opposite.
Since the relationship of the polarity of the voltage applied to the liquid crystal layer between the (i-1) th line and the (i + 1) th line and the (i) th line is the same as in the case of the frame-by-frame inversion driving method in the first embodiment. The voltage application state to the liquid crystal layer of each pixel is as shown in Table 2.
As shown in Table 2, in the modification shown in FIG. 5, the polarity of the voltage applied to the liquid crystal layer can always be reversed in a checkered pattern in units of dots while adopting the inversion driving method for each column. The light and darkness of the flicker component generated for each pixel due to the DC voltage component or the like is also inverted according to this in a checkered pattern, and can be more effectively spatially offset. Therefore, the effect of suppressing apparent flicker can be enhanced. In this case, the power consumption can be made smaller than in the normal dot inversion driving method.

[Example 2]
FIG. 6 is a diagram illustrating a schematic structure of a pixel arrangement of a liquid crystal display panel in the liquid crystal display device according to the second embodiment of the present invention. Compared with FIG. 1 of the first embodiment described above, only the following points are different.
In this embodiment, the (j-1) th column has an S-TOP pixel structure, the (j) th column has a C-TOP pixel structure, and the (j + 1) th column has an S-TOP pixel structure. . . As described above, the column having the S-TOP pixel structure and the column having the C-TOP pixel structure are alternately arranged for each column.
In each column of the S-TOP pixel structure, counter electrodes in adjacent rows are connected to each other to form a counter electrode wiring (COM). In each column of the C-TOP pixel structure, counter electrodes in adjacent rows These are connected to each other to form a counter electrode wiring (COM).
An equivalent circuit of the liquid crystal display device of Example 2 is shown in FIG. Compared with FIG. 2 in the first embodiment described above, only the following points are different.
In each column, the counter electrode of each pixel is connected to form a counter electrode wiring (COM). The counter electrode wiring (COM) of each column is preferably connected between adjacent columns to apply a voltage in common to all pixels in terms of resistance reduction of the counter electrode wiring (COM). A voltage may be applied independently.
In addition, the holding capacity (Cst) and the pixel capacity (Cpx) of the (j−1) th column and the (j + 1) th column are almost equal to the holding capacity (Cst) and the pixel capacity (Cpx) of the (j) th column, respectively. Designed to be equal.
For this reason, the feedthrough voltage from the scanning line (GL) or the video line (DL) due to the parasitic capacitance to each pixel electrode to the voltage of the source electrode (S) of the thin film transistor (TFT) is changed to the S-TOP pixel structure. The C-TOP pixel structure can be made almost equal. Thereby, it is possible to prevent the image quality from being deteriorated by suppressing the difference in the voltage waveform applied to the liquid crystal layer of the S-TOP pixel structure and the C-TOP pixel structure.

The liquid crystal display device according to the second embodiment employs the frame-by-frame inversion driving method as in the first embodiment.
FIG. 8 is a diagram for explaining the distribution of the VCOM voltage and the VS voltage in each pixel in this embodiment. The schematic diagram of the drive voltage waveform is the same as FIG. 3 in the first embodiment, but the voltage application state to the liquid crystal layer differs in the following points due to the difference in the pixel arrangement structure.
At time A in FIG. 3, in the S-TOP pixel structures in the (j−1) th column and the (j + 1) th column, VS (i−1, j−1), VS (i) which are voltages of the pixel electrode (UPIX). , J-1), VS (i + 1, j-1), and VS (i-1, j + 1), VS (i, j + 1), VS (i + 1, j + 1) are the voltages of the counter electrode (LCOM). Since it is higher than VCOM (j−1) and VCOM (j + 1), the voltage application state to the liquid crystal layer is positive, and in the C-TOP pixel structure in the (j) th column, VCOM is the voltage of the counter electrode (UCOM). Since (j) is lower than VS (i−1, j), VS (i, j), and VS (i + 1, j) which are voltages of the pixel electrode (LPIX), the voltage application state to the liquid crystal layer (LC) is Negative polarity.
At time B in the next frame period, the reverse is true, and in the S-TOP pixel structures in the (j−1) th column and the (j + 1) th column, the voltage application state to the liquid crystal layer (LC) is negative. j) In the C-TOP pixel structure in the column, the voltage application state to the liquid crystal layer (LC) is positive. Table 3 shows the voltage application state to the liquid crystal layer.

In this embodiment, since the polarity of the voltage applied to the liquid crystal layer can be always reversed for each column, the brightness of the flicker component generated for each pixel is always reversed for each column accordingly. It becomes an arrangement, and apparent flicker can be suppressed by spatially canceling.
In this frame-by-frame inversion driving method, the same behavior as in the first embodiment is exhibited even when the same DC voltage component (Vdc) is superimposed on all VCOM voltages. Therefore, in this embodiment, by adjusting the level of VCOM so as to minimize flicker, Vdc = 0 can be easily realized, and the afterimage phenomenon can be prevented.
In addition, the VCOM voltage of the S-TOP pixel structure and the VCOM voltage of the C-TOP pixel structure are made variable independently. Even when the storage capacitor (Cst) and the pixel capacitor (Cpx) of the S-TOP pixel structure and the storage capacitor (Cst) and the pixel capacitor (Cpx) of the C-TOP pixel structure cannot be designed to be substantially equal, S Flicker can be suppressed by adjusting the VCOM voltage of the -TOP pixel structure and the VCOM voltage of the C-TOP pixel structure, respectively.
In this embodiment, an example of the voltage waveform of the inversion driving method for each frame that keeps the VCOM level constant is shown. However, the amplitude of the video voltage on the video line (DL) is obtained by alternating the VCOM every frame period. It is also possible to use a common AC drive that can reduce the above. As a result, it is possible to achieve both a driving method with lower power consumption and flicker suppression.

[Modification of Example 2]
The modification of the second embodiment is a modification in which the inversion driving method for each line is adopted in the liquid crystal display device of the second embodiment.
FIG. 9 shows a schematic diagram of a drive voltage waveform in a modification of the second embodiment.
Since this is a line-by-line inversion driving method, the polarity of VS (i−1, j−1), VS (i−1, j), VS (i−1, j + 1) with respect to VCOM (i−1), and VCOM ( The polarity of VS (i, j-1), VS (i, j), VS (i, j + 1) for i) is opposite, and similarly, VS (i, j-1) for VCOM (i), The polarity of VS (i, j) and VS (i, j + 1) is opposite to the polarity of VS (i + 1, j-1), VS (i + 1, j) and VS (i + 1, j + 1) with respect to VCOM (i + 1). is there.
The relationship of the polarity of the voltage applied to the liquid crystal layer between the (j-1) th column and the (j + 1) th column and the (j) th column is the same as in the case of the frame-by-frame inversion driving method in the second embodiment. Therefore, the voltage application state to the liquid crystal layer of each pixel is as shown in Table 2 as in the case of the modification of the first embodiment.
As shown in Table 2, since the polarity of the voltage applied to the liquid crystal layer can always be reversed in a checkered pattern in dot units, flicker components caused by DC voltage components, etc., generated for each pixel Corresponding to this, the light and dark are arranged in a checkered pattern in dot units, and can be more effectively spatially offset.
In this embodiment, an example of the voltage waveform of the inversion driving method for each line that keeps the VCOM level constant is shown. However, the voltage of VCOM is changed every time the selective scanning voltage is supplied to the scanning line or every frame period. By making an alternating current, a common alternating current drive that can reduce the amplitude of the video voltage on the video line (DL) can be used together. As a result, it is possible to achieve both a driving method with lower power consumption and flicker suppression.

[Example 3]
FIG. 10 is a diagram showing a schematic structure of a pixel arrangement of a liquid crystal display panel in the liquid crystal display device according to Embodiment 3 of the present invention. Compared with FIG. 1 of the first embodiment described above, only the following points are different.
In the (i-1) th line, the (j-1) th column has a C-TOP pixel structure, the (j) th column has an S-TOP pixel structure, and the (j + 1) th column has a C-TOP pixel structure. . . (I) The (j-1) th column has an S-TOP pixel structure, the (j) th column has a C-TOP pixel structure, and the (j + 1) th column has an S-TOP pixel structure. . . In the (i + 1) th line, the (j-1) th column has a C-TOP pixel structure, the (j) th column has an S-TOP pixel structure, and the (j + 1) th column has a C-TOP pixel structure. . . As shown, the S-TOP pixel structure and the C-TOP pixel structure are arranged in a checkered pattern in dot units.
The counter electrodes of the S-TOP pixel structure are connected to each other between the closest similar pixels to form a counter electrode wiring (COM2), and the counter electrodes of the C-TOP pixel structure are connected to each other between the closest similar pixels. Thus, the counter electrode wiring (COM1) is obtained.
FIG. 11 shows an equivalent circuit of the liquid crystal display device according to the third embodiment. Compared with FIG. 2 in Example 1, only the following points are different.
The counter electrodes of the pixels adjacent diagonally above and below in the dot unit are connected to form a counter electrode wiring (COM1) and a counter electrode wiring (COM2).
Further, the storage capacitor (Cst) and the pixel capacitor (Cpx) are designed to be equal to each other between adjacent pixels in the vertical and horizontal directions. For this reason, the feedthrough voltage from the scanning line (GL) or the video line (DL) due to the parasitic capacitance to each pixel electrode to the voltage of the source electrode (S) of the thin film transistor (TFT) is changed to the S-TOP pixel structure. The C-TOP pixel structure can be made almost equal. Thereby, it is possible to prevent the image quality from being deteriorated by suppressing the difference in the voltage waveform applied to the liquid crystal layer of the S-TOP pixel structure and the C-TOP pixel structure.

In the liquid crystal display panel of this embodiment, the frame-by-frame inversion driving method was adopted as in the first embodiment.
FIG. 12 is a diagram for explaining the distribution of the VCOM voltage and the VS voltage in each pixel of the liquid crystal display panel of this embodiment.
The schematic diagram of the drive voltage waveform is the same as that in FIG. 3 in the first embodiment described above, but the voltage application state to the liquid crystal layer is different in the following points due to the difference in the pixel arrangement structure.
At time A in FIG. 3, in the S-TOP pixel structure, the voltages of the pixel electrodes (UPIX) VS (i−1, j), VS (i, j−1), VS (i, j + 1), and VS ( Since i + 1, j) is higher than the voltage VCOM which is the voltage of the counter electrode (LCOM), the voltage application state to the liquid crystal layer is positive, and in the C-TOP pixel structure, the voltage of the counter electrode (UCOM). The voltage of VCOM is the voltage of the pixel electrode (LPIX) VS (i−1, j−1), VS (i−1, j + 1), VS (i, j), VS (i + 1, j−1), Since it is lower than VS (i + 1, j + 1), the voltage application state to the liquid crystal layer is negative.
At time B in FIG. 3 corresponding to the next frame period, the reverse is true. In the S-TOP pixel structure, the voltage application state to the liquid crystal layer is negative, and in the C-TOP pixel structure, the voltage application state to the liquid crystal layer is Positive polarity.
Accordingly, the voltage application state to the liquid crystal layer is as shown in Table 2 as in the case of the modification of the first embodiment.
Since the polarity of the voltage applied to the liquid crystal layer can always be reversed in a checkered pattern in units of dots, the brightness of the flicker component caused by the DC voltage component, etc., which occurs for each pixel, is also in accordance with this. The arrangement is always reversed in a checkered pattern in dot units, and the apparent flicker can be suppressed by spatially canceling.

In this frame-by-frame inversion driving method, the same behavior as in the first embodiment is exhibited even when the same DC voltage component is superimposed on all the VCOM voltages. Therefore, in this embodiment, by adjusting the level of VCOM so as to minimize flicker, Vdc = 0 can be easily realized, and the afterimage phenomenon can be prevented.
Also, the VCOM voltage of the S-TOP pixel structure and the VCOM voltage of the C-TOP pixel structure are made variable independently. Even when the storage capacitor (Cst) and the pixel capacitor (Cpx) of the S-TOP pixel structure and the storage capacitor (Cst) and the pixel capacitor (Cpx) of the C-TOP pixel structure cannot be designed to be substantially equal, S Flicker can be suppressed by adjusting the VCOM voltage of the -TOP pixel structure and the VCOM voltage of the C-TOP pixel structure, respectively.
In this embodiment, an example of the voltage waveform of the inversion driving method for each frame that keeps the VCOM level constant has been shown. However, by alternating the VCOM for each frame period, the video voltage on the video line (DL) is changed. A common AC drive capable of reducing the amplitude can be used in combination. As a result, it is possible to achieve both a driving method with lower power consumption and flicker suppression.

[Modification 1 of Example 3]
The first modification of the third embodiment is a modification in which the column-inversion driving method is adopted in the liquid crystal display device of the third embodiment.
Since the relationship of the voltage application state to the liquid crystal layer between the pixels in the adjacent columns is opposite to that in the case of the inversion driving method for each frame in the third embodiment, in this modification, the pixels between the adjacent columns Then, the polarity of the voltage applied to the liquid crystal layer is the same. Therefore, since the polarity of the voltage applied to the liquid crystal layer is always reversed for each line, the light and darkness of the flicker component generated for each pixel is also reversed for each line accordingly, and spatially cancels. Thus, apparent flicker can be suppressed.
Further, in the liquid crystal display device according to the third embodiment, the inversion driving method for each line is adopted. Since the relationship of the voltage application state to the liquid crystal layer between the pixels on the adjacent lines is opposite to that in the case of the frame-by-frame inversion driving method in the third embodiment, in the present modification, between the pixels on the adjacent lines. The polarity of the voltage applied to the liquid crystal layer is the same. Accordingly, since the polarity of the voltage applied to the liquid crystal layer is always reversed for each column, the flicker components generated for each pixel are also reversed for each column accordingly, and spatially cancel each other. Thus, apparent flicker can be suppressed.
As described above, in either modification, the normal flicker component caused by the DC voltage component is spatially canceled between pixels in adjacent columns or pixels in adjacent lines, and apparent flicker is eliminated. There is an effect that can be suppressed.

[Modification 2 of Example 3]
FIG. 13 is a diagram illustrating a schematic structure of a pixel arrangement of a liquid crystal display panel in a liquid crystal display device according to a second modification of the third embodiment, and FIG. 14 is an equivalent circuit thereof.
In the second modification of the third embodiment, in the liquid crystal display panel of the third embodiment, a contact hole (THI2) is formed in a part of the interlayer insulating film in a region where the counter electrode (LCOM) and the counter electrode (UCOM) overlap, The counter electrode (LCOM) and the counter electrode (UCOM) are connected, and the rest is the same as in the third embodiment.
As a result, the counter electrode wiring (COM2) having the S-TOP pixel structure and the counter electrode wiring (COM1) having the C-TOP pixel structure have the same voltage, which is desirable in terms of reducing the resistance of the counter electrode wiring (COM).

[Modification 3 of Example 3]
In Example 3 and Modification Example 2 of Example 3, the counter electrodes of all S-TOP pixel structures are connected to each other, and the counter electrodes of all C-TOP pixel structures are connected to each other. Such a connection may be used.
(I-1) The counter electrodes of the S-TOP pixel structure of the line and (i) line are connected to each other, and the counter electrodes of the (i-1) line and (i) line of the C-TOP pixel structure are connected to each other. Are connected, the counter electrodes of the S-TOP pixel structure of the (i + 1) th line and the (i + 2) line are connected, and the counter electrodes of the C-TOP pixel structure of the (i + 1) line and the (i + 2) line are connected. Connected. . . Sum up every two lines.
Alternatively, the counter electrodes of the S-TOP pixel structure of the (i-1) th line and the (i) line are connected to each other, and the counter electrodes of the C-TOP pixel structure of the (i) line and the (i + 1) th line are connected. Are connected, the counter electrodes of the S-TOP pixel structure of the (i + 1) th line and the (i + 2) line are connected, and the counter electrodes of the C-TOP pixel structure of the (i + 2) line and the (i + 3) line are connected. Connected. . . Sum up every two lines.
Alternatively, the counter electrodes of the S-TOP pixel structure in the (j-1) th column and the (j) th column are connected, and the C-TOP pixel structure in the (j-1) th column and the (j) th column are opposed to each other. The electrodes are connected, the opposing electrodes of the (j + 1) th column and the (j + 2) th column of the S-TOP pixel structure are connected, and the (j + 1) th column and the (j + 2) th column of the C-TOP pixel structure are opposed to each other. Connect the electrodes together. . . Sum up every two columns as follows.
Alternatively, the counter electrodes having the S-TOP pixel structure in the (j-1) th column and the (j) th column are connected to each other, and the counter electrodes having the C-TOP pixel structure in the (j) th column and the (j + 1) th column are connected to each other. And the counter electrodes of the S-TOP pixel structure of the (j + 1) th column and the (j + 2) column are connected to each other, and the counter electrodes of the C-TOP pixel structure of the (j + 2) column and the (j + 3) column are connected to each other Connected. . . Sum up every two columns as follows.
Thereby, in the modification 3 of the present Example 3, since the load of the counter electrode anticipated from the external circuit can be reduced, it becomes easy to drive common AC.

[Example 4]
Example 4 and Examples 5 to 7 to be described later are examples relating to a cross-sectional structure of a pixel portion in a TFT type liquid crystal display device using a thin film transistor (TFT).
FIG. 15 is a schematic diagram showing a cross-sectional structure of a pixel portion of a liquid crystal display panel in a liquid crystal display device according to Embodiment 4 of the present invention.
A transparent conductive material such as ITO is formed on a first substrate (SUB1) made of a transparent insulating member such as a glass substrate, and is separated for each pixel in the S-TOP pixel structure by a photolithography process. It is processed into a counter electrode (LCOM) which is a planar lower electrode, and is processed into a pixel electrode (LPIX) which is a planar lower electrode separated for each pixel in the C-TOP pixel structure.
A metal material is formed, and a gate electrode (G), a scanning line (GL) (not shown), and a counter electrode wiring (COM) are simultaneously formed by a photolithography process. At this time, a part of the counter electrode wiring (COM) of the S-TOP pixel structure part is directly overlapped with a part of the counter electrode (LCOM) to electrically connect both, thereby reducing the resistance of the counter electrode as a whole. . This layer is called a gate layer.
A semiconductor comprising a gate insulating film (INS1) made of a transparent insulating material such as SiN, SiO, or TaO and an amorphous silicon (a-Si) covering the counter electrode (LCOM), the pixel electrode (LPIX), and the gate layer. A layer (ASI) is continuously formed, and only the semiconductor layer (ASI) is processed by a photolithography process. Note that a high-concentration n-type thin film (not shown) exists on the upper surface of the semiconductor layer (ASI).

A contact hole (TH1) of the gate insulating film (INS1) is formed in a part on the pixel electrode (LPIX) of the C-TOP pixel structure portion by a photolithography process.
A metal material is deposited, and a video line (DL) (not shown) having a shape extending in a direction intersecting the source electrode (S), the drain electrode (D), and the scanning line (GL) is simultaneously formed by a photolithography process. Form. This layer is called a drain layer.
At this time, the portion of the high-concentration n-type layer that is not covered with the drain layer is also removed simultaneously with the processing of the drain layer, and in the C-TOP pixel structure portion, the source electrode (S) and the pixel are connected via the contact hole (THI). Connect the electrode (LPIX).
Note that a thin film transistor (TFT) is constituted by the gate electrode (G), the gate insulating film (INS1) on the gate electrode (G), the semiconductor layer (ASI), the drain electrode (D), and the source electrode (S).
A passivation film (INS3) made of SiN is formed, and the gate insulating film (INS1) and the passivation film (INS3) are collectively processed by a photolithography process. Thus, a contact hole (THI) is formed in the passivation film (INS3) on the source electrode (S) of the thin film transistor (TFT) in the S-TOP pixel structure portion, and the counter electrode wiring (COM) in the C-TOP pixel structure portion. Contact holes (TH1) are formed in the upper gate insulating film (INS1) and the passivation film (INS3). Note that the contact hole (TH1) of the gate insulating film (INS1) and the passivation film (INS3) on the counter electrode wiring (COM) of the S-TOP pixel structure may be formed at the same time.

A pixel electrode which is a transparent electrode material such as ITO, and has a plurality of slit-like openings (SLTP) in the S-TOP pixel structure by a photolithography process, and is an upper layer electrode separated for each pixel (UPIX) processed into a counter electrode (UCOM) which is an upper layer electrode having a plurality of slit-shaped openings (SLTC) in the C-TOP pixel structure and at least a part of which is connected between adjacent pixels. did. In addition, the planar shape of the pixel electrode (UPIX) and the counter electrode (UCOM) is such that the comb tooth widths composed of linear portions are equal to each other, the comb tooth intervals are equal to each other, the number of comb teeth is equal to each other, and the number of comb tooth intervals is They are equal to each other, and the total length of the comb teeth is equal to each other.
Thus, in the S-TOP pixel structure portion, the pixel electrode (UPIX) and the source electrode (S) of the thin film transistor (TFT) are connected via the contact hole (THI) of the passivation film (INS3), and the C-TOP pixel structure. In this section, the counter electrode (UCOM) and the counter electrode wiring (COM) are connected through the contact hole (TH1) of the gate insulating film (INS1) and the passivation film (INS3).
Part of the counter electrode (LCOM) of the adjacent S-TOP pixel structure part and part of the counter electrode (UCOM) of the C-TOP pixel structure part are interposed via the gate insulating film (INS1) and the passivation film (INS3). Overlapping shape.
Note that the C-TOP pixel structure adjacent to each other through the contact hole (TH1) formed in the gate insulating film (INS1) and the passivation film (INS3) on the counter electrode wiring (COM) of the S-TOP pixel structure. The counter electrode (UCOM) may be connected to the counter electrode wiring (COM) of the S-TOP pixel structure.
In this manner, a TFT substrate having a cross-sectional structure as shown in FIG. 15 can be manufactured by using a total of seven photolithography processes.
A first alignment film (AL1) for aligning the liquid crystal layer (LC) in a predetermined direction is formed on the outermost surface of the first substrate (SUB1).

On the other hand, a light shielding film (BM), a color filter (FIL) of different colors for each pixel, a protective film (OC), and a second alignment film (AL2) are formed on the second substrate (SUB2) to form the counter substrate. Make it. The first alignment film (AL1) and the second alignment film (AL2) are each subjected to alignment treatment in a predetermined direction.
The first substrate (SUB1) and the second substrate (SUB2) are arranged so that the alignment film forming surfaces face each other at a constant interval, and the gap is filled with a nematic liquid crystal composition having positive dielectric anisotropy. The liquid crystal layer (LC).
In the S-TOP pixel structure, the first substrate is formed between the counter electrode (LCOM) and the pixel electrode (UPIX) by using the stacked body of the gate insulating film (INS1) and the passivation film (INS3) as an interlayer insulating film. The liquid crystal layer (LC) is operated by generating an electric field having a component parallel to the surface of (SUB1), and in the C-TOP pixel structure portion, the stacked body of the gate insulating film (INS1) and the passivation film (INS3) is formed as an interlayer. The liquid crystal layer (LC) is operated by generating an electric field having a component parallel to the surface of the first substrate (SUB1) between the pixel electrode (LPIX) and the counter electrode (UCOM).
Thus, the above-described electrode structure F is configured, and between the counter electrode (LCOM) and the pixel electrode (UPIX) of the S-TOP pixel structure portion and the pixel electrode (LPIX) of the C-TOP pixel structure portion. A pixel capacitor (Cpx) and a storage capacitor (Cst) were formed between the counter electrodes (UCOM).
A retardation plate and a polarizing plate (not shown) are arranged outside the first substrate (SUB1) and the second substrate (SUB2) to configure a normally black (NB) display mode liquid crystal display device.

In addition, a drive circuit (not shown) is connected to the scanning line (GL), the video line (DL), and the counter electrode wiring (COM).
Note that the stacking order of these layers may be reversed as long as the counter electrode (LCOM) and the counter electrode wiring (COM) of the S-TOP pixel structure portion can be electrically connected. Further, the counter electrode (LCOM) or the counter electrode wiring (COM) formed of the gate layer is submerged under the source electrode (S) of the thin film transistor (TFT), so that the thin film transistor (INS1) is interposed through the gate insulating film (INS1). A storage capacitor (Cst2) may be formed in a region overlapping the source electrode (S) of the TFT.
Further, the counter electrode (LCOM) of the S-TOP pixel structure portion does not need to be separated for each pixel, and the counter electrodes of the adjacent S-TOP pixel structure portions may be connected at least partially. Absent. If the wiring resistance of the counter electrode (LCOM) or the counter electrode (UCOM) is sufficiently small, the counter electrode wiring (COM) using the gate layer may not be formed.
In this embodiment, since an insulating film is not formed between the counter electrode (LCOM) and the gate layer, the counter electrode (LCOM) and the counter electrode wiring (COM) cannot be crossed with the scanning line (GL). , And so as to extend in a direction along the scanning line (GL).
Therefore, the cross-sectional structure of the pixel portion of the liquid crystal display panel according to the present embodiment can be applied to the pixel arrangement in the first embodiment and the modifications thereof. That is, according to the present embodiment, it is possible to realize a liquid crystal display device having the effects described in the first embodiment and the modifications thereof.

Note that the structures of the fourth embodiment and later-described embodiments 5 to 7 can also be applied to an IPS reflective or transflective liquid crystal display device.
In that case, a reflective electrode may be formed on a part of the counter electrode (LCOM) or the pixel electrode (LPIX) and used for the reflective display portion, and a liquid crystal layer thickness adjusting layer may be provided in the reflective display portion. In particular, it is desirable to use a part of the counter electrode wiring (COM) for the reflective electrode because the number of manufacturing steps is not increased.
Also, it can be applied to a liquid crystal display device of a type having both a normally black (NB) display mode IPS transmission display unit and a normally white (NW) display mode IPS reflection display unit in one pixel. It is.
In all the examples described later including this example, not only ITO but SnO, InZnO, ZnO or the like may be used as the transparent conductive material.
The thickness of each of the counter electrode (LCOM) and the pixel electrode (LPIX), and the pixel electrode (UPIX) and the counter electrode (UCOM) should be appropriate in terms of manufacturing yield, and should be selected in accordance with the optical design. Is desirable.
Further, metal materials such as Al, Cr, Cu, Mo, Nd, Ta, Ti, W, and Zr, and alloys thereof may be used for the gate layer, drain layer, and counter electrode wiring.

The gate insulating film, the passivation film, and the interlayer insulating film may be made of not only SiN but also SiO, TaO, or a laminate thereof, and some of them may be a photosensitive acrylic resin or the like. An organic insulating material may be used. Furthermore, the thickness of the gate insulating film, passivation film, and interlayer insulating film is appropriate in terms of manufacturing yield, characteristics and reliability as a thin film transistor (TFT) element and a liquid crystal display device, and appropriate in optical design. It is desirable to choose a correct value.
For the semiconductor layer, not only amorphous silicon but also polycrystalline silicon, organic semiconductor, crystalline silicon, or the like may be used.
The planar shape of the pixel electrode (UPIX) and the counter electrode (UCOM) is not limited to a shape having a plurality of slit-like openings parallel to each other, but may be a strip shape or a comb shape. Moreover, the electrode shape which can form a several different electric field direction so that it may change to a several domain from which orientation orientation differs at the time of the electric field application to a liquid crystal layer (LC) may be sufficient.
Further, the processing method for each layer is not limited to the photolithography process, and a printing method, an inkjet method, or the like may be used.
Further, the dielectric anisotropy of the liquid crystal composition to be used may be negative, and it is not necessarily limited to nematic liquid crystal depending on the display mode.

[Example 5]
FIG. 16 is a schematic diagram showing a cross-sectional structure of a pixel portion on the TFT substrate side of a liquid crystal display panel in a liquid crystal display device according to Embodiment 5 of the present invention. In FIG. 16 and FIGS. 17 to 21 to be described later, the first alignment film (AL1) and the counter substrate are not shown.
The difference from the fourth embodiment is that the counter electrode wiring (COM), the counter electrode (LCOM) which is the lower layer electrode of the S-TOP pixel structure portion, and the pixel electrode (LPIX) which is the lower layer electrode of the C-TOP pixel structure portion ) Is not formed under the gate insulating film (INS1) but between the gate insulating film (INS1) and the passivation film (INS3), the drain layer is used for the counter electrode wiring (COM), and only the passivation film (INS3) is formed. This constitutes an interlayer insulating film (INS4).
Thus, in this embodiment, a part of the counter electrode (LCOM) of the adjacent S-TOP pixel structure part and a part of the counter electrode (UCOM) of the C-TOP pixel structure part are only passed through the passivation film (INS3). Overlap. Further, in the C-TOP pixel structure portion, the pixel electrode (LPIX) and the source electrode (S) of the thin film transistor (TFT) can be directly connected by the overlapping portion therebetween, so that after the semiconductor layer (ASI) processing, C- It is not necessary to form a contact hole (THI) for connecting the pixel electrode (LPIX) and the source electrode (S) of the thin film transistor (TFT) in part of the gate insulating film (INS1) of the TOP pixel structure portion.
In addition, an opening to the scanning line (GL) can be provided by batch processing of the gate insulating film (INS1) and the passivation film (INS3) in the peripheral portion of the screen and the terminal portion (not shown).
Therefore, a TFT substrate having a cross-sectional structure as shown in FIG. 16 can be manufactured by using a total of six photolithography processes. That is, according to the fifth embodiment, there is an advantage that the manufacturing process of the TFT substrate can be shortened by one process compared to the fourth embodiment.

Further, the area that can be used for display is increased as much as it is not necessary to provide the contact hole (THI) in the C-TOP pixel structure, and the aperture ratio can be improved.
In addition, since the interlayer insulating film (INS4) can be formed only of the passivation film (INS3), the film thickness of the interlayer insulating film (INS4) can be made thinner than that in the fourth embodiment, and the pixel electrode ( The use efficiency of light as a display mode can be enhanced by optimizing the comb tooth width and the comb tooth interval of the UPIX) and the counter electrode (UCOM).
At the same time, the capacitance per unit area of the insulating film constituting the storage capacitor (Cst) between the lower layer electrode and the upper layer electrode of each pixel increases, so that even a pixel having a smaller pixel size is sufficiently large. This makes it easier to form a storage capacitor.
The counter electrode (LCOM) and the counter electrode wiring (COM) of the S-TOP pixel structure portion can be electrically connected, and the pixel electrode (LPIX) of the C-TOP pixel structure portion and the source electrode (S) of the thin film transistor (TFT) ) Can be electrically connected, the stacking order of these layers may be reversed.
Further, the counter electrode (LCOM) of the S-TOP pixel structure portion does not need to be separated for each pixel, and the counter electrodes of the adjacent S-TOP pixel structure portions may be connected at least partially. Absent. If the wiring resistance of the counter electrode (LCOM) or the counter electrode (UCOM) is sufficiently small, the counter electrode wiring (COM) by the drain layer may not be formed.
In this embodiment, since an insulating film is not formed between the counter electrode (LCOM) and the drain layer, the counter electrode (LCOM) and the counter electrode wiring (COM) cannot be crossed with the video line (DL). , And so as to extend in the direction along the video line (DL).
Therefore, the TFT substrate according to the present embodiment can be applied to the pixel arrangement in the above-described embodiment 2 and its modifications. That is, according to the present embodiment, it is possible to realize a liquid crystal display device having the effects shown in the second embodiment and its modification.

[Example 6]
In the above-described Example 4 and Example 5, since the material and film thickness of the gate insulating film (INS1) and the passivation film (INS3) are limited in terms of characteristics and reliability of the thin film transistor (TFT), the planar shape This limitation also appears in an insulating film used as an interlayer insulating film disposed between the lower electrode of the first electrode and the upper electrode having a linear portion.
However, in the sixth embodiment, the counter electrode wiring (COM) on the passivation film (INS3), the counter electrode (LCOM) which is the lower electrode of the S-TOP pixel structure portion, and the lower electrode of the C-TOP pixel structure portion. A certain pixel electrode (LPIX) was transferred, and a dedicated insulating film was used as an interlayer insulating film (INS4) on these layers.
FIG. 17 is a schematic diagram showing a cross-sectional structure of the pixel portion on the TFT substrate side of the liquid crystal display panel in the liquid crystal display device according to Embodiment 6 of the present invention.
A metal material is formed on a first substrate (SUB1) made of a transparent insulating member such as a glass substrate, and a gate electrode (G) and a scanning line (GL) (not shown) are simultaneously formed by a photolithography process. . This layer is called a gate layer.
Covering the gate layer, a gate insulating film (INS1) made of a transparent insulating material such as SiN, SiO, or TaO and a semiconductor layer (ASI) made of amorphous silicon (a-Si) are continuously formed to form a semiconductor layer Only (ASI) is processed by a photolithography process. Note that a high-concentration n-type thin film (not shown) exists on the upper surface of the semiconductor layer (ASI).

A video line (DL) having a shape extending in a direction intersecting with the source electrode (S), the drain electrode (D), and the scanning line (GL) of the thin film transistor (TFT) by a photolithography process by forming a metal material. N) at the same time. This layer is called a drain layer. At this time, the portion of the high-concentration n-type layer not covered with the drain layer is also removed simultaneously with the processing of the drain layer.
Note that a thin film transistor (TFT) is formed by the gate electrode (G) and the gate insulating film (INS1) over the gate electrode (G), the semiconductor layer (ASI), the drain electrode (D), and the source electrode (S).
A passivation film (INS3) made of SiN is formed, and the gate insulating film (INS1) and the passivation film (INS3) are collectively processed by a photolithography process. This makes contact with the passivation film (INS3) on the source electrode (S) of the thin film transistor (TFT) in the S-TOP pixel structure and on the source electrode (S) of the thin film transistor (TFT) in the C-TOP pixel structure. A hole (TH1) is formed.
An opening to the scanning line (GL) formed of the gate layer can be provided by processing the gate insulating film (INS1) and the passivation film (INS3) at the periphery of the screen and the terminal portion (not shown).
Note that the contact hole (TH1) of the passivation film (INS3) in the S-TOP pixel structure may be formed during the processing of an interlayer insulating film (INS4) described later.

A transparent conductive material such as ITO is formed, processed into a counter electrode (LCOM), which is a planar lower electrode in the S-TOP pixel structure, by a photolithography process, and each pixel is formed in the C-TOP pixel structure. Each pixel electrode is processed into a pixel electrode (LPIX) which is a planar lower layer electrode.
At this time, in the S-TOP pixel structure, the counter electrode (LCOM) has an opening (THC) that is separated from the contact hole (TH1) by at least the minimum insulation distance, and at least between adjacent S-TOP pixel structures. Partly connected shape.
On the other hand, in the C-TOP pixel structure portion, the source electrode (S) of the thin film transistor (TFT) and the pixel electrode (LPIX) are connected through a contact hole (THI).
A metal material is formed and a counter electrode wiring (COM) is formed by a photolithography process, and a part of the counter electrode wiring (COM) of the S-TOP pixel structure is directly overlapped with a part of the counter electrode (LCOM). Thus, the two are electrically connected to reduce the resistance of the counter electrode as a whole.
An interlayer insulating film (INS4) made of SiN is formed, and an interlayer insulating film (INS4) on the source electrode (S) of the counter electrode wiring (COM) or the thin film transistor (TFT) of the S-TOP pixel structure portion by a photolithography process. A contact hole (THI) is formed in the substrate. As described above, the contact hole (THI) of the passivation film (INS3) in the S-TOP pixel structure may be formed at the same time.

A pixel electrode which is a transparent electrode material such as ITO, and has a plurality of slit-like openings (SLTP) in the S-TOP pixel structure by a photolithography process, and is an upper layer electrode separated for each pixel (UPIX) and processed into a counter electrode (UCOM) which is an upper layer electrode having a plurality of slit openings (SLTC) in the C-TOP pixel structure. In addition, the planar shape of the pixel electrode (UPIX) and the counter electrode (UCOM) is such that the comb tooth widths composed of linear portions are equal to each other, the comb tooth intervals are equal to each other, the number of comb teeth is equal to each other, and the number of comb tooth intervals is They are equal to each other, and the total length of the comb teeth is equal to each other.
At this time, in the S-TOP pixel structure portion, the pixel electrode (UPIX) and the source electrode (S) of the thin film transistor (TFT) are connected through the contact hole (THI) of the passivation film (INS3) and the interlayer insulating film (INS4). .
On the other hand, in the C-TOP pixel structure portion, the counter electrode (UCOM) and the counter electrode wiring (COM) are connected through the opening of the interlayer insulating film (INS4), and the counter electrode (UCOM) is an adjacent C-TOP pixel. It is set as the shape which at least one part connected with structure parts.
In addition, a part of the counter electrode (LCOM) of the adjacent S-TOP pixel structure part and a part of the counter electrode (UCOM) of the C-TOP pixel structure part overlap each other through the interlayer insulating film (INS4). Yes.
Here, the scanning line (GL), the video line (DL), and the thin film transistor (TFT) are at least partially covered by the counter electrodes (UCOM, LCOM) and the counter electrode wiring (COM), but the passivation film (INS3) And the counter electrode (UCOM) having a structure through two layers of the interlayer insulating film (INS4) is desirable in terms of reducing parasitic capacitance.
Note that the counter electrode (UCOM) of the adjacent C-TOP pixel structure portion is connected to the S-TOP through an opening provided in the interlayer insulating film (INS4) on the counter electrode wiring (COM) of the S-TOP pixel structure portion. You may connect to the counter electrode wiring (COM) of a pixel structure part.
In this way, a TFT substrate having a cross-sectional structure as shown in FIG. 17 can be manufactured by using a total of eight photolithography processes.
A first alignment film (not shown) for aligning a liquid crystal layer (not shown) in a predetermined direction is formed on the outermost surface of the TFT substrate.

On the other hand, a counter substrate (not shown) is manufactured by forming a light shielding film, a plurality of color filters different for each pixel, a protective film, and a second alignment film on the second substrate. The first alignment film and the second alignment film are each subjected to alignment treatment in a predetermined direction.
The first substrate (SUB1) and the second substrate are arranged so that the alignment film forming surfaces face each other at a constant interval, and a liquid crystal layer is filled with a nematic liquid crystal composition having positive dielectric anisotropy in the gap. And
In the S-TOP pixel structure, an electric field having a component parallel to the surface of the first substrate (SUB1) is generated between the counter electrode (LCOM) and the pixel electrode (UPIX) via the interlayer insulating film (INS4). The liquid crystal layer is operated, and in the C-TOP pixel structure portion, a component parallel to the surface of the first substrate (SUB1) is provided between the pixel electrode (LPIX) and the counter electrode (UCOM) via the interlayer insulating film (INS4). The liquid crystal layer is operated by generating an electric field.
Thus, the above-described electrode structure F is configured, and between the counter electrode (LCOM) and the pixel electrode (UPIX) of the S-TOP pixel structure portion and the pixel electrode (LPIX) of the C-TOP pixel structure portion. A pixel capacitor (Cpx) and a storage capacitor (Cst) were formed between the counter electrodes (UCOM).
A phase difference plate and a polarizing plate (not shown) are arranged outside the first substrate (SUB1) and the second substrate to constitute a normally black (NB) display mode liquid crystal display device. In addition, a drive circuit (not shown) is connected to the scanning line (GL), the video line (DL), and the counter electrode wiring (COM).

Note that the stacking order of these layers may be reversed as long as the counter electrode (LCOM) and the counter electrode wiring (COM) of the S-TOP pixel structure portion can be electrically connected. If the wiring resistance of the counter electrodes (LCOM, UCOM) is sufficiently small, the counter electrode wiring (COM) may not be formed. In this case, there is an advantage that the manufacturing process of the TFT substrate can be shortened by one process.
In this embodiment, the gate insulating film (INS1) and the passivation film (INS3) constituting the thin film transistor (TFT) need not be used as the interlayer insulating film (INS4). Therefore, the material for the interlayer insulating film (INS4), the film thickness, and the like are not easily restricted, and the degree of freedom in design can be easily increased.
Therefore, the film thickness of the interlayer insulating film (INS4) can be further reduced and the dielectric constant can be increased as compared with the case of Example 4 described above, and the comb tooth width of the pixel electrode (UPIX) and the counter electrode (UCOM). In addition, the use efficiency of light as a display mode can be enhanced by optimizing the interval between the comb teeth.
At the same time, the capacitance per unit area of the insulating film constituting the storage capacitor (Cst) between the lower layer electrode and the upper layer electrode of each pixel increases, so that even a pixel having a smaller pixel size is sufficiently large. This makes it easier to form a storage capacitor.

In this embodiment, since the counter electrode (LCOM) and the counter electrode wiring (COM) can be insulated from the gate layer and the drain layer by the interlayer insulating film (INS4), they are crossed with the scanning line (GL) and the video line (DL). The counter electrode wiring (COM) is formed so as to extend in the direction along the scanning line (GL) or in the direction along the video line (DL), or is formed so that the same kind of pixels are obliquely connected to each other. You can do it.
Therefore, the TFT substrate according to the present embodiment can be applied to the pixel arrangements in the first to third embodiments and their modifications. That is, according to the present embodiment, it is possible to realize a liquid crystal display device having the effects shown in the first to third embodiments and their modifications.
Further, since the counter electrode wiring (COM) is not a gate layer or a drain layer but an independent layer above the passivation film (INS3), the counter electrode wiring (COM) can be used as a scanning line (GL), a video line (DL), The aperture ratio can be easily improved by using a self-shielding film in a shape overlapping with a thin film transistor (TFT).
Since the counter electrode (UCOM, LCOM) and the counter electrode wiring (COM) at least partially cover the scan line (GL), the video line (DL), and the thin film transistor (TFT), the scan line (GL), the video line (DL) ), An electric field leaking from the thin film transistor (TFT) to the liquid crystal layer (LC) can be blocked.
As a result, an unintended operation of the liquid crystal layer due to a leakage electric field does not occur, so that image quality deterioration can be prevented without arranging a light shielding film in this region, and a bright display can be realized by improving the aperture ratio. Can do.

[Modification of Example 6]
FIG. 18 is a schematic diagram showing a cross-sectional structure of a pixel portion on the TFT substrate side of a liquid crystal display panel in a liquid crystal display device according to a modification of Example 6 of the present invention.
The difference from Example 6 is that an organic film (FPS) made of a transparent insulating material such as a photosensitive acrylic resin is provided between the passivation film (INS3), the counter electrode (LCOM), and the pixel electrode (LPIX). It is a point.
By forming the organic film (FPS) so as to avoid the contact hole (THI) of the passivation film (INS3) on the source electrode (S) of the thin film transistor (TFT), the counter electrode (LCOM), the pixel electrode (LPIX), Parasitic capacitance between the pixel electrode (UPIX) and the counter electrode (UCOM) and the scanning line (GL) and the video line (DL) can be reduced, and the pixel surface can be flattened.
The number of TFT substrate manufacturing steps increases by the formation of the organic film (FPS) layer. However, since the parasitic capacitance can be reduced by providing the organic film (FPS), the image quality can be reduced without increasing the storage capacitance (Cst). It becomes easy to prevent deterioration.
At the same time, since the scanning line (GL), the video line (DL), and the thin film transistor (TFT) can be covered with either of the counter electrodes (UCOM, LCOM), the degree of design freedom is higher than in the case of the sixth embodiment. It spreads and more effectively shields the leakage electric field from the scanning line (GL), the video line (DL), and the thin film transistor (TFT) to the liquid crystal layer, thereby making it easy to prevent image quality deterioration. Such an effect is common to Example 7 described later.

FIG. 21 is a schematic diagram of a cross-sectional structure of a boundary portion between an S-TOP pixel structure portion and a C-TOP pixel structure portion on the TFT substrate side of a liquid crystal display panel in a liquid crystal display device according to a modification of the sixth embodiment of the present invention. .
Through the interlayer insulating film (INS4), the pixel electrode (UPIX) of the S-TOP pixel structure overlaps with the end of the opening of the counter electrode (LCOM), and the C-TOP pixel passes through the interlayer insulating film (INS4). The structure is such that the end of the counter electrode (UCOM) of the structure portion overlaps the end of the pixel electrode (LPIX) or the end of the counter electrode (LCOM) of the adjacent S-TOP pixel structure portion.
Thus, the uppermost pixel electrode (UPIX) and counter electrode (UCOM) can apply an electric field to the liquid crystal layer above the TFT substrate, and the counter electrode (LCOM) in the gap between them when viewed in plan. Since only the pixel electrode (LPIX) is provided, the counter electrode (UCOM), counter electrode (LCOM), etc. shield the electric field leaking from the lower scanning line (GL), video line (DL), and thin film transistor (TFT) to the liquid crystal layer. can do. Such an effect is common to Examples 4-7.
In addition, by forming a minute uneven structure on at least a part of an organic film (FPS) in a display area within one pixel and forming a reflective electrode in accordance with the unevenness, It can be applied to a reflective liquid crystal display device.
A part of the counter electrode wiring (COM) can be used as a reflective electrode, but a reflective electrode may be provided separately from the counter electrode wiring (COM). Further, a liquid crystal layer thickness adjusting layer may be provided in the reflective display portion.
Moreover, you may provide the color filter of different colors for every pixel instead of an organic film (FPS). In this case, a color filter is not necessarily required on the second substrate side.

[Example 7]
Example 7 is an example in which polycrystalline silicon (p-Si) is used as a semiconductor layer of a thin film transistor (TFT).
FIG. 19 is a schematic diagram showing a cross-sectional structure of a pixel portion on the TFT substrate side of a liquid crystal display panel in a liquid crystal display device according to Embodiment 7 of the present invention.
A semiconductor layer (PSI) made of polycrystalline silicon is formed on a first substrate (SUB1) made of a transparent insulating member such as a glass substrate, and processed for each pixel by a photolithography process. Ion implantation or the like may be performed on the drain region and the source region of the semiconductor layer (PSI).
A gate insulating film (INS1) made of a transparent insulating material such as SiN, SiO, or TaO and a gate layer made of a metal material are continuously formed, and only the gate layer (G) and scanning line ( GL) (not shown).
A second insulating film (INS2) made of a transparent insulating material such as SiN, SiO, or TaO is formed, and the gate insulating film (INS1) and the second insulating film are formed on the drain region and the source region of the semiconductor layer (PSI) by a photolithography process. 2 Opening (CONT) of insulating film (INS2) is formed.
A video line (DL) having a shape extending in a direction intersecting with the source electrode (S), the drain electrode (D), and the scanning line (GL) of the thin film transistor (TFT) by a photolithography process by forming a metal material. At the same time. This layer is called a drain layer.
At this time, the drain region and drain electrode (D) of the semiconductor layer (PSI) and the source region of the semiconductor layer (PSI) through the opening (CONT) of the gate insulating film (INS1) and the second insulating film (INS2). And the source electrode (S) are respectively connected.
The semiconductor layer (PSI) and the gate insulating film (INS1), the gate electrode (G), the second insulating film (INS2), the drain electrode (D), and the source electrode (S) on the semiconductor layer (PSI) are thin film transistors. (TFT) is configured.

A passivation film (INS3) made of SiN and an organic film (FPS) made of a transparent insulating material such as a photosensitive acrylic resin are continuously formed, and a second insulating film (INS2) and a passivation film (INS3) are formed by a photolithography process. And organic film (FPS) are batch processed.
As a result, the passivation film (INS3) and the organic film on the source electrode (S) of the thin film transistor (TFT) in the S-TOP pixel structure and on the source electrode (S) of the thin film transistor (TFT) in the C-TOP pixel structure. Contact holes (THI) are formed in the film (FPS). Note that the organic film (FPS) may be processed in a separate process as long as the second insulating film (INS2) and the passivation film (INS3) can be processed collectively.
An opening to the scanning line (GL) made of the gate layer can be provided by batch processing of the second insulating film (INS2) and the passivation film (INS3) in the peripheral portion of the screen and the terminal portion (not shown).
A transparent conductive material such as ITO is formed, processed into a counter electrode (LCOM), which is a planar lower electrode in the S-TOP pixel structure, by a photolithography process, and each pixel is formed in the C-TOP pixel structure. Each pixel electrode is processed into a pixel electrode (LPIX) which is a planar lower layer electrode.
At this time, in the S-TOP pixel structure, the counter electrode (LCOM) has an opening (THC) that is separated from the contact hole (THI) by at least the minimum insulation distance, and at least between adjacent S-TOP pixel structures. A partially connected shape.

On the other hand, in the C-TOP pixel structure portion, the source electrode (S) of the thin film transistor (TFT) and the pixel electrode (LPIX) are connected through a contact hole (THI).
A metal material is formed and a counter electrode wiring (COM) is formed by a photolithography process, and a part of the counter electrode wiring (COM) of the S-TOP pixel structure is directly overlapped with a part of the counter electrode (LCOM). Thus, the two are electrically connected to reduce the resistance of the counter electrode as a whole.
An interlayer insulating film (INS4) made of SiN is formed, and an interlayer insulating film (INS4) on the source electrode (S) of the counter electrode wiring (COM) or the thin film transistor (TFT) of the S-TOP pixel structure portion by a photolithography process. Contact holes (THI, TH1) are formed in
A pixel electrode which is a transparent electrode material such as ITO, and has a plurality of slit-like openings (SLTP) in the S-TOP pixel structure by a photolithography process, and is an upper layer electrode separated for each pixel (UPIX) and processed into a counter electrode (UCOM) which is an upper layer electrode having a plurality of slit openings (SLTC) in the C-TOP pixel structure. In addition, the planar shape of the pixel electrode (UPIX) and the counter electrode (UCOM) is such that the comb tooth widths composed of linear portions are equal to each other, the comb tooth intervals are equal to each other, the number of comb teeth is equal to each other, and the number of comb tooth intervals is They are equal to each other, and the total length of the comb teeth is equal to each other.
At this time, in the S-TOP pixel structure portion, the pixel electrode (UPIX) and the source of the thin film transistor (TFT) via the contact hole (THI) of the passivation film (INS3), the organic film (FPS), and the interlayer insulating film (INS4). Connect the electrode (S).
On the other hand, in the C-TOP pixel structure portion, the counter electrode (UCOM) and the counter electrode wiring (COM) are connected through the opening of the interlayer insulating film (INS4), and the counter electrode (UCOM) is an adjacent C-TOP pixel. It is set as the shape which at least one part connected with structure parts.

Further, a part of the counter electrode (LCOM) of the adjacent S-TOP pixel structure part and a part of the counter electrode (UCOM) of the C-TOP pixel structure part are overlapped with each other through the interlayer insulating film (INS4).
As in the case of the modification of the above-described sixth embodiment, scanning with the counter electrode (LCOM), the pixel electrode (LPIX), the pixel electrode (UPIX), the counter electrode (UCOM), etc. is performed by using the organic film (FPS). Since the parasitic capacitance between the line (GL) and the video line (DL) can be reduced, the scanning electrode (GL), the video line (DL), the counter electrode (UCOM, LCOM), and the counter electrode wiring (COM) The thin film transistor (TFT) can be shaped to at least partially cover.
Note that the counter electrode (UCOM) of the adjacent C-TOP pixel structure portion is connected to the S-TOP through an opening provided in the interlayer insulating film (INS4) on the counter electrode wiring (COM) of the S-TOP pixel structure portion. You may connect to the counter electrode wiring (COM) of a pixel structure part.
In this way, a TFT substrate having a cross-sectional structure as shown in FIG. 19 can be manufactured by using a total of nine photolithography processes.
A first alignment film (not shown) for aligning the liquid crystal layer in a predetermined direction was formed on the outermost surface of the TFT substrate.

On the other hand, a counter substrate is produced by forming a light shielding film, a plurality of color filters different in color for each pixel, a protective film, and a second alignment film on the second substrate (not shown). The first alignment film and the second alignment film are each subjected to alignment treatment in a predetermined direction.
The first substrate (SUB1) and the second substrate are arranged so that the alignment film forming surfaces face each other at a constant interval, and a liquid crystal layer is filled with a nematic liquid crystal composition having positive dielectric anisotropy in the gap. And
In the S-TOP pixel structure, an electric field having a component parallel to the surface of the first substrate (SUB1) is generated between the counter electrode (LCOM) and the pixel electrode (UPIX) via the interlayer insulating film (INS4). The liquid crystal layer is operated, and in the C-TOP pixel structure portion, a component parallel to the surface of the first substrate (SUB1) is provided between the pixel electrode (LPIX) and the counter electrode (UCOM) via the interlayer insulating film (INS4). The liquid crystal layer can be operated by generating an electric field.
Thus, the above-described electrode structure F is configured, and between the counter electrode (LCOM) and the pixel electrode (UPIX) of the S-TOP pixel structure portion and the pixel electrode (LPIX) of the C-TOP pixel structure portion. A pixel capacitor (Cpx) and a storage capacitor (Cst) are formed between the counter electrodes (UCOM).
A phase difference plate and a polarizing plate (not shown) are arranged outside the first substrate (SUB1) and the second substrate to constitute a normally black (NB) display mode liquid crystal display device.
In addition, a drive circuit (not shown) is connected to the scanning line (GL), the video line (DL), and the counter electrode wiring (COM).

As in the case of the above-described Examples 4 to 6, as long as the counter electrode (LCOM) and the counter electrode wiring (COM) can be electrically connected, the stacking order of these layers may be reversed.
If the wiring resistance of the counter electrodes (LCOM, UCOM) is sufficiently small, the counter electrode wiring (COM) may not be formed. In this case, there is an advantage that the manufacturing process of the TFT substrate can be shortened by one process.
Further, as in the case of Example 6 described above, the gate insulating film (INS1), the second insulating film (INS2), the passivation film (INS3), and the like constituting the thin film transistor (TFT) are used as the interlayer insulating film (INS4). Therefore, it is difficult to be restricted by the material and film thickness for the interlayer insulating film (INS4) in terms of the characteristics and reliability of the thin film transistor (TFT), and it is easy to widen the degree of design freedom.
Accordingly, the thickness of the interlayer insulating film (INS4) can be reduced and the dielectric constant can be increased, and the display mode can be optimized by optimizing the comb-teeth width and inter-comb spacing between the pixel electrode (UPIX) and the counter electrode (UCOM). As a result, the light utilization efficiency can be increased.
At the same time, the capacitance per unit area of the insulating film constituting the storage capacitor (Cst) between the lower layer electrode and the upper layer electrode of each pixel increases, so that even a pixel having a smaller pixel size is sufficiently large. This makes it easier to form a storage capacitor.

Further, as in the case of the above-described sixth embodiment, the counter electrode (LCOM) and the counter electrode wiring (COM) can be insulated from the gate layer and the drain layer by the interlayer insulating film (INS4). It is possible to cross the line (DL), and the counter electrode wiring (COM) is formed so as to extend in the direction along the scanning line (GL) or in the direction along the video line (DL), or the same kind of diagonally up and down For example, the pixels can be connected to each other.
Therefore, the TFT substrate according to the present embodiment can be applied to the pixel arrangements in the first to third embodiments and their modifications. That is, according to the present embodiment, it is possible to realize a liquid crystal display device having the effects shown in the first to third embodiments and their modifications.
Further, since the counter electrode wiring (COM) is not a gate layer or a drain layer but an upper layer of the passivation film (INS3), the aperture ratio can be easily improved by using the counter electrode wiring (COM) as a self-shielding film.
Since the counter electrode (UCOM, LCOM) and the counter electrode wiring (COM) at least partially cover the scanning line (GL), the video line (DL), and the thin film transistor (TFT), the scanning line (GL) and the video line (DL) The electric field leaking from the thin film transistor (TFT) to the liquid crystal layer can be shielded.

As a result, an unintended operation of the liquid crystal layer due to a leakage electric field does not occur, so that image quality deterioration can be prevented without arranging a light shielding film in this region, and a bright display can be realized by improving the aperture ratio. Can do.
Further, as in the case of the modification of the above-described sixth embodiment, a minute uneven structure is formed on at least a part of the organic film (FPS) in the display region in one pixel, and a reflective electrode is formed in accordance with the unevenness. By doing so, it can be applied to a transflective or reflective liquid crystal display device having an internal diffuse reflection structure.
A part of the counter electrode wiring (COM) can be used as a reflective electrode, but a reflective electrode may be provided separately from the counter electrode wiring (COM). Further, a liquid crystal layer thickness adjusting layer may be provided in the reflective display portion.
Further, similarly to the modification of the above-described sixth embodiment, a plurality of different color filters may be provided for each pixel instead of the organic film (FPS). In this case, a color filter is not necessarily required on the second substrate side.

[Modification of Example 7]
FIG. 20 is a schematic diagram showing a cross-sectional structure of a pixel portion on the TFT substrate side of a liquid crystal display panel in a liquid crystal display device according to a modification of Example 7 of the present invention.
The difference from the seventh embodiment is that a counter electrode wiring (COM) for the counter electrode (UCOM) is provided between the interlayer insulating film (INS4) and the counter electrode (UCOM), and the counter electrode (UCOM) and the counter electrode are arranged. The counter electrode wiring (COM) for (UCOM) is directly connected to each other by directly overlapping them, and the counter electrode wiring (COM) on the counter electrode (LCOM) and the counter electrode (UCOM) are not connected. is there.
In the present embodiment, the number of steps for manufacturing the TFT substrate is increased by one step compared to the above-described seventh embodiment. With this configuration, the counter electrode (UCOM) and the counter electrode wiring (COM) for the counter electrode (LCOM) are connected. Therefore, it is not necessary to form an opening of the interlayer insulating film (INS4). The area that can be used for display increases accordingly, and the aperture ratio can be improved.
In addition, the counter electrode (LCOM) of the S-TOP pixel structure and the counter electrode (UCOM) of the C-TOP pixel structure can be easily controlled independently.
Note that the stacking order of these layers may be reversed as long as the counter electrode (UCOM) and the counter electrode wiring (COM) of the C-TOP pixel structure portion can be electrically connected. If the wiring resistance of the counter electrode (LCOM) or the counter electrode (UCOM) is sufficiently small, the counter electrode wiring (COM) may not be formed. In this case, there is an advantage that the manufacturing process of the TFT substrate can be shortened.

In the second and third embodiments, the two-line simultaneous inversion driving method can be performed.
In the first and second embodiments, the pair of the adjacent S-TOP pixel structure portion and the C-TOP pixel structure portion shares the counter electrode wiring (COM), and for each counter electrode wiring (COM). It is also possible to perform common AC drive. As a result, it is possible to reduce the alternating frequency of the video voltage on the video line (DL) and the voltage VCOM of the counter electrode (COM) to suppress an increase in power consumption.
In each of the above-described embodiments, a retardation plate may be added if necessary to realize a desired display mode, and conversely, it may be removed if unnecessary. Moreover, you may comprise so that a phase difference plate and a polarizing plate may be arrange | positioned not only outside the 1st board | substrate and 2nd board | substrate but inside.
Furthermore, columnar spacers may be arranged on at least one of the opposing surfaces of the first substrate side and the second substrate side. As a result, the thickness of the liquid crystal layer can be made uniform in the surface of the liquid crystal display device.
Needless to say, the entire liquid crystal display device is provided with a backlight on the side opposite to the display surface.
As mentioned above, the invention made by the present inventor has been specifically described based on the above embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Of course.

It is a figure which shows schematic structure of the pixel arrangement | sequence of the liquid crystal display panel in the liquid crystal display device of Example 1 of this invention. It is a circuit diagram which shows the equivalent circuit of the liquid crystal display panel of Example 1 of this invention. In the liquid crystal display devices of Examples 1 to 7 of the present invention, it is a schematic diagram showing a driving voltage waveform when an inversion driving method for each frame is adopted. FIG. 4 is a schematic diagram showing a drive voltage waveform when a DC voltage component is superimposed in the frame-by-frame inversion drive method shown in FIG. 3. FIG. 6 is a diagram for explaining a distribution of a VCOM voltage and a VS voltage in each pixel when a column-inversion driving method is employed in the liquid crystal display device according to the first embodiment of the present invention. It is a figure which shows schematic structure of the pixel arrangement | sequence of the liquid crystal display panel in the liquid crystal display device of Example 2 of this invention. It is a circuit diagram which shows the equivalent circuit of the liquid crystal display panel of Example 2 of this invention. FIG. 6 is a diagram for explaining a distribution of a VCOM voltage and a VS voltage in each pixel when an inversion driving method for each frame is employed in the liquid crystal display device according to the second embodiment of the present invention. In the liquid crystal display device of Example 2 of this invention, it is a schematic diagram which shows the drive voltage waveform at the time of employ | adopting the inversion drive method for every line. It is a figure which shows schematic structure of the pixel arrangement | sequence of the liquid crystal display panel in the liquid crystal display device of Example 3 of this invention. It is a circuit diagram which shows the equivalent circuit of the liquid crystal display panel of Example 3 of this invention. It is a figure explaining the distribution of the voltage of VCOM and the voltage of VS in each pixel at the time of employ | adopting the inversion drive method for every frame in the liquid crystal display device of Example 3 of this invention. It is a figure which shows schematic structure of the pixel arrangement | sequence of the liquid crystal display panel in the liquid crystal display device of the modification of Example 3 of this invention. It is a circuit diagram which shows the equivalent circuit of the liquid crystal display panel of the modification of Example 3 of this invention. It is a schematic diagram which shows the pixel part cross-section of the liquid crystal display panel in the liquid crystal display device of Example 4 of this invention. It is a schematic diagram which shows the pixel part sectional structure by the side of the TFT substrate of the liquid crystal display panel in the liquid crystal display device of Example 5 of this invention. It is a schematic diagram which shows the pixel part sectional structure by the side of the TFT substrate of the liquid crystal display panel in the liquid crystal display device of Example 6 of this invention. It is a schematic diagram which shows the pixel part cross-section of the TFT substrate side of the liquid crystal display panel in the liquid crystal display device of the modification of Example 6 of this invention. It is a schematic diagram which shows the pixel part cross-section of the TFT substrate side of the liquid crystal display panel in the liquid crystal display device of Example 7 of this invention. It is a schematic diagram which shows the pixel part cross-section of the TFT substrate side of the liquid crystal display panel in the liquid crystal display device of the modification of Example 7 of this invention. It is a schematic diagram of the cross-sectional structure of the boundary part of the S-TOP pixel structure part by the side of the TFT substrate of a liquid crystal display panel and the C-TOP pixel structure part in the liquid crystal display device of the modification of Example 6 of this invention.

Explanation of symbols

SUB1 First substrate SUB2 Second substrate GL Scan line DL Video line TFT Thin film transistor G Gate electrode D Drain electrode S Source electrode ASI, PSI Semiconductor layer INS1 Gate insulation film INS2 Second insulation film INS3 Passivation film INS4 Interlayer insulation film FPS Organic film LPIX , UPIX pixel electrode LCOM, UCOM counter electrode SLTC, SLTP slit-shaped opening COM counter electrode wiring THC, CONT opening THI, THI2, TH1 contact hole BM light shielding film FIL color filter AL1 first alignment film AL2 second alignment film OC Protective film Cst Retention capacitance Cpx Pixel capacitance

Claims (48)

A liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate;
The liquid crystal display panel includes a plurality of pixels each having a pixel A and a pixel B;
A liquid crystal display device having a plurality of scanning lines for inputting a scanning voltage to the plurality of pixels,
The pixel A includes a planar counter electrode A provided on a first substrate,
An interlayer insulating film provided above the planar counter electrode A;
A pixel electrode A provided in an upper layer than the interlayer insulating film and having a linear portion;
The pixel B includes a planar pixel electrode B provided on a first substrate;
An interlayer insulating film provided in an upper layer than the planar pixel electrode B;
A counter electrode B provided in a layer above the interlayer insulating film and having a linear portion;
The liquid crystal display panel includes a row A composed of a plurality of the pixels A, and
A row B comprising a plurality of said pixels B;
The row A and the row B are extended in the extension direction of the scanning line,
A liquid crystal display device, wherein the rows A and the rows B are alternately arranged.   2. The liquid crystal display device according to claim 1, wherein the counter electrode A of the plurality of pixels A in the row A and the counter electrode B of the plurality of pixels B in the row B are shared.   The liquid crystal display device according to claim 2, wherein the common counter electrode A in the row A is electrically connected to the common counter electrode B in the row B.   The liquid crystal display device according to claim 2, wherein the common counter electrode A in the row A and the common counter electrode B in the row B are independent of each other.   The phase of the counter voltage supplied to the common counter electrode A in the row A is different from the phase of the counter voltage supplied to the common counter electrode B in the row B. The liquid crystal display device according to claim 4. The liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B,
Each video line has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode and a negative polarity having a lower potential than the counter voltage supplied to the counter electrode for each frame. The liquid crystal display device according to claim 1, wherein the video voltage is alternately supplied.   The liquid crystal display device according to claim 6, wherein a high potential counter voltage and a low potential counter voltage are alternately supplied to the counter electrode for each frame. The liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B,
One of the two video lines adjacent to each other has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode, and the other has a counter voltage supplied to the counter electrode. Are supplied with a negative video voltage having a low potential, and each of the plurality of pixels A and the plurality of pixels B has the positive video voltage and the negative video voltage for each frame. The liquid crystal display device according to claim 1, wherein and are alternately supplied. A liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate;
The liquid crystal display panel includes a plurality of pixels each having a pixel A and a pixel B;
A liquid crystal display device having a plurality of video lines for inputting video voltages to the plurality of pixels,
The pixel A includes a planar counter electrode A provided on a first substrate,
An interlayer insulating film provided above the planar counter electrode A;
A pixel electrode A provided in an upper layer than the interlayer insulating film and having a linear portion;
The pixel B includes a planar pixel electrode B provided on a first substrate;
An interlayer insulating film provided in an upper layer than the planar pixel electrode B;
A counter electrode B provided in a layer above the interlayer insulating film and having a linear portion;
The liquid crystal display panel includes a column A composed of a plurality of the pixels A,
A column B composed of a plurality of the pixels B;
The row A and the row B are extended in the extending direction of the video line,
A liquid crystal display device, wherein the columns A and B are alternately arranged.   The liquid crystal display device according to claim 9, wherein the counter electrode A of the plurality of pixels A in the column A and the counter electrode B of the plurality of pixels B in the column B are shared.   The liquid crystal display device according to claim 10, wherein the common counter electrode A in the column A and the common counter electrode B in the column B are electrically connected.   The liquid crystal display device according to claim 10, wherein the common counter electrode A in the column A and the common counter electrode B in the column B are independent of each other.   The phase of the counter voltage supplied to the common counter electrode A of the column A is different from the phase of the counter voltage supplied to the common counter electrode B of the column B. The liquid crystal display device according to claim 12.   Each video line has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode and a negative polarity having a lower potential than the counter voltage supplied to the counter electrode for each frame. The liquid crystal display device according to claim 9, wherein the video voltage is alternately supplied.   The liquid crystal display device according to claim 14, wherein a high-potential counter voltage and a low-potential counter voltage are alternately supplied to the counter electrode for each frame. The liquid crystal display panel includes a plurality of scanning lines for inputting scanning voltages to the pixels A and B,
Each time a selected scanning voltage is supplied to n (n ≧ 1) scanning lines, each video line has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode, and A negative video voltage having a lower potential than the counter voltage supplied to the counter electrode is alternately supplied, and each of the plurality of pixels A and the plurality of pixels B has the frame The liquid crystal display device according to claim 9, wherein a positive video voltage and the negative video voltage are alternately supplied. A liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate;
The liquid crystal display panel is a liquid crystal display device having a plurality of pixels each having a pixel A and a pixel B,
The pixel A includes a planar counter electrode A provided on a first substrate,
An interlayer insulating film provided above the planar counter electrode A;
A pixel electrode A provided in an upper layer than the interlayer insulating film and having a linear portion;
The pixel B includes a planar pixel electrode B provided on a first substrate;
An interlayer insulating film provided in an upper layer than the planar pixel electrode B;
A counter electrode B provided in a layer above the interlayer insulating film and having a linear portion;
A liquid crystal display device, wherein the pixels A and B are arranged in a checkered pattern. The counter electrodes A of the plurality of pixels A are electrically connected and shared,
The liquid crystal display device according to claim 17, wherein the counter electrodes B of the plurality of pixels B are electrically connected to be shared. The liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B,
For each j (j ≧ 1) columns arranged in the extending direction of the video line of the plurality of pixels, the counter electrodes A of the plurality of pixels A are electrically connected and shared,
The counter electrode B of the plurality of pixels B is electrically connected and shared for every j (j ≧ 1) columns arranged in the extending direction of the video lines of the plurality of pixels. The liquid crystal display device according to claim 18. The liquid crystal display panel includes a plurality of scanning lines for inputting scanning voltages to the pixels A and B,
For each k (k ≧ 1) rows arranged in the extension direction of the scanning lines of the plurality of pixels, the counter electrodes A of the plurality of pixels A are electrically connected and shared,
The counter electrodes B of the plurality of pixels B are electrically connected and shared for every k (k ≧ 1) rows arranged in the extending direction of the scanning lines of the plurality of pixels. The liquid crystal display device according to claim 18.   The counter electrodes A of the plurality of pixels A that are electrically connected and common to the counter electrodes B of the plurality of pixels B that are electrically connected and common are electrically connected. The liquid crystal display device according to any one of claims 18 to 20.   21. The counter electrode A that is electrically connected and shared and the counter electrode B that is electrically connected and shared are independent of each other. The liquid crystal display device according to any one of the above.   The phase of the counter voltage supplied to the electrically connected and common counter electrode A is different from the phase of the counter voltage supplied to the electrically connected and common counter electrode B. The liquid crystal display device according to claim 22, wherein the liquid crystal display device is a liquid crystal display device.   The plurality of pixels A and the plurality of pixels B have a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode and the counter supplied to the counter electrode for each frame. 18. The liquid crystal display device according to claim 17, wherein a negative video voltage having a lower potential than the voltage is alternately supplied.   25. The liquid crystal display device according to claim 24, wherein a high-potential counter voltage and a low-potential counter voltage are alternately supplied to the counter electrode for each frame. The liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B,
One of the two video lines adjacent to each other has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode, and the other has a counter voltage supplied to the counter electrode. Are supplied with a negative video voltage having a low potential, and each of the plurality of pixels A and the plurality of pixels B has the positive video voltage and the negative video voltage for each frame. The liquid crystal display device according to claim 17, wherein and are alternately supplied. The liquid crystal display panel includes a plurality of video lines for inputting video voltages to the pixels A and B,
A plurality of scanning lines for inputting a scanning voltage to the pixel A and the pixel B,
Each time a selected scanning voltage is supplied to n (n ≧ 1) scanning lines, each video line has a positive video voltage having a higher potential than the counter voltage supplied to the counter electrode, and A negative video voltage having a lower potential than the counter voltage supplied to the counter electrode is alternately supplied, and each of the plurality of pixels A and the plurality of pixels B has the frame The liquid crystal display device according to claim 17, wherein a positive video voltage and the negative video voltage are alternately supplied.   The part of the counter electrode A of each pixel A and the part of the counter electrode B of each pixel B overlap with each other via the interlayer insulating film. A liquid crystal display device according to claim 9 or claim 17. The second substrate has a light shielding film,
In the light shielding film, a region corresponding to a portion where a part of the counter electrode A of each pixel A and a part of the counter electrode B of each pixel B overlap with each other through the interlayer insulating film The liquid crystal display device according to claim 28, wherein at least a part of the liquid crystal display device is removed.   The liquid crystal display device according to claim 1, wherein the interlayer insulating film is formed of a stacked body of a plurality of insulating films.   The number of linear portions of the pixel electrode A of each pixel A is equal to the number of linear portions of the counter electrode B of each pixel B. Alternatively, the liquid crystal display device according to claim 17.   The number of intervals between the linear portions of the pixel electrode A of each pixel A is equal to the number of intervals between the linear portions of the counter electrode B of each pixel B, or The liquid crystal display device according to claim 9 or claim 17. The pixel electrode A of each pixel A and the counter electrode B of each pixel B are made of the same material,
The counter electrode A of each pixel A and the pixel electrode B of each pixel B are made of the same material, according to claim 1, claim 9, or claim 17. The liquid crystal display device described. The pixel electrode A of each pixel A and the counter electrode B of each pixel B are made of a transparent conductive member,
34. The liquid crystal display device according to claim 33, wherein the counter electrode A of each pixel A and the pixel electrode B of each pixel B are made of a transparent conductive member. The first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A counter electrode wiring provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first electrode of an active element provided in an upper layer than the first insulating film;
A second insulating film provided above the first electrode of the active element;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the second insulating film;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the second insulating film,
The counter electrode A of each pixel A is connected to the counter electrode wiring,
The pixel electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in the first insulating film,
The counter electrode B of each pixel B is connected to the counter electrode wiring through a third contact hole provided in the first insulating film and the second insulating film,
The liquid crystal display device according to claim 1, wherein the interlayer insulating film includes the first insulating film and the second insulating film.   The counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a fourth contact hole provided in the first insulating film and the second insulating film. 36. The liquid crystal display device according to claim 35. The first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first electrode of an active element provided in an upper layer than the first insulating film;
A second insulating film provided above the first electrode of the active element;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the second insulating film;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the second insulating film,
The pixel electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in the first insulating film,
The counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a third contact hole provided in the first insulating film and the second insulating film,
The liquid crystal display device according to claim 1, wherein the interlayer insulating film includes the first insulating film and the second insulating film. The first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first electrode of an active element provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A counter electrode wiring provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the first insulating film;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film,
The counter electrode A of each pixel A is connected to the counter electrode wiring,
The pixel electrode B of each pixel B is connected to the first electrode of the active element,
The counter electrode B of each pixel B is connected to the counter electrode wiring through a second contact hole provided in the first insulating film,
The liquid crystal display device according to claim 9, wherein the interlayer insulating film is formed of the first insulating film.   39. The counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a third contact hole provided in the first insulating film. The liquid crystal display device described. The first substrate includes the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first electrode of an active element provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A first insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the first insulating film;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film,
The pixel electrode B of each pixel B is connected to the first electrode of the active element,
The counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a second contact hole provided in the first insulating film,
The liquid crystal display device according to claim 9, wherein the interlayer insulating film is formed of the first insulating film. The first substrate includes a first electrode of an active element;
A first insulating film provided above the first electrode of the active element;
The counter electrode A of each pixel A and the pixel electrode B of each pixel B provided in an upper layer than the first insulating film;
A counter electrode wiring provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A second insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the second insulating film;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film and the second insulating film,
The counter electrode A of each pixel A is connected to the counter electrode wiring,
The pixel electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in the first insulating film,
The counter electrode B of each pixel B is connected to the counter electrode wiring through a third contact hole provided in the second insulating film,
18. The liquid crystal display device according to claim 1, wherein the interlayer insulating film includes the second insulating film.   42. The counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a fourth contact hole provided in the second insulating film. The liquid crystal display device described. The first substrate includes a first electrode of an active element;
A first insulating film provided above the first electrode of the active element;
The counter electrode A of each pixel A and the pixel electrode B of each pixel B provided in an upper layer than the first insulating film;
A counter electrode wiring A provided in the same layer as the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
A second insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the second insulating film;
A counter electrode wiring B provided in the same layer as the pixel electrode A of each pixel A and the counter electrode B of each pixel B;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film and the second insulating film,
The counter electrode A of each pixel A is connected to the counter electrode wiring A,
The pixel electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in the first insulating film,
The counter electrode B of each pixel B is connected to the counter electrode wiring B,
18. The liquid crystal display device according to claim 1, wherein the interlayer insulating film includes the second insulating film. The first substrate includes a first electrode of an active element;
A first insulating film provided above the first electrode of the active element;
The counter electrode A of each pixel A and the pixel electrode B of each pixel B provided in an upper layer than the first insulating film;
A second insulating film provided in an upper layer than the counter electrode A of each pixel A and the pixel electrode B of each pixel B;
The pixel electrode A of each pixel A and the counter electrode B of each pixel B provided in an upper layer than the second insulating film;
The pixel electrode A of each pixel A is connected to the first electrode of the active element through a first contact hole provided in the first insulating film and the second insulating film,
The pixel electrode B of each pixel B is connected to the first electrode of the active element through a second contact hole provided in the first insulating film,
The counter electrode B of each pixel B is connected to the counter electrode A of each pixel A through a third contact hole provided in the second insulating film,
18. The liquid crystal display device according to claim 1, wherein the interlayer insulating film includes the second insulating film.   42. The organic insulating film provided above the first insulating film and below the counter electrode A of each pixel A and the pixel electrode B of each pixel B, respectively. Item 45. The liquid crystal display device according to any one of items 44.   The width of the linear portion of the pixel electrode A of each pixel A is equal to the width of the linear portion of the counter electrode B of each pixel B, and the width of the linear portion of the pixel electrode A of each pixel A is the same. The sum of the lengths and the sum of the lengths of the linear portions of the counter electrodes B of the respective pixels B are equal to each other. Liquid crystal display device.   The interval between the linear portions of the pixel electrode A of each pixel A is equal to the interval between the linear portions of the counter electrode B of each pixel B, and the linear portion of the pixel electrode A of each pixel A The sum of the lengths and the sum of the lengths of the linear portions of the counter electrodes B of the respective pixels B are equal to each other. Liquid crystal display device.   Each time a selected scanning voltage is supplied to the n (n ≧ 1) scanning lines, a high-potential counter voltage and a low-potential counter voltage are alternately supplied to the counter electrode wiring. 28. A liquid crystal display device according to claim 16 or claim 27.

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