KR101903604B1 - Array substrate for In-Plane switching mode liquid crystal display device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse electric field type liquid crystal display device, and more particularly to a transverse electric field type liquid crystal display device capable of reducing distortion of a common voltage.
The feature of the present invention is that the common wiring and the auxiliary common pattern are directly connected through the second common contact hole in the vicinity of the region where the outermost common electrode formed of copper (Cu) or copper alloy and the common wiring are separated will be.
As a result, it is possible to prevent the load of the common electrode from becoming larger as compared with the conventional structure in which the common voltage path structure of the vertical line is formed only through the auxiliary common pattern which is a transparent conductive material, and the image quality deterioration due to the crosstalk Can be prevented.
In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.
Further, by increasing the means for applying the common voltage to the common electrode through the second common contact hole without lowering the aperture ratio, it is possible to drastically reduce the in-plane deviation of the common voltage and to greatly reduce the load on the common electrode.

Description

[0001] The present invention relates to an array substrate for an in-plane switching liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse electric field type liquid crystal display device, and more particularly to an array substrate for a transverse electric field type liquid crystal display device capable of reducing a common voltage distortion.

A liquid crystal display device (LCD), which is advantageous for moving picture display and has a large contrast ratio and is actively used in TVs and monitors, exhibits optical anisotropy and polarization properties of a liquid crystal, And the like.

Such a liquid crystal display device has a liquid crystal panel in which a liquid crystal panel is interposed between two adjacent substrates through a liquid crystal layer as an essential component and changes the alignment direction of the liquid crystal molecules in an electric field in the liquid crystal panel to realize a difference in transmittance do.

In recent years, an active matrix liquid crystal display device that drives a liquid crystal with an electric field formed by an upper-lower portion has been widely used because of its excellent resolution and moving image realization capability. However, liquid crystal driving by an electric field applied at an upper-

Accordingly, various methods have been proposed in order to overcome the disadvantage that the viewing angle is narrow. Among them, a liquid crystal driving method by a transverse electric field is attracting attention.

1 is a cross-sectional view schematically showing a liquid crystal panel of a general transverse electric field type liquid crystal display device.

As shown in the figure, the lower substrate 1, which is an array substrate, and the upper substrate 3, which is a color filter substrate, are spaced apart from each other and face each other. A liquid crystal layer 5 is interposed between the upper and lower substrates 1, .

A common electrode 21 and a pixel electrode 25 are formed on the same plane on the lower substrate 1. The liquid crystal layer 5 is formed by a common electric field 21 and a horizontal electric field L by the pixel electrode 25, Lt; / RTI >

As described above, in the transverse electric field type liquid crystal display device, the common electrode 21 and the pixel electrode 25 are formed on the lower substrate 1, a horizontal electric field L is generated between the two electrodes 21 and 25, The viewing angle of the liquid crystal display device can be widened by being arranged in parallel to the horizontal electric field L parallel to the substrates 1 and 3. [

On the other hand, since the common electrode 21 is formed in a direction parallel to the gate wiring (not shown), and the pixels of one horizontal line are simultaneously supplied with the data voltage by the scan pulse, the common electrode 21, The load of the motor becomes larger.

The load of the common electrode 21 is defined as an RC delay defined by a product of the line resistance of the common electrode 21 and the parasitic capacitance. If the RC delay is high, the drop in the image quality caused by the crosstalk .

Therefore, in order to reduce the RC delay, the line resistance of the common electrode 21 must be reduced, but the structure of the common electrode 21 has a limitation in reducing the line resistance.

As a result, the common voltage can not be maintained at a constant value, but is affected by the scan pulse or the data voltage as shown in FIG. The ripple phenomenon of this common voltage is a main factor causing horizontal crosstalk when a specific data voltage is applied.

In addition, since the line resistance of the common electrode 21 increases from the left and right regions of the panel toward the middle region of the panel, in-plane variation of the common voltage is caused. This in-plane variation of the common voltage causes vertical difference in luminance, flicker, and after-image.

SUMMARY OF THE INVENTION It is a first object of the present invention to reduce the line resistance of a common electrode.

It is a second object of the present invention to provide a transverse electric field type liquid crystal display device which prevents occurrence of distortion of a common voltage and is excellent in display quality.

According to an aspect of the present invention, there is provided a semiconductor device comprising: a gate wiring and a data wiring which are formed on a substrate to form a plurality of pixel regions crossing each other with a gate insulating film therebetween; A common wiring line formed so as to be spaced apart from the gate wiring line; A thin film transistor connected to the gate line and the data line; An outermost common electrode connected to the common wiring and formed at an outermost periphery of each pixel region in parallel with the data wiring; A plurality of pixel electrodes connected to the thin film transistors in the respective pixel regions and spaced apart from each other in parallel with the data lines; A first common contact hole exposing the outermost common electrode; A second common contact hole exposing the common wiring; And a second common contact hole formed in each of the pixel regions and electrically connected to each other to form a plurality of meshed structures and connected to the outermost common electrode through the first common contact hole, An auxiliary common pattern connected to the common wiring; And a plurality of central common electrodes branched from the auxiliary common pattern and arranged alternately and in parallel with the plurality of pixel electrodes, wherein a common voltage is transmitted from the common wiring through the second common contact hole to the auxiliary common pattern And the common voltage transferred to the auxiliary common pattern is transferred to the outermost common electrode through the first common contact hole. [5] The array substrate for a liquid crystal display according to claim 1,

At this time, the common wiring and the outermost common electrode are made of the same material in the same layer as the gate wiring, and the common wiring and the outermost common electrode are made of copper (Cu) or a copper alloy.

The auxiliary common pattern and the center portion common electrode are made of any one of indium tin oxide (ITO) and indium-zinc-oxide (IZO), the auxiliary common pattern is parallel to the gate wiring, And overlaps with the outermost common electrode to form a mesh structure together with the common wiring.

The first common contact hole and the second common contact hole are located adjacent to each other with the gate interconnection interposed therebetween. An auxiliary pixel pattern connecting all the ends of the pixel electrode is spaced apart from the gate interconnection do.

The data line, the pixel electrode, and the outermost and central common electrodes are symmetrically bent with respect to a central portion of the pixel region, and the thin film transistor is arranged on the left or right side in the neighboring pixel region Alternately.

As described above, according to the present invention, the outermost common electrode formed of copper (Cu) or a copper alloy and the common wiring via the second common contact hole and the auxiliary common pattern It is possible to prevent the load of the common electrode from becoming larger as compared with the conventional structure in which the common voltage path structure of the vertical line is formed only through the auxiliary common pattern which is a transparent conductive material. Therefore, it is possible to prevent an image quality degradation caused by crosstalk from occurring.

In addition, there is an effect that it is possible to prevent a vertical luminance difference, a flicker, and a residual image from occurring due to the in-plane variation of the common voltage.

By increasing the means for applying the common voltage to the common electrode through the second common contact hole without lowering the aperture ratio, it is possible to drastically reduce the in-plane deviation of the common voltage through the second common contact hole, There is an effect.

1 is a cross-sectional view schematically showing a liquid crystal panel of a general transverse electric field type liquid crystal display device.
Fig. 2 is a view showing that ripples are generated due to line resistance of a common voltage of a general transverse electric-field liquid crystal display device. Fig.
3 is a plan view schematically showing an array substrate for a transverse electric field type liquid crystal display according to a first embodiment of the present invention.
4 is a plan view showing a vertical line common voltage path structure of an array substrate for a transverse electric field type liquid crystal display according to a first embodiment of the present invention.
5 is a plan view showing a vertical line common voltage path structure of an array substrate for a transverse electric field type liquid crystal display according to a second embodiment of the present invention.
6 is a cross-sectional view taken along line VI-VI of FIG.
7 is a cross-sectional view taken along the line VII-VII of FIG. 5;

Hereinafter, embodiments according to the present invention will be described in detail with reference to the drawings.

- First Embodiment -

3 is a plan view schematically showing an array substrate for a transverse electric field type liquid crystal display according to a first embodiment of the present invention.

 Here, for the sake of more detailed description, one pixel region P including the switching elements is enlarged.

As shown in the figure, the array substrate 101 for a transverse electric field type liquid crystal display according to the first embodiment of the present invention is formed by intersecting and extending vertically and horizontally with a gate insulating film (not shown) A plurality of gate wirings 103 and data wirings 105 are formed to define the gate electrode P.

A common wiring 107 is formed so as to pass through each pixel region P and to be spaced apart from the gate wiring 103.

Each pixel region P is connected to the gate wiring 103 and the data wiring 105 and has a gate electrode 111, a gate insulating film (not shown), an active layer (not shown) of pure amorphous silicon (Not shown) made of an ohmic contact layer (not shown) of impurity amorphous silicon and source and drain electrodes 117 and 119 spaced apart from each other are formed.

In this case, although the thin film transistor Tr has a U-shaped channel region, it may be modified into various shapes.

Here, the outermost common electrode 109 is formed in the pixel region P in a state of being branched off from the common wiring 107, in parallel with the data wiring 105. The outermost common electrode 109 and the common wiring 107 are made of the same material in the same layer where the gate wiring 103 and the gate electrode 111 are formed.

At this time, the common wiring 107 and the outermost common electrode 109 made of the same material in the same layer as the gate wiring 103 and the gate electrode 111 are preferably made of copper (Cu) or a copper alloy Do.

Copper (Cu) or copper alloy (Cu alloy) used as the common wiring 107 and the outermost common electrode 109 has a lower resistance value than a transparent conductive material such as ITO and has a relatively low molybdenum (Mo) Resistance characteristic superior to that of aluminum or aluminum (Al).

An auxiliary common pattern 120 for receiving a common voltage from the outermost common electrode 109 is formed in each pixel region P and an outermost common electrode 109 is branched from the auxiliary common pattern 120, A plurality of central common electrodes 121 are formed at regular intervals.

At this time, the auxiliary common pattern 120 is formed so as to overlap the data line 105 and the outermost common electrode 109 adjacent to the data line 105 at the border of each pixel region P, as shown in the figure.

Therefore, the auxiliary common pattern 120 has a mesh structure together with the common wiring 107.

In this auxiliary common pattern 120, the auxiliary common pattern 120 formed in one pixel region P of the three pixel regions P adjacent to each other in the horizontal line is formed in the first common contact hole 131 And is applied with a common voltage.

An auxiliary pixel pattern 123 connected to the drain electrode 119 of the thin film transistor Tr through the drain contact hole 118 is formed in the pixel region P in parallel with the common wiring 107 And a plurality of pixel electrodes 125 are formed by branching from the auxiliary pixel pattern 123. [

At this time, the auxiliary common pattern 120, the central common electrode 121, the auxiliary pixel pattern 123, and the pixel electrode 125 are formed of the same material in the same layer.

The common electrodes 109 and 121 and the pixel electrode 125 formed in each pixel region P are arranged in parallel with the gate line 103 at the central portion of each pixel region P, , It has a symmetrically bent structure with respect to the virtual line CL.

That is, each of the common electrodes 109 and 121 and the pixel electrode 125 has a structure that is bent at a predetermined angle in the clockwise or counterclockwise direction from the direction perpendicular to the imaginary line CL based on the imaginary line CL .

Accordingly, the upper and lower portions of the pixel region P are different from each other in the direction of the common electrodes 109 and 121 and the pixel electrode 125, thereby forming different domain regions.

In this case, in the transverse electric field type liquid crystal display device, the movement of the liquid crystal located in different domains in one pixel region P is changed, and finally the arrangement of the long axes of the liquid crystal molecules is made different, .

In other words, for convenience of description, the first domain region D1 and the second domain region D2 are defined as an area formed on the upper side with respect to an imaginary line in each pixel region P, The azimuth angle at which the color shift occurs in the first domain region D1 and the azimuth angle at which the color shift occurs in the second domain region D2 are different from each other and each domain region compensates for the color shift phenomenon, The shift phenomenon can be reduced.

In this case, the constant angle may be 7 degrees to 10 degrees, and the angle between the outermost and central common electrodes 109 and 121 and the pixel electrode 125 is ± 7 degrees to ± 10 degrees with respect to the direction perpendicular to the imaginary line CL A more definite domain separation is possible in one pixel region P, but the driving voltage is increased and the overall white luminance is reduced due to the characteristic of the VT curve, so that the outermost and central common electrodes 109 And 121 and the pixel electrode 125 have an angle of about ± 7 ° to ± 10 ° with respect to a direction perpendicular to the imaginary line CL to form a bent structure.

The data line 105 is also symmetrically bent with respect to the center of each pixel region P by having the outermost and central common electrodes 109 and 121 and the pixel electrode 125 bent And the data lines 105 are not formed separately for each pixel region P but connected to the entire display region so that the data lines 105 are formed in the display region by being bent It becomes a zigzag form.

The common line 107 is formed to have a wider width than other regions in the vicinity of the thin film transistor Tr formed in each pixel region P to form a first storage electrode, And a second storage electrode having a drain electrode 119 extended through an insulating film (not shown) is formed. At this time, the first and second storage electrodes overlapping each other with a gate insulating film (not shown) interposed therebetween form a storage capacitor StgC.

Here, the most characteristic structure in the first embodiment of the present invention is a structure in which the common wiring 107 is connected to the auxiliary common wiring 120 through the second common contact hole 133.

As a result, it is possible to prevent the load of the common electrodes 109 and 121 from becoming large, thereby preventing the deterioration of image quality due to crosstalk. In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

More specifically, the common wiring 107 and the outermost common electrode 109 branched from the common wiring 107 are made of the same material in the same layer as the gate wiring 103, and the outermost common electrode 109, The auxiliary common pattern 120 and the central common electrode 121 which are in contact with each other through the first common contact hole 131 are made of the same material in the same layer as the pixel electrode 125.

At this time, the common wiring 107 and the outermost common electrode 109 are made of copper (Cu) or a copper alloy, and the auxiliary common pattern 120 and the central common electrode 121 are made of indium-tin-oxide (ITO), indium-zinc-oxide (IZO), or moly-titanium (MoTi).

The array substrate 101 for a horizontal electric field type liquid crystal display having such a structure forms a common voltage path structure through a common wiring 107 as a horizontal line and a common voltage path structure as a vertical line through a common common pattern 120 Thereby forming a voltage path structure.

Here, the transparent conductive material is relatively resistant to metal materials such as copper (Cu) or copper alloy (Cu alloy), causing a common voltage path structure of horizontal lines and a common voltage path of vertical lines.

That is, the auxiliary common pattern 120 made of the transparent conductive material of the vertical line and the central common electrode 121 have a high resistance value, and the vertical line generates a load of the common voltage, .

In particular, copper (Cu) or copper (Cu) having a lower resistance value than molybdenum (Mo) and aluminum (Al) Al alloy (Cu alloy), the common voltage path structure of the horizontal line and the common voltage path of the vertical line are more unevenly generated.

In order to prevent such unevenness of the common voltage path from occurring, it is also possible to use a vertical line such as copper (Cu) or copper alloy (Cu alloy) in addition to the auxiliary common pattern 120 and the central common electrode 121 made of a transparent conductive material It is preferable to form the common voltage path through the common wiring 107 made of a metal material and the outermost common electrode 109. However, as mentioned above, the common wiring 107 and the outermost common electrode 109 are formed by the gate wiring The common wiring 107 and the outermost common electrode 109 are cut off in a region corresponding to the position where the gate wiring 103 is formed.

That is, the common wiring 107 and the outermost common electrode 109 are both connected to the horizontal line, but the gate line 103 maintains the state of being separated by the vertical line.

Therefore, in the first embodiment of the present invention, the second common contact hole 133 for exposing the common wiring 107 is further formed, and the common wiring 107 and the auxiliary common wiring 133 are formed through the second common contact hole 133, (Cu) or a copper alloy (Cu alloy) as a vertical line by connecting the common interconnection 107 separated through the auxiliary common interconnection 120 by connecting the common interconnection 107 and the common interconnection 107, Thereby forming a common voltage path.

This makes it possible to prevent pass nonuniformity of the common voltage between the vertical line and the horizontal line from occurring and to prevent the load of the common electrodes 109 and 121 from increasing in the vertical line, It is possible to prevent an image quality deterioration caused by the exposure. In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

At this time, the second common contact hole 133 is located adjacent to the first common contact hole 131, in which the auxiliary common pattern 120 and the outermost common electrode 109 are electrically connected to each other, It is preferable that the structure is formed through the common wiring 107 and the outermost common electrode 109 as much as possible.

4 is a plan view showing a vertical line common voltage path structure of an array substrate for a transverse electric field type liquid crystal display according to the first embodiment of the present invention.

As shown in the figure, in the array substrate 101 for a liquid crystal display of the present invention, a plurality of gate wirings 103 extending in a first direction are formed, and a plurality of gate wirings 103 A plurality of data lines 105 extending in a second direction and defining a plurality of pixel regions P are formed.

A common wiring 107 is formed so as to pass through each pixel region P and to be spaced apart from the gate wiring 103.

A thin film transistor Tr is formed at a portion where each gate wiring 103 and each data wiring 105 intersect and is electrically connected to the drain electrode 119 of the thin film transistor Tr, The pixel electrode 125 is formed.

The pixel electrode 125 is formed by branching from the auxiliary pixel pattern 123 formed in parallel with the common wiring 107.

Common electrodes 109 and 121 electrically connected to the common line 107 through the first common contact hole 131 are formed in parallel to the pixel electrode 125. The common electrode 121 is connected to the data line The common common electrode 109 and the auxiliary common pattern 120 branched from the auxiliary common pattern 120 branched from the common wiring 107 and parallel to the pixel electrode 125, (121).

The common wiring 107 and the outermost common electrode 109 are made of the same material in the same layer as the gate wiring 103. The auxiliary common pattern 120 and the central common electrode 121 are formed on the pixel electrode 125, And the same layer in the same layer.

Accordingly, the auxiliary common pattern 120 is electrically connected to the outermost common electrode 109 through the first common contact hole 131. At this time, the three common pixels 120 among the pixel regions P of the horizontal line, The auxiliary common pattern 120 of the pixel region P located at the center of the region P is electrically connected to the outermost common electrode 109 through the first common contact hole 131. [

The pixel region P adjacent to the pixel region P where the outermost common electrode 109 and the auxiliary common pattern 120 are connected through the first common contact hole 131 is provided with a first common contact hole The common wiring 107 and the auxiliary common pattern 120 are electrically connected to each other through the second common contact hole 133. The second common contact hole 133 exposes the common wiring 107 adjacent to the first common contact hole 131, .

Therefore, the array substrate 101 for a transverse electric field type liquid crystal display according to the first embodiment of the present invention has a structure in which the vertical common voltage passes through the outermost common electrode 109, the common wiring 107 and the auxiliary common pattern 120 Structure.

This makes it possible to prevent pass nonuniformity of the common voltage between the vertical line and the horizontal line from occurring and to prevent the load of the common electrodes 109 and 121 from increasing in the vertical line, It is possible to prevent an image quality deterioration caused by the exposure. In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

That is, a common voltage is applied in the vertical direction through the outermost common electrode 109 of the first pixel region P1 of the first column and is transmitted to the common wiring 107, and the common voltage transmitted to the common wiring 107 is And is transmitted to the auxiliary common pattern 120 of the first pixel region P2 of the second row through the second common contact hole 133.

The common voltage transferred to the auxiliary common pattern 120 of the first pixel region P2 of the second row is directly transmitted to the outermost common electrode 109 through the first common contact hole 131, The common voltage transmitted to the common line 107 is transmitted to the common line 107 and the common voltage transmitted to the common line 107 is transmitted through the second common contact hole 133 to the first pixel region P3 of the third row And transmitted to the auxiliary common pattern 120.

Thus, the common voltage path structure of the vertical line is completed.

At this time, since the outermost common electrode 109 and the common wiring 106 are made of a metal material such as copper (Cu) or copper alloy (Cu alloy) having a lower resistance than a transparent conductive material, It is possible to prevent the load of the common electrodes 109 and 121 from becoming larger as compared with the conventional structure in which the common voltage path structure of the vertical line is formed only through the auxiliary common pattern 120, Can be prevented.

In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

Since the second common contact hole 133 is formed on the common wiring 106, the common electrode does not contribute to the lowering of the aperture ratio. Therefore, the common voltage can be applied to the common electrodes 109, 121 of the common electrodes 109, 121, thereby making it possible to drastically reduce the in-plane deviation of the common voltage and to greatly reduce the load on the common electrodes 109, 121.

That is, the first common contact hole 131 is formed only in the pixel region P positioned at the middle among the three neighboring pixel regions P and the auxiliary common pattern 120 is formed from the outermost common electrode 109 The array substrate 101 for a transverse electric field type liquid crystal display according to the first embodiment of the present invention further includes the second common contact hole 133 so that the 2/3 type Structure.

Therefore, the common voltage can be transmitted more reliably to the auxiliary common pattern 120 and the central common electrode 121, the deviation in the common voltage in-plane can be drastically reduced, and the load on the common electrodes 109, will be.

- Second Embodiment -

5 is a plan view showing a vertical line common voltage path structure of an array substrate for a transverse electric field type liquid crystal display according to a second embodiment of the present invention, FIG. 6 is a sectional view taken along the line VI- 7 is a cross-sectional view taken along the line VII-VII in FIG.

Here, for convenience of description, the region where the thin film transistor Tr as the switching element is formed is defined as the switching region TrA, and the region where the storage capacitor StgC is formed is defined as the storage region StgA.

As shown in the drawings, the array substrate 101 for a lateral electric field type liquid crystal display according to the second embodiment of the present invention includes a plurality of gate wirings 103a and 103b extending in a first direction, A plurality of data lines 105a and 105b extending in a second direction so as to intersect with the plurality of pixel regions 103a and 103b and defining a plurality of pixel regions P are formed.

The common wiring 107 is formed so as to pass through each pixel region P and be spaced apart from the gate wirings 103a and 103b.

The gate electrode 111 and the gate insulating film 113 are connected to the gate wirings 103a and 103b and the data wirings 105a and 105b corresponding to the switching region TrA of each pixel region P, A thin film transistor Tr composed of a semiconductor layer 115 composed of an active layer 115a of pure amorphous silicon and an ohmic contact layer 115b of impurity amorphous silicon and source and drain electrodes 117 and 119 spaced apart from each other is formed .

At this time, the gate wirings 103a and 103b themselves form a gate electrode 111 in a part of the area.

Here, although the thin film transistor Tr has a U-shaped region as a channel region in the drawing, it may be modified into various shapes.

Here, the most characteristic configuration in the second embodiment of the present invention is that the thin film transistor Tr is formed in a zigzag shape.

That is, the thin film transistor Tr formed in the plurality of pixel regions P of the first column is formed at the intersection of the gate wiring 103a and the left data wiring 105a, 105b of the pixel region P, The thin film transistor Tr formed in the plurality of pixel regions P in the second column is formed at the intersection of the gate wiring 103b and the data wirings 105a and 103b on the right side of the pixel region P. [

Therefore, the first thin film transistor Tr1 of the first pixel P1 in the first column is connected to the first gate wiring 103a and the first data line 105a, and the first thin film transistor Tr2 of the first pixel P2 in the second column And the second thin film transistor Tr is connected to the second gate wiring 103b and the second data wiring 105b.

As described above, by forming the thin film transistor Tr in a zigzag shape, a moire phenomenon in which display quality is lowered due to an interference phenomenon in a non-display region can be prevented.

The pixel electrode is electrically connected to the drain electrode 119 of the thin film transistor Tr and parallel to the data lines 105a and 105b.

The pixel electrode 125 is formed by branching from the auxiliary pixel pattern 123 formed in parallel with the common wiring 107.

An auxiliary common pattern 120 electrically connected to the outermost common electrode 109 extending from the common wiring 107 through the first common contact hole 131 is located side by side with the gate wiring 103, The central common electrode 121 is formed in parallel with the pixel electrode 125 by branching from the auxiliary common pattern 120. [

At this time, the auxiliary common pattern 120 is formed so as to overlap the data wirings 105a and 105b and the outermost common electrode 109 adjacent to the data wirings 105a and 105b at the boundary of each pixel region P, respectively.

Therefore, the auxiliary common pattern 120 has a mesh structure together with the common wiring 107.

The outermost and central common electrodes 109 and 121 and the pixel electrode 125 formed in each pixel region P are arranged in parallel with the gate lines 103a and 103b in the central portion of each pixel region P, (CL in Fig. 3) is symmetrically deflected with respect to an imaginary line (CL in Fig. 3).

At this time, in the storage region StgA in each pixel region P, the common wiring 107 is formed to have a wider width than the other region in the vicinity of the formation of the thin film transistor Tr, thereby forming the first storage electrode 107a, A second storage electrode 119a is formed on the first storage electrode 107a with a drain electrode 119 extending through the gate insulating film 113. [ At this time, the first and second storage electrodes 107a and 119a overlapping each other with the gate insulating film 113 interposed therebetween form a storage capacitor StgC.

The common wiring 107 and the outermost common electrode 109 are made of the same material in the same layer as the gate wiring 103. The common wiring 107 and the outermost common electrode 109 are made of copper It is preferable that it is made of a copper alloy.

Copper or a copper alloy used as the common wiring 107 and the outermost common electrode 109 has a lower resistance value than a transparent conductive material and is made of molybdenum (Mo) or aluminum Al).

The auxiliary common pattern 120 and the central common electrode 121 are made of the same material in the same layer as the pixel electrode 125.

Accordingly, the auxiliary common pattern 120 is electrically connected to the outermost common electrode 109 through the first common contact hole 131. At this time, the three common pixels 120 among the pixel regions P of the horizontal line, The auxiliary common pattern 120 of the pixel region P located at the center of the region P is electrically connected to the outermost common electrode 109 through the first common contact hole 131. [

The pixel region P adjacent to the pixel region P where the outermost common electrode 109 and the auxiliary common pattern 120 are connected through the first common contact hole 131 is provided with a first common contact hole The common wiring 107 and the auxiliary common pattern 120 are electrically connected to each other through the second common contact hole 133. The second common contact hole 133 exposes the common wiring 107 adjacent to the first common contact hole 131, .

Therefore, the array substrate 101 for a transverse electric field type liquid crystal display according to the second embodiment of the present invention has a structure in which the vertical line common voltage passes through the outermost common electrode 109, the common wiring 107 and the auxiliary common pattern 120 Structure.

This makes it possible to prevent pass nonuniformity of the common voltage between the vertical line and the horizontal line from occurring and to prevent the load of the common electrodes 109 and 121 from increasing in the vertical line, It is possible to prevent an image quality deterioration caused by the exposure. In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

That is, a common voltage is applied in the vertical direction through the outermost common electrode 109 of the first pixel region P1 of the first column and is transmitted to the common wiring 107, and the common voltage transmitted to the common wiring 107 is And is transmitted to the auxiliary common pattern 120 of the first pixel region P2 of the second row through the second common contact hole 133.

The common voltage transferred to the auxiliary common pattern 120 of the first pixel region P2 of the second row is directly transmitted to the outermost common electrode 109 through the first common contact hole 131, The common voltage transmitted to the common line 107 is transmitted to the common line 107 and the common voltage transmitted to the common line 107 is transmitted through the second common contact hole 133 to the first pixel region P3 of the third row And transmitted to the auxiliary common pattern 120.

Thus, the common voltage path structure of the vertical line is completed.

At this time, since the outermost common electrode 109 and the common wiring 106 are made of a metal material such as copper (Cu) or copper alloy (Cu alloy) having a lower resistance than a transparent conductive material, It is possible to prevent the load of the common electrodes 109 and 121 from becoming larger as compared with the conventional structure in which the common voltage path structure of the vertical line is formed only through the auxiliary common pattern 120, Can be prevented.

In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

Since the second common contact hole 133 is formed on the common wiring 106, the common electrode does not contribute to the lowering of the aperture ratio. Therefore, the common voltage can be applied to the common electrodes 109, 121 of the common electrodes 109, 121, thereby making it possible to drastically reduce the in-plane deviation of the common voltage and to greatly reduce the load on the common electrodes 109, 121.

That is, the first common contact hole 131 is formed only in the pixel region P positioned at the middle among the three neighboring pixel regions P and the auxiliary common pattern 120 is formed from the outermost common electrode 109 The array substrate 101 for a transverse electric field type liquid crystal display according to the first embodiment of the present invention further includes the second common contact hole 133 so that the 2/3 type Structure.

Therefore, the common voltage can be transmitted more reliably to the auxiliary common pattern 120 and the central common electrode 121, the deviation in the common voltage in-plane can be drastically reduced, and the load on the common electrodes 109, will be.

Table 1 below shows the vertical line common voltage path structure of the array substrate for a general transverse electric field type liquid crystal display device and the vertical line common voltage path structure of the array substrate 101 for a transverse electric field type liquid crystal display device according to the second embodiment of the present invention The results of the experiment are shown in Fig.

Sample 1 Sample 2 Resistance (Ω) 3.46E + 01 7.07E + 02 Resistance ratio One 20.43 (↑)

Here, Sample 1 is a result of an experiment in which the resistance value of the vertical line common voltage path structure of the array substrate 101 for a transverse electric field type liquid crystal display according to the second embodiment of the present invention is measured. Sample 2 is a general horizontal electric field type liquid crystal display And the resistance value of the vertical line common voltage path structure of the array substrate is measured.

That is, Sample 1 further includes a second common contact hole 133 for exposing the common wiring 107 in the vicinity of the region where the first common contact hole 131 is formed, and is formed of copper (Cu) or a copper alloy The resistance value of the vertical line common voltage path structure extending from the outermost common electrode 109 to the common wiring 107 and the auxiliary common pattern 120 made of a transparent conductive material to the outermost common electrode 109 is measured And Sample 2 is an experimental result of measuring the resistance value of the vertical line common voltage path structure composed of the auxiliary common pattern 120 made of a transparent conductive material.

Referring to Table 1, it can be seen that the resistance of Sample 1 is 20.43% lower than that of Sample 2.

That is, according to the second embodiment of the present invention, the vertical line common voltage path structure is made of copper (Cu) having a lower resistance value than molybdenum (Mo) and aluminum (Al) A common wiring 107 composed of a copper alloy or an outermost common electrode 109 is used to lower the resistance of the common voltage path structure by using the auxiliary common pattern 120 made of only a transparent conductive material .

As described above, the array substrate 101 for a transverse electric field type liquid crystal display of the present invention has the outermost common electrode 109 formed of copper (Cu) or a copper alloy and the common wiring 107 separated The common wiring 107 and the auxiliary common pattern 120 are directly connected to each other through the second common contact hole 133 in the vicinity of the common common pattern 120, It is possible to prevent the load of the common electrodes 109 and 121 from becoming larger as compared with the conventional structure in which the voltage path structure is formed and it is possible to prevent the image quality from being deteriorated by the crosstalk.

In addition, it is possible to prevent the vertical luminance difference, the flicker, and the afterimage from occurring due to the in-plane variation of the common voltage.

As the second common contact hole 133 is formed on the common wiring 107, it does not contribute to lowering of the aperture ratio. Therefore, a common voltage can be applied to the common electrodes 109, 121 of the common electrodes 109, 121, thereby making it possible to drastically reduce the in-plane deviation of the common voltage and to greatly reduce the load on the common electrodes 109, 121.

The present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the spirit of the present invention.

103a, 103b: gate wiring, 105a, 105b: data wiring,
107: common wiring, 109: outermost common electrode
111: gate electrode, 117: source electrode, 118: drain contact hole, 119: drain electrode
120: auxiliary common pattern, 121: central common electrode, 123: auxiliary pixel pattern, 125: pixel electrode
131: first common contact hole, 133: second common contact hole
P: pixel region, Tr: thin film transistor

Claims (10)

A gate wiring and a data wiring formed on the substrate so as to intersect each other with a gate insulating film therebetween to form a plurality of pixel regions;
A common wiring formed in parallel with the gate wiring and forming a horizontal line common voltage path structure;
A thin film transistor connected to the gate line and the data line;
An outermost common electrode connected to the common wiring and formed at an outermost periphery of each pixel region in parallel with the data wiring;
A plurality of pixel electrodes connected to the thin film transistors in the respective pixel regions and spaced apart from each other in parallel with the data lines;
A first common contact hole exposing the outermost common electrode;
A second common contact hole exposing the common wiring;
And a second common contact hole formed in each of the pixel regions and electrically connected to each other to form a plurality of meshed structures and connected to the outermost common electrode through the first common contact hole, An auxiliary common pattern connected to the common wiring;
And a plurality of central common electrodes branched from the auxiliary common pattern and alternately arranged in parallel with the plurality of pixel electrodes,
Wherein the common voltage is transmitted from the common wiring through the second common contact hole to the auxiliary common pattern, and the common voltage transferred to the auxiliary common pattern is transmitted through the first common contact hole to the outermost common electrode And a vertical line common voltage path structure which is transmitted to the electrode,
The common wiring and the outermost common electrode are made of the same material in the same layer as the gate wiring,
Wherein the horizontal line common voltage path structure and the vertical line common voltage path structure are made of copper (Cu) or copper alloy (Cu alloy).
The method according to claim 1,
And the second common contact hole overlaps with the common wiring.
The method according to claim 1,
Wherein the common wiring and the outermost common electrode are made of copper (Cu) or a copper alloy (Cu alloy).
The method according to claim 1,
Wherein the auxiliary common pattern and the center portion common electrode are made of any one of indium-tin-oxide (ITO) and indium-zinc-oxide (IZO).
The method according to claim 1,
Wherein the auxiliary common pattern is parallel to the gate wiring and overlaps the data wiring and the outermost common electrode to form a mesh structure together with the common wiring.
The method according to claim 1,
And the first common contact hole and the second common contact hole are located adjacent to each other with the gate wiring interposed therebetween.
The method according to claim 1,
And an auxiliary pixel pattern connecting all the ends of the pixel electrode are formed spaced apart from each other in parallel to the gate wiring.
The method according to claim 1,
Wherein the data line, the pixel electrode, and the outermost and central common electrodes have a symmetrically bent structure with respect to a central portion of each of the pixel regions.
The method according to claim 1,
Wherein the thin film transistors are alternately located leftward or rightward in the neighboring pixel region. The method according to claim 1,
Wherein the first common contact hole is located within one pixel region of three neighboring pixel regions.

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