JP2009054539A - 表示装置およびその製造方法 - Google Patents
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- JP2009054539A JP2009054539A JP2007222696A JP2007222696A JP2009054539A JP 2009054539 A JP2009054539 A JP 2009054539A JP 2007222696 A JP2007222696 A JP 2007222696A JP 2007222696 A JP2007222696 A JP 2007222696A JP 2009054539 A JP2009054539 A JP 2009054539A
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- 239000007789 gas Substances 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
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- 229910052715 tantalum Inorganic materials 0.000 description 2
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- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
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- 238000005468 ion implantation Methods 0.000 description 1
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- 239000011882 ultra-fine particle Substances 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K30/00—Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
- H10K30/80—Constructional details
- H10K30/81—Electrodes
- H10K30/82—Transparent electrodes, e.g. indium tin oxide [ITO] electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
- H10K50/842—Containers
- H10K50/8426—Peripheral sealing arrangements, e.g. adhesives, sealants
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/124—Insulating layers formed between TFT elements and OLED elements
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/549—Organic PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Microelectronics & Electronic Packaging (AREA)
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- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Optics & Photonics (AREA)
- Electromagnetism (AREA)
- Ceramic Engineering (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
【解決手段】本発明にかかる表示装置は、複数の発光画素が設けられた表示装置であって、少なくとも発光画素となる領域に開口部1aを有する基板1と、基板1上に形成された下地絶縁膜3と、下地絶縁膜3上に形成された薄膜トランジスタ(TFT13)と、開口部1a内において、下地絶縁膜3のTFT13が設けられた面と反対側の面に形成された有機EL素子22と、を備え、発光画素では、有機EL素子22の発光が、TFT13の設けられた側と反対の視認側から出射されているものである。
【選択図】 図2
Description
5 ゲート絶縁膜、6 ゲート電極、7 層間絶縁膜、8 コンタクトホール、
9 信号配線電極、10 パッシベーション膜、11 封止材、
12 封止基板、13、13a、13b TFT、14 マスキングフィルム、
15 ビアホール、16、17、18 蒸着マスク、19 アノード電極、
20 有機発光層、21 透明電極、22 有機EL素子、23封止材、
24 封止基板、26有機平坦化膜、41 表示領域、42 額縁領域、
43 ゲート配線、44 ソース配線、45 走査信号駆動回路、
46 表示信号駆動回路、47 画素、48、49 外部回路
Claims (12)
- 複数の発光画素が設けられた表示装置であって、
少なくとも前記発光画素となる領域に開口部を有する基板と、
前記基板上に形成された絶縁膜と、
前記絶縁膜上に形成された薄膜トランジスタと、
前記開口部内において、前記絶縁膜の前記薄膜トランジスタが設けられた面と反対側の面に形成された発光素子と、を備え、
前記発光画素では、前記発光素子の発光が、前記薄膜トランジスタの設けられた側と反対の視認側から出射されている表示装置。 - 前記発光素子は、
前記絶縁膜を貫通し前記薄膜トランジスタの信号配線電極に到達するビアホールを介して、前記薄膜トランジスタに接続する画素電極と、
前記画素電極の視認側に設けられた透明電極と、
前記画素電極と前記透明電極との間に配置された発光層と、を含む請求項1に記載の表示装置。 - 前記発光画素の外側の領域において、前記基板と前記絶縁膜との間に形成されたメタル膜をさらに備える請求項1又は2に記載の表示装置。
- 前記メタル膜は、前記透明電極の一部と接続することを特徴とする請求項3に記載の表示装置。
- 前記基板の視認側に設けられ、前記発光素子への水分の浸入を防止する第1封止層をさらに備える請求項1乃至4のいずれか一項に記載の表示装置。
- 前記基板の反視認側に設けられ、前記薄膜トランジスタを外部から遮断する第2封止層をさらに備える請求項1乃至5のいずれか一項に記載の表示装置。
- 複数の発光画素が設けられた表示装置の製造方法であって、
基板上に絶縁膜を成膜する工程と、
前記絶縁膜の上に薄膜トランジスタを形成する工程と、
前記薄膜トランジスタを形成した後、少なくとも前記発光画素となる領域の前記基板を除去し、前記基板に開口部を形成する工程と、
前記開口部内において、前記絶縁膜の前記薄膜トランジスタが設けられた面と反対側の面に発光素子を形成する工程と、を備える表示装置の製造方法。 - 前記発光素子を形成する工程では、
前記絶縁膜を貫通し前記薄膜トランジスタの信号配線電極に到達するビアホールを介して、前記薄膜トランジスタに接続する画素電極を、前記開口部内の前記絶縁膜表面に形成する工程と、
前記画素電極の表面に発光層を形成する工程と、
前記発光層の表面に透明電極を形成する工程と、を含む請求項7に記載の表示装置の形成方法。 - 前記絶縁膜の成膜前に、前記基板上にメタル膜を成膜する工程をさらに備え、
前記基板に開口部を形成する工程では、前記メタル膜をエッチングストッパーとして前記基板をエッチングして前記開口部を形成した後、少なくとも前記発光画素となる領域の前記メタル膜を除去する請求項7又は8に記載の表示装置の製造方法。 - 前記透明電極を形成する工程では、前記メタル膜の一部と接続するように前記透明電極を形成する請求項9に記載の表示装置の製造方法。
- 前記発光素子の形成後、前記開口部を封止する第1封止層を形成する工程をさらに備える請求項7乃至10のいずれか一項に記載の表示装置の製造方法。
- 前記開口部の形成前に、前記薄膜トランジスタの上に、前記薄膜トランジスタを外部から遮断する第2封止層を形成する工程をさらに備える請求項7乃至11のいずれか一項に記載の表示装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007222696A JP5237600B2 (ja) | 2007-08-29 | 2007-08-29 | 表示装置およびその製造方法 |
KR1020080077769A KR20090023108A (ko) | 2007-08-29 | 2008-08-08 | 표시장치 및 그 제조방법 |
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JP2007222696A JP5237600B2 (ja) | 2007-08-29 | 2007-08-29 | 表示装置およびその製造方法 |
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Publication Number | Publication Date |
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JP2009054539A true JP2009054539A (ja) | 2009-03-12 |
JP5237600B2 JP5237600B2 (ja) | 2013-07-17 |
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JP2007222696A Expired - Fee Related JP5237600B2 (ja) | 2007-08-29 | 2007-08-29 | 表示装置およびその製造方法 |
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JP (1) | JP5237600B2 (ja) |
KR (1) | KR20090023108A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115176300A (zh) * | 2020-03-04 | 2022-10-11 | 夏普株式会社 | 显示装置、显示装置的制造方法 |
WO2024005600A1 (ko) * | 2022-07-01 | 2024-01-04 | 삼성디스플레이 주식회사 | 표시 장치 및 그 제조 방법 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005309400A (ja) * | 2004-03-26 | 2005-11-04 | Semiconductor Energy Lab Co Ltd | 発光装置及びその作製方法 |
KR20050122541A (ko) * | 2004-06-24 | 2005-12-29 | 삼성에스디아이 주식회사 | 박막 트랜지스터의 제조방법, 디스플레이 장치의제조방법, 이에 따라 제조된 디스플레이 장치, 능동구동형 전계발광 소자의 제조방법 및 이에 따라 제조된능동 구동형 전계발광 소자 |
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2007
- 2007-08-29 JP JP2007222696A patent/JP5237600B2/ja not_active Expired - Fee Related
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2008
- 2008-08-08 KR KR1020080077769A patent/KR20090023108A/ko not_active Application Discontinuation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2005309400A (ja) * | 2004-03-26 | 2005-11-04 | Semiconductor Energy Lab Co Ltd | 発光装置及びその作製方法 |
KR20050122541A (ko) * | 2004-06-24 | 2005-12-29 | 삼성에스디아이 주식회사 | 박막 트랜지스터의 제조방법, 디스플레이 장치의제조방법, 이에 따라 제조된 디스플레이 장치, 능동구동형 전계발광 소자의 제조방법 및 이에 따라 제조된능동 구동형 전계발광 소자 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115176300A (zh) * | 2020-03-04 | 2022-10-11 | 夏普株式会社 | 显示装置、显示装置的制造方法 |
CN115176300B (zh) * | 2020-03-04 | 2023-08-15 | 夏普株式会社 | 显示装置、显示装置的制造方法 |
WO2024005600A1 (ko) * | 2022-07-01 | 2024-01-04 | 삼성디스플레이 주식회사 | 표시 장치 및 그 제조 방법 |
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KR20090023108A (ko) | 2009-03-04 |
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