JP2009026586A - Bright spot repairing method, display panel, and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pixel circuit structure capable of easily correcting varied characteristics of a drive transistor and easily repairing a pixel of a bright spot. <P>SOLUTION: In the pixel circuit structure, a sampling transistor for controlling writing of a signal potential, a retention capacity for retaining the written signal potential, the drive transistor operating by the written signal potential, and an auxiliary capacity connected between a source electrode of the drive transistor and a power supply line and connected with the source electrode of the drive transistor through a lead wire are provided on a pixel circuit of a display panel having a pixel structure corresponding to an active matrix drive method. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The invention described in this specification relates to a technique for repairing (repairing) a bright spot of a display panel operating in an active matrix driving system. The invention has aspects as a bright spot repair method, a display panel, and an electronic device.

  In recent years, development of a flat panel display using an organic EL (Electro Luminescence) element as a light emitting element has been actively promoted. An organic EL element is a light-emitting element that utilizes a characteristic (that is, an electroluminescence phenomenon) that re-emits an applied voltage as light, and has various characteristics described below.

  First, the organic EL element can be driven with a voltage of 10 V or less. For this reason, the power consumption is low. The organic EL element is a self-luminous element. For this reason, it has the characteristic that weight reduction and thickness reduction are easy, without requiring an illuminating member. Furthermore, the response speed of the organic EL element is as high as several μs. For this reason, it has the characteristic that an afterimage hardly occurs even when a moving image is displayed.

Recently, active matrix driving type organic EL panels in which thin film transistors as driving elements are integrated in each pixel have been actively developed.
The following is an example of literature corresponding to this type of drive system.
JP 2003-255856 A JP 2003-271095 A JP 2004-133240 A JP 2004-029791 A Japanese Patent Laid-Open No. 2004-093682

  However, the active matrix drive type display panel has a problem that manufacturing variations tend to appear in the threshold voltage and mobility of the drive transistor. In addition, there is a problem that the characteristics of the drive transistor change over time.

  Therefore, the inventors have a display panel having a pixel structure corresponding to an active matrix driving method, in which each pixel circuit (a) a sampling transistor that controls writing of a signal potential, and (b) a written signal potential. (C) a drive transistor that operates with a written signal potential; (d) an auxiliary capacitor connected between the source electrode of the drive transistor and the power supply line, the source electrode or the power supply A device having an auxiliary capacitor connected through a supply line and a lead line is proposed.

  In the case of the invention proposed by the inventors, it is possible to electrically correct the variation in characteristics of the drive transistor due to manufacturing variations and changes with time. In addition, since the number of elements constituting the pixel circuit is small, it is advantageous for high definition as compared with other pixel circuits that realize a similar function. Further, since the auxiliary capacitor and the source electrode or the power supply line are connected through the lead-out line, the auxiliary capacitor can be separated even when an interlayer short circuit occurs in the auxiliary capacitor.

The case where the invention is applied to an active matrix driving type organic EL panel will be described below.
In addition, the well-known or well-known technique of the said technical field is applied to the part which is not illustrated or described in particular in this specification. Moreover, the form example demonstrated below is one form example of invention, Comprising: It is not limited to these.

(A) Form example 1
(A-1) Panel Structure FIG. 1 shows a structural example of an active matrix driving type organic EL panel described in this embodiment. The organic EL panel 1 shown in FIG. 1 includes a pixel array unit 3 and drive circuits 5, 7, and 9 that drive the pixel array unit 3.

  The pixel array section 3 includes scanning lines 11 (1) to 11 (M) for M rows, signal lines 13 (1) to 13 (N) for N columns, and power supply lines 15 (0) for M rows. ) To 15 (M) are arranged, and a pixel circuit 17A corresponding to the display pixel is formed at the intersection position. The numerical values M and N are determined according to the panel resolution.

  The drive circuit includes a scanning line scanner 5, a horizontal selector 7, and a power line scanner 9. The scanning line scanner 5 is a circuit device that applies pixel data writing timing to the pixel circuit 17A through the scanning lines 11 (1) to 11 (M). Note that the supply of the write timing is controlled in units of rows.

  The horizontal selector 7 is a circuit device that supplies a signal potential Vsig corresponding to pixel data or a reference potential Vo for threshold correction to the signal lines 13 (1) to 13 (N). The signal potential Vsig and the reference potential Vo are supplied in a time division manner within the horizontal scanning period.

  The power supply line scanner 9 is a circuit device that supplies a drive power supply voltage to the pixel circuit 17A through power supply lines 15 (1) to 15 (M). By this line sequential scanning, the operation state of the thin film transistor T2 is controlled in units of rows. Note that the supply of power supply voltage is also controlled in units of rows. Incidentally, either the high potential Vcc_H or the low potential Vcc_L is applied to the power supply lines 15 (1) to 15 (M).

(A-2) Configuration of Pixel Circuit FIG. 2 shows a connection relationship between the pixel circuit 17A and the drive circuit (scanning line scanner 5, horizontal selector 7, power supply line scanner 9). 2 shows the connection relationship between the pixel circuit 17A (i, j) located in the i-th row and j-th column and the pixel circuit 17A (i-1, j) located in the (i-1) th row and j-th column. Represents.

  FIG. 3 shows a circuit configuration example of the pixel circuit 17A. FIG. 3 shows a case where the pixel circuit 17A is composed of two thin film transistors T1 and T2. Note that the thin film transistors T1 and T2 are both N-channel type.

  Among these, the thin film transistor T1 functions as a switching transistor that controls writing of the signal voltage Vsig corresponding to the pixel data to the storage capacitor Cs. One main electrode of the thin film transistor T1 is connected to the signal line 13 (j), and the other main electrode is connected to the gate electrode of the thin film transistor T2 and one electrode of the storage capacitor Cs. Of course, the gate electrode of the thin film transistor T1 is connected to the scanning line 11 (i).

  On the other hand, the thin film transistor T2 functions as a drive transistor that supplies the drive current Id to the organic EL element OLED. One main electrode of the thin film transistor T2 is connected to the power supply line 15 (i), and the other main electrode is connected to the anode electrode of the organic EL element OLED and one electrode of the storage capacitor Cs. The magnitude of the drive current Id is proportional to the magnitude of the holding voltage Vgs written to the holding capacitor Cs.

Incidentally, the cathode electrode of the organic EL element OLED is connected to a common electrode 19 (not shown). The common electrode 19 is disposed so as to cover the entire surface of the pixel array unit 3.
By the way, in the pixel circuit 17A of this embodiment, an auxiliary capacitor Csub is arranged in addition to the holding capacitor Cs.

  The auxiliary capacitor Csub is arranged for the purpose of interpolating the holding capacitor Cs. As the pixel size is miniaturized, the storage capacitor Cs tends to decrease, and as a result, the storage capacitor Cs is easily affected by wiring capacitance and parasitic capacitance. Specifically, it is pointed out that the write gain of the signal potential with respect to the storage capacitor Cs is lowered.

  Therefore, a method of adding the auxiliary capacitor Csub and compensating for the capacity decrease of the holding capacitor Cs is adopted. Hereinafter, it will be described that the write gain and the mobility can be corrected by the auxiliary capacitor Csub. In the following description, the capacitance parasitic to the organic EL element OLED (parasitic capacitance) is indicated by Cel.

  First, the write gain correction principle will be described. Here, the signal potential corresponding to the pixel data is Vsig. In this case, the voltage (holding voltage) Vgs actually held in the holding capacitor Cs is expressed by Vsig × (1−Cs / (Cs + Csub + Cel). Therefore, the write gain (that is, Vgs / Vsig) is 1− It is given by Cs / (Cs + Csub + Cel).

  As is apparent from this equation, the write gain approaches 1 as the auxiliary capacitance Csub increases. This also means that the write gain can be adjusted by adjusting the write gain by adjusting the auxiliary capacitor Csub. Further, white balance can be adjusted by relatively adjusting the size of the auxiliary capacitor Csub between the RGB pixels.

Further, when the driving current of the thin film transistor T2 functioning as the driving transistor is Id and the voltage corrected by the mobility correction is ΔV, the mobility correction time t can be expressed by (Cel + Csub) × ΔV / Id. .
Thus, if the auxiliary capacitor Csub is arranged, the mobility correction time t can be adjusted.

  Note that one electrode of the auxiliary capacitor Csub is connected to the source electrode of the thin film transistor T2, and the other electrode is connected to the power supply line 15 (i-1) corresponding to the previous pixel column. The reason for not connecting to the power supply line 15 (i) of the same pixel column is to prevent a change in power supply potential from propagating to the source electrode of the thin film transistor T2 through the auxiliary capacitor Csub during a threshold correction operation described later.

  Incidentally, when one electrode of the auxiliary capacitor Csub is connected to the power supply line 15 (i) that drives the same pixel column, the potential fluctuation of the power supply line 15 (i) at the start of the threshold correction period passes through the auxiliary capacitor Csub. It propagates to the source electrode of the driving transistor and acts in the direction of increasing the source potential.

Note that if the holding voltage Vgs becomes lower than the threshold voltage Vth of the drive transistor due to an increase in the source potential, the threshold correction operation cannot be performed.
On the other hand, when one electrode of the auxiliary capacitor Csub is connected to the power supply line 15 (i-1) that drives the previous pixel column, such a rise in the source potential Vs does not occur.

  This is because the potential fluctuation of the power supply line 15 (i-1) with respect to the pixel column of the previous row is completed one horizontal scanning period and is seen as a fixed potential from the source electrode of the driving transistor located in the next row.

(A-3) Layout Example FIG. 4 shows a layout example of the pixel circuit 17A. Here, the storage capacitor Cs and the auxiliary capacitor Csub are parallel plate capacitors made of wiring and polysilicon, and a gate oxide film is used as a dielectric. The two electrodes of the storage capacitor Cs are connected to the gate electrode and the source electrode of the thin film transistor T2, respectively.

On the other hand, the two electrodes of the auxiliary capacitor Csub are connected to the source electrode of the thin film transistor T2 and the power supply line 15 (i-1) that drives the pixel column one row before.
By the way, when the low-temperature polysilicon process is adopted in the manufacturing process of the organic EL panel, the presence of particles cannot be ignored. In particular, when the particles are positioned between the storage capacitor Cs and the auxiliary capacitor Csub, both electrodes are short-circuited and do not function as a capacitor.

  If the storage capacitor Cs is short-circuited, the organic EL element does not emit light in any state. That is, the corresponding pixel is a dark spot pixel. On the other hand, when the auxiliary capacitor Csub is short-circuited, the light emitting state of the organic EL element continues in any state. That is, the corresponding pixel is a bright spot pixel. In particular, the bright spot pixel is more conspicuous than the dark spot pixel and has a large influence on the visibility.

  This also reduces the yield of the organic EL panel. Therefore, the inventors propose a layout in which the bright pixel can be easily repaired in the inspection process. That is, the auxiliary capacitor Csub and the power supply line 15 are connected by the lead line 21 that can be easily separated. The width of the lead line 21 can be narrow. For this reason, as shown in FIG. 5, the auxiliary capacitor Csub can be easily disconnected from the power supply line 15 by cutting the lead wire 21 with the laser beam as shown in FIG.

  Note that when the auxiliary capacitor Csub is disconnected from the power supply line 15, the write gain and the mobility correction speed for the storage capacitor Cs are naturally affected. However, it is not visually recognized as a bright spot or a dark spot, and light emission at the holding voltage Vgs written in the holding capacitor Cs is possible. As a result, the deterioration in image quality as in the case of bright spots or dark spots need not be visually recognized. This is very advantageous for improving the yield of the organic EL panel.

(A-4) Driving Operation Example FIG. 6 shows a driving operation example of the pixel circuit 17A. The driving operation shown in FIG. 6 represents the case where the threshold value correcting operation and the sampling / mobility correcting operation are executed within three horizontal scanning periods. Of course, it is possible to complete all the operations within one horizontal scanning period. However, in a high resolution panel that requires the auxiliary capacitor Csub, one horizontal scanning period is shortened, so that it extends over a plurality of horizontal scanning periods. Drive operation is required.

  FIG. 6 shows potential changes of the scanning line 11 (i), the signal line 13 (j), and the power supply line 15 (i) with a common time axis. Further, changes in the gate potential Vg and the source potential Vs of the thin film transistor T2 accompanying these potential changes are also shown. In addition, FIG. 6 illustrates the transition of the potential change divided into seven periods (A) to (G) for convenience.

(I) Light emitting period In the period (A), the organic EL element OLED is in a light emitting state.

(Ii) Threshold correction preparation period Preparation for threshold correction is performed over periods (B) and (C). Incidentally, in the period (B), the potential of the power supply line 15 is switched to the low potential Vcc_L.

  Accordingly, the source potential Vs of the thin film transistor T2 changes so as to approach the low potential Vcc_L of the power supply line 15. Of course, the gate potential Vg of the thin film transistor T2 also drops so as to be dragged to the source potential Vs. Note that the gate potential Vg of the thin film transistor T2 is initialized to the reference potential Vo in the subsequent period (C).

  By executing these initialization operations, the initialization of the holding voltage Vgs is completed. That is, the holding voltage Vgs is initially set to a voltage (Vo−Vcc_L) that is higher than the threshold voltage Vth of the thin film transistor T2. This is a threshold correction preparation operation.

(Iii) Threshold Correction Operation Thereafter, the threshold correction operation is started for the period (D1). Even during this period (D1), the reference potential Vo is applied to the gate potential Vg. In this state, the potential of the power supply line 15 is switched from the low potential Vcc_L to the high potential Vcc_H.

  At this time, a part of the charge of the storage capacitor Cs is extracted. That is, the holding voltage Vgs decreases. Note that since the gate potential Vg of the thin film transistor T2 is fixed to the reference potential Vo, the source potential Vs of the thin film transistor T2 increases as the holding voltage Vgs decreases. Eventually, the writing period of the signal potential Vsig for the pixel column two rows before (that is, the (i-2) th row) comes.

  Accordingly, at this time, the threshold value correction operation for the pixel column in the i-th row is switched to the pause state (period (D2). In FIG. 6, the holding voltage Vgs at the end of the period (D1) is indicated by Vx1 (> Vth). Note that the potential of the power supply line 15 with respect to the i-th pixel column is maintained at the high potential Vcc_H until the threshold correction preparation period after one frame.

  Eventually, when the next horizontal scanning period is switched, the threshold value correction operation is resumed (period (D3)). At this time, a threshold value correction operation is executed so as to further reduce the holding voltage Vx1 of the immediately previous threshold value correction period. Also in this case, the threshold value correcting operation is executed until the writing period of the signal potential Vsig for the pixel column one row before (that is, the (i−1) th row) comes.

  Note that when the writing period of the signal potential Vsig for the pixel column of the previous row (that is, the (i−1) th row) comes, the threshold value correction operation for the i-th pixel column is switched to a pause state (period (D4). 6, the holding voltage Vgs at the end of the period (D3) is indicated by Vx2 (> Vth).

  Then, the threshold correction operation is restarted while switching to the next horizontal scanning period (period (D5)). Note that the threshold value correcting operation ends when the holding voltage Vgs is reduced to the threshold value of the thin film transistor T2.

(Iv) Preparatory Operation for Signal Potential Writing and Mobility Correction When the threshold correction operation is completed, a preparation operation for signal potential writing and mobility correction is performed for period (E). However, this period can be omitted. Incidentally, in the period (E), the potential of the scanning line 11 is switched to a low level and disconnected from the signal line 13 (j).

(V) Signal Potential Writing and Mobility Correction Operation In the period (F), signal potential Vsig writing and mobility correction operation are performed. That is, the signal potential of the scanning line 11 (i) is switched to a high level, and the signal potential Vsig is applied to the gate potential Vg of the thin film transistor T2. With the application of the signal potential Vsig, the holding voltage Vgs of the holding capacitor Cs transits to Vsig + Vth. Thus, since the holding voltage Vgs becomes higher than the threshold voltage Vth, the thin film transistor T2 is switched to the on state.

  Note that when the thin film transistor T2 is switched to the ON state, the drain current Id starts to flow through the organic EL element OLED. However, the organic EL element OLED is still in the cut-off state (high impedance) at the stage where the drain current Id starts to flow. For this reason, the drain current Id flows so as to charge a capacitance (parasitic capacitance) Cel that is parasitic on the organic EL element OLED.

  The anode potential of the organic EL element OLED (that is, the source potential Vs of the thin film transistor T2) increases by the charging voltage ΔV of the parasitic capacitance Cel. Then, the holding voltage Vgs of the holding capacitor Cs decreases by this charging voltage ΔV. That is, the holding voltage Vgs changes to Vsig + Vth−ΔV. Thus, the operation in which the holding voltage Vgs is corrected by the charging voltage ΔV of the parasitic capacitance Cel corresponds to the mobility correcting operation.

  Through a series of bootstrap operations, the gate potential Vg of the thin film transistor T2 increases by the same amount as the increase amount of the source potential Vs (strictly, a value obtained by multiplying the increase amount of the source potential Vs by a gain (<1)).

(Vi) Light emission period In the period (G), the potential of the scanning line 11 (i) is changed to a low level, and the gate potential Vg of the thin film transistor T2 enters a floating state. At this time, the thin film transistor T2 supplies a drain current Id corresponding to the holding voltage Vgs (= Vsig + Vth−ΔV) after mobility correction to the organic EL element OLED.

  Thereby, organic EL element OLED starts light emission. At this time, a voltage Vel corresponding to the magnitude of the drain current Id is generated between both electrodes of the organic EL element OLED, and the anode potential (source potential Vs of the thin film transistor T2) rises.

Along with this voltage increase, the gate potential Vg of the thin film transistor T2 increases by the light emission voltage Vel (strictly, the value obtained by multiplying the increase amount of the source potential Vs by the gain (<1)).
The light emission state with luminance proportional to the drain current Id is continued until the threshold correction preparation period of the next frame.

(A-5) Internal State in Pixel Circuit Corresponding to Correction Operation Here, the internal state of the pixel circuit 17A corresponding to each period in FIG. 6 is shown. Here, the same reference numerals as the corresponding periods are attached to the figure numbers. That is, it demonstrates using FIG. 7A-FIG. 7G. 7A to 7G, the thin film transistor T1 is expressed as a switch, and the parasitic capacitance Cel of the organic EL element OLED is explicitly expressed by a broken line.

(I) Light Emission Period FIG. 7A shows an internal state corresponding to the operation state of the period (A) in FIG. In the period (A) that is the light emission period, the first potential Vcc_H is applied to the power supply line 15 (i). At this time, the thin film transistor T2 supplies a drain current Id corresponding to the holding voltage Vgs (> Vth) of the holding capacitor Cs to the organic EL element OLED. The light emission state of the organic EL element OLED continues until the end of the period (A).

(Ii) Threshold Correction Preparation Period FIG. 7B shows an internal state corresponding to the operation state of the period (B) in FIG. In the period (B), the potential of the power supply line 15 (i) is controlled to be switched from the high potential Vcc_H to the low potential Vcc_L. By this switching, the supply of the drain current Id is cut off.

  As a result, the gate potential Vg and the source potential Vs of the thin film transistor T2 are lowered so as to follow each other. Then, the source potential Vs drops to substantially the same potential as the low potential Vcc_L applied to the power supply line 15 (i).

  FIG. 7C shows an internal state corresponding to the operation state in the period (C) of FIG. In the period (C), the potential of the scanning line 11 (i) changes to a high level. Thereby, the thin film transistor T1 is controlled to be in an on state, and the gate potential Vg of the thin film transistor T2 is set to the reference potential Vo applied to the signal line 13 (j).

  At the end of the period (C), the holding voltage Vgs of the holding capacitor Cs is initialized to a voltage higher than the threshold voltage Vth of the thin film transistor T2. As a result, the thin film transistor T2 is turned on.

(Iii) Threshold Correction Operation FIG. 7D1 shows an internal state corresponding to the operation state of the period (D1) in FIG. In the period (D1), the potential of the power supply line 15 (i) is changed from the low potential Vcc_L to the high potential Vcc_H again. Note that the on state of the thin film transistor T1 is maintained.

  As a result, only the source potential Vs starts to rise while the gate potential Vg of the thin film transistor T2 is maintained at the reference potential Vo. At any time until the end of the period (D1), the holding voltage Vgs changes to Vx1 (> Vth).

  Thereafter, the threshold value correction operation transitions to a dormant state. FIG. 7D2 shows an internal state corresponding to the operation state in the period (D2) of FIG. In the period (D2), the potential of the scanning line 11 (i) is at a low level. As a result, the gate electrode of the thin film transistor T2 is in a floating state. Due to this influence, the gate potential Vg and the source potential Vs are increased by Va1.

Eventually, the next horizontal scanning period starts, and the internal state of the pixel circuit 17A changes to FIG. 7D3. FIG. 7D3 shows an internal state corresponding to the operation state in the period (D3) of FIG. In the period (D3), the thin film transistor T1 is turned on.
As a result, only the source potential Vs starts to rise while the gate potential Vg of the thin film transistor T2 is maintained at the reference potential Vo. At any point in time until the end of the period (D3), the holding voltage Vgs changes to Vx2 (> Vth).

  Thereafter, the threshold value correcting operation again transitions to the resting state. FIG. 7D4 shows an internal state corresponding to the operation state in the period (D4) of FIG. In the period (D4), the potential of the scanning line 11 (i) is at a low level. As a result, the gate electrode of the thin film transistor T2 is in a floating state. Due to this influence, the gate potential Vg and the source potential Vs rise by Va2.

  When the next horizontal scanning period starts, the internal state of the pixel circuit 17A changes to FIG. 7D5. FIG. 7D5 shows an internal state corresponding to the operation state in the period (D5) of FIG. In the period (D5), the holding voltage Vgs is reduced to the threshold value Vth of the thin film transistor T2 by the threshold correction operation, and the threshold correction operation is completed.

(Iv) Preparatory Operation for Writing Signal Potential and Correcting Mobility FIG. 7E shows an internal state corresponding to the operation state in the period (E) in FIG. In the period (E), the potential of the scanning line 11 (i) changes to a low level.

Thereby, the thin film transistor T1 is controlled to be in an off state, and the gate electrode of the thin film transistor T2 is in a floating state.
However, the cut-off state of the thin film transistor T2 is maintained. Therefore, the drain current Id does not flow.

(V) Signal Potential Writing and Mobility Correction Operation FIG. 7F shows an internal state corresponding to the operation state in the period (F) in FIG. In the period (F), the potential of the scanning line 11 (i) changes to a high level. As a result, the thin film transistor T1 is controlled to be in an on state, and the gate potential Vg of the thin film transistor T2 transitions to the signal potential Vsig.

  In the period (F), the power supply line 15 (i) changes to the high potential Vcc_H. As a result, the thin film transistor T2 is turned on, and the drain current Id starts to flow. However, the organic EL element OLED is initially in a cutoff state (high impedance state). For this reason, the drain current Id flows into the parasitic capacitance Cel that is parasitic on the organic EL element OLED.

  As the parasitic capacitance Cel is charged, the source potential Vs of the thin film transistor T2 starts to rise. Soon, the holding voltage Vgs of the holding capacitor Cs becomes Vsig + Vth−ΔV. As described above, the sampling of the signal potential Vsig and the correction by the charging voltage ΔV are executed in parallel. Note that the drain current Id increases as the signal potential Vsig increases, and the absolute value of the charging voltage ΔV also increases.

  Thereby, mobility correction according to the light emission luminance level is possible. When the signal potential Vsig is constant, the absolute value of the charging voltage ΔV increases as the mobility μ of the thin film transistor T2 increases. This means that the negative feedback amount increases as the mobility μ increases.

(Vi) Light emission operation FIG. 6G shows an internal state corresponding to the operation state in the period (G) of FIG. In the period (G), the potential of the scanning line 11 (i) changes to a low level again. Thereby, the thin film transistor T1 is controlled to be in an off state, and the gate electrode of the thin film transistor T2 is in a floating state.

  Since the potential of the power supply line 15 (i) is maintained at the high potential Vcc_H, the drain current Id corresponding to the holding voltage Vgs (= Vsig + Vth−ΔV) of the holding capacitor Cs is continuously supplied to the organic EL element OLED. The By supplying the drain current Id, the organic EL element OLED starts to emit light. At the same time, a voltage Vel corresponding to the magnitude of the drain current Id is generated between the two electrodes of the organic EL element D1.

  That is, the source potential Vs of the thin film transistor T2 increases. With this bootstrap operation, the gate potential Vg rises by the same amount as the source potential Vs rises. Thus, the holding voltage Vgs (= Vsig + Vth−ΔV) substantially the same as that before the bootstrap operation is held in the holding capacitor C1. As a result, the light emission operation with the mobility-corrected drain current Id is continued.

(A-5) Effect of Embodiment As described above, by additionally arranging the auxiliary capacitor Csub in the pixel circuit 17A, it is possible to adjust the write gain and mobility correction time of the storage capacitor Cs.
In addition, since one electrode of the auxiliary capacitor Csub is connected to the power supply line of the pixel column one or more rows before each pixel column, the auxiliary capacitor Csub can be prevented from functioning as a coupling capacitor.

  As a result, the expected interpolation effect by the auxiliary capacitor Csub can be realized. Further, when particles are mixed between the layers of the auxiliary capacitor Csub, a bright spot phenomenon may occur due to an interlayer short. However, a thin lead line 21 is used for connection between the auxiliary capacitor Csub and the power supply line 15. Thus, the auxiliary capacitor Csub and the power supply line 15 can be easily separated. That is, the bright spot pixel can be easily repaired.

(B) Other Embodiments (B-1) Arrangement Position of Lead Lines In the above-described form example, the case where the auxiliary capacitor Csub and the power supply line 15 are connected by the lead line 21 has been described.

  However, the auxiliary capacitor Csub and the source electrode of the driving transistor may be connected through the lead line 21. Also in this case, the bright spot pixel can be repaired by cutting at the portion of the lead line 21.

(B-2) Product example (a) Drive IC
In the above description, the organic EL panel module in which the pixel array unit (organic EL panel) and the drive circuit (scanning line scanner 5, horizontal selector 7, power supply scanner 9) are formed on one substrate has been described.

  However, the pixel array section and the drive circuit section can be manufactured separately and distributed as independent products. For example, the drive circuits may be manufactured as independent drive ICs (integrated circuits) and distributed independently from the pixel array unit.

(B) Display Module The organic EL panel module according to each embodiment described above can be distributed in the form of a panel organic EL module 31 having an external configuration shown in FIG.
The organic EL panel module 31 has a structure in which a facing portion 33 is bonded to the surface of a support substrate 35.

The facing portion 33 is made of glass or other transparent member as a base material, and a color filter, a protective film, a light shielding film, and the like are arranged on the surface thereof.
The organic EL panel module 31 may be provided with an FPC (flexible printed circuit) 37 for inputting / outputting signals and the like to / from the support substrate 35 from the outside.

(C) Electronic device The organic EL panel module in the embodiment described above is also distributed in a product form mounted on an electronic device.
FIG. 9 shows a conceptual configuration example of the electronic device 41. The electronic device 41 includes the organic EL panel module 43 and the system control unit 45 described above. The processing content executed by the system control unit 45 varies depending on the product form of the electronic device 41.

Note that the electronic device 41 is not limited to a device in a specific field as long as it has a function of displaying an image or video generated in the device or input from the outside.
As this type of electronic device 41, for example, a television receiver is assumed. FIG. 10 shows an appearance example of the television receiver 51.

  A display screen 57 composed of a front panel 53, a filter glass 55, and the like is arranged on the front surface of the television receiver 51. The portion of the display screen 57 corresponds to the organic EL panel module described in the embodiment.

  Further, for example, a digital camera is assumed as this type of electronic device 41. FIG. 11 shows an example of the external appearance of the digital camera 61. FIG. 11A shows an example of the appearance on the front side (subject side), and FIG. 11B shows an example of the appearance on the back side (photographer side).

  The digital camera 61 includes a protective cover 63, an imaging lens unit 65, a display screen 67, a control switch 69, and a shutter button 71. Among these, the display screen 67 corresponds to the organic EL panel module described in the embodiment.

For example, a video camera is assumed as this type of electronic device 41. FIG. 12 shows an appearance example of the video camera 81.
The video camera 81 includes an imaging lens 85 that images a subject in front of a main body 83, a shooting start / stop switch 87, and a display screen 89. Among these, the display screen 89 corresponds to the organic EL panel module described in the embodiment.

  Further, for example, a portable terminal device is assumed as this type of electronic device 41. FIG. 13 shows an appearance example of a mobile phone 91 as a mobile terminal device. A cellular phone 91 illustrated in FIG. 13 is a foldable type, and FIG. 13A illustrates an appearance example in a state where the housing is opened, and FIG. 13B illustrates an appearance example in a state where the housing is folded.

  The mobile phone 91 includes an upper housing 93, a lower housing 95, a connecting portion (in this example, a hinge portion) 97, a display screen 99, an auxiliary display screen 101, a picture light 103, and an imaging lens 105. Among these, the display screen 99 and the auxiliary display screen 101 correspond to the organic EL panel module described in the embodiment.

Further, for example, a computer is assumed as this type of electronic device 41. FIG. 14 shows an example of the appearance of the notebook computer 111.
The notebook computer 111 includes a lower casing 113, an upper casing 115, a keyboard 117, and a display screen 119. Among these, the display screen 119 corresponds to the organic EL panel module described in the embodiment.

  In addition to these, the electronic device 41 may be an audio playback device, a game machine, an electronic book, an electronic dictionary, or the like.

(B-3) Other Display Device Examples In the above-described embodiments, the case where the invention is applied to the organic EL panel module has been described.
However, the layout configuration described above can also be applied to other self-luminous display devices. For example, the present invention can be applied to an inorganic EL display device, a display device in which LEDs are arranged, and other display devices in which light emitting elements having a diode structure are arranged on a screen.

(B-4) Others Various modifications can be considered for the above-described embodiments within the scope of the gist of the invention. Various modifications and applications created or combined based on the description of the present specification are also conceivable.

It is a figure which shows the structural example of the organic EL panel of an active matrix drive type. It is a figure which shows the connection relation of a pixel circuit and a power supply line. It is a figure which shows the structural example of a pixel circuit. It is a figure which shows the example of a layout of a pixel circuit. It is a figure explaining the repair method of a bright spot. It is a figure which shows the drive operation example. It is a figure which shows the operation state corresponding to the period (A) of FIG. It is a figure which shows the operation state corresponding to the period (B) of FIG. It is a figure which shows the operation state corresponding to the period (C) of FIG. It is a figure which shows the operation state corresponding to the period (D1) of FIG. It is a figure which shows the operation state corresponding to the period (D2) of FIG. It is a figure which shows the operation state corresponding to the period (D3) of FIG. It is a figure which shows the operation state corresponding to the period (D4) of FIG. It is a figure which shows the operation state corresponding to the period (D5) of FIG. It is a figure which shows the operation state corresponding to the period (E) of FIG. It is a figure which shows the operation state corresponding to the period (F) of FIG. It is a figure which shows the operation state corresponding to the period (G) of FIG. It is a figure which shows the circuit structure of an organic electroluminescent panel module. It is a figure which shows the function structural example of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Organic EL panel 3 Pixel array part 5 Scanning line scanner 7 Horizontal selector 9 Power supply line scanner 13 Signal line 15 Power supply line 17A Pixel circuit Cs Holding capacity Csub Auxiliary capacity 21 Lead line

Claims (5)

A display panel having a pixel structure corresponding to an active matrix driving method, a bright spot repair method for a display panel having an auxiliary capacitor between a source electrode of a driving transistor and a power supply line,
A bright spot repair method comprising cutting a lead line portion connecting a storage capacitor of a pixel in which a bright spot defect is detected and a source electrode of a driving transistor with a laser beam. A display panel having a pixel structure corresponding to an active matrix driving method,
Each pixel circuit
A sampling transistor that controls writing of the signal potential;
A holding capacitor for holding the written signal potential;
A drive transistor that operates according to the written signal potential;
A display panel comprising: an auxiliary capacitor connected between a source electrode of the driving transistor and a power supply line, the auxiliary capacitor connected through the source electrode or the power supply line and a lead line. The display panel according to claim 2,
One electrode of the auxiliary capacitor is connected to a power supply line associated with one or more previous pixel columns. The display panel. The display panel according to claim 2 comprises:
A display panel comprising self-luminous display pixels arranged in a matrix. A display panel having a pixel structure corresponding to an active matrix driving method, in which each pixel circuit has a sampling transistor that controls writing of a signal potential, a holding capacitor that holds the written signal potential, and a written signal potential And a storage capacitor connected between the source electrode of the drive transistor and a power supply line, the storage capacitor being connected to the source electrode or the power supply line through a lead-out line A panel,
A system controller that controls the operation of the entire system;
And an operation input unit that receives an operation input to the system control unit.

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