JP2009022548A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problem: by repeating the same processing as remaining time processing, inconveniences occur to processing results or cyclicity is ruined by interrupt timing of CH0 interrupt for starting a user program from a reset address being delayed. <P>SOLUTION: A CH1 interrupt of lower priority is generated before the CH0 interrupt in a 4ms cycle is generated, processing to be performed after the CH1 interrupt is switched to partial initial value counter update processing of shorter time for processing that can be finished before CH0 interrupt from all initial value counter update processing before the CH1 interrupt, and CH0 interrupt occurs after the processing is over, so that cyclicity of CH0 interrupt is maintained correctly. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a jackpot lottery means using a circulation counter that is added and updated in a predetermined cycle in a gaming machine represented by a pachinko machine, etc., to prevent fraud such as calculating a jackpot value from a cycle of the circulation counter. The present invention relates to an improvement of the updating process of the initial value of the cyclic counter using the remaining time of the main timer interrupt process as a user program executed within a predetermined period.

  For example, in a pachinko machine, it is detected that a game ball has passed through a start port provided on the game board surface, and triggered by that, a numerical value is drawn from a counter that is incremented by +1 every 4 ms in the game control device, When the lottery value matches the jackpot value set in advance, it is configured to be in a specific gaming state in which a lot of prize balls can be expected as a jackpot. For example, this counter is updated by 1 count per interrupt in the range from 0 to 299. On the other hand, if the jackpot value is 1/300, the jackpot value that is a criterion for determining the jackpot that is the specific gaming state with a predetermined jackpot probability is “7” in the range from 0 to 299, for example. It is fixedly set so that it appears once every 300 interrupts, and then appears at a constant period. Therefore, by taking a rhythm at a timing that is an integral multiple of 1200 ms, letting the game ball pass through the start port, or mounting an illegal board on the game control board provided on the back of the game board, etc. An illegal act that was determined and artificially generated a jackpot was carried out.

  From this, it has been found that it is inappropriate to generate and extract random numbers simply by regularly circulating a circulation counter of a certain size. Therefore, one cycle is counted once every 4 ms as before, and by changing the value of the start of a new cycle after one round of the counter, the periodicity is lost, and the cycle counter is more like a random number. It is now possible to prevent fraud such as matching. The initial value circulation counter used to unspecified the starting value (initial value) for each round of the judgment value circulation counter is naturally configured with the same 300 size as the judgment circulation counter, and the judgment value circulation counter is 4 ms. In contrast to incrementing by +1 for each interrupt, the initial value circulation counter repeats the update in the extra time, which is the waiting time until 4 ms elapses after the execution of the control program within one interrupt. It was supposed to be. This extra time is a time that always changes because the content of the control changes as the game progresses, and as a result, the degree of update of the initial value also changes the value that is incremented for each interrupt, and is always indefinite. It was possible to make the counter closer to a random number than the one with poor periodicity and regularity. (For example, see Patent Document 1)

JP 1999-70252 JP 2000-262719 A JP 2000-167191 A JP 2002-78875 A

  However, the process of continuing to update the initial value during the remaining time of various program processes performed during this one interrupt interval is not always performed only once every predetermined period like the judgment value circulation counter. Is continued as long as there is, and when the next interrupt occurs, the processing is aborted at that point. For this reason, if the value of the initial value circulation counter is read out from the area in which it is stored and then aborted in the middle of this process, it will be out of the range of the size of the circulation counter when it is read again. May be replaced with inappropriate data. With respect to such inconvenience, Patent Document 2 discloses that when inappropriate data is obtained, it is replaced with an appropriate numerical value. However, it is always necessary to determine whether the replacement is appropriate or inappropriate. Patent Document 2 and Patent Document 3 indicate that the numerical value of the initial value does not become a numerical value exceeding the size of the circulation counter by controlling the writing order of 2-byte data. However, it is still difficult to say that it eliminates all the possibility of improper numerical values being replaced, as is the process of moving the numerical values, such as writing data. On the other hand, in Patent Document 4, in order to complete the initial value update process, interrupt prohibition is set at the head of the update process, and interrupt permission is set after the update process is completed. However, despite the fact that interrupts are being executed at regular intervals, if a new initial value counter update process is started, the essential interrupt process will be waited until it is finished, which is essentially every 4 ms. What must be interrupted at intervals must be generated at 4ms + α, not only the periodicity of the start timing is impaired, but also the length of time that becomes + α according to the progress of the update processing of the initial value counter. In contrast, the program execution time in one interrupt is indefinite. The initial value counter update process, which was originally intended to make effective use of the remaining time until the next interrupt occurrence, makes the interrupt interval time, which should be constant, indefinite, and starts the execution of the control program that starts at 4 ms. Even the timing has been varied, and it has fallen to the end.

  The present invention has been made in order to solve the above-mentioned problems caused by the remaining time processing executed during the remaining time being the same content repetition processing, and the object thereof is executed within a predetermined period. The remaining time processing content is switched so that the remaining time processing using the remaining time of the main timer interrupt processing as a user program ends before the main timer interrupt is generated. It is to make it generate | occur | produce correctly at equal intervals.

  In order to achieve the above object, according to the first aspect of the present invention, a program for controlling a game in a main timer interrupt process as a user program started and executed from a reset address for each main timer interrupt generated at a predetermined cycle. A game control process, a remaining time process executed during a remaining time until a new main timer interrupt is generated after the game control process is completed, and the game control process. Is a process that is executed only once for each main timer interrupt as a subroutine process, and calls the previous determination value stored in the first storage area and adds 1 to the previous determination value. When the addition value of 1 exceeds a predetermined upper limit value, 0 is set as a new determination value. When the addition value of 1 does not exceed the predetermined upper limit value, the first addition value is used as a new determination value as it is. A determination value addition update process to be returned to the first storage area, and a process executed only once for each main timer interrupt as one subroutine process in the game control process, the new determination value Is the same as the start value stored in the third storage area, the initial value stored in the second storage area at that time is stored as a new start value in the third storage area. Value storage processing and the previous initial value stored in the second storage area are called, and when the second addition value obtained by adding 1 to the previous initial value exceeds a predetermined upper limit value, 0 is newly set. A computer for executing an initial value addition update process for returning to the second storage area as a new initial value as the initial value when the predetermined upper limit value is not exceeded; and User program to be executed A gaming machine comprising: a recorded ROM; and a RAM including at least the first storage area, the second storage area, and the third storage area, wherein the computer includes the computer During the remaining time, a slave timer interrupt generation process for generating a slave timer interrupt having a lower priority than the master timer interrupt, and the slave timer interrupt is generated by the occurrence of the slave timer interrupt. The remaining time processing selection process that selects a different remaining time process that can be executed within the remaining time from the occurrence of the sub timer interrupt to the occurrence of the main timer interrupt. And executing the remaining time processing executed until the secondary timer interrupt occurs while the secondary timer interrupt is not accepted during execution of the processing. It is executed as a stop remaining time process, and after executing another remaining time process selected by the remaining time process selection process, it waits for the generation of the main timer interrupt until the main timer interrupt is generated.

  According to a second aspect of the present invention, a plurality of initial value addition update processing in which the contents as the remaining time processing executed by the computer until the slave timer interrupt occurs are updated in order for all of the plurality of types of initial values. And the content as another remaining time process selected in the remaining time process selection process by the occurrence of the sub timer interrupt is a specific one of a plurality of types of initial values updated in the plurality of initial value addition update processes. It is a partial initial value addition update process in which only the initial value is updated.

  According to a third aspect of the present invention, the content as another remaining time processing selected in the remaining time processing selection processing by the occurrence of the sub timer interrupt is one subroutine processing belonging to the game control processing. Thus, it is not executed during the execution period of the game control process until the slave timer interrupt is generated, and is executed for the first time within the remaining time after the slave timer interrupt is generated until the master timer interrupt is generated. The process is characterized by the following.

According to a fourth aspect of the present invention, the contents of the different remaining time process selected in the remaining time process selection process by the occurrence of the slave timer interrupt are different execution program contents depending on the gaming state. It is characterized by.

  According to the first aspect of the present invention, by generating a timer interrupt prior to the generation of a main timer interrupt that starts main timer interrupt processing as a user program at a predetermined cycle from a reset address, the remaining time until the main timer interrupt is generated The time can be grasped as a time within a certain range, and the remaining time processing content that was executed before the occurrence of the slave timer interrupt is switched to another processing content that can be executed within the certain time range that can be grasped. Thus, since the main timer interrupt occurs after the separate processing is completed in time series, the generation timing of the main timer interrupt, for example, the periodicity such as 4 ms is correctly maintained. In addition, the remaining time processing that has been executed before the occurrence of the slave timer interrupt is disabled until the processing is completed. Therefore, troubles such as discontinuing processing and replacing it with inappropriate data do not occur. Also, because the remaining time processing is time adjusted so that there is no possibility that an interrupt will occur during processing execution, it is not necessary to provide an interrupt prohibition instruction or release instruction at the beginning and end of the processing program, The required time can be shortened by itself, and the restriction on the generation timing of the slave timer interrupt becomes loose. In other words, the processing executed during the remaining time is supported so that all processing started before the sub timer interrupt is completed, and the processing started after the sub timer interrupt is completed before the main timer interrupt. In this way, another process of the time-adjusted content is selected, and a little time is left after execution so that the main timer interrupt is awaited. Since the interrupt generation timing can be easily changed by a program, it is possible to set the processing contents and distribute the time so that the remaining time can be consumed without waste. In other words, the main timer interrupt can be generated correctly at regular intervals with a predetermined period.

  According to the second aspect of the invention, all of the initial values are sequentially updated before the occurrence of the sub timer interrupt, and after the sub timer interrupt occurs, the time until the occurrence of the main timer interrupt is reached. By updating only a specific initial value, the processing time is shortened, the processing is completed within a limited time, and the interrupt waiting state of the main timer is ensured. Many counters are used to determine the contents of the game, and an “initial value” is used to ensure randomness. However, as a specific initial value, a counter related to the gain gained by the player is used. This initial value is desirable, and more specifically, whether or not the jackpot, whether the jackpot probability fluctuates, or the number of rounds of the big winning opening and the jackpot symbol related to the game state after the jackpot It is possible to increase the frequency of updating the initial value of the counter that determines whether or not to set.

  In the third aspect of the invention, the sub timer interrupt is regarded as a notification that occurs a predetermined time before the main timer interrupt, and the remaining time processing is not performed as an indefinite number of times in the remaining time, but as if it was closed. As a trap of the main timer interrupt process, a subroutine process belonging to the game control process that has been executed before the remaining time process can be arranged at the end of the main timer interrupt process. That is, the sub timer interrupt can be used not as a break within the remaining time but as a break within the time defined by the main timer interrupt. Another remaining time process is, for example, a subroutine process appropriately selected in the output process for outputting information including error information based on the processing result in the main timer interrupt process to the outside of the island facility or the hall computer. It is done.

In the invention of claim 4, by changing / switching the remaining time processing contents in accordance with the gaming state, it is possible to perform processing adapted to the interest of the player in accordance with the gaming state. For example, the player's interest is focused on whether or not it will be a jackpot during normal games, but it is almost promised that a jackpot will occur during probability-changing games, and the player's interest is not whether or not a jackpot, First of all, it is whether or not the probability change will continue, and depending on the model, it may be whether or not it will be a big hit with more balls, but in response to changes in the player's interest for each model, This can be dealt with by the content of the remaining time processing.

  Hereinafter, an embodiment of a pachinko machine that is one of the gaming machines will be described. FIG. 1 is a diagram illustrating various electrical components provided in a pachinko machine and power supply connection paths and signal connection paths in a control board that controls them. The direction indicated by the hollow arrow indicates the connection direction of the power supply, and the direction indicated by the black arrow indicates whether the signal connection destination and the transmission direction are unidirectional or bidirectional.

  The AC 24V power source, which is an external power source, is converted into a required voltage for use in a 5V, 12V, and 32V pachinko machine by the power source board 10 and is a relay board with a CR unit that is a ball lending external device for game balls. The CR connection board 20 is connected to a payout control board 30 that performs control related to the launch of game balls and the payout of prize balls. The main control board 50 that performs game control related to the overall progress as a pachinko game based on input signals from various switches arranged on the game board surface is supplied with power via the payout control board 30, and the effect relay terminal board 60. Power is supplied to the image control board 70 and the electrical sound control board 80, which are sub boards.

  The main control board 50, via the game board relay terminal board 90, a start opening switch 91 which is the trigger for operating a special symbol, a large winning opening winning switch 92 for counting the number of game balls won to the big winning opening, a special symbol When a winning symbol is obtained, a large winning opening solenoid 93 that opens the winning symbol, a normal symbol switch 94 that triggers the normal symbol, and a normal electric solenoid 95 that releases a normal electric accessory when the normal symbol is obtained. , A normal electric accessory switch (not shown) for detecting a game ball won in a normal electric accessory, a winning opening switch (not shown) for detecting a game ball won in a general winning opening (not shown), and a normal symbol are changed. It is connected to a normal symbol display board 96 for displaying and a special symbol display board 97 for variably displaying special symbols. Based on the signal from the switch to the machine, by sending Shodama command to the payout control board 30, thereby paid the prize balls.

  The payout control board 30 is connected to a launch solenoid 31, a ball feed solenoid 32, a door opening switch 33, a saucer full switch 34, a payout motor 35, and a prize ball count switch 36, and receives a prize ball command from the main control board 50. Based on the control for the payout of the winning ball, the control for the payout of the ball is performed by a switch operation provided on the ball lending operation board 21. Furthermore, the launch control of the game ball is performed based on signals from the launch stop switch 41 and the touch switch 42 input via the handle connection board 40.

  Based on the transmission command from the main control board 50, the image control board 70 controls the effect image that accompanies the start of variation of the special symbol on the special symbol display board 97 in the effect display device 71. The electric sound control board 80 is connected to an effect button 81 operated by the player, various decoration LEDs 82 that are lit / flashed as the game progresses, and a speaker 83 that generates sound effects. Control related to lighting and sound production based on the transmission command is performed.

  FIG. 2 is an internal block diagram of the microprocessor 100 mounted on the main control board 50. The microprocessor 100 has a security check function for checking the tampering of the user program at the time of system reset and stopping the CPU 110 if the result is not normal in order to be used for controlling the pachinko machine. In addition, in order to prevent runaway, a function to prohibit running outside the designated area is provided, which is reset when a command is executed outside the address range designated in advance. The internal ROM 120 stores a user program and data necessary for executing the user program, and the internal RAM 130 of the SRAM is used as a work area for the user program. By supplying 5V backup power, the data in the internal RAM 130 can be backed up even after the power is turned off.

  The clock circuit 140 divides the input external clock and generates an internal system clock to be supplied to the CPU 110 and internal circuits, and a timer circuit (CTC) 150 counts the generated clocks CH0, CH1, An 8-bit counter that can operate in a total of four independent modes of CH2 and CH3 is incorporated, and the reset / interrupt control circuit 160 controls the CH0 interrupt request, CH1 interrupt request, or various reset requests from the timer circuit 150. . The watchdog timer 170 outputs a time-out signal for generating a user reset when a time-out time elapses based on the clock from the clock circuit 140. In addition, a non-designated area travel prohibition circuit 180, a parallel input / output port 190, an address decoding circuit 200, an external interface 210, a random number generation circuit 220, etc. are provided for the non-designated area travel prohibition function.

  Next, main timer interrupt processing as a user program stored in the microprocessor 100 mounted on the main control board 50 will be described. In the following description, the main timer interrupt is referred to as CH0 interrupt, the main timer interrupt process is referred to as CH0 interrupt process, the slave timer interrupt is referred to as CH1 interrupt, and the slave timer interrupt process is referred to as CH1 interrupt process.

  When the power is turned on to the pachinko machine, the security check is performed on the user program of the microprocessor 100 mounted on the main control board 50, and then the user program starts. First, the program start process at power-on Will be described with reference to FIG. First, the stack pointer initial value is set in the stack pointer (S10), interrupt mode 2 is set as the interrupt mode (S11), RWM write is permitted (S12), and the internal register initialization (S13) is executed. The Next, it is determined whether or not the RWM clear switch is operated. If it is not operated (No in S14), the process proceeds to determination of whether or not power-off normal information is stored in the RWM, and normal information is stored. If (S15 is YES), the RWM checksum is calculated, and the process proceeds to the determination of whether or not it matches the checksum stored when the power is turned off. In order to return to the state, the stack pointer at the time of power-off is returned (S20), and an interrupt request from the timer circuit (CTC) is activated. Start each timer so that an interrupt request signal from channel 0 (CH0) with the highest priority and an interrupt request signal from channel 1 (CH1) with a lower priority than CH0 are generated as CTC timer interrupts. (S30, S40). Next, after all used registers are restored (S50), CH0 and CH1 interrupts are permitted (S60, S70). If an interrupt request signal is generated from CH1, the CH1 interrupt flag is turned ON (S80). Then, the program jumps to the address before turning off the power, returns to the state before turning off the power, and continues the program.

  When the RWM clear switch is operated (YES in S14), information indicating that the power supply is normal is not stored in the RWM (S15 is NO), and the calculated checksum does not match the checksum stored when the power is turned off (S18 If NO, clear all areas of RWM to 0 (S22), save power-on normal information (S24), set the initial value during normal game in RWM, and start CH0 timer and CH1 timer After that, CH0 and CH1 interrupts are permitted, and if an interrupt request signal is generated from CH1, the CH1 interrupt flag is turned ON (S81), and the system waits until a CH0 interrupt request is generated.

  Next, the CH0 timer activation process and the CH1 timer activation process in the subroutine of the program start process will be described with reference to FIGS. In S32, an 8-bit control word for channel CH0 is set. Instruction contents according to the value of each bit include bit 0 = 1 channel control word, bit 1 = 1 channel reset, bit 2 = 1 time constant setting, bit 3 = 0 timer after loading time constant Start, bit 4 = 1 Start timer operation at the rising edge of the clock, bit 5 = 1 prescaler value 256, bit 6 = 0 timer mode, bit 7 = 1 interrupt enable. The channel control word is set in the CH0 timer circuit control register (S34), the CH0 time constant 125 loaded in S36 is set in the CH0 timer circuit control register in S38, and the CH0 timer activation process ends. Similarly, in the CH1 timer activation process, the control word of channel CH1 is loaded in S42 and set in the CH1 timer circuit control register (S44). The CH1 time constant 123 is loaded (S46), set in the CH1 timer circuit control register (S48), and the CH1 timer activation process ends.

  Here, the processing at the occurrence of power interruption when the power is turned off will be described with reference to FIG. When a voltage monitoring circuit (not shown) on the power supply board 10 detects that the voltage value of the 24V external power supply has dropped to a predetermined voltage, an NMI interrupt is generated, and the process when the power supply is interrupted is executed. First, save all used registers (S1001), save the interrupt enable / disable state (S1002), determine whether the power-on information is normal data, and if normal data is AAH (S1003 is YES), stack The pointer is saved (S1004), 55H is saved as power-off information (S1005), the RAM checksum is calculated and saved (S1006), and new writing to the RAM is prohibited (S1008). Wait for the stop. If the power-on information is not normal (NO in S1003), the RAM is cleared when power is turned on and the power-off information 00H that starts from the initial state is saved (S1007), and new writing to the RAM is prohibited (S1008). And wait for the function to stop.

  Based on FIG. 7, the CH0 interrupt process of the main routine executed by the CH0 interrupt generated at a cycle of 4 ms will be described. In the CH0 interrupt process, first, the register is saved (S90), a watchdog clear request is set (S91), and then jumps to the start address of each subroutine. CH1 timer correction process (S100), input process (S200), random number counter update process (S300), normal symbol game process (S400), normal electric equipment game process (S500), special symbol 1 game process (S600), special At the stage of progressing to the symbol 2 game process (S650), the special electric accessory process (S700, S750), and the output process (S800), the execution of the control program to be executed for each CH0 interrupt is completed, and until the next CH0 interrupt. Becomes the target time of the remaining time processing using the remaining time. The amount of the remaining time varies depending on the processing contents of the program, but is approximately 1000 μs to 2500 μs. This remaining time process changes depending on the size of the remaining time, and if the CH1 interrupt has not occurred and the remaining time is sufficient, the entire initial value counter update process having a long processing time (S950). If the CH1 interrupt has occurred during the all initial value counter update process, the partial initial value counter update process (S920) with a short processing time is executed only once and waits for the CH0 interrupt to occur. .

  The CH1 timer correction process (S100) shown in FIG. 8 is a process for adjusting a CH1 interrupt having a lower priority than the CH0 interrupt to occur before a predetermined time of the CH0 interrupt, and the CH0 interrupt process starts. The program is programmed as the first process after a program having a certain number of states is executed, so that there is no variation in the time until the timer is restarted. First, when the CH1 interrupt flag is turned off (S101), the time constant 123 is set in the CH1 timer circuit control register (S103) and the process returns to the main process, the CH1 timer is started. As will be described later, the time constant value 123 sets the maximum time required for the all initial value counter update process (S950), the time until the CH1 timer correction process is started, and the time constant in the CH1 timer circuit control register. It is set to be larger than the time that is added to the time until.

  The random number counter update process (S300) shown in FIG. 9 and FIG. 10 sequentially updates four determination values used in the progress of the game, that is, four types of counter values, and adds the determination values related to the respective determination values. It corresponds to update processing and start value storage processing. The special hit counter is configured with a value in the range of 0 to 315, for example, in order to determine whether or not the special symbol displayed on the special symbol display board 97 is confirmed and displayed as a hit symbol. +1 is added every time (S303), and it is compared whether or not the value after the addition is larger than the maximum value 315 (S304). (S305). Steps S301 to S305 and S310 correspond to determination value addition update processing when the special winning counter is used as a determination value. Further, the value after addition is compared with the stored value in the special initial value memory (S306), and if not equal, the value of the special hit register at that time is stored in the special hit counter (S310). If equal, the value of the special initial value counter is read (S307), and the value is written to the special initial value memory (S309) and rewritten to the special hit counter (S310). S306 to S309 correspond to the start value storing process.

  Next, the normal hit counter for determining whether or not the normal symbol displayed on the normal symbol display board 96 is fixedly displayed as a hit symbol is configured with a value in the range of 0 to 199, for example, for each CH0 interrupt. Is added by 1 (S313), and it is compared whether or not the value after addition is larger than the maximum value of 199 (S314). If it is not larger, it remains as the added value, and if it is larger, the added value is set to 0. Return (S315). Further, the value after addition is compared with the stored value in the ordinary initial value memory (S316), and if not equal, the value of the ordinary hit register at that time is stored in the ordinary hit counter (S320). If they are equal, the value of the normal initial value counter is read (S317), and the value is written to the normal initial value memory (S319) and rewritten to the normal hit counter (S320). Again, S311 to S315 and S320 correspond to the determination value addition update process, and S316 to S319 correspond to the start value storage process.

  Next, when the value of the special hit counter acquired at the timing when the game ball passes the start port switch 91 is a big hit value, the probability change determination register for determining whether or not the probability change is, for example, 0 499, and is incremented by +1 for each CH0 interrupt (S323), and whether the value after addition is larger than the maximum value of 499 is compared (S324). If it is larger, the added value is returned to 0 (S325). Further, the value after addition is compared with the value stored in the probability change initial value memory (S326), and if not equal, the value of the probability change determination register at that time is stored in the probability change determination counter (S330). If they are equal, the value of the probability variation initial value counter is read (S327), and the value is written to the probability variation initial value memory (S329) and rewritten to the probability variation determination counter (S330). As in the case of the two types of determination values, S321 to S325 and S330 correspond to the determination value addition update process, and S326 to S329 correspond to the start value storage process.

  Next, the value of the special hit counter acquired at the timing when the game ball passes the start port switch 91 is a jackpot value, and the value of the probability variation determination counter acquired at the same timing is a value that changes the probability. In a certain case, the special symbol counter for determining the big bonus symbol of the special symbol to be fixedly displayed is composed of a value in the range of 0 to 119, for example, and is incremented by +1 for each CH0 interrupt (S333). Then, it is compared whether or not the value after addition is larger than the maximum value 119 (S334). If it is not larger, the added value remains as it is, and if it is larger, the added value is returned to 0 (S335). Further, the value after addition is compared with the value stored in the special figure initial value memory (S336), and if not equal, the value of the hit special figure register at that time is stored in the special figure counter (S340). If equal, the value of the special figure initial value counter is read (S337), and the value is written to the special figure initial value memory (S339) and rewritten to the hit special figure counter (S340). Also in this case, S331 to S335 and S340 correspond to the determination value addition update process, and S336 to S339 correspond to the start value storage process.

  The all initial value counter update process (S950) is a process for updating all four types of initial values used in the random number counter update process (S300), and the CH1 interrupt flag is generated during the execution of the process. It is repeatedly executed until it is confirmed that the CH1 interrupt flag is confirmed (S900) after completion of the counter update process. If the CH1 interrupt flag confirmation is ON, among the four types of initial values used in the random number counter update process (S300), the initial values related to the special hit counter and the probability variation determination counter that have a large influence on the game. The partial initial value counter updating process for updating only the initial value is executed once, and then the generation of the CH0 interrupt flag is waited.

  The contents of the all initial value counter update process (S950) will be described with reference to FIG. First, the CH1 interrupt is prohibited (S951) so that even if the CH1 interrupt flag is generated during the update of the initial value, it is ignored. Next, when the value range that can be obtained by adding the special hit counter by +1 is made one round, it can be replaced as the value before the special hit counter addition at the time of the next CH0 interrupt occurrence, and can be taken as a special initial value. The numerical value range is always the same as that of the special hit counter. For example, if the special hit counter is 0 to 315, the special initial value counter is also 0 to 315. In order to load the saved special initial value counter value, the address is set (S952), the value is taken in (S953), and +1 is added (S954), and the added value is taken as the special initial value. It is compared whether or not it is larger than the maximum value to be obtained (S955). If it is not larger, it remains as an added value, and if it is larger, the added value is returned to 0 (S956) and returned to the special initial value counter (S956). S957). Up to this point, S952 to S957 correspond to the initial value addition update processing with the special initial value.

  Next, a description will be given of the advance of the normal initial value counter configured with the same numerical value range as the numerical value range 0 to 199 that the normal hit counter value can take. To load, set the address (S958), fetch the value (S959), add +1 (S960), and compare whether the added value is larger than the maximum value that can be taken as a normal initial value (S961) If the value is not larger, the added value remains unchanged. If the value is larger, the added value is returned to 0 (S962) and returned to the ordinary initial value counter (S963). These S958 to S963 correspond to the initial value addition update process at the normal initial value.

  Next, a description will be given of the step of the probability variation initial value counter configured with values in the same numerical value range as the value range of the probability variation determination counter that can be taken. The saved value of the probability variation initial value counter is loaded. Therefore, the address is set (S964), the value is taken in (S965), and then +1 is added (S966), and it is compared whether or not the added value is larger than the maximum value that can be taken as the initial value of probability change (S967). If it is not larger, the added value remains unchanged, and if it is larger, the added value is returned to 0 (S968) and returned to the probability variation initial value counter (S969). Similarly, S964 to S969 correspond to the initial value addition update process in the probability variation initial value.

  Next, the advance of the special figure initial value counter configured with values in the same numerical range as the numerical value range 0 to 499 that the value of the hit special figure counter can take will be described. Is loaded (S970), the value is taken in (S971), and then +1 is added (S972), and whether or not the added value is larger than the maximum value that can be taken as a special figure initial value is determined. The comparison is made (S973). If it is not larger, the added value remains unchanged. If it is larger, the added value is returned to 0 (S974) and returned to the special figure initial value counter (S975). Similarly, S970 to S975 correspond to the initial value addition update process in the special figure initial value. When all the initial values have been updated, the CH1 interrupt is permitted and the one-time all initial value counter updating process is completed. As described above, in the all initial value counter update process, the initial value addition update process for the four types of initial values is sequentially performed.

  Here, in the all initial value counter update process, when all the values after addition of the four types of initial values exceed the respective maximum values and the process is cleared to 0, the maximum number of states for executing the program, 228 states are required. Even if this all initial value counter update process is the longest, it is necessary to generate the CH1 interrupt before the CH0 interrupt in order to prevent the CH0 interrupt from occurring during the process. Incidentally, the remaining time from the end of the normal game control process until the occurrence of the CH0 interrupt is 1000 μs to 2500 μs, and the subroutine output process (S800) in which the CH1 interrupt is executed last in the normal game control is performed. It does not occur before it ends.

  Since the CH1 timer is activated in the CH1 timer correction process that is executed first in the CH0 interrupt process, there is a delay between the CH1 timer starting the time measurement and the CH1 timer starting the time measurement. The amount of time is 45 states from the start of CH0 interrupt processing to the start of CH1 interrupt processing, and 37 states from the start of CH1 timer correction processing until the time constant is set in the CH1 timer circuit control register. It corresponds to 10.25 μs in terms of 82 states and time.

  A time of 38.75 μs corresponding to 310 states including 228 states when the total initial value counter update processing is the longest, and 82 states that are a delay in the start of timing is added to the initial value counter update processing before the CH0 interruption. It will be time to start. However, since both the CH0 timer and the CH1 timer are set to the prescaler value 256, the time constant 1 set in the CH0 and CH1 timer activation processing corresponds to 32 μs in terms of time. That is, there is a problem because the time constant is smaller than 38.75 μs at 32 μs, and 53.75 μs obtained by subtracting 10.25 μs for the delay is sufficient if the time constant is 123, ie, 64 μs before. That is, if the CH0 interrupt time constant is 125 and the CH1 interrupt time constant is 123, the CH1 interrupt occurs 53.75 μs before the CH0 interrupt occurs.

  The contents of the partial initial value counter update process (S920) executed within a period of 53.75 μs from the occurrence of the CH1 interrupt to the occurrence of the CH0 interrupt will be described with reference to FIG. Here, the CH1 interrupt has already occurred, but until the CH0 interrupt occurs, the case where the all initial value counter update process has been started immediately before the CH1 interrupt is the case where the remaining time is the shortest. 64-38.75) μs, at least 25 μs of time is left, and no time is left to update all four types of initial values, but among the four types of initial values, more important features The time corresponding to 117 states, which is the maximum number of states 110 required to update only two types of initial values, the initial value and the probability variation initial value, plus the number of states 17 required to jump to the subroutine address is sufficiently 14.625 μs. The CH0 interrupt is waited for about 10 μs after the processing, and it is certainly avoided that the processing is executed at the time of the CH0 interrupt.

  Since the partial initial value counter update process is limited to the one that is executed after the CH1 interrupt has already occurred, unlike the all initial value counter update process, there is no need to prohibit or permit the CH1 interrupt. Immediately, in order to load the value of the saved special initial value counter, the address is set (S921), the value is taken in (S922), and +1 is added (S923). The added value is the special initial value. Is compared with the maximum value that can be taken as (S924). If it is not larger, the added value remains as it is, and if it is larger, the added value is returned to 0 (S925) in the special initial value counter. Return (S926), then, in order to load the saved value of the probability change initial value counter, the address is set (S927), the value is taken in (S928), and then +1 is added (S929) Then, it is compared whether or not the added value is larger than the maximum value that can be taken as a special initial value (S930). If it is not larger, the added value remains as it is, and if it is larger, the added value is cleared to 0 ( In step S931, the added value is returned to the special initial value counter (S932). Similarly, S921 to S926 correspond to the initial value addition update processing in the special initial value, and S927 to S932 correspond to the probability variation initial value.

  The purpose of the present application is to maintain the periodicity of the timing at which the CH0 interrupt occurs by switching the execution contents of the remaining time processing executed during the remaining time by generating the CH1 interrupt before the CH0 interrupt. Without departing from the above, the present invention is not limited to the above embodiment. One way of thinking is to interpret the content of the above embodiment as follows: before or after the occurrence of the CH1 interrupt, the processing contents to be executed such as executing all initial value counter update processing or partially executing initial value counter update processing. If we place importance on the replacement, the only condition that must be satisfied as the process to be executed is that the process must be completed by the CH0 interrupt after the CH1 interrupt. It doesn't matter.

  The time from the CH1 interrupt to the CH0 interrupt is determined at the stage where the setting of the prescaler value and time constant in the CH0 timer and the CH1 timer is determined or programmed, and when the CH1 interrupt occurs Since the actual remaining time after the processing that has been executed can be grasped, it is necessary to consider the time required for the processing so that it can be executed within that time, but until then, before the CH1 interrupt. Since the processing belonging to the category of the normal control processing that has been executed at the time can be steadily arranged after the CH1 interruption, the processing executed immediately before the CH0 interruption is always referred to collectively as the remaining time processing. It is not necessary to limit the process to an extra process after the control process is completed.

  Further, the method of the above embodiment is looped until the occurrence of the CH1 interrupt, and the same processing is repeatedly executed. When the CH1 interruption occurs, the processing is executed in order not by the loop but by the CH0 interruption. From the above, it is clear that the processing contents executed before and after the CH1 interrupt are not related to each other. For example, as shown in FIG. 13, the CH1 interrupt timing is made different from that in the above embodiment, interrupted at an earlier stage, and the initial value update processing (S950) is performed until the CH1 interrupt. Only the output process (S1050) that outputs the related information to the outside after the related process is completed is separated from the command transmission to the sub-board, etc., and is guaranteed to be executed reliably in one CH0 interrupt process. If it is done, it is reasonable from the role to be played after the CH1 interruption, and even if the size of the remaining time is uncertain, it cannot be considered, but it becomes one milestone in the remaining time Generating the CH1 interrupt greatly increases the degree of freedom of programming. Note that it is not always necessary to execute any processing after the CH1 interrupt. Of course, it is possible to simply wait for the CH0 interrupt after the interrupt.

  Further, for example, as shown in FIG. 14, the loop process up to the CH1 interrupt is the all initial value update process (S950), and the initial value of the special hit counter after the interrupt and at the normal time (S1100 is NO) The update process (S1130) is executed only once, and when the probability changes (YES in S1100), the initial value update process (S1160) of the probability variation determination counter is executed only once and executed according to the gaming state. It is also possible to combine the switching of processes. Of course, the loop process up to the CH1 interrupt is not limited to the all initial value update process. For example, as shown in FIG. 15, the special initial value update process (S1230) and the probability variation determination initial value update process until the CH1 interrupt. (S1260) may be executed in order, and the process executed according to the gaming state only after the CH1 interruption may be switched between the special initial value update process (S1130) and the probability variation determination initial value update process (S1160). With this structure, there is an interest in the occurrence of jackpots during normal times, and it is almost promised that jackpots will be obtained when there is a probability change. Updating with the initial value as the center can contribute to the improvement of randomness. In this case, until the CH1 interrupt, two processes are executed as a set of processes, and after the CH1 interrupt, it seems that any one process corresponding to the gaming state is processed independently, but a CH1 interrupt occurs. In the processes up to this point, the CH1 interrupt inhibition and the CH1 interruption permission similar to S951 and S976 are added to the program, and after the CH1 interruption, the program is removed, and a slight difference is required in the contents.

  When selecting the processing contents before and after the CH1 interrupt, depending on the shortest time and the longest time in each processing, there is a possibility that the prescaler value and the time constant used in the above embodiment cannot be arranged efficiently. An appropriate value may be selected regardless of the disclosed prescaler value, time constant, and even the number of system clocks. For example, even when the same 8 MHz system clock is used, the CH1 interrupt is generated at a finer timing with different prescaler values for the CH0 interrupt and the CH1 interrupt. Both the CH0 timer and the CH1 timer have a prescaler value of 256. However, when the prescaler value of the CH1 timer is set to 128, the time required to newly start the all initial value counter update process is secured before the CH0 interruption. For this purpose, since the interrupt timing is advanced by 16 μs by reducing the time constant of the CH1 interrupt by 1, 247 obtained by subtracting 3 from the time constant 250 corresponding to 4 ms is selected as the time constant of the CH1 interrupt. However, in this case, only 9.25 μs remains as the time obtained by subtracting 38.75 μs from 48 μs corresponding to the time constant 3, and the remaining time is insufficient for the execution time of the partial initial value counter update process. Therefore, after the CH1 interrupt, the CH0 interrupt is waited, or the initial value counter update process is changed to a content limited to only one initial value.

  By using together the CH1 interrupt having a lower priority than the CH0 interrupt, not only the CH0 interrupt is incremented by one without losing the defined periodicity of the CH0 interrupt, but also the degree of progress is random for each interrupt. It is possible to effectively use the remaining time optimal for performing the counter processing desired. Also, the remaining time until the CH0 interrupt can be adjusted by appropriately selecting the combination of the prescaler value and the time constant related to the CH1 interrupt depending on how much the CH1 interrupt needs to be generated before the CH0 interrupt generation timing. Therefore, the periodicity of the CH0 interrupt can be maintained with the degree of programming freedom secured.

Here, the correspondence between the claims and the best mode for carrying out the invention will be described together. The main timer interrupt is CH0 interrupt, the main timer interrupt processing is CH0 interrupt processing, and the game control processing is content. Corresponds to S90 to S800, but in the present application, the processing executed before S900 is pointed out based on the disclosure of the first modification. The determination value addition processing corresponds to S301 to S305 and S310, S311 to S315 and S320, S321 to S325 and S330, and S331 to S335 and S340. , S326 to S329, S336 to S339, and S952 to S957, S958 to S963, S964 to S969, S970 to S975, S921 to S926, and S927 to S932 correspond to the initial value addition update processing. . Further, as a combination of another remaining time process opposite to the remaining time process, an all initial value counter update process as a remaining time process and a partial initial value counter update process as another remaining time process are used. The value counter updating process and the external information output process are all modified, the all-initial value counter updating process and the special initial value updating process (or the probability variation determination initial value updating process) in the second modification, and the special initial value updating in the third modification. One set of the process and the probability change determination initial value update process corresponds to the remaining time process, and either the special initial value update process corresponding to the gaming state or the probability change determination initial value update process corresponds to the remaining time process.
The slave timer interrupt is a CH1 interrupt, the slave timer interrupt generation process is a CH1 timer correction process S100, the remaining time process selection process is S900, and the slave interrupt prohibition remaining time process is disabled until the CH1 interrupt is permitted in S976. S951, multiple initial value addition update processing corresponds to all initial value counter update processing S950, and partial initial value addition update processing corresponds to S920, S1160, and S1130.
Furthermore, the first storage area, the second storage area, and the third storage area correspond to the information storage area (work area) of the internal RAM 130.

It is suitable for a gaming machine equipped with a jackpot lottery means using a circulation counter that is added and updated at a predetermined period.

It is explanatory drawing which showed the connection path | route of the power supply and signal in a pachinko machine. 2 is an explanatory diagram showing an internal block of a microprocessor 100. FIG. It is the flowchart which showed the contents of the program start processing. It is the flowchart which showed the content of the CH0 timer starting process. It is the flowchart which showed the content of the CH1 timer starting process. It is the flowchart which showed the content of the process at the time of power failure generation | occurrence | production. It is the flowchart which showed the content of the CH0 interruption process by game start. It is the flowchart which showed the content of the CH1 timer correction process. It is the flowchart which showed the content of the random number counter update process. FIG. 10 is a flowchart showing the contents following random number counter update processing in FIG. 9. FIG. It is the flowchart which showed the content of all the initial value counter update processes. It is the flowchart which showed the content of the partial initial value counter update process. 10 is a flowchart showing the contents of CH0 timer activation processing in Modification 1; 10 is a flowchart showing the contents of a CH0 timer activation process in Modification 2. 10 is a flowchart showing the contents of a CH0 timer activation process in Modification 3.

Explanation of symbols

10 Power Supply Board 30 Dispensing Control Board 50 Main Control Board 91 Start Port Switch 100 Microprocessor 110 Mounted on Main Control Board 50 CPU Mounted on Microprocessor 100
120 Built-in ROM of microprocessor 100
130 Built-in RAM of microprocessor 100

Claims (4)

A game control process that is a program for controlling a game among main timer interrupt processes as a user program that is started and executed from a reset address for each main timer interrupt that occurs in a predetermined cycle;
Among the main timer interrupt processes, a remaining time process executed during a remaining time until a new main timer interrupt occurs after the game control process is completed,
This process is executed only once for each main timer interrupt as a subroutine process in the game control process, and the previous determination value stored in the first storage area is called, and 1 is set as the previous determination value. When the first addition value obtained by adding the value exceeds a predetermined upper limit value, 0 is set as a new determination value, and when the first addition value does not exceed the predetermined upper limit value, the first addition value is directly used as a new determination value. A determination value addition update process for returning to the first storage area as
As a subroutine process in the game control process, the process is executed only once for each main timer interrupt, and the new determination value matches the start value stored in the third storage area. In this case, a start value storage process for storing the initial value stored in the second storage area at that time as a new start value in the third storage area;
When the previous initial value stored in the second storage area is called and the second addition value obtained by adding 1 to the previous initial value exceeds a predetermined upper limit value, 0 is set as a new initial value, A computer that executes an initial value addition update process for returning the second addition value to the second storage area as a new initial value when the upper limit value of the second addition value is not exceeded,
A ROM in which a user program executed by the computer is recorded;
A RAM comprising at least the first storage area, the second storage area, and the third storage area;
A gaming machine equipped with
The computer is
A slave timer interrupt generation process for generating a slave timer interrupt having a lower priority than the master timer interrupt during the remaining time;
Due to the occurrence of the slave timer interrupt, the time required for execution is shorter than the remaining time processing executed until the slave timer interrupt occurs, and the master timer interrupt occurs after the slave timer interrupt occurs. A remaining time process selection process for selecting another remaining time process that can be executed within the remaining time until
The remaining time process executed until the slave timer interrupt occurs is executed as a slave interrupt prohibited residual time process that does not accept the slave timer interrupt during execution of the process,
A gaming machine, wherein after executing the remaining time processing selected by the remaining time processing selection processing, the main timer interrupt is awaited until the main timer interrupt is generated.
The remaining time processing executed by the computer until the slave timer interrupt is generated is a plurality of initial value addition update processing for sequentially updating all types of initial values, and the generation of the slave timer interrupt. The content as the other remaining time process selected in the remaining time process selection process is updated only for a specific initial value among a plurality of types of initial values updated in the multiple initial value addition update process. The gaming machine according to claim 1, wherein the game machine is an addition update process.
The content as another remaining time process selected in the remaining time process selection process by the occurrence of the slave timer interrupt is one subroutine process belonging to the game control process, until the slave timer interrupt occurs The process is not executed during the execution period of the game control process, but is executed for the first time within the remaining time from the occurrence of the sub timer interrupt to the occurrence of the main timer interrupt. Item 1. A gaming machine according to Item 1.
  2. The content of an execution program that is different as the remaining time processing selected by the computer in the remaining time processing selection processing upon occurrence of the sub timer interrupt is different depending on the gaming state. 3. The gaming machine according to 3.

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