JP2009021730A - Image reader, method for determining sampling timing, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a better image in an image reader by regulating the sampling timing of signal. <P>SOLUTION: Phase difference between a signal (v) for defining the sampling timing of a digital signal from an A/D converter 3 by a sinal processor 4 and a signal (iii) for defining the output timing of a digital signal from the A/D converter 3 is determined such that the sinal processor 4 performs sampling during a period when the output from the A/D converter 3 is settled, and the sampling timing by the A/D converter 3 is determined such that the A/D converter 3 performs sampling of analog signal from a CCD 2 during a period when the output from the CCD 2 is settled. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an image reading apparatus that reads an image with an image sensor, a sampling timing determination method in the image reading apparatus, and a program for executing the sampling timing determination method.

  An image reading device such as a scanner includes an image sensor such as a CCD. The signal from the image sensor is an analog signal corresponding to the light intensity. The image reading apparatus converts the analog signal into a digital signal and processes the signal to obtain image data.

  By the way, in order to obtain a good image, it is important to control the sampling timing for converting an analog signal from an image sensor into a digital signal so that sampling is performed when the signal output from the image sensor is stable. is there. In particular, since the speed of image sensors has been increasing in recent years, it has become difficult to control the timing of this sampling. For this reason, several techniques for controlling the timing of sampling have been proposed so far.

  For example, Patent Document 1 discloses a CCD that captures an image and outputs a captured image signal, a crystal oscillator that generates and outputs a reference clock signal, a drive clock signal for driving the CCD based on the reference clock signal, and A pulse generation circuit that generates two types of pulse signals that define the timing for sampling the captured image signal from the CCD, a CPU that outputs a select signal for selecting one of the two sampling pulse signals, and And a multiplexer that outputs one of the two types of signals generated by the pulse generation circuit as a sampling pulse signal, and an ASI that samples the captured image signal based on the sampling pulse signal from the multiplexer and outputs the sampling image signal. And analog / decoded sampling image signal An A / D converter that performs the tall conversion and outputs the sampled image data, a shading unit that corrects the sampled image data and outputs the corrected sampled image data, and performs various signal processing on the corrected sampled image data An image processing apparatus including a signal processing unit is described.

In Patent Document 1, in this image processing apparatus, image data is obtained from a captured image signal sampled by ASI based on each of two types of pulse signals from the pulse generation circuit, and from the density of the image data, It is described that a sampling pulse signal output during a period in which a captured image signal from a CCD is stable is determined, and sampling is performed during actual imaging using the determined sampling signal. In addition, it is described that sampling is performed within a stable period of the captured image signal from the CCD by changing the phase of the drive clock applied to the CCD while keeping the sampling pulse constant.
Japanese Patent Laid-Open No. 11-205585 (July 30, 1999)

  As described above, the conventional technique adjusts the sampling timing from the CCD to the A / D converter.

  However, in recent years, some CCDs have an output for one color of 2 channels (channel) of odd and even, and further, in A / D conversion, these 2 channel signals are multiplexed and output as one line of image data. is there. Therefore, the captured image signal synchronized with the frequency of the drive clock signal for driving the CCD is transferred to the shading unit, the signal processing unit, and the like by the A / D conversion unit with a clock having a frequency twice that of the drive clock signal.

  That is, in order to obtain a good image based on the image signal during the CCD output stabilization period, that is, to read the image on the original more accurately, the sampling timing between the CCD and the A / D converter is simply adjusted. In addition, it is important that the timing of subsequent sampling is also adjusted.

  Therefore, the present invention provides an image reading apparatus in which an image processing unit can obtain a better image, a sampling timing determining method in the image reading apparatus, and a program for executing the sampling timing determining method. With the goal.

  In order to solve the above-described problem, an image reading apparatus according to claim 1 is an image sensor that detects light and outputs an electrical analog signal corresponding to the detected amount of light, and digitally samples the analog signal. An A / D converter that converts the signal into a digital signal and outputs the digital signal; a signal processor that samples the digital signal from the A / D converter and performs signal processing; and a digital signal from the A / D converter When the signal becomes stable, the sampling timing of the signal processing device is determined so that the signal processing device samples the digital signal. Thereafter, when the analog signal from the image sensor becomes stable, the A / D conversion device The timing for determining the sampling timing of the A / D converter so as to sample the analog signal. Comprising a grayed determining unit.

  According to the image reading apparatus, the analog signal from the image sensor is sampled by the A / D converter when the analog signal is stabilized, and the analog signal obtained by converting the analog signal by the A / D converter. Is further sampled by the signal processor when the digital signal is stabilized. Therefore, an image better than the conventional one can be obtained.

  According to a second aspect of the present invention, in the image reading device of the first aspect, a first pulse signal that causes the signal processing device to execute sampling and a first signal that causes the A / D conversion device to output a digital signal. A pulse generator for generating a two-pulse signal and a third pulse signal for causing the A / D converter to perform sampling, and the timing determination unit includes the first pulse signal and the second pulse signal. The phase difference is set so that the signal processing device samples the digital signal when the digital signal from the A / D conversion device becomes stable, and the phase of the third pulse signal is converted to the A / D conversion. The apparatus may be set to sample the analog signal when the analog signal from the image sensor is stabilized.

  According to the image reading apparatus, the analog signal from the image sensor is sampled by the A / D converter when the analog signal is stabilized, and the analog signal obtained by converting the analog signal by the A / D converter. Is further sampled by the signal processor when the digital signal is stabilized. Therefore, an image better than the conventional one can be obtained.

  The embodiments described below do not limit the present invention.

<1. Overview of Image Reading Apparatus 1>
An image reading apparatus 1 according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a main configuration of the image reading apparatus 1. FIGS. 2 (i) to 2 (v) are timing charts of signals (i) to (v) transmitted and received in the image reading apparatus 1. FIG. It is.

  In FIG. 1, solid line arrows indicate image data, and dotted line arrows indicate drive signals and clocks. The numbers from 0 to 255 in FIGS. 2 (iii) and (iv) represent the image density, 0 (zero) represents black, 255 represents white, and the intermediate number represents an intermediate color between white and black. To express. That is, the larger number represents the image data close to white.

  As shown in FIG. 1, the image forming apparatus 1 includes a CCD 2, an AD converter 3, a signal processor 4, a RAM 5, a crystal oscillator 6, a pulse generator 7, a CPU 8, a ROM 9, and a nonvolatile storage device 10 such as an HDD. Etc. Each functional block is connected by a bus such as a data bus so that signals can be exchanged.

  The CCD 2 is an example of an image sensor that reads an image on a document and outputs an analog image signal. Other image sensors such as CMOS can be used instead of the CCD. The CCD 2 employs a 2ch method. Therefore, the CCD 2 outputs two signals of the even signal (i-1) and odd signal (i-2) for each color as the image signal (i). The CCD 2 performs imaging based on the drive clock from the pulse generator 7.

  The A / D conversion device 3 is an example of a device that converts an analog image signal to digital. In particular, in the present embodiment, the A / D conversion device 3 includes an A / D conversion unit 31 and a multiplexer unit 32. The A / D converter 31 samples the two signals, even and odd, based on an A / D sampling pulse (second sampling signal) (ii) input from a pulse generator 7 described later, and further converts it into a digital signal. Convert. The multiplexer unit 32 outputs the digital signal from the A / D conversion unit 31 as one line of digital image data (iii). The A / D conversion device 3 may be configured to include a sampling unit (not shown), and the sampling unit may sample the image signal based on the A / D sampling pulse.

  The signal processing device 4 samples the digital image data from the A / D conversion device 3 based on the data latch signal (v) input from the pulse generation device 7, and further performs shading correction and various other types on the digital image data. Perform signal processing. However, the digital image data (iv) sampled by the signal processing device 4 is delayed from the digital image data (iii) output from the A / D conversion device 3. The signal processing device 4 may include a signal processing unit that performs signal processing and a sampling unit that performs sampling of digital image data.

  The RAM 5 stores the processed image data from the signal processing device 4.

  The crystal oscillator 6 generates and outputs a reference clock signal.

  The pulse generator 7 generates at least a drive clock for driving the CCD, an A / D sampling pulse (ii), and a data latch signal (v) based on the reference clock signal. 3 and the signal processing device 4. The phase difference between the drive clock for driving the CCD, the A / D sampling pulse (ii), and the data latch signal (v) depends on the delay amount between the CCD 2 and the A / D converter 3 and the A / D conversion. It is set in consideration of the delay amount between the device 3 and the signal processing device 4.

  In addition, the phase of each pulse, particularly the A / D sampling pulse (ii) and the data latch signal (v) can be changed.

  In order to change the phase, for example, the pulse generator 7 includes a plurality of delay elements that delay the generated pulse and have different degrees of delay, and the CPU 8 switches the plurality of delay elements to change the phase. May be changed.

  In addition, for example, the pulse generator 7 generates a high-speed clock by multiplying the reference clock from the crystal oscillator 6 by the multiplication circuit in the pulse generator 7, and the counter circuit in the pulse generator 7 uses this high-speed clock. Various pulses are generated from the clock, and the A / D sampling pulse (ii) and the data latch signal (v) are generated based on a control signal input from the CPU 8 to the pulse generator 7. To do. In this case, the CPU 8 inputs a different set value as the set value of the counter circuit to the pulse generator 7, whereby the phase of the pulse generated by the counter circuit is changed.

  The CPU 8 can read the program stored in the ROM 9 and execute the program using the RAM 5 as a work area. By executing the program in this way, the CPU 8 can control the entire image reading apparatus 1. In particular, the CPU 8 controls each part to execute image reading, or controls the pulse generator 7 and the like to determine the timing of signal sampling in each part.

  The ROM 9 stores various programs, and in particular stores a timing determination program 91.

<2. Timing determination>
Next, the operation of the image reading apparatus 1 when determining the signal sampling timing will be described with reference to FIGS. 3 to 5 together with FIGS. 3 to 5 are flow charts for determining the sampling timing, FIG. 3 shows an outline thereof, FIG. 4 shows details of step S1 shown in FIG. 3, and FIG. 5 shows details of step S2 shown in FIG. The CPU 8 executes the timing determination program 91 to cause each unit to execute the operations shown in FIGS.

  As shown in FIG. 3, at the time of executing the sampling timing, first, step S1 for determining the sampling timing of the digital image data (iv) in the signal processing device 4 is performed, and subsequently, from the CCD in the A / D conversion device 3 is performed. Step S2 for determining the sampling timing of the image signal (i) is executed.

  As shown in FIG. 4, in step S1, first, the phases of the A / D sampling pulse (ii) and the data latch signal (v) are initialized (S10), and the reference plate is read to obtain image data (S11). ). At this time, the reference plate is a gradation reference plate, and the image density gradually changes from white to black in the reading direction (sub-scanning direction) by the CCD 2. When such a reference plate is read, as shown in FIGS. 2 (i-1) and (i-2), the dent gradually decreases in the waveform of the output from the CCD2. Instead of the reference plate, a reference document may be read.

  The image data thus obtained is stored in the RAM 5 in association with the set value of the phase of the data latch signal (v) when this image data is obtained (S12).

  Next, the CPU 8 changes the phase of the data latch signal (v) by a predetermined value from the initial state while keeping the phase of the A / D sampling pulse (ii) fixed (No in S13 → S14, FIG. 2 (v)). Black arrow), the process returns to step S11 again to cause the CCD 2 to read the reference plate. The predetermined value can be appropriately set according to various conditions and is not particularly limited.

  Thus, the process from the acquisition of the image data from the reference plate to the phase change (steps S11 to S14) is repeated until the phase of the data latch signal (v) is changed by 360 ° from the initial state.

  When the phase of the data latch signal (v) is changed by 360 ° from the initial state (Yes in S13), the CPU 8 performs data latch when the image data changes smoothly from white to black based on the storage in the RAM 5. The set value of the phase of the signal (v) is stored in the storage device 10 as the phase set value of the data latch signal at the time of actual image reading (S15). More specifically, the phase difference between the data latch signal (v) and the A / D sampling pulse (ii) when the image data changes smoothly from white to black is stored in the storage device 10.

  The fact that the image data is smoothly changing from white to black means that the signal processing device 4 uses the data latch signal (v) so that the waveform of the digital image data (iv) is horizontal, that is, This means that sampling is possible within the output stabilization period of the A / D conversion device 3 (period indicated by P in FIG. 2 (iv)).

  As shown in FIG. 5, in step S2, first, the A / D sampling pulse (ii) is set to the initial state (S20), and the white reference plate is read (S21). At this time, the phase difference between the data latch signal (v) and the A / D sampling pulse (ii) is set to the value stored in step S15. In step S21, a white reference document may be read instead of the white reference plate.

  The image data obtained in this way is stored in the RAM 5 in association with the set value of the phase of the A / D sampling pulse when this image data is obtained (S22).

  Next, the CPU 8 changes the phase of the A / D sampling pulse (ii) by a predetermined value from the initial state while fixing the phase difference between the data latch signal (v) and the A / D sampling pulse (ii). (No in S23, S24, white arrow in FIG. 2 (ii)), the process returns again to step S21 to cause the CCD 2 to read the white reference plate.

  Thus, the process from the acquisition of the image data from the white reference plate to the phase change (steps S21 to S24) is repeated until the phase of the A / D sampling pulse (ii) is changed by 360 ° from the initial state.

  When the phase of the A / D sampling pulse (ii) is changed by 360 ° from the initial state (Yes in S23), the CPU 8 performs A / D when the most white image data is obtained based on the storage in the RAM 5. The set value of the phase of the sampling pulse (ii) is stored in the storage device 10 (S25).

  The fact that the most white image data is obtained means that the waveform in FIGS. 2 (i-1) and (i-2) is in the vicinity of the most depressed area, that is, the output stabilization period of the CCD 2 (for example, in FIG. 2 (i)). This means that the CCD output signal (i) is sampled within a period indicated by Q in FIG.

  As described above, the image reading device 1 determines the sampling timing of the signal processing device 4 and the A / D conversion device 3, so that the image data sampled during the output stabilization period of the CCD 2 is further converted into the signal processing device 4. By sampling during the output stabilization period, a better image can be obtained.

  In the above embodiment, the A / D sampling pulse (ii) includes the sampling timing of the CCD output signal (i) by the A / D converter 3 and the digital image data (iii) by the A / D converter 3. Both output timings are executed. That is, by changing the phase of the A / D sampling pulse (ii), the sampling timing of the CCD output signal (i) by the A / D conversion device 3 and the digital image data (iii) by the A / D conversion device 3 are changed. Both output timings are changed by the same amount. Therefore, in step S1, the phase difference between the A / D sampling pulse (ii) and the data latch signal (v) is determined.

  In addition to this form, the A / D converter 3 receives not only the A / D sampling pulse (ii) but also an output timing pulse for executing the output timing of the digital image data (iii) from the pulse generator 7. It may be like this. In this case, the “output timing pulse” is replaced with the “A / D sampling pulse” in the above-described step S1 (S10 to S15). Further, in the above-described step S2 (S20 to S25), the data latch signal (v) Apart from that, it is sufficient that the phase of the A / D sampling pulse (ii) is adjusted. That is, in this case, the phase difference between the A / D sampling pulse (ii) and the data latch signal (v) may be set in any way.

  A method for supplying the timing determination program 91 to the image reading apparatus is not particularly limited. For example, the program code of the timing determination program 91 is recorded so as to be readable by a computer, and a recording medium (for example, a magnetic disk or other tape, a floppy (registered trademark) disk, a hard disk or other magnetic disk, CD-ROM, MO, MD, etc. , DVD, CD-R, etc., IC card, optical card, etc., and semiconductor memory system such as EPROM, EEPROM, etc.) are supplied to the image reading apparatus, the above embodiments can be realized. is there.

  The image reading apparatus 1 may be connectable to a communication network. In this case, the program code may be supplied via the communication network.

  Furthermore, the image reading apparatus described above can be incorporated into an image forming apparatus that forms an image read by the image reading apparatus on a recording medium such as paper.

FIG. 1 is a block diagram illustrating a main configuration of an image reading apparatus 1 according to the present embodiment. 2 (i) to (v) are timing charts of signals in the image reading apparatus 1. FIG. 3 is a flowchart showing an outline of the operation of the image reading apparatus 1 when determining a sampling timing. It is a flowchart which shows the detail of step 1 of FIG. It is a flowchart which shows the detail of step 2 of FIG.

Explanation of symbols

1 Image reader 2 CCD (image sensor)
3 A / D converter 4 Signal processor 5 RAM
6 Crystal transmitter 7 Pulse generator 8 CPU
9 ROM
10 Storage device

Claims (4)

An image sensor that detects light and outputs an electrical analog signal according to the detected amount of light;
An A / D converter that samples and converts the analog signal into a digital signal and outputs the digital signal;
A signal processing device that samples the digital signal from the A / D converter and performs signal processing;
When the digital signal from the A / D converter is stabilized, the sampling timing of the signal processor is determined so that the signal processor samples the digital signal, and then the analog signal from the image sensor is stabilized. Then, a timing determination unit that determines the sampling timing of the A / D converter so that the A / D converter samples the analog signal;
An image reading apparatus comprising: A first pulse signal that causes the signal processing device to perform sampling; a second pulse signal that causes the A / D conversion device to output a digital signal; and a third pulse signal that causes the A / D conversion device to perform sampling. And a pulse generator for generating
The timing determination unit sets the phase difference between the first pulse signal and the second pulse signal so that the signal processing device samples the digital signal when the digital signal from the A / D converter is stabilized. Further, the phase of the third pulse signal is set so that the A / D converter samples the analog signal when the analog signal from the image sensor is stabilized. The image reading apparatus described. An image sensor that detects light and outputs an electrical analog signal corresponding to the detected amount of light; an A / D converter that samples the analog signal to convert it to a digital signal and outputs the digital signal; A sampling timing determination method in an image reading apparatus comprising: a signal processing device that samples the digital signal from the A / D conversion device and performs signal processing;
When the digital signal from the A / D converter is stabilized, the sampling timing of the signal processor is determined so that the signal processor samples the digital signal, and then the analog signal from the image sensor is stabilized. A method of determining the sampling timing of the A / D converter so that the A / D converter samples the analog signal.   The program for functioning a computer as a timing determination part of any one of Claim 1 or 2.

Images