JP2008504680A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2008504680A5 JP2008504680A5 JP2007518063A JP2007518063A JP2008504680A5 JP 2008504680 A5 JP2008504680 A5 JP 2008504680A5 JP 2007518063 A JP2007518063 A JP 2007518063A JP 2007518063 A JP2007518063 A JP 2007518063A JP 2008504680 A5 JP2008504680 A5 JP 2008504680A5
- Authority
- JP
- Japan
- Prior art keywords
- doped region
- region
- substantially continuous
- doped
- semiconductor region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 10
- 239000000758 substrate Substances 0.000 claims 3
- 238000000034 method Methods 0.000 claims 2
- 229910021332 silicide Inorganic materials 0.000 claims 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical group [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 2
- 238000002955 isolation Methods 0.000 claims 1
- 238000000926 separation method Methods 0.000 claims 1
Claims (5)
半導体領域を有する基板と、
トランジスタに基づく機能を実行するための実質的に連続しているドープ処理された領域を有する前記半導体領域内のＬＤＭＯＳトランジスタ構造であって、前記実質的に連続しているドープ処理された領域は、前記実質的に連続しているドープ処理された領域よりも強くドープ処理され且つ浅くなっており、前記実質的に連続しているドープ処理された領域と同じ導電性型式である第１のドープ処理された領域を有しており、前記実質的に連続しているドープ処理された領域がドレインとして機能する、ＬＤＭＯＳトランジスタ構造と、
前記実質的に連続しているドープ処理された領域によって実質的に取り囲まれているショットキーダイオードと、を備えているデバイス構造体。 In the device structure,
A substrate having a semiconductor region;
An LDMOS transistor structure in the semiconductor region having a substantially continuous doped region for performing a transistor-based function, wherein the substantially continuous doped region comprises: A first doping process that is more strongly doped and shallower than the substantially continuous doped region and is of the same conductivity type as the substantially continuous doped region. An LDMOS transistor structure , wherein the substantially continuous doped region functions as a drain ;
The substantially continuously and the doped region by a substantially shot is surrounded by the key diode, the device structure comprises a.
半導体領域を有する基板と、
トランジスタに基づく機能を実行するための実質的に連続しているドープ処理された領域を有する前記半導体領域内のＬＤＭＯＳトランジスタ構造であって、前記実質的に連続しているドープ処理された領域は、前記実質的に連続しているドープ処理された領域よりも強くドープ処理され且つ浅くなっており、前記実質的に連続しているドープ処理された領域と同じ導電性型式である第１のドープ処理された領域を有している、ＬＤＭＯＳトランジスタ構造と、
前記実質的に連続しているドープ処理された領域によって実質的に取り囲まれているショットキーダイオードと、を有し、
前記半導体領域は第１導電性型式のバックグラウンドドーピングを有しており、前記ショットキーダイオードは、
前記基板の表面上のシリサイド領域と、
前記半導体領域内にあり、前記シリサイド領域と接触しており、前記第１導電性型式であり、前記半導体領域より濃度が高い第２のドープ処理された領域と、を備えているデバイス構造体。 In the device structure:
A substrate having a semiconductor region;
An LDMOS transistor structure in the semiconductor region having a substantially continuous doped region for performing a transistor-based function, wherein the substantially continuous doped region comprises: A first doping process that is more strongly doped and shallower than the substantially continuous doped region and is of the same conductivity type as the substantially continuous doped region. An LDMOS transistor structure having a defined region;
A Schottky diode substantially surrounded by the substantially continuous doped region;
The semiconductor region has a background doping of a first conductivity type, and the Schottky diode is
A silicide region on the surface of the substrate;
Wherein is in the semiconductor region, the silicide region being in contact with, the a first conductive type, wherein the concentration than the semiconductor region is higher second doped devices structure comprises regions and, the.
前記第１のドープ処理された領域に隣接しており、前記実質的に連続しているドープ処理された領域の縁部から間隔を空けて配置されている、前記実質的に連続しているドープ処理された領域内の分離領域と、
第３のドープ処理された領域であって、前記第３のドープ処理された領域と前記実質的に連続しているドープ処理された領域との間に空間ができるように、前記実質的に連続しているドープ処理された領域から間隔を空けて配置されている、前記半導体領域と同じ導電性型式の第３のドープ処理された領域と、
前記第３のドープ処理された領域の一部分、前記空間、前記実質的に連続しているドープ処理された領域の一部分、及び前記分離領域の一部分に重なっているゲート構造と、を備えている、請求項２に記載のデバイス構造体。 The LDMOS transistor structure is:
The substantially continuous dope adjacent to the first doped region and spaced from an edge of the substantially continuous doped region. A separation area within the processed area; and
A third doped region, the substantially continuous such that there is a space between the third doped region and the substantially continuous doped region. A third doped region of the same conductivity type as the semiconductor region, spaced from the doped region
A gate structure overlying a portion of the third doped region, the space, a portion of the substantially continuous doped region, and a portion of the isolation region; device structure of claim 2.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/875,105 US7141860B2 (en) | 2004-06-23 | 2004-06-23 | LDMOS transistor |
| PCT/US2005/016254 WO2006007070A2 (en) | 2004-06-23 | 2005-05-11 | Ldmos transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008504680A JP2008504680A (en) | 2008-02-14 |
| JP2008504680A5 true JP2008504680A5 (en) | 2008-07-03 |
Family
ID=35504712
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007518063A Pending JP2008504680A (en) | 2004-06-23 | 2005-05-11 | LDMOS transistor |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7141860B2 (en) |
| EP (1) | EP1759416A4 (en) |
| JP (1) | JP2008504680A (en) |
| KR (1) | KR20070026625A (en) |
| CN (1) | CN100481493C (en) |
| TW (1) | TWI393255B (en) |
| WO (1) | WO2006007070A2 (en) |
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7074658B2 (en) * | 2003-05-05 | 2006-07-11 | Vanguard International Semiconductor Corporatio | Structure for an LDMOS transistor and fabrication method for thereof |
| US7608907B2 (en) * | 2005-01-06 | 2009-10-27 | Micrel, Inc. | LDMOS gate controlled schottky diode |
| US20060163658A1 (en) * | 2005-01-21 | 2006-07-27 | Anderson Samuel J | Monolithic MOSFET and schottky diode for mobile phone boost converter |
| JP4845410B2 (en) * | 2005-03-31 | 2011-12-28 | 株式会社リコー | Semiconductor device |
| US8004038B2 (en) * | 2006-05-22 | 2011-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Suppression of hot-carrier effects using double well for thin gate oxide LDMOS embedded in HV process |
| JP5222466B2 (en) * | 2006-08-09 | 2013-06-26 | ルネサスエレクトロニクス株式会社 | Semiconductor device and manufacturing method thereof |
| KR100932137B1 (en) * | 2007-06-08 | 2009-12-16 | 주식회사 동부하이텍 | Structure of Horizontal DMOS Device and Manufacturing Method Thereof |
| US7541247B2 (en) * | 2007-07-16 | 2009-06-02 | International Business Machines Corporation | Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication |
| JP5487852B2 (en) * | 2008-09-30 | 2014-05-14 | サンケン電気株式会社 | Semiconductor device |
| KR101522530B1 (en) * | 2008-12-24 | 2015-05-26 | 주식회사 동부하이텍 | Apparatus of protecting Semiconductor device from the Electro Static Discharge, and method for manufactruing the same |
| US8525257B2 (en) * | 2009-11-18 | 2013-09-03 | Micrel, Inc. | LDMOS transistor with asymmetric spacer as gate |
| US20110156810A1 (en) * | 2009-12-30 | 2011-06-30 | Intersil Americas Inc. | Integrated dmos and schottky |
| US8878329B2 (en) * | 2010-09-17 | 2014-11-04 | United Microelectronics Corp. | High voltage device having Schottky diode |
| US8587058B2 (en) * | 2012-01-02 | 2013-11-19 | United Microelectronics Corp. | Lateral diffused metal-oxide-semiconductor device |
| CN103208520B (en) * | 2012-01-13 | 2017-06-23 | 联华电子股份有限公司 | Lateral diffused metal-oxide semiconductor element |
| US8686502B2 (en) * | 2012-03-19 | 2014-04-01 | Texas Instruments Incorporated | Schottky diode integrated into LDMOS |
| US9111767B2 (en) | 2012-06-29 | 2015-08-18 | Freescale Semiconductor, Inc. | Semiconductor device and driver circuit with source and isolation structure interconnected through a diode circuit, and method of manufacture thereof |
| US9142554B2 (en) | 2012-06-29 | 2015-09-22 | Freescale Semiconductor, Inc. | Semiconductor device and driver circuit with an active device and isolation structure interconnected through a diode circuit, and method of manufacture thereof |
| US20140001546A1 (en) | 2012-06-29 | 2014-01-02 | Hubert M. Bode | Semiconductor device and driver circuit with a current carrying region and isolation structure interconnected through a resistor circuit, and method of manufacture thereof |
| US9129990B2 (en) | 2012-06-29 | 2015-09-08 | Freescale Semiconductor, Inc. | Semiconductor device and driver circuit with drain and isolation structure interconnected through a diode circuit, and method of manufacture thereof |
| CN103377612B (en) * | 2013-07-15 | 2016-06-15 | 四川长虹电器股份有限公司 | A kind of improve the row scanning chip controls method that plasma display EMI low frequency exceeds standard |
| CN104701372B (en) * | 2013-12-06 | 2017-10-27 | 无锡华润上华科技有限公司 | Transverse diffusion metal oxide semiconductor device and its manufacture method |
| CN104752423B (en) * | 2013-12-31 | 2018-08-21 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor devices and its manufacturing method and electronic device |
| CN104603949B (en) | 2014-01-27 | 2019-10-01 | 瑞萨电子株式会社 | Semiconductor devices |
| US9461639B2 (en) | 2014-05-16 | 2016-10-04 | Freescale Semiconductor, Inc. | Semiconductor device and power circuit including a sense transistor for current sensing |
| WO2016028943A1 (en) | 2014-08-19 | 2016-02-25 | Vishay-Siliconix | Electronic circuit |
| KR102391348B1 (en) * | 2014-12-29 | 2022-04-28 | 삼성디스플레이 주식회사 | Thin film transistor array substrate and organic light-emitting display including the same |
| TWI641107B (en) * | 2017-12-25 | 2018-11-11 | 新唐科技股份有限公司 | Lateral diffused metal oxide semiconductor field effect transistor |
| TWI646653B (en) * | 2017-12-28 | 2019-01-01 | 新唐科技股份有限公司 | Laterally diffused metal oxide semiconductor field effect transistor |
| TWI673880B (en) * | 2018-11-21 | 2019-10-01 | 新唐科技股份有限公司 | Laterally diffused metal oxide semiconductor device |
| DE102019130376A1 (en) | 2019-01-04 | 2020-07-09 | Infineon Technologies Ag | SILICON CARBIDE DEVICE WITH SCHOTTKY CONTACT |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4989058A (en) * | 1985-11-27 | 1991-01-29 | North American Philips Corp. | Fast switching lateral insulated gate transistors |
| JP2712359B2 (en) * | 1988-09-01 | 1998-02-10 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| JP3232763B2 (en) * | 1992-04-17 | 2001-11-26 | 富士電機株式会社 | Semiconductor device and driving method thereof |
| JP3172642B2 (en) * | 1994-11-01 | 2001-06-04 | シャープ株式会社 | Semiconductor device |
| JPH0974142A (en) * | 1995-09-06 | 1997-03-18 | New Japan Radio Co Ltd | Semiconductor integrated circuit device |
| US5886383A (en) | 1997-01-10 | 1999-03-23 | International Rectifier Corporation | Integrated schottky diode and mosgated device |
| US5925910A (en) * | 1997-03-28 | 1999-07-20 | Stmicroelectronics, Inc. | DMOS transistors with schottky diode body structure |
| JP2002134744A (en) * | 2000-10-25 | 2002-05-10 | Nec Corp | Horizontal-type insulated-gate field effect transistor and its driving method |
| JP2003017701A (en) * | 2001-07-04 | 2003-01-17 | Denso Corp | Semiconductor device |
| JP2003023099A (en) * | 2001-07-10 | 2003-01-24 | Nissan Motor Co Ltd | Field effect transistor |
| US6573562B2 (en) | 2001-10-31 | 2003-06-03 | Motorola, Inc. | Semiconductor component and method of operation |
| US6924531B2 (en) * | 2003-10-01 | 2005-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | LDMOS device with isolation guard rings |
| JP2005116876A (en) * | 2003-10-09 | 2005-04-28 | Toshiba Corp | Semiconductor device |
| US6995428B2 (en) * | 2004-02-24 | 2006-02-07 | System General Corp. | High voltage LDMOS transistor having an isolated structure |
-
2004
- 2004-06-23 US US10/875,105 patent/US7141860B2/en not_active Expired - Fee Related
-
2005
- 2005-05-11 CN CNB200580020781XA patent/CN100481493C/en not_active Expired - Fee Related
- 2005-05-11 WO PCT/US2005/016254 patent/WO2006007070A2/en not_active Application Discontinuation
- 2005-05-11 JP JP2007518063A patent/JP2008504680A/en active Pending
- 2005-05-11 EP EP05747825A patent/EP1759416A4/en not_active Withdrawn
- 2005-05-11 KR KR1020067026921A patent/KR20070026625A/en not_active Application Discontinuation
- 2005-06-10 TW TW094119328A patent/TWI393255B/en not_active IP Right Cessation
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2008504680A5 (en) | ||
| JP2008529302A5 (en) | ||
| JP2009060096A5 (en) | ||
| JP2004241755A5 (en) | ||
| WO2010051133A3 (en) | Semiconductor devices having faceted silicide contacts, and related fabrication methods | |
| JP2009516361A5 (en) | ||
| JP2010062536A5 (en) | Thin film transistor and display device having the thin film transistor | |
| JP2010183022A5 (en) | Semiconductor device | |
| TW200509259A (en) | Highly integrated semiconductor device with silicide layer that secures contact margin and method of manufacturing the same | |
| TW200629477A (en) | Single metal gate CMOS device | |
| JP2009514233A5 (en) | ||
| SG139657A1 (en) | Structure and method to implement dual stressor layers with improved silicide control | |
| JP2009283496A5 (en) | ||
| JP2009521131A5 (en) | ||
| TW200618122A (en) | MOSFET structure with multiple self-aligned silicide contacts | |
| TW200631065A (en) | Strained transistor with hybrid-strain inducing layer | |
| WO2007110832A3 (en) | Trench-gate semiconductor device and method of fabrication thereof | |
| JP2013544021A5 (en) | ||
| JP2011077509A5 (en) | Transistor | |
| JP2003007843A5 (en) | ||
| TW200721486A (en) | Field effect transistor and method of manufacturing the same | |
| TW200711133A (en) | Semiconductor device | |
| JP2006324517A5 (en) | ||
| JP2007214267A5 (en) | ||
| JP2006013450A5 (en) |