JP2008502069A5 - - Google Patents

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Publication number
JP2008502069A5
JP2008502069A5 JP2007526629A JP2007526629A JP2008502069A5 JP 2008502069 A5 JP2008502069 A5 JP 2008502069A5 JP 2007526629 A JP2007526629 A JP 2007526629A JP 2007526629 A JP2007526629 A JP 2007526629A JP 2008502069 A5 JP2008502069 A5 JP 2008502069A5
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JP
Japan
Prior art keywords
memory
cache
address
coherency
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007526629A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008502069A (ja
Filing date
Publication date
Priority claimed from EP04013507A external-priority patent/EP1605360B1/en
Application filed filed Critical
Publication of JP2008502069A publication Critical patent/JP2008502069A/ja
Publication of JP2008502069A5 publication Critical patent/JP2008502069A5/ja
Pending legal-status Critical Current

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JP2007526629A 2004-06-08 2005-05-31 メモリ・キャッシュ制御装置及びそのためのコヒーレンシ動作を実行する方法 Pending JP2008502069A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04013507A EP1605360B1 (en) 2004-06-08 2004-06-08 Cache coherency maintenance for DMA, task termination and synchronisation operations
PCT/IB2005/051774 WO2005121966A2 (en) 2004-06-08 2005-05-31 Cache coherency maintenance for dma, task termination and synchronisation operations

Publications (2)

Publication Number Publication Date
JP2008502069A JP2008502069A (ja) 2008-01-24
JP2008502069A5 true JP2008502069A5 (OSRAM) 2008-07-10

Family

ID=34925293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007526629A Pending JP2008502069A (ja) 2004-06-08 2005-05-31 メモリ・キャッシュ制御装置及びそのためのコヒーレンシ動作を実行する方法

Country Status (7)

Country Link
US (1) US20080301371A1 (OSRAM)
EP (1) EP1605360B1 (OSRAM)
JP (1) JP2008502069A (OSRAM)
CN (1) CN101617298B (OSRAM)
AT (1) ATE458222T1 (OSRAM)
DE (1) DE602004025556D1 (OSRAM)
WO (1) WO2005121966A2 (OSRAM)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9281945B2 (en) 2003-12-30 2016-03-08 Entrust, Inc. Offline methods for authentication in a client/server authentication system
US8966579B2 (en) * 2003-12-30 2015-02-24 Entrust, Inc. Method and apparatus for providing authentication between a sending unit and a recipient based on challenge usage data
US8060915B2 (en) * 2003-12-30 2011-11-15 Entrust, Inc. Method and apparatus for providing electronic message authentication
US9191215B2 (en) * 2003-12-30 2015-11-17 Entrust, Inc. Method and apparatus for providing authentication using policy-controlled authentication articles and techniques
US8612757B2 (en) * 2003-12-30 2013-12-17 Entrust, Inc. Method and apparatus for securely providing identification information using translucent identification member
US8230486B2 (en) * 2003-12-30 2012-07-24 Entrust, Inc. Method and apparatus for providing mutual authentication between a sending unit and a recipient
US20090210629A1 (en) * 2008-02-15 2009-08-20 International Business Machines Corporation Method, system and computer program product for selectively purging cache entries
JP5728982B2 (ja) * 2010-02-26 2015-06-03 株式会社Ｊｖｃケンウッド 処理装置および書込方法
CN102035733B (zh) * 2010-11-29 2013-04-10 武汉微创光电股份有限公司 通过以太网建立串行数据透明传输通道的方法
US9026698B2 (en) * 2013-03-15 2015-05-05 Intel Corporation Apparatus, system and method for providing access to a device function
CN104969203B (zh) 2013-03-28 2017-08-15 慧与发展有限责任合伙企业 利用反射内存实现一致性
WO2015195076A1 (en) * 2014-06-16 2015-12-23 Hewlett-Packard Development Company, L.P. Cache coherency for direct memory access operations
CN106302374B (zh) * 2015-06-26 2019-08-16 深圳市中兴微电子技术有限公司 一种用于提高表项访问带宽和原子性操作的装置及方法
US20180054480A1 (en) * 2016-08-17 2018-02-22 Microsoft Technology Licensing, Llc Interrupt synchronization of content between client device and cloud-based storage service
US10157139B2 (en) * 2016-09-19 2018-12-18 Qualcomm Incorporated Asynchronous cache operations
CN109101439B (zh) * 2017-06-21 2024-01-09 深圳市中兴微电子技术有限公司 一种报文处理的方法及装置
CN114157621A (zh) * 2020-09-07 2022-03-08 华为技术有限公司 一种发送清除报文的方法及装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4713755A (en) * 1985-06-28 1987-12-15 Hewlett-Packard Company Cache memory consistency control with explicit software instructions
JPH0816885B2 (ja) * 1993-04-27 1996-02-21 工業技術院長 キャッシュメモリ制御方法
JP3320562B2 (ja) * 1994-09-22 2002-09-03 株式会社東芝 キャッシュメモリを有する電子計算機
JP3176255B2 (ja) * 1995-06-09 2001-06-11 日本電気株式会社 キャッシュメモリ装置
US6378047B1 (en) * 1997-07-07 2002-04-23 Micron Technology, Inc. System and method for invalidating set-associative cache memory with simultaneous set validity determination
EP1030243B1 (en) * 1999-02-18 2002-10-30 Texas Instruments France Optimized hardware cleaning function for virtual index virtual tag data cache
ATE548695T1 (de) * 2000-08-21 2012-03-15 Texas Instruments France Softwaregesteuerte cache-speicherkonfiguration
EP1182563B1 (en) * 2000-08-21 2009-09-02 Texas Instruments France Cache with DMA and dirty bits
EP1182559B1 (en) * 2000-08-21 2009-01-21 Texas Instruments Incorporated Improved microprocessor
JP2004102825A (ja) * 2002-09-11 2004-04-02 Renesas Technology Corp キャッシュメモリ制御装置
US8010682B2 (en) * 2004-12-28 2011-08-30 International Business Machines Corporation Early coherency indication for return data in shared memory architecture

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