JP2008288516A - Flexible substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flexible substrate which suppresses variation of characteristic impedance of a strip line and whose width is narrow. <P>SOLUTION: An empty portion 30 is formed between a first dielectric layer 10 and a second dielectric layer 20. In the first dielectric layer 10, a coplanar line is formed by providing a center strip line 11 and grounds 12 on both sides thereof, while in the second dielectric layer 20, a ground 21 that faces the coplanar line 11, 12 is provided. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a flexible substrate having a hollow portion.

  As known from Patent Document 1, there is a flexible strip line constituted by a signal line and a ground portion of a flexible substrate. In this flexible strip line, a ground portion is formed by two metal conductor plates on the front and back surfaces of a flexible substrate made of a substrate material such as polyimide and having at least three conductor layers. A signal line is formed by a strip-shaped metal conductor disposed in a substantially parallel center and spaced apart in parallel by a dielectric material of a flexible substrate.

  Further, as is known from Patent Document 2, there is one in which a radio circuit portion configured on a multilayer substrate and an antenna are electrically connected via a microstrip line. As the microstrip line, the ground pattern and the transmission line are embedded in a resin film made of a thermoplastic resin, or four film substrates are laminated so that the transmission line is located between the ground patterns. There is something that was made.

  As known from Patent Document 3, there is a flexible substrate on which six or three signal patterns are located between ground patterns, and further, inner vias that connect the ground patterns between the signal patterns in the interior. There is something that provided.

  Further, as is known from Patent Document 4, it has an insulating portion obtained by laminating a plurality of electrode conductors arranged at a predetermined interval with two flexible insulating films, and is exposed without being laminated with an insulating film. There is a flexible flat cable composed of a first flexible flat cable member and a second flexible flat cable member each having a strip portion which is a group of electrode conductors formed at both ends. The strip portions at both ends of the first flexible flat cable member and the second flexible flat cable member are fixed to both front and back surfaces of one double-sided connector forming plate to form double-sided connector electrode portions. Yes. Thereby, the hollow part is formed between the 1st flexible flat cable member and the 2nd flexible flat cable member.

FIG. 5 is a cross-sectional view showing a microstrip line composed of two opposing single-sided FPCs (flexible printed circuit boards) as Conventional Example 1, where 110 is a first dielectric layer, 111 is a strip line, and 120 is a second line. The dielectric layer 121 is a ground, and 130 is a hollow portion (air). As shown in the figure, a strip line 111 is provided in the center of the first dielectric layer 110, and a ground 121 having a sufficient width is provided in the second dielectric layer 120. A hollow portion 130 is formed between the second dielectric layer 120 and air.
In such a microstrip line 111, the influence of the distance of the opposing ground 121 is large.

  Further, as known from Patent Document 5, a coplanar line having a strip line and a ground provided in parallel on the upper surface of a film-like polyimide resin, an inverted line provided on the lower surface, and both are connected by through holes, There is a structure in which a metal conductor selectively provided with a hole or a concave shape is bonded with a conductive adhesive, and the periphery of the inverted line is surrounded by air.

  FIG. 6 is a cross-sectional view showing a single-sided FPC coplanar line as Conventional Example 2, in which 110 is a first dielectric layer, 111 is a strip line, 112 is a ground, 120 is a second dielectric layer, and 130 is a hollow portion ( Air). That is, the first dielectric layer 110 is provided with a central strip line 111 and grounds 112 on both sides thereof in parallel to form a coplanar line. Further, the second dielectric layer 120 facing the first dielectric layer 110 via the air hollow portion 130 is not provided with a ground.

FIG. 7 is a cross-sectional view of a double-sided FPC showing Conventional Example 3, 210 is a base film, 211 is a strip line, 212 is a ground, 213 is an adhesive, 214 is a coverlay, 221 is a ground, 223 is an adhesive, Reference numeral 224 denotes a coverlay. As shown in the figure, a strip line 211 at the center and grounds 212 on both sides thereof are provided in parallel on a base film 210 made of polyimide, and these strip lines 211 and grounds 212 are covered with polyimide via an adhesive 213. Covered by a ray 214. A wide gland 221 is provided under the base film 210, and the gland 221 is covered with a polyimide cover lay 224 via an adhesive 223.
JP 2006-245863 A JP 2004-152963 A Japanese Patent Laid-Open No. 11-186686 JP 2005-78811 A JP 2002-151915 A

However, in a flexible substrate having a hollow portion, when the RF line is passed using two layers sandwiching the hollow portion, there is a problem that the characteristic impedance varies due to variations in the adhesion degree of the hollow portion.
In the case of using a coplanar line as shown in FIG. 6, since there is no ground under the stripline 111, the stripline 111 and the ground 112 on both sides thereof are widened (line width) in order to keep the characteristic impedance at 50Ω. The flexible substrate becomes wider.
In the double-sided FPC as shown in FIG. 7, the interlayer is thin and the width of the strip line 211 needs to be extremely narrow, so that it is difficult to realize a desired characteristic impedance. In addition, the amount of attenuation increases. Moreover, since wiring is arranged on both surfaces, disconnection occurs due to metal fatigue caused by bending.

  An object of the present invention is to realize a flexible substrate having a narrow substrate width while suppressing a change in the characteristic impedance of the stripline in the flexible substrate.

  In order to solve the above-described problems, the invention according to claim 1 is characterized in that a hollow portion is formed between the first dielectric layer and the second dielectric layer, and the first dielectric layer has a central portion. A strip board and ground on both sides thereof are provided to form a coplanar line, and the second dielectric layer is provided with a flexible board provided with a ground facing the coplanar line.

  The invention according to claim 2 is the flexible substrate according to claim 1, wherein vias connecting the ground of the first dielectric layer and the ground of the second dielectric layer are provided at both ends thereof. It is provided.

  According to the present invention, in a flexible substrate, a change in the characteristic impedance of the stripline can be suppressed, and the width of the substrate can be reduced.

Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.
1 and 2 show a configuration of an embodiment of a flexible substrate to which the present invention is applied. 10 is a first dielectric layer, 11 is a strip line, 12 is a ground, and 20 is a second dielectric layer. , 21 is a ground, 30 is a hollow part (air), 40 is a multilayer part, and 41 is a via (through hole).

As shown in an enlarged view in FIG. 2, a coplanar line is formed by providing a central strip line 11 and grounds 12 on both sides of the first dielectric layer 10 made of polyimide, for example, in parallel.
Further, the second dielectric layer 20 that is opposed to the first dielectric layer 10 through the air hollow portion 30, for example, formed of polyimide, is opposed to the coplanar line, that is, the central strip line 11. And the wide gland | grand | ground 21 facing the width | variety of the gland | grand | ground 12 of the both sides is provided.

And the flexible substrate which has the above hollow part 30, ie, both ends of FPC in the embodiment, as shown in FIG. The multilayer portion 40 is provided with a number of vias (through holes) 41 that connect the ground 12 of the first dielectric layer 10 and the ground 21 of the second dielectric layer 20.
In the above, the characteristic impedance of the strip line 11 is set to 33Ω to 75Ω, for example.

Next, FIG. 3 shows an example in which the FPC having the hollow portion 30 and having the multilayer portions 40 at both ends is mounted on the circuit board 50. One (left side in the illustrated example) of the multilayer portion 40 is connected to the circuit board 50. It is connected to an unillustrated FPC connector provided above.
Also, the other (right side in the illustrated example) multilayer section 40 has a coaxial connector (not shown) soldered on its surface, and a coaxial cable can be connected to the connector from the outside.
Since the FPC having such a hollow portion 30 is thin and flexible, free bending and effective use of an installation space are possible, and the circuit board 50 can be moved to a required place through a complicated route with a minimum space. The signal line can be pulled out.

By the way, the FPC having the hollow portion 30 described above specifically has a structure in which two copper foils on one side of the double-sided FPC are melted to form a single-sided state.
Here, in FIG. 4 which showed the example of the material structure of FPC with the hollow part 30, 10a and 20a are FPC, 10b and 20b are coverlays, 10c and 20c are copper foils, 10d and 20d are silver shields, 40a is A prepreg, 40b is a solder resist, and 40c and 40d are copper foils.

  That is, in the FPC having the hollow portion 30, the first dielectric layer 10 side is configured by the FPC 10a, the cover lay 10b, the copper foil 10c, and the silver shield 10d, and the second dielectric layer 20 side is the FPC 20a, the cover. A ray 20b, a copper foil 20c, and a silver shield 20d are included.

  Further, in the multilayer part 40, a prepreg 40a is interposed between the first dielectric layer 10 and the second dielectric layer 20, and the first dielectric layer 10 and the second dielectric layer 20 are formed. Solder resists 40b are respectively provided on the surface. Further, copper foils 40c and 40d are formed on both the front and back surfaces of the FPC 10a and the FPC 20a, respectively.

The thickness of each constituent material is shown in Table 1 below.

  In Table 1, copper plating is formed on the via 41, the upper FPC 10a corresponds to the PI-film, the upper copper foil 40d corresponds to the L1 pattern, and the lower FPC 10a copper foils 10c and 40c have the L2 pattern. Correspond. Further, the lower FPC 20a corresponds to the PI-film, the copper foils 20c and 40c on the upper surface thereof correspond to the L3 pattern, and the copper foil 40d on the lower surface of the FPC 20a corresponds to the L4 pattern.

As described above, according to the FPC having the hollow portion 30 of the embodiment, the central strip line 11 provided in the first dielectric layer 10, the ground 12 on both sides thereof, and the width provided in the second dielectric layer 20 are provided. The coplanar line is composed of a wide ground 21, the width of the strip line 11, the clearance between the strip line 11 and the ground 12 on both sides thereof, the characteristic impedance of the strip line, the hollow portion 30 is very small, and the FPCs are in close contact with each other If the hollow portion 30 is designed to be within the upper limit value of the allowable error range when the hollow portion 30 is very large and the gland 21 does not substantially exist so that the lower limit value of the allowable error range is maintained. Even if the hollow portion 30 changes, the characteristic impedance can satisfy the allowable error range.
Further, because of the coplanar line, the width of the FPC necessary for the configuration of the strip line can be made narrower than that of the microstrip line.

For example, the characteristic impedance of the stripline 11 is allowed to be 33Ω to 75Ω when a 50Ω system is designed with a VSWR of 1.5 or less. Therefore, when the hollow portion 30 is 0 mm, the characteristic impedance is about 40Ω, and when the hollow portion 30 is infinite, the characteristic impedance is about 70Ω. If designed to be compatible, the characteristic impedance can be in the range of 33 to 75Ω even if the FPC state changes.
That is, regardless of the distance of the hollow portion 30 between the single-sided FPCs, for example, it is possible to satisfy an allowable error range for a 50Ω system and a maximum VSWR 1.5 design.

In the above embodiment, a dielectric material made of polyimide, for example, is used. However, the present invention is not limited to this, and a dielectric material made of other materials may be used.
In addition, it is needless to say that other specific detailed structures can be appropriately changed.

It is the side view (a) and top view (b) which show the structure of one Embodiment of the flexible substrate to which this invention is applied. It is an expanded sectional view along the arrow AA of FIG.1 (b). It is the side view (a) and top view (b) which show the example which mounted the flexible substrate of FIG. 1 on the circuit board. FIG. 2 is a structural diagram illustrating a material configuration of a flexible substrate in FIG. 1. It is sectional drawing which showed the microstrip line of single-sided FPC as the prior art example 1. FIG. It is sectional drawing which showed the coplanar track | line of single-sided FPC as the prior art example 2. FIG. It is sectional drawing of the double-sided FPC which showed the prior art example 3. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... 1st dielectric material layer, 11 ... Strip line, 12 ... Ground, 20 ... 2nd dielectric material layer, 21 ... Ground, 30 ... Hollow part (air), 40 ... Multilayer part, 41 ... Via (through hole) ), 50 ... Circuit board

Claims (2)

Forming a hollow portion between the first dielectric layer and the second dielectric layer;
In the first dielectric layer, a central strip line and grounds on both sides thereof are provided to form a coplanar line,
A flexible substrate, wherein a ground facing the coplanar line is provided in the second dielectric layer.   The flexible substrate according to claim 1, wherein vias connecting the ground of the first dielectric layer and the ground of the second dielectric layer are provided at both ends of the flexible substrate.

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