JP2008282119A - Power source circuit and electronic equipment using power source circuit - Google Patents

Power source circuit and electronic equipment using power source circuit Download PDF

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JP2008282119A
JP2008282119A JP2007124204A JP2007124204A JP2008282119A JP 2008282119 A JP2008282119 A JP 2008282119A JP 2007124204 A JP2007124204 A JP 2007124204A JP 2007124204 A JP2007124204 A JP 2007124204A JP 2008282119 A JP2008282119 A JP 2008282119A
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power supply
active element
potential
main power
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Tetsuo Takagi
哲男 高木
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Seiko Epson Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To allow normal voltage detection even for the sharp transition of a main power source. <P>SOLUTION: This power source circuit includes a first active element and a second active element serially connected between a main power source line and an internal power source line; a third active element connected between a sub-power source line and an internal power source line; a voltage detection circuit connected to the mail power source line for outputting a voltage detection signal to be switched when the main power source is changed from an OFF state to a specific voltage or more, and to be switched when the main power source is changed from an ON state to a specific voltage or less; a holding time generation circuit connected to the main power source line for outputting a holding release signal a predetermined time after the main power source is changed to an ON state; a selection circuit for bringing the first active element into a conductive state, and for bringing the third active element into a non-conductive state when the voltage detection signal is switched, and the holding release signal is output, and for bringing the first active element into a non-conductive state, and for bringing the third active element into the conductive state when the voltage detection signal is switched; and a constant voltage generation circuit for outputting a constant voltage bringing the second active element into the conductive state. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、主電源と副電源の電源切り替えを行う電源回路、及び電源回路を用いた電子機器に関する。   The present invention relates to a power supply circuit that performs power supply switching between a main power supply and a sub power supply, and an electronic apparatus using the power supply circuit.

電子機器に組み込まれているリアルタイムクロック(RTC:Real Time Clock)は、それが組み込まれた製品の電源が切られた場合でも常に時刻を計測し続ける必要がある。そのためRTCの電源には、一般的に2系統の電源が必要である。一つは、主電源であり、組み込まれた製品の電源がONの時にRTCに動作電源を供給する。もう一つは、副電源であり、主電源がOFFになった時に備えて主電源から独立した動作電源を供給する。副電源は、一般的に2次電池から電源供給を受ける。そこでRTCには、主電源と副電源の状態を検出し、どちらか一方を選択して内部動作電源とする電源切替回路が用意されている。   A real time clock (RTC) incorporated in an electronic device needs to always measure time even when the power of the product in which the electronic device is incorporated is turned off. For this reason, two power sources are generally required for the RTC power source. One is a main power supply that supplies operating power to the RTC when the power of the incorporated product is ON. The other is a sub power supply that supplies an operating power independent from the main power in preparation for when the main power is turned off. The sub power supply is generally supplied with power from a secondary battery. Therefore, the RTC is provided with a power supply switching circuit that detects the state of the main power supply and the sub power supply and selects one of them as an internal operation power supply.

例えば特許文献1には、ダイオードにより主電源と2次電池を切り替える電源切替回路が記載されている。   For example, Patent Document 1 describes a power supply switching circuit that switches between a main power supply and a secondary battery using a diode.

電源切替回路の動作は通常、主電源のON/OFF状態を検出するための電圧検出回路と、電圧検出回路の出力値に応じて主電源または副電源のどちらか一方を内部動作電源に切り替える電源切替回路と、主電源がONの時、副電源に結線されている2次電池を充電するための充電回路と、から構成されている。   The operation of the power supply switching circuit is usually a voltage detection circuit for detecting the ON / OFF state of the main power supply, and a power supply that switches either the main power supply or the sub power supply to the internal operation power supply according to the output value of the voltage detection circuit The switching circuit and a charging circuit for charging a secondary battery connected to the sub power source when the main power source is ON are configured.

特に注目すべき点は、電圧検出回路は、主電源のONからOFFへの推移と、OFFからONへの推移を検出することで、電源切替回路を正常に動作させるためには、電圧検出回路自身の動作に必要な電源は、常時電圧が供給されている内部動作電源にする必要がある。これにより、電圧検出回路は、常時電圧検出動作が可能になる。   Of particular note is that the voltage detection circuit detects the transition from ON to OFF of the main power supply and the transition from OFF to ON so that the power supply switching circuit operates normally. The power supply necessary for its own operation needs to be an internal operation power supply to which a voltage is constantly supplied. As a result, the voltage detection circuit can always perform a voltage detection operation.

特開平4−163652号公報(図3)Japanese Patent Laid-Open No. 4-163652 (FIG. 3)

しかしながら、主電源がONからOFFへ急激に推移した場合、電圧検出回路が主電源の電圧低下を検出し、電源切替回路が内部動作電源を副電源に切り替えるまでの時間の遅れにより、内部動作電源が瞬間的に電圧低下を引き起こし、これが原因でRTC内部の時間データが破壊されることになる。また最悪の場合、電源の切り替えが行われないまま内部動作電源も接地電位になってしまう。さらに、主電源がOFFからONに変化する時、内部動作電源も急激に変化するため電圧検出回路も一定期間正常な電圧検出ができない場合がある。   However, when the main power supply changes suddenly from ON to OFF, the voltage detection circuit detects the voltage drop of the main power supply, and the internal operation power supply is delayed due to the time delay until the power supply switching circuit switches the internal operation power supply to the sub power supply. Causes a voltage drop instantaneously, which causes destruction of time data inside the RTC. In the worst case, the internal operation power supply also becomes the ground potential without switching the power supply. Furthermore, when the main power supply changes from OFF to ON, the internal operation power supply also changes abruptly, so that the voltage detection circuit may not be able to detect normal voltage for a certain period.

本発明は、このような事情に鑑みてなされたものであり、主電源の急激な推移に対しても正常に電圧検出ができ、主電源と副電源の切り替えを行うことができる電源回路、及び電源回路を用いた電子機器を提供することを目的とするものである。   The present invention has been made in view of such circumstances, and a power supply circuit that can normally detect a voltage even when the main power supply changes suddenly and can switch between a main power supply and a sub power supply, and An object of the present invention is to provide an electronic device using a power supply circuit.

上記課題を解決するために、本発明の電源回路では、主電源が印加される主電源線と、副電源が印加される副電源線と、内部電源が出力される内部電源線と、前記主電源線と前記内部電源線との間に直列に接続された第1の能動素子及び第2の能動素子と、前記副電源線と前記内部電源線との間に接続された第3の能動素子と、を含む電源切替回路と、前記内部電源で動作し、前記主電源線と接続され、前記主電源がOFF状態から規定電圧以上になった時点で第1電位から第2電位に切り替わり、前記主電源がON状態から前記規定電圧以下になった時点で前記第2電位から前記第1電位に切り替わる電圧検出信号を出力する電圧検出回路と、前記主電源線と接続され、前記主電源が前記ON状態になってから所定時間後に保留解除信号を出力する保留時間発生回路と、前記電圧検出信号が前記第1電位から前記第2電位に切り替わり、かつ前記保留解除信号が出力された時点で、前記第1の能動素子を導通状態かつ前記第3の能動素子を非導通状態にし、前記電圧検出信号が前記第2電位から前記第1電位に切り替わった時点で、前記第1の能動素子を非導通状態かつ前記第3の能動素子を導通状態にする選択回路と、前記内部電源で動作し、前記第2の能動素子のゲート端子に前記第2の能動素子を導通状態にする定電圧を出力する定電圧発生回路と、を含むことを要旨とする。   In order to solve the above problems, in the power supply circuit of the present invention, a main power supply line to which a main power supply is applied, a subpower supply line to which a subpower supply is applied, an internal power supply line to which an internal power supply is output, and the main power supply line A first active element and a second active element connected in series between a power supply line and the internal power supply line, and a third active element connected between the sub power supply line and the internal power supply line And a power supply switching circuit including the power supply circuit, connected to the main power supply line, and switched from a first potential to a second potential when the main power supply becomes a specified voltage or more from an OFF state, A voltage detection circuit that outputs a voltage detection signal that switches from the second potential to the first potential when the main power source becomes the specified voltage or less from the ON state; and the main power source line is connected to the main power source. A hold release signal is issued after a predetermined time from the ON state. A holding time generation circuit that is activated, and when the voltage detection signal is switched from the first potential to the second potential and the hold release signal is output, the first active element is turned on and the third active element is turned on. When the voltage detection signal is switched from the second potential to the first potential, the first active element is turned off and the third active element is turned on. And a constant voltage generation circuit that operates with the internal power supply and outputs a constant voltage that makes the second active element conductive to the gate terminal of the second active element. To do.

この構成によれば、主電源の立ち上り時に電圧検出回路が不安定となる期間を保留時間発生回路により保留することができるので正常に主電源の電圧検出ができ、主電源と副電源の切り替えを行うことができる。さらに、主電源が急激に立ち下がった時に定電圧発生回路と第2の能動素子により内部電源が副電源よりも下がってしまうことを抑止できるので、主電源の急激な推移に対しても正常に電圧検出ができ、主電源と副電源の切り替えを行うことができる。   According to this configuration, the period during which the voltage detection circuit becomes unstable at the rise of the main power supply can be held by the hold time generation circuit, so that the voltage of the main power supply can be normally detected and switching between the main power supply and the sub power supply can be performed. It can be carried out. Furthermore, since the constant voltage generation circuit and the second active element can prevent the internal power supply from dropping below the sub power supply when the main power supply suddenly falls, it is normal for a sudden transition of the main power supply. The voltage can be detected, and the main power supply and the sub power supply can be switched.

また、上記課題を解決するために、本発明の電源回路では、主電源が印加される主電源線と、副電源が印加される副電源線と、内部電源が出力される内部電源線と、前記主電源線と前記内部電源線との間に直列に接続された第1の能動素子及び第2の能動素子と、前記副電源線と前記内部電源線との間に接続された第3の能動素子と、を含む電源切替回路と、前記副電源で動作し、前記主電源線と接続され、前記主電源がOFF状態から規定電圧以上になった時点で第1電位から第2電位に切り替わり、前記主電源がON状態から前記規定電圧以下になった時点で前記第2電位から前記第1電位に切り替わる電圧検出信号を出力する電圧検出回路と、前記電圧検出信号が前記第1電位から前記第2電位に切り替わった時点で、前記第1の能動素子を導通状態かつ前記第3の能動素子を非導通状態にし、前記電圧検出信号が前記第2電位から前記第1電位に切り替わった時点で、前記第1の能動素子を非導通状態かつ前記第3の能動素子を導通状態にする選択回路と、前記副電源で動作し、前記第2の能動素子のゲート端子に前記第2の能動素子を導通状態にする定電圧を出力する定電圧発生回路と、を含むことを要旨とする。   In order to solve the above problems, in the power supply circuit of the present invention, a main power supply line to which a main power supply is applied, a subpower supply line to which a subpower supply is applied, an internal power supply line to which an internal power supply is output, A first active element and a second active element connected in series between the main power supply line and the internal power supply line, and a third active element connected between the sub power supply line and the internal power supply line. A power supply switching circuit including an active element, operates with the sub power supply, is connected to the main power supply line, and switches from the first potential to the second potential when the main power supply becomes a specified voltage or higher from the OFF state. A voltage detection circuit that outputs a voltage detection signal that switches from the second potential to the first potential when the main power source becomes the specified voltage or less from the ON state; and the voltage detection signal is changed from the first potential to the first potential. At the time of switching to the second potential, the first active When the child is turned on and the third active element is turned off, and the voltage detection signal is switched from the second potential to the first potential, the first active element is turned off and the first active element is turned off. And a constant voltage generation circuit that operates with the sub-power supply and outputs a constant voltage that makes the second active element conductive to the gate terminal of the second active element. It is a summary to include.

この構成によれば、主電源が急激に立ち下がった時に定電圧発生回路と第2の能動素子により内部電源が副電源よりも下がってしまうことを抑止できるので、主電源の急激な推移に対しても正常に電圧検出ができ、主電源と副電源の切り替えを行うことができる。   According to this configuration, when the main power supply suddenly falls, the constant voltage generation circuit and the second active element can prevent the internal power supply from dropping below the sub power supply. However, the voltage can be detected normally and the main power supply and the sub power supply can be switched.

また、上記課題を解決するために、本発明の電源回路では、主電源が印加される主電源線と、副電源が印加される副電源線と、内部電源が出力される内部電源線と、前記主電源線と前記内部電源線との間に直列に接続された第1の能動素子及び第2の能動素子と、前記副電源線と前記内部電源線との間に接続された第3の能動素子と、を含む電源切替回路と、前記副電源で動作し、前記主電源線と接続され、前記主電源がOFF状態から規定電圧以上になった時点で第1電位から第2電位に切り替わり、前記主電源がON状態から前記規定電圧以下になった時点で前記第2電位から前記第1電位に切り替わる電圧検出信号を出力する電圧検出回路と、前記主電源線と接続され、前記主電源が前記ON状態になってから所定時間後に保留解除信号を出力する保留時間発生回路と、前記電圧検出信号が前記第1電位から前記第2電位に切り替わり、かつ前記保留解除信号が出力された時点で、前記第1の能動素子を導通状態かつ前記第3の能動素子を非導通状態にし、前記電圧検出信号が前記第2電位から前記第1電位に切り替わった時点で、前記第1の能動素子を非導通状態かつ前記第3の能動素子を導通状態にする選択回路と、前記副電源で動作し、前記第2の能動素子のゲート端子に前記第2の能動素子を導通状態にする定電圧を出力する定電圧発生回路と、を含むことを要旨とする。   In order to solve the above problems, in the power supply circuit of the present invention, a main power supply line to which a main power supply is applied, a subpower supply line to which a subpower supply is applied, an internal power supply line to which an internal power supply is output, A first active element and a second active element connected in series between the main power supply line and the internal power supply line, and a third active element connected between the sub power supply line and the internal power supply line. A power supply switching circuit including an active element, operates with the sub power supply, is connected to the main power supply line, and switches from the first potential to the second potential when the main power supply becomes a specified voltage or higher from the OFF state. A voltage detection circuit that outputs a voltage detection signal that switches from the second potential to the first potential when the main power source becomes the specified voltage or less from the ON state; and the main power source line; Hold release signal after a predetermined time since the A holding time generation circuit for outputting the first active element in a conductive state and the first active element when the voltage detection signal is switched from the first potential to the second potential and the holding release signal is output. When the voltage detection signal is switched from the second potential to the first potential, the first active element is turned off and the third active element is turned on. And a constant voltage generation circuit that operates with the sub-power supply and outputs a constant voltage that makes the second active element conductive to the gate terminal of the second active element. And

この構成によれば、主電源の立ち上り時に電圧検出回路が不安定となる期間を保留時間発生回路により保留することができるので正常に主電源の電圧検出ができ、主電源と副電源の切り替えを行うことができる。さらに、主電源が急激に立ち下がった時に定電圧発生回路と第2の能動素子により内部電源が副電源よりも下がってしまうことを抑止できるので、主電源の急激な推移に対しても正常に電圧検出ができ、主電源と副電源の切り替えを行うことができる。   According to this configuration, the period during which the voltage detection circuit becomes unstable at the rise of the main power supply can be held by the hold time generation circuit, so that the voltage of the main power supply can be normally detected and switching between the main power supply and the sub power supply can be performed. It can be carried out. Furthermore, since the constant voltage generation circuit and the second active element can prevent the internal power supply from dropping below the sub power supply when the main power supply suddenly falls, it is normal for a sudden transition of the main power supply. The voltage can be detected, and the main power supply and the sub power supply can be switched.

また、上記課題を解決するために、本発明の電子機器では、上記記載の電源回路を含むことを要旨とするので、常時電源供給が必要な計時機器などを備えた時計、携帯電話などの電子機器での利用が考えられる。   In order to solve the above problems, the electronic device of the present invention is characterized by including the above-described power supply circuit. Therefore, an electronic device such as a timepiece or a mobile phone equipped with a timekeeping device that requires constant power supply. Use with equipment is considered.

以下、本発明を具体化した実施形態について図面に従って説明する。   DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings.

(第1実施形態)
<電源回路の構成>
まず、第1実施形態に係る電源回路の構成について、図1を参照して説明する。図1は、本発明の第1実施形態に係る電源回路の構成を示す回路図である。
(First embodiment)
<Configuration of power supply circuit>
First, the configuration of the power supply circuit according to the first embodiment will be described with reference to FIG. FIG. 1 is a circuit diagram showing a configuration of a power supply circuit according to the first embodiment of the present invention.

図1に示すように、電源回路1は、電源切替回路100と、電圧検出回路200と、保留時間発生回路300と、選択回路400と、定電圧発生回路500と、から構成されている。主電源線NMVには、主電源MVDDが供給される。副電源線NSVには、副電源SVDDが供給される。本実施形態では、主電源MVDD=3.3V、副電源SVDD=1.8V、で説明する。   As shown in FIG. 1, the power supply circuit 1 includes a power supply switching circuit 100, a voltage detection circuit 200, a hold time generation circuit 300, a selection circuit 400, and a constant voltage generation circuit 500. A main power supply MVDD is supplied to the main power supply line NMV. A sub power supply SVDD is supplied to the sub power supply line NSV. In the present embodiment, description will be made with the main power supply MVDD = 3.3V and the sub power supply SVDD = 1.8V.

電源切替回路100は、主電源線NMVと内部電源線NOVとの間に直列に接続された第1の能動素子であるPchトランジスタTR1及び第2の能動素子であるPchトランジスタTR2と、副電源線NSVと内部電源線NOVとの間に接続された2つのPchトランジスタTR31,TR32から構成される第3の能動素子であるPchトランジスタ対TR3と、から構成されている。電源切替回路100は、主電源MVDDと副電源SVDDとを切り替え、内部電源線NOVに内部電源OVDDを供給する。内部電源線NOVには、コンデンサC1が接続されている。   The power supply switching circuit 100 includes a Pch transistor TR1 as a first active element and a Pch transistor TR2 as a second active element connected in series between a main power supply line NMV and an internal power supply line NOV, and a sub power supply line. The Pch transistor pair TR3 is a third active element composed of two Pch transistors TR31 and TR32 connected between the NSV and the internal power supply line NOV. The power supply switching circuit 100 switches between the main power supply MVDD and the sub power supply SVDD, and supplies the internal power supply OVDD to the internal power supply line NOV. A capacitor C1 is connected to the internal power supply line NOV.

PchトランジスタTR1のソース端子は、PchトランジスタTR2のドレイン端子と接続され、PchトランジスタTR1のドレイン端子は、主電源線NMVに接続され、PchトランジスタTR2のソース端子は、内部電源線NOVと接続されている。このように接続することにより、内部電源線NOVの電流が主電源線NMVに逆流することを抑止することができる。   The source terminal of the Pch transistor TR1 is connected to the drain terminal of the Pch transistor TR2, the drain terminal of the Pch transistor TR1 is connected to the main power supply line NMV, and the source terminal of the Pch transistor TR2 is connected to the internal power supply line NOV. Yes. By connecting in this way, it is possible to prevent the current of the internal power supply line NOV from flowing back to the main power supply line NMV.

また、PchトランジスタTR31のドレイン端子は、PchトランジスタTR32のドレイン端子と接続され、PchトランジスタTR31のソース端子は、副電源線NSVと接続され、PchトランジスタTR32のソース端子は、内部電源線NOVと接続されている。このように接続することにより、内部電源線NOVの電流が副電源線NSVに逆流することを抑止することができる。   Further, the drain terminal of the Pch transistor TR31 is connected to the drain terminal of the Pch transistor TR32, the source terminal of the Pch transistor TR31 is connected to the sub power supply line NSV, and the source terminal of the Pch transistor TR32 is connected to the internal power supply line NOV. Has been. By connecting in this way, it is possible to prevent the current of the internal power supply line NOV from flowing back to the sub power supply line NSV.

電圧検出回路200は、電源電圧=内部電源OVDDで動作し、主電源MVDDがOFF状態(すなわちVSS)から規定電圧以上になった時点で第1電位であるVSSから第2電位である内部電源OVDDに切り替わり、主電源MVDDがON状態(すなわち3.3V)から規定電圧以下になった時点で内部電源OVDDからVSSに切り替わる電圧検出信号Vsenを出力する。なお、本実施形態では、規定電圧=1.2Vで説明する。   The voltage detection circuit 200 operates with the power supply voltage = the internal power supply OVDD, and when the main power supply MVDD becomes the specified voltage or higher from the OFF state (that is, VSS), the internal power supply OVDD that is the second potential from the VSS that is the first potential. The voltage detection signal Vsen which switches from the internal power supply OVDD to VSS is output when the main power supply MVDD becomes the specified voltage or less from the ON state (ie, 3.3 V). In the present embodiment, description will be made with the specified voltage = 1.2V.

保留時間発生回路300は、主電源MVDDがOFF状態からON状態に立ち上がるまでを保留解除信号Vhldとして出力し、主電源MVDDがON状態になってから所定時間後に保留解除信号VhldをON状態(3.3V)からOFF状態(VSS)に切り替える。   The hold time generation circuit 300 outputs the hold release signal Vhld until the main power supply MVDD rises from the OFF state to the ON state, and sets the hold release signal Vhld to the ON state (3) after the main power supply MVDD is turned ON. .3V) to OFF state (VSS).

選択回路400は、電源電圧=内部電源OVDDで動作し、2つのレベルシフタLS1,LS2と、2つのインバータIN1,IN2と、2入力のNAND回路NA1と、から構成されている。レベルシフタLS1は、電圧検出信号Vsenを入力し、NAND回路NA1の一方の入力端子に出力する。レベルシフタLS2は、保留解除信号Vhldを入力し、インバータIN1を介してNAND回路NA1の他方の入力端子に出力する。NAND回路NA1の出力端子は、PchトランジスタTR1のゲート端子に選択信号Vconを出力し、さらに、インバータIN2を介してPchトランジスタTR31,TR32のゲート端子に反転選択信号VconXを出力する。   The selection circuit 400 operates with the power supply voltage = the internal power supply OVDD, and includes two level shifters LS1 and LS2, two inverters IN1 and IN2, and a two-input NAND circuit NA1. The level shifter LS1 receives the voltage detection signal Vsen and outputs it to one input terminal of the NAND circuit NA1. The level shifter LS2 receives the hold release signal Vhld and outputs it to the other input terminal of the NAND circuit NA1 via the inverter IN1. The output terminal of the NAND circuit NA1 outputs the selection signal Vcon to the gate terminal of the Pch transistor TR1, and further outputs the inverted selection signal VconX to the gate terminals of the Pch transistors TR31 and TR32 via the inverter IN2.

定電圧発生回路500は、電源電圧=内部電源OVDDで動作し、定電圧VREG1をPchトランジスタTR2のゲート端子に出力する。本実施形態では、定電圧VREG1=1.2V、PchトランジスタTR2の閾値電圧Vth=0.6Vで説明する。   The constant voltage generation circuit 500 operates with power supply voltage = internal power supply OVDD, and outputs a constant voltage VREG1 to the gate terminal of the Pch transistor TR2. In the present embodiment, description will be made with the constant voltage VREG1 = 1.2V and the threshold voltage Vth of the Pch transistor TR2 = 0.6V.

<電源回路の動作>
次に、電源回路の動作について図2を参照して説明する。図2は、電源回路の動作を示すタイミング図である。
<Operation of power supply circuit>
Next, the operation of the power supply circuit will be described with reference to FIG. FIG. 2 is a timing chart showing the operation of the power supply circuit.

主電源MVDDがOFF状態の時点t0以前から、副電源SVDD=1.8Vが印加されているものとする。また、時点t0以前は、電圧検出信号Vsen=VSS、保留解除信号Vhld=VSS、選択信号Vcon=1.8V、反転選択信号VconX=VSSとなり、Pchトランジスタ対TR3が導通状態、PchトランジスタTR1が非導通状態なので、内部電源OVDD=1.8Vとなる。PchトランジスタTR2は、ソース端子の電圧が内部電源OVDD=1.8Vなので、ゲート端子の電圧(定電圧VREG1=1.2V)+閾値電圧Vth(0.6V)≧ソース端子の電圧(1.8V)となり、非導通状態となる。   It is assumed that the sub power supply SVDD = 1.8 V has been applied before the time t0 when the main power supply MVDD is in the OFF state. Prior to time t0, the voltage detection signal Vsen = VSS, the hold release signal Vhld = VSS, the selection signal Vcon = 1.8 V, the inverted selection signal VconX = VSS, the Pch transistor pair TR3 is in a conductive state, and the Pch transistor TR1 is non Since it is in a conductive state, the internal power supply OVDD is 1.8V. Since the voltage of the source terminal of the Pch transistor TR2 is the internal power supply OVDD = 1.8V, the voltage of the gate terminal (constant voltage VREG1 = 1.2V) + the threshold voltage Vth (0.6V) ≧ the voltage of the source terminal (1.8V) ) And become non-conductive.

主電源MVDDは、時点t0から時点t2にかけてVSSから3.3Vに立ち上がる。保留解除信号Vhldも主電源MVDDに応じて時点t0から時点t2にかけてVSSから3.3Vに立ち上がる。   The main power supply MVDD rises from VSS to 3.3 V from time t0 to time t2. The hold release signal Vhld also rises from VSS to 3.3 V from time t0 to time t2 according to the main power supply MVDD.

時点t1において、主電源MVDDは、規定電圧=1.2Vに達するので、電圧検出信号VsenがVSSから内部電源OVDD=1.8Vに切り替わる。   At time t1, the main power supply MVDD reaches the specified voltage = 1.2V, so that the voltage detection signal Vsen is switched from VSS to the internal power supply OVDD = 1.8V.

時点t2で主電源MVDDが3.3Vに達してから所定時間経過後の時点t3において、保留解除信号Vhldが3.3VからVSSに切り替わる。この時点でNAND回路NA1の2つの入力端子の電位がHレベルとなるので、選択信号VconがVSSに切り替わり、反転選択信号VconXがまず1.8Vに切り替わり、Pchトランジスタ対TR3が非導通状態、PchトランジスタTR1,TR2が導通状態となるので、内部電源OVDD=3.3Vに切り替わる。内部電源OVDDが3.3Vに切り替わったので、電圧検出信号Vsenと反転選択信号VconXも3.3Vに切り替わる。   At a time t3 after a predetermined time has elapsed since the main power supply MVDD reached 3.3V at the time t2, the hold release signal Vhld is switched from 3.3V to VSS. At this time, since the potentials of the two input terminals of the NAND circuit NA1 become H level, the selection signal Vcon is switched to VSS, the inverted selection signal VconX is first switched to 1.8V, and the Pch transistor pair TR3 is in a non-conductive state, Pch Since the transistors TR1 and TR2 are turned on, the internal power supply OVDD is switched to 3.3V. Since the internal power supply OVDD is switched to 3.3V, the voltage detection signal Vsen and the inverted selection signal VconX are also switched to 3.3V.

主電源MVDDは、時点t4から時点t7にかけて3.3VからVSSに立ち下がる。内部電源OVDDも主電源MVDDに応じて時点t4から立ち下がるが、時点t5において内部電源OVDDが1.8Vとなり、PchトランジスタTR2が非導通状態となる。Pchトランジスタ対TR3も非導通状態なので、コンデンサC1に1.8Vの電位が保持され、内部電源OVDDが1.8Vに保たれる。内部電源OVDDの変移に応じて、電圧検出信号Vsenと反転選択信号VconXも変移する。   The main power supply MVDD falls from 3.3 V to VSS from time t4 to time t7. The internal power supply OVDD also falls from the time t4 according to the main power supply MVDD, but at the time t5, the internal power supply OVDD becomes 1.8 V, and the Pch transistor TR2 is turned off. Since the Pch transistor pair TR3 is also non-conductive, the potential of 1.8V is held in the capacitor C1, and the internal power supply OVDD is held at 1.8V. In response to the change of the internal power supply OVDD, the voltage detection signal Vsen and the inverted selection signal VconX are also changed.

時点t6において、主電源MVDDは、規定電圧=1.2Vに達するので、電圧検出信号Vsenが内部電源OVDD=1.8VからVSSに切り替わる。この時点で、選択信号VconがVSSから内部電源OVDD=1.8Vに切り替わり、反転選択信号VconXが内部電源OVDD=1.8VからVSSに切り替わる。Pchトランジスタ対TR3が導通状態、PchトランジスタTR1,TR2が非導通状態となるので、内部電源OVDDは、1.8Vを保持する。   At time t6, the main power supply MVDD reaches the specified voltage = 1.2V, so that the voltage detection signal Vsen is switched from the internal power supply OVDD = 1.8V to VSS. At this time, the selection signal Vcon is switched from VSS to the internal power supply OVDD = 1.8V, and the inversion selection signal VconX is switched from the internal power supply OVDD = 1.8V to VSS. Since the Pch transistor pair TR3 is conductive and the Pch transistors TR1 and TR2 are nonconductive, the internal power supply OVDD maintains 1.8V.

以上に述べた本実施形態によれば、以下の効果が得られる。   According to the present embodiment described above, the following effects can be obtained.

本実施形態では、主電源MVDDの立ち上り時に電圧検出回路200が不安定となる期間(時点t1〜t3)を保留時間発生回路300から出力される保留解除信号Vhldにより保留することができるので正常に主電源MVDDの電圧検出ができ、主電源MVDDと副電源SVDDの切り替えを行うことができる。さらに、主電源MVDDが急激に立ち下がった時に、定電圧発生回路500とPchトランジスタTR2により内部電源OVDDが副電源SVDDよりも下がってしまうことを抑止できるので、主電源MVDDの急激な推移に対しても正常に電圧検出ができ、主電源MVDDと副電源SVDDの切り替えを行うことができる。   In the present embodiment, the period (time t1 to t3) in which the voltage detection circuit 200 becomes unstable at the rise of the main power supply MVDD can be held by the hold release signal Vhld output from the hold time generation circuit 300, so that it is normal. The voltage of the main power supply MVDD can be detected, and the main power supply MVDD and the sub power supply SVDD can be switched. Furthermore, when the main power supply MVDD suddenly falls, the constant voltage generation circuit 500 and the Pch transistor TR2 can prevent the internal power supply OVDD from dropping below the sub power supply SVDD. However, the voltage can be detected normally and the main power supply MVDD and the sub power supply SVDD can be switched.

以上、本発明の実施形態を説明したが、本発明はこうした実施の形態に何ら限定されるものではなく、本発明の趣旨を逸脱しない範囲内において様々な形態で実施し得ることができる。以下、変形例を挙げて説明する。   As mentioned above, although embodiment of this invention was described, this invention is not limited to such embodiment at all, In the range which does not deviate from the meaning of this invention, it can be implemented with various forms. Hereinafter, a modification will be described.

(変形例1)本発明に係る電源回路の変形例1について説明する。前記第1実施形態では、電圧検出回路200と定電圧発生回路500が内部電源OVDDで動作し、保留時間発生回路300を有する構成で説明したが、図3に示すように、保留時間発生回路300を含まず、電圧検出回路200と定電圧発生回路500を副電源SVDDで動作させるようにしてもよい。図4は、図3の電源回路1の動作を示すタイミング図である。   (Modification 1) Modification 1 of the power supply circuit according to the present invention will be described. In the first embodiment, the voltage detection circuit 200 and the constant voltage generation circuit 500 operate with the internal power supply OVDD and have the hold time generation circuit 300. However, as shown in FIG. The voltage detection circuit 200 and the constant voltage generation circuit 500 may be operated by the sub power source SVDD. FIG. 4 is a timing chart showing the operation of the power supply circuit 1 of FIG.

(変形例2)本発明に係る電源回路の変形例2について説明する。前記変形例1では、電圧検出回路200と定電圧発生回路500を副電源SVDDで動作させ、保留時間発生回路300を含まない場合を説明したが、図5に示すように保留時間発生回路300を含んでもよい。図6は、図5の電源回路1の動作を示すタイミング図である。   (Modification 2) Modification 2 of the power supply circuit according to the present invention will be described. In the first modification, the voltage detection circuit 200 and the constant voltage generation circuit 500 are operated by the sub power source SVDD, and the hold time generation circuit 300 is not included. However, as shown in FIG. May be included. FIG. 6 is a timing chart showing the operation of the power supply circuit 1 of FIG.

本発明の第1実施形態に係る電源回路の構成を示す回路図。1 is a circuit diagram showing a configuration of a power supply circuit according to a first embodiment of the present invention. 電源回路の動作を示すタイミング図。The timing diagram which shows operation | movement of a power supply circuit. 本発明の変形例1に係る電源回路の構成を示す回路図。The circuit diagram which shows the structure of the power supply circuit which concerns on the modification 1 of this invention. 変形例1の電源回路の動作を示すタイミング図。FIG. 9 is a timing diagram illustrating an operation of a power supply circuit according to Modification 1; 本発明の変形例2に係る電源回路の構成を示す回路図。The circuit diagram which shows the structure of the power supply circuit which concerns on the modification 2 of this invention. 変形例2の電源回路の動作を示すタイミング図。FIG. 9 is a timing chart showing an operation of a power supply circuit according to Modification 2.

符号の説明Explanation of symbols

1…電源回路、100…電源切替回路、200…電圧検出回路、300…保留時間発生回路、400…選択回路、500…定電圧発生回路。   DESCRIPTION OF SYMBOLS 1 ... Power supply circuit, 100 ... Power supply switching circuit, 200 ... Voltage detection circuit, 300 ... Holding time generation circuit, 400 ... Selection circuit, 500 ... Constant voltage generation circuit

Claims (4)

主電源が印加される主電源線と、
副電源が印加される副電源線と、
内部電源が出力される内部電源線と、
前記主電源線と前記内部電源線との間に直列に接続された第1の能動素子及び第2の能動素子と、前記副電源線と前記内部電源線との間に接続された第3の能動素子と、を含む電源切替回路と、
前記内部電源で動作し、前記主電源線と接続され、前記主電源がOFF状態から規定電圧以上になった時点で第1電位から第2電位に切り替わり、前記主電源がON状態から前記規定電圧以下になった時点で前記第2電位から前記第1電位に切り替わる電圧検出信号を出力する電圧検出回路と、
前記主電源線と接続され、前記主電源が前記ON状態になってから所定時間後に保留解除信号を出力する保留時間発生回路と、
前記電圧検出信号が前記第1電位から前記第2電位に切り替わり、かつ前記保留解除信号が出力された時点で、前記第1の能動素子を導通状態かつ前記第3の能動素子を非導通状態にし、前記電圧検出信号が前記第2電位から前記第1電位に切り替わった時点で、前記第1の能動素子を非導通状態かつ前記第3の能動素子を導通状態にする選択回路と、
前記内部電源で動作し、前記第2の能動素子のゲート端子に前記第2の能動素子を導通状態にする定電圧を出力する定電圧発生回路と、
を含む、
ことを特徴とする電源回路。
A main power line to which the main power is applied;
A sub power line to which the sub power is applied;
An internal power line from which the internal power is output;
A first active element and a second active element connected in series between the main power supply line and the internal power supply line, and a third active element connected between the sub power supply line and the internal power supply line. A power switching circuit including an active element;
It operates with the internal power supply, is connected to the main power supply line, and switches from the first potential to the second potential when the main power supply becomes equal to or higher than the specified voltage from the OFF state, and the main power supply switches from the ON state to the specified voltage. A voltage detection circuit that outputs a voltage detection signal that switches from the second potential to the first potential when:
A holding time generation circuit that is connected to the main power supply line and outputs a holding release signal after a predetermined time from when the main power supply is in the ON state;
When the voltage detection signal is switched from the first potential to the second potential and the hold release signal is output, the first active element is turned on and the third active element is turned off. A selection circuit that brings the first active element into a non-conducting state and the third active element into a conducting state when the voltage detection signal is switched from the second potential to the first potential;
A constant voltage generating circuit that operates with the internal power supply and outputs a constant voltage for bringing the second active element into a conductive state to a gate terminal of the second active element;
including,
A power supply circuit characterized by that.
主電源が印加される主電源線と、
副電源が印加される副電源線と、
内部電源が出力される内部電源線と、
前記主電源線と前記内部電源線との間に直列に接続された第1の能動素子及び第2の能動素子と、前記副電源線と前記内部電源線との間に接続された第3の能動素子と、を含む電源切替回路と、
前記副電源で動作し、前記主電源線と接続され、前記主電源がOFF状態から規定電圧以上になった時点で第1電位から第2電位に切り替わり、前記主電源がON状態から前記規定電圧以下になった時点で前記第2電位から前記第1電位に切り替わる電圧検出信号を出力する電圧検出回路と、
前記電圧検出信号が前記第1電位から前記第2電位に切り替わった時点で、前記第1の能動素子を導通状態かつ前記第3の能動素子を非導通状態にし、前記電圧検出信号が前記第2電位から前記第1電位に切り替わった時点で、前記第1の能動素子を非導通状態かつ前記第3の能動素子を導通状態にする選択回路と、
前記副電源で動作し、前記第2の能動素子のゲート端子に前記第2の能動素子を導通状態にする定電圧を出力する定電圧発生回路と、
を含む、
ことを特徴とする電源回路。
A main power line to which the main power is applied;
A sub power line to which the sub power is applied;
An internal power line from which the internal power is output;
A first active element and a second active element connected in series between the main power supply line and the internal power supply line, and a third active element connected between the sub power supply line and the internal power supply line. A power switching circuit including an active element;
It operates with the sub power supply, is connected to the main power supply line, and switches from the first potential to the second potential when the main power supply becomes equal to or higher than the specified voltage from the OFF state. A voltage detection circuit that outputs a voltage detection signal that switches from the second potential to the first potential when:
When the voltage detection signal is switched from the first potential to the second potential, the first active element is turned on and the third active element is turned off, and the voltage detection signal is changed to the second potential. A selection circuit that switches the first active element to a non-conducting state and the third active element to a conducting state at the time of switching from a potential to the first potential;
A constant voltage generating circuit that operates with the sub-power supply and outputs a constant voltage for bringing the second active element into a conductive state to a gate terminal of the second active element;
including,
A power supply circuit characterized by that.
主電源が印加される主電源線と、
副電源が印加される副電源線と、
内部電源が出力される内部電源線と、
前記主電源線と前記内部電源線との間に直列に接続された第1の能動素子及び第2の能動素子と、前記副電源線と前記内部電源線との間に接続された第3の能動素子と、を含む電源切替回路と、
前記副電源で動作し、前記主電源線と接続され、前記主電源がOFF状態から規定電圧以上になった時点で第1電位から第2電位に切り替わり、前記主電源がON状態から前記規定電圧以下になった時点で前記第2電位から前記第1電位に切り替わる電圧検出信号を出力する電圧検出回路と、
前記主電源線と接続され、前記主電源が前記ON状態になってから所定時間後に保留解除信号を出力する保留時間発生回路と、
前記電圧検出信号が前記第1電位から前記第2電位に切り替わり、かつ前記保留解除信号が出力された時点で、前記第1の能動素子を導通状態かつ前記第3の能動素子を非導通状態にし、前記電圧検出信号が前記第2電位から前記第1電位に切り替わった時点で、前記第1の能動素子を非導通状態かつ前記第3の能動素子を導通状態にする選択回路と、
前記副電源で動作し、前記第2の能動素子のゲート端子に前記第2の能動素子を導通状態にする定電圧を出力する定電圧発生回路と、
を含む、
ことを特徴とする電源回路。
A main power line to which the main power is applied;
A sub power line to which the sub power is applied;
An internal power line from which the internal power is output;
A first active element and a second active element connected in series between the main power supply line and the internal power supply line, and a third active element connected between the sub power supply line and the internal power supply line. A power switching circuit including an active element;
It operates with the sub power supply, is connected to the main power supply line, and switches from the first potential to the second potential when the main power supply becomes equal to or higher than the specified voltage from the OFF state. A voltage detection circuit that outputs a voltage detection signal that switches from the second potential to the first potential when:
A holding time generation circuit that is connected to the main power supply line and outputs a holding release signal after a predetermined time from when the main power supply is in the ON state;
When the voltage detection signal is switched from the first potential to the second potential and the hold release signal is output, the first active element is turned on and the third active element is turned off. A selection circuit that brings the first active element into a non-conducting state and the third active element into a conducting state when the voltage detection signal is switched from the second potential to the first potential;
A constant voltage generating circuit that operates with the sub-power supply and outputs a constant voltage for bringing the second active element into a conductive state to a gate terminal of the second active element;
including,
A power supply circuit characterized by that.
請求項1から3のいずれか一項に記載の電源回路を含む、ことを特徴とする電子機器。   An electronic apparatus comprising the power supply circuit according to claim 1.
JP2007124204A 2007-05-09 2007-05-09 Power source circuit and electronic equipment using power source circuit Withdrawn JP2008282119A (en)

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Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105391161A (en) * 2014-09-03 2016-03-09 瑞萨电子株式会社 Semiconductor device
JP2019121413A (en) * 2018-01-11 2019-07-22 ラピスセミコンダクタ株式会社 Power supply switching control circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105391161A (en) * 2014-09-03 2016-03-09 瑞萨电子株式会社 Semiconductor device
JP2016053789A (en) * 2014-09-03 2016-04-14 ルネサスエレクトロニクス株式会社 Semiconductor device
JP2019121413A (en) * 2018-01-11 2019-07-22 ラピスセミコンダクタ株式会社 Power supply switching control circuit
JP7009223B2 (en) 2018-01-11 2022-01-25 ラピスセミコンダクタ株式会社 Power switching control circuit

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