JP2008281790A - Display panel and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display panel having an auxiliary capacitance capable of broadening the output dynamic range without increasing the amplitude of video signals supplied to pixels. <P>SOLUTION: An auxiliary capacitance Cs comprising a fixed auxiliary capacitance Cs0, an n-MOS capacitance Cs1 and a p-MOS capacitance Cs2 connected in parallel is provided between a pixel electrode and an auxiliary capacitance electrode CSL. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an auxiliary capacitor provided in a pixel of a display panel.

  In general, a pixel of an active matrix type liquid crystal display device is provided with an auxiliary capacitor. FIG. 5 shows an equivalent circuit of a pixel configuration of the liquid crystal display device.

  The pixel of FIG. 5 is a pixel in which writing is selected by a switch SW including a TFT having a gate electrode connected to the jth gate line GLj and a source electrode connected to the ith source line SLi. The drain electrode of the switch SW is connected to the pixel electrode that forms the liquid crystal capacitance CL with the counter electrode, and is arranged between the pixel electrode and the counter electrode when a data signal is written to the pixel from the source line SLi. A voltage corresponding to the data signal is applied to the liquid crystal layer, and display is performed. The drain electrode of the switch SW is also connected to an auxiliary capacitance electrode that forms an auxiliary capacitance Cs between the auxiliary capacitance wiring and the adjacent gate line GL. The entire capacitor Cp of the pixel is composed of a liquid crystal capacitor CL, an auxiliary capacitor Cs, and other parasitic capacitors. The auxiliary capacitor Cs holds electric charge according to the written data signal, and supplements the electric charge held in the liquid crystal capacitor CL with the large capacitance value, thereby stabilizing the voltage applied to the liquid crystal layer.

  The voltage applied to the auxiliary capacitance wiring may be the voltage Vcom applied to the counter electrode, or may be another voltage Vcs. In the case where the voltage Vcs can be applied to the auxiliary capacitance wiring independently of the voltage Vcom, the following effects can be obtained. The voltage Vcs is changed so that the pixel electrode potential is raised from the auxiliary capacitance line via the auxiliary capacitance Cs by changing the voltage Vcs so that it is larger when the switch SW is turned on than when the switch SW is turned on. A so-called push-up effect is obtained. Further, the voltage Vcs is changed so as to be smaller when the switch SW is turned off than when the switch SW is turned on when the negative polarity data is supplied, so that the pixel electrode potential is changed from the auxiliary capacitance line via the auxiliary capacitance Cs. A so-called push-down effect is obtained.

Due to the push-up effect and the push-down effect, it is possible to apply a voltage higher than the data signal voltage to the liquid crystal layer.
JP 2003-222902 A (released on August 8, 2003)

  However, in the above-described push-up and push-down effect using the auxiliary capacitor Cs, the pixel electrode potential is only shifted to the positive side when the positive data is present and to the negative side when the negative data is used. The dynamic range cannot be expanded. Rather, the dynamic range becomes smaller due to the difference in liquid crystal capacity between white display and black display. Therefore, there is a possibility that the change range of the output luminance is narrowed and the contrast is lowered.

  In order to ensure sufficient contrast, it is necessary to increase the amplitude of the video signal supplied to the source line. In this case, however, the power consumption increases, the design margin on the circuit decreases, the driver design constraints, etc. Cause a major drawback.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide a display panel having an auxiliary capacitor capable of expanding an output dynamic range without increasing the amplitude of a video signal supplied to a pixel. And to realize a display device.

  In order to solve the above problems, the display panel of the present invention is an active matrix display panel in which a capacitive pixel is provided with an auxiliary capacitor, and the auxiliary capacitor includes an electrode serving as a pixel electrode potential and an auxiliary capacitor wiring. And a first capacitor that always functions as a capacitor when a voltage is applied, and a MOS capacitor, and is connected in parallel.

  According to the above invention, if the voltage between the pixel electrode and the auxiliary capacitance line is such that an inversion layer is formed in the MOS capacitance, the auxiliary capacitance is a large capacitance value obtained by adding the MOS capacitance to the first capacitance. Thus, if the voltage between the pixel electrode and the auxiliary capacitance wiring is such that no inversion layer is formed in the MOS capacitance, the auxiliary capacitance has a small capacitance value consisting only of the first capacitance. Accordingly, since the auxiliary capacitance changes depending on the voltage of the video signal supplied to the pixel, the effect of raising and lowering the pixel electrode potential from the auxiliary capacitance wiring through the auxiliary capacitance is reduced by the voltage of the video signal. The dynamic range can be increased.

  As described above, there is an effect that it is possible to realize a display panel having an auxiliary capacitor capable of expanding the output dynamic range without increasing the amplitude of the video signal supplied to the pixel.

  In order to solve the above problems, the display panel of the present invention is characterized in that the gate electrode of the MOS capacitor is the auxiliary capacitor wiring.

  According to the above invention, there is an effect that the MOS capacitor can be easily realized by using the auxiliary capacitance wiring.

  In order to solve the above problems, the display panel of the present invention is characterized in that the layer on which the inversion layer of the MOS capacitor is formed is made of polycrystalline silicon.

  According to the invention described above, there is an effect that the MOS capacitor as the auxiliary capacitor can be easily realized in the display panel formed on the glass substrate.

In order to solve the above problems, the display panel according to the present invention is characterized in that the electrode serving as the pixel electrode potential is an n ⁺ polycrystalline silicon layer directly connected to a layer where the inversion layer is formed. Yes.

  According to the above invention, there is an effect that the electrode for forming the first capacitor and the layer in which the inversion layer of the MOS capacitor is formed can be easily connected.

  In the display panel of the present invention, in order to solve the above-described problem, the voltage applied to the auxiliary capacitance wiring is such that when the selection element included in the pixel of the active matrix display panel is OFF, the pixel capacitance is higher than when the selection element is ON. It changes from the time of ON so that the voltage applied to may rise.

  According to the invention described above, there is an effect that the voltage applied to the capacitor of the pixel can be increased by the push-up effect or push-down effect from the auxiliary capacitor wiring.

  In order to solve the above problems, the display panel of the present invention is driven by normally black.

  According to the above-described invention, the display panel driven by normally black displays white when the applied voltage to the pixel capacitor is large. Therefore, the display panel is pushed up by adding the MOS capacitor when the applied voltage is large. The effect and the push-down effect work in the direction of increasing the brightness and the contrast, and there is an effect that it effectively functions to expand the dynamic range.

  In the liquid crystal display panel, it is also possible to select a liquid crystal material having a high threshold value, and there is an effect that the choice of using a liquid crystal material having characteristics according to the purpose is widened.

  In order to solve the above problems, the display panel of the present invention is a liquid crystal display panel using ASV liquid crystal.

  According to the above invention, since a high viewing angle can be obtained in a liquid crystal display panel using ASV liquid crystal, improving the luminance by expanding the dynamic range using a MOS capacitor increases the amount of light in each direction. This has the effect of greatly contributing to high quality display.

  In order to solve the above problems, the display panel of the present invention is characterized in that an inversion layer is not formed in the MOS capacitor during black display, and an inversion layer is formed in the MOS capacitor during white display.

  According to the above invention, by reducing the auxiliary capacity during black display and increasing the auxiliary capacity during white display, the push-up (push-down) during black display is reduced and the push-up (push-down) during white display is increased. Therefore, the dynamic range is widened, and as a result, the contrast can be increased.

  In order to solve the above problems, the display panel of the present invention is driven by normally white.

  According to the above-described invention, the display panel driven with normally white displays black when the applied voltage to the pixel capacitor is large, so that the MOS capacitor is added when the applied voltage is large. The effect and the push-down effect increase the contrast by reducing the black float and effectively function to expand the dynamic range.

  In the liquid crystal display panel, it is also possible to select a liquid crystal material having a high threshold value, and there is an effect that the choice of using a liquid crystal material having characteristics according to the purpose is widened.

  In order to solve the above problems, the display panel of the present invention is a liquid crystal display panel using TN liquid crystal.

  According to the above invention, in the liquid crystal display panel using the TN liquid crystal, the expansion of the dynamic range using the MOS capacitor greatly contributes to the high-quality display by further reducing the brightness of black and increasing the contrast. The effect of doing.

  In order to solve the above problems, the display panel of the present invention is characterized in that an inversion layer is not formed in the MOS capacitor during white display, and an inversion layer is formed in the MOS capacitor during black display.

  According to the above invention, the auxiliary capacity can be reduced during white display, and the auxiliary capacity can be increased during black display.

  In order to solve the above-described problems, the display panel of the present invention is characterized in that the MOS capacitor is composed of an n-MOS capacitor and a p-MOS capacitor connected in parallel.

  According to the above invention, there is an effect that a MOS capacitor can be added to the auxiliary capacitor regardless of the level relationship between the pixel electrode potential and the voltage of the auxiliary capacitor line.

  In order to solve the above problems, the display panel of the present invention is characterized in that it is AC driven.

  According to the invention described above, there is an effect that the dynamic range can be expanded in the AC-driven display panel.

  In order to solve the above-described problems, a display device according to the present invention includes the display panel.

  According to said invention, there exists an effect that the display with improved contrast is realizable.

  As described above, the display panel of the present invention is an active matrix display panel in which a capacitive pixel is provided with an auxiliary capacitance, and the auxiliary capacitance is between an electrode serving as a pixel electrode potential and an auxiliary capacitance wiring. And a first capacitor that always functions as a capacitor when a voltage is applied, and a MOS capacitor.

  As described above, there is an effect that it is possible to realize a display panel having an auxiliary capacitor capable of expanding the output dynamic range without increasing the amplitude of the video signal supplied to the pixel.

  An embodiment of the present invention will be described with reference to FIGS. 1 to 4 as follows.

  FIG. 4 shows a configuration of the display panel 1 of the liquid crystal display device (display device) according to the present embodiment.

  The display panel 1 is an active matrix display device, and includes a gate driver 3 as a scanning signal line driving circuit, a source driver 4 as a data signal line driving circuit, a display unit 2, a gate driver 3 and a source driver 4. A display control circuit 5 for controlling and a power supply circuit 6 are provided.

  The display unit 2 includes gate lines GL1 to GLm as a plurality (m lines) of scanning signal lines, and source lines as a plurality (n lines) of data signal lines intersecting with the gate lines GL1 to GLm, respectively. SL1 to SLn, and a plurality (m × n) of pixels PIX provided corresponding to the intersections of the gate lines GL1 to GLm and the source lines SL1 to SLn, respectively. Although not shown here, the display unit 2 includes auxiliary capacitance lines CSL... In parallel with the gate lines GL1 to GLm, and one auxiliary line is provided for each pixel row composed of n pixels arranged in the direction. Capacitance wiring CSL is assigned (see FIG. 1 described later).

  The plurality of pixels PIX are arranged in a matrix to form a pixel array, and each pixel PIX includes a TFT (pixel selection element) 14, a liquid crystal capacitor CL, and an auxiliary capacitor Cs. The TFT 14 has a gate terminal connected to the gate line GLj, a source terminal connected to the source line SLi, and a drain terminal connected to the pixel electrode. The liquid crystal capacitor CL is composed of a pixel electrode, a counter electrode, and a liquid crystal layer sandwiched between them. A voltage Vcom is applied from the power supply circuit 6 to the counter electrode. The liquid crystal capacitor CL and the auxiliary capacitor Cs constitute a pixel capacitor. However, there is a parasitic capacitor formed between the pixel electrode and the peripheral wiring as another capacitor constituting the pixel capacitor. Hereinafter, it is assumed that the influence of the parasitic capacitance on the pushing-up effect and the pushing-down effect by the auxiliary capacitor Cs is small, and the operation of the parasitic capacitance is not particularly described.

  As shown in FIG. 1, the auxiliary capacitor Cs is composed of a parallel connection of a fixed auxiliary capacitor (first capacitor) Cs0 and a MOS capacitor. Further, the MOS capacitor is composed of an n-MOS capacitor Cs1 and a p-MOS capacitor Cs2 connected in parallel. The fixed auxiliary capacitor Cs0 includes an auxiliary capacitor electrode connected to the pixel electrode, an auxiliary capacitor line CSL, and an insulating film sandwiched between them. A voltage Vcs is applied to the auxiliary capacitance line CSL from the power supply circuit 6 independently of the voltage Vcom. The n-MOS capacitor Cs1 and the p-MOS capacitor Cs2 have a configuration in which a gate electrode is an auxiliary capacitor line CSL and a semiconductor layer sandwiching a gate insulating film is connected to the pixel electrode.

  The display control circuit 5 receives a digital video signal representing an image to be displayed, a horizontal synchronization signal, a vertical synchronization signal, and the like from an external signal source, and based on these signals, a gate start pulse GSP, a gate clock GCK, A source start pulse SSP, a source clock SCK, a digital video signal DA, and the like are generated and output.

  The gate driver 3 generates scanning signals G (1) to G (m) for sequentially scanning the gate lines GL1 to GLm every horizontal period from the gate start pulse GSP and the gate clock GCK input from the display control circuit 5. To do.

  The source driver 4 outputs a data signal S (1) which is output line-sequentially in each horizontal period from the source start pulse SSP, the source clock SCK, and the digital video signal DA input from the display control circuit 5 to the source lines SL1 to SLn. ) To S (n). Only the source driver 4 is connected to one end side as a source driver for the source lines SL1 to SLn. Here, the source driver 4 is a digital driver that DA-converts a digital video signal and outputs it to the source lines SL1 to SLn in a line sequential manner. However, the source driver 4 is not limited to this, and an analog video signal is also provided. Any form is possible, such as an analog driver that samples and outputs to the source lines SL1 to SLn in a dot-sequential manner.

  When the gate driver 3 sequentially scans GL1 to GLm, the data signal S (i) is written from the corresponding source line SLi through the TFT 14 to each pixel PIX of the scanned pixel row. A difference voltage between the voltage corresponding to the voltage of the written data signal S (i) and the voltage Vcs of the auxiliary capacitance line CSL and the voltage Vcom of the counter electrode is applied to the liquid crystal capacitor CL, and the pixel PIX is applied with the voltage. Display with brightness according to the voltage.

  The display panel 1 is assumed to be a normally black mode liquid crystal display panel such as ASV (Advanced Super View). At this time, in the AC drive, the difference between the black display voltage and the voltage Vcom is small, and the difference between the white display voltage and the voltage Vcom is large. The auxiliary capacitance line CSL is configured such that a voltage can be applied independently for each pixel row, and the polarity of the voltage Vcs is aligned between pixels corresponding to the auxiliary capacitance line CSL to which the same voltage is applied, at a predetermined cycle such as every frame. The polarity can be sequentially reversed for each pixel row.

  The voltage Vcs is, for example, the same voltage as the voltage Vcom both when the positive polarity data is supplied and when the negative polarity data is supplied when the TFT 14 is ON. When the TFT 14 is OFF, the voltage Vcs is larger than the voltage Vcom when the positive polarity data is supplied. Thus, the voltage becomes lower than the voltage Vcom when negative polarity data is supplied. In the above driving, the voltage Vcs is driven by three values of H, L, and intermediate values, but driving by two values is also possible. In the binary driving, for example, a change of L → H is performed for the voltage Vcs after the positive polarity data is written, and a change of H → L is performed after the negative polarity data is written in the next frame. Is. In the case of the ternary driving described above, the voltage Vcom is constant, but the voltage Vcom is changed between when positive data is supplied and when negative data is supplied, and the voltage Vcs when the TFT 14 is ON matches this. The voltage Vcs for each polarity may be changed when the TFT 14 is OFF.

  In FIG. 2, when writing a video signal of positive white display, the voltage of the pixel electrode is sufficiently higher than the voltage Vcs. At this time, a reverse bias voltage is applied to the n-MOS capacitor Cs1, and a forward bias voltage higher than the threshold voltage is applied to the p-MOS capacitor Cs2. Accordingly, the n-MOS capacitor Cs1 does not function as a capacitor, and the p-MOS capacitor Cs2 functions as a capacitor by forming an n-type inversion layer immediately below the gate insulating film. Thus, in the pixel PIX, the auxiliary capacitor Cs is in a state where the p-MOS capacitor Cs2 is connected in parallel to the fixed auxiliary capacitor Cs0.

  On the other hand, when writing a video signal of positive black display, the difference between the voltage of the pixel electrode and the voltage Vcs is reduced. At this time, the voltage applied to the n-MOS capacitor Cs1 and the voltage applied to the p-MOS capacitor Cs2 are set to be a forward bias voltage or a reverse bias voltage smaller than the threshold voltage, respectively. Yes. Therefore, neither the n-MOS capacitor Cs1 nor the p-MOS capacitor Cs2 functions as a capacitor. As a result, in the pixel PIX, the auxiliary capacitor Cs is composed of only the fixed auxiliary capacitor Cs0.

  Next, when writing a negative white display video signal, the voltage of the pixel electrode is sufficiently smaller than the voltage Vcs. At this time, a forward bias voltage is applied to the n-MOS capacitor Cs1, and a reverse bias voltage is applied to the p-MOS capacitor Cs2. Therefore, the n-MOS capacitor Cs1 functions as a capacitor with an n-type inversion layer formed immediately below the gate insulating film, and the p-MOS capacitor Cs2 does not function as a capacitor. Thus, in the pixel PIX, the auxiliary capacitor Cs is in a state where the n-MOS capacitor Cs1 is connected in parallel to the fixed auxiliary capacitor Cs0.

  On the other hand, when writing a negative black display video signal, the difference between the voltage of the pixel electrode and the voltage Vcs is reduced. At this time, the voltage applied to the n-MOS capacitor Cs1 and the voltage applied to the p-MOS capacitor Cs2 are set to be a forward bias voltage or a reverse bias voltage smaller than the threshold voltage, respectively. Yes. Therefore, neither the n-MOS capacitor Cs1 nor the p-MOS capacitor Cs2 functions as a capacitor. As a result, in the pixel PIX, the auxiliary capacitor Cs is composed of only the fixed auxiliary capacitor Cs0.

  As described above, only the normal fixed auxiliary capacitor Cs0 can be used as the auxiliary capacitor Cs during black display, and the auxiliary capacitor Cs larger by the MOS capacity than during black display can be used during white display. The first capacitor is not limited to a fixed capacitor, and may be a capacitor whose capacitance value changes depending on an applied voltage or frequency, and may be a capacitor that always functions as a capacitor when a voltage is applied.

  Next, a layout and a stacked structure of the pixel PIX having the above configuration will be described.

  FIG. 2 shows an example of a plan view of the pixel PIX, and FIG. 3 shows a cross-sectional view taken along the line AB of FIG.

  As shown in FIG. 2, one pixel PIX has a region surrounded by two storage capacitor lines CSL and CSL adjacent to each other and two source lines SL and SL adjacent to each other. The gate line GL is provided between the storage capacitor lines CSL and CSL so as to extend in parallel with the storage capacitor line CSL. In the pixel PIX, the TFT 14 (in the vicinity of the gate electrode 14a in the figure), the connection portion between the TFT 14 and the pixel electrode 15, and the auxiliary capacitor are roughly arranged between the gate line GL and one auxiliary capacitor line CSL. Cs is provided. The TFT 14 has a structure in which two TFT element structures are connected in series, and each gate electrode 14a is shown in FIG. By providing two TFTs, the ON / OFF characteristics of the pixels are optimized and redundancy is provided. The source side end of the TFT 14 is connected to an upper source line SL via a contact hole SLa. The drain side end of the TFT 14 is connected to the semiconductor layer 24 and to the upper conductor layer 15 through the contact hole 15a.

The semiconductor layer 24 is made of, for example, a polycrystalline silicon layer that is sufficiently doped with impurities to serve as a conductor, and is branched into three from the TFT 14 side. Each of the active layers 27 is connected. The auxiliary capacitance electrode 25 is composed of an n ⁺ polycrystalline silicon layer, and the n-MOS active layer 26 and the p-MOS active layer 27 are composed of a p-doped polycrystalline silicon layer and an n-doped polycrystalline silicon layer in this order. . The conductor layer 15 is connected to the upper pixel electrode 21 through a contact hole 21a.

  2 passes through the contact holes 21a, 15a, and SLa, and the cross-sectional view of FIG. 3 shows the stacked structure of the pixel PIX in detail.

  In FIG. 3, only the TFT substrate side of the display panel 1 is shown. The counter substrate and the liquid crystal layer may be conventional. The above-described configuration of the pixel PIX is provided on the base coat 32 provided on the glass substrate 31. On the base coat 32, a polycrystalline silicon base semiconductor layer 14c in which a channel region and source / drain regions of the TFT 14 are formed in a planar type, a semiconductor layer 24, an auxiliary capacitance electrode 25, and an n-MOS active layer 26 (n− The MOS active layer 26 is not shown in FIG. 3 because it is not on the line AB, and the p-MOS active layer 27 is patterned. A gate insulating film 14b made of, for example, SiON is formed so as to cover these pattern surfaces. On the gate insulating film 14b, two gate electrodes 14a and 14a of the TFT 14 and a storage capacitor line CSL are formed in a pattern. These patterns are simultaneously formed from the same conductor film such as a two-layer film such as TaN / W.

  Further, a resin layer 16 made of, for example, an acrylic resin is formed so as to cover the pattern surfaces of the gate electrodes 14a and 14a and the auxiliary capacitance line CSL. A contact hole SLa is formed in the gate insulating film 14b and the resin layer 16 formed on the semiconductor layer 14c at the source side end of the TFT 14, and the resin is formed so as to cover the contact hole SLa. A source line SL is formed on the layer 16. As a result, the source side end of the TFT 14 and the source line SL are connected to each other. In addition, a contact hole 15a is formed in the gate insulating film 14b and the resin layer 16 formed on the semiconductor layer 14c at the drain side end of the TFT 14, and the resin is formed so as to cover the contact hole 15a. A conductor layer 15 is formed on the layer 16. Thereby, the drain side end of the TFT 14 and the conductor layer 15 are connected to each other. The patterns of the source line SL and the conductor layer 15 are simultaneously formed from the same conductor film such as an Al / Ti laminated film, for example. In this case, the conductor layer 15 serves as a light shielding film. As shown, the area of the conductor layer 15 is reduced by forming it thin.

  Further, a resin layer 17 made of, for example, an acrylic resin is formed so as to cover the pattern surfaces of the source line SL and the conductor layer 15. A contact hole 21a is formed in the resin layer 17 on the conductor layer 15, and a pixel electrode 21 made of, for example, ITO is formed on the resin layer 17 so as to cover the contact hole 21a. .

  As described above, according to the present embodiment, if the voltage between the pixel electrode 21 and the auxiliary capacitance line CSL becomes a voltage at which an inversion layer is formed in the MOS capacitance, the auxiliary capacitance Cs is the first capacitance. A large capacitance value is obtained by adding an n-MOS capacitance or a p-MOS capacitance, which is a MOS capacitance, to the fixed auxiliary capacitance Cs0, and the voltage between the pixel electrode 21 and the auxiliary capacitance wiring CSL does not form an inversion layer in the MOS capacitance. When the voltage is reached, the auxiliary capacitance Cs has a small capacitance value including only the fixed auxiliary capacitance Cs0 that is the first capacitance. Therefore, since the auxiliary capacitance Cs changes according to the voltage of the video signal supplied to the pixel PIX, the effect of raising and lowering the pixel electrode potential from the auxiliary capacitance line CSL via the auxiliary capacitance Cs is obtained. It can be changed according to the voltage of the video signal, and the dynamic range of the voltage applied to the liquid crystal capacitor CL can be increased.

  As described above, it is possible to realize a display panel including an auxiliary capacitor capable of expanding the output dynamic range without increasing the amplitude of the video signal supplied to the pixel.

  The present embodiment has been described above.

  In the above example, the display panel is AC driven. However, the display panel is not limited to this and may be driven with a single polarity. In that case, the MOS capacitor may have only one polarity.

  In the above-described embodiment, the display panel driven by normally black has been described. However, a display panel driven by normally white can also be configured. For example, a TN (Twisted Nematic) liquid crystal is used as a display medium. It is done. In the case of normally white, since the magnitude relationship between the voltage level of white display and the voltage level of black display is opposite to that in the case of normally black, a MOS capacitor is added to the auxiliary capacitor Cs during black display. When white is displayed, no MOS capacitor is added.

  In addition to the liquid crystal, the display panel and the display device may be any one having a capacitive pixel to which an auxiliary capacitor can be added, such as a display element using a dielectric liquid.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims. That is, embodiments obtained by combining technical means appropriately changed within the scope of the claims are also included in the technical scope of the present invention.

  The present invention can be particularly preferably used for a liquid crystal display device.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates an embodiment of the present invention and is an equivalent circuit diagram illustrating a configuration of a pixel of a display panel. It is a top view which shows the structure of the pixel of FIG. It is the sectional view on the AB line of FIG. 1, showing an embodiment of the present invention, is a circuit block diagram illustrating a configuration of a display panel. FIG. It is an equivalent circuit diagram which shows a prior art and shows the structure of the pixel of a display panel.

Explanation of symbols

1 Display panel Cs Auxiliary capacity Cs0 Fixed auxiliary capacity (first capacity)
Cs1 n-MOS capacitor (MOS capacitor)
Cs2 p-MOS capacitor (MOS capacitor)
CSL auxiliary capacitance wiring PIX pixel

Claims (14)

An active matrix display panel having an auxiliary capacitor in a capacitive pixel,
The auxiliary capacity is
A display panel comprising a first capacitor formed between an electrode serving as a pixel electrode potential and an auxiliary capacitor wiring, which always functions as a capacitor when a voltage is applied, and a MOS capacitor.   The display panel according to claim 1, wherein the gate electrode of the MOS capacitor is the auxiliary capacitor wiring.   2. The display panel according to claim 1, wherein the layer on which the MOS capacitor inversion layer is formed is made of polycrystalline silicon. The display panel according to claim 3, wherein the electrode serving as the pixel electrode potential is an n ⁺ polycrystalline silicon layer directly connected to a layer where the inversion layer is formed.   The voltage applied to the auxiliary capacitance line changes from the ON time so that the voltage applied to the capacitor of the pixel rises more than the ON time when the selection element provided in the pixel of the active matrix display panel is OFF. The display panel according to claim 1.   The display panel according to claim 1, wherein the display panel is driven in normally black.   The display panel according to claim 6, which is a liquid crystal display panel using an ASV liquid crystal.   The display panel according to claim 6, wherein an inversion layer is not formed in the MOS capacitor during black display, and an inversion layer is formed in the MOS capacitor during white display.   The display panel according to claim 1, wherein the display panel is driven in normally white.   The display panel according to claim 9, which is a liquid crystal display panel using TN liquid crystal.   The display panel according to claim 9, wherein an inversion layer is not formed in the MOS capacitor during white display, and an inversion layer is formed in the MOS capacitor during black display.   The display panel according to claim 1, wherein the MOS capacitor comprises an n-MOS capacitor and a p-MOS capacitor connected in parallel.   The display panel according to claim 12, wherein the display panel is AC driven.   A display device comprising the display panel according to claim 1.

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