JP2008268203A - 並列ac測定方法 - Google Patents
並列ac測定方法 Download PDFInfo
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- JP2008268203A JP2008268203A JP2008104874A JP2008104874A JP2008268203A JP 2008268203 A JP2008268203 A JP 2008268203A JP 2008104874 A JP2008104874 A JP 2008104874A JP 2008104874 A JP2008104874 A JP 2008104874A JP 2008268203 A JP2008268203 A JP 2008268203A
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- signal
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- duts
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- electrical measurements
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31924—Voltage or current aspects, e.g. driver, receiver
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
第1及び第2のDUTの間でクロストークを示すのに充分接近している第1及び第2のDUTの電気測定を劣化させることなく行う。
【解決手段】
第1の信号を第1のDUTに印加する工程と、第2の信号を第2のDUTに印加する工程であって、第1の信号及び第2の信号は同時に生じ、互いに直交する工程と、第1のDUT応答を測定する工程と、第2のDUT応答を測定する工程とを含む。第1のDUT応答及び第2のDUT応答は、それぞれ第2の信号及び第1の信号から独立していることを示す。
【選択図】図1
Description
12 信号源
14 信号源
16 信号源
18 測定機器
20 測定機器
22 測定機器
24 制御器
102 DUT
104 DUT
106 DUT
Claims (6)
- 第1及び第2のDUTの間でクロストークを示すのに充分接近している第1及び第2のDUTの電気測定を行う方法であって、
第1の信号を前記第1のDUTに印加する工程と、
第2の信号を前記第2のDUTに印加する工程であって、前記第1の信号及び前記第2の信号は同時に生じ、互いに直交する工程と、
第1のDUT応答を測定する工程と、
第2のDUT応答を測定する工程とを含み、
前記第1のDUT応答及び前記第2のDUT応答はそれぞれ前記第2の信号及び前記第1の信号から独立していることを示す第1及び第2のDUTの電気測定を行う方法。 - 請求項1に記載の方法であって、前記第1の信号及び前記第2の信号は正弦波である第1及び第2のDUTの電気測定を行う方法。
- 請求項2に記載の方法であって、前記第1の信号及び前記第2の信号は、興味のある同一の帯域幅内にある第1及び第2のDUTの電気測定を行う方法。
- 請求項2に記載の方法であって、前記第1の信号及び前記第2の信号は、興味のある異なる帯域幅内にある第1及び第2のDUTの電気測定を行う方法。
- 請求項1に記載のであって、付加直交信号をそれぞれの付加DUTに印加する工程と、それぞれの付加DUT応答を測定する工程とを更に含み、すべてのDUT応答は、それぞれの信号以外の信号から独立していることを示す第1及び第2のDUTの電気測定を行う方法。
- 請求項1に記載の方法であって、前記第1の信号及び前記第2の信号は電圧信号であり、前記測定された応答は静電容量を表す第1及び第2のDUTの電気測定を行う方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/788,499 US7545155B2 (en) | 2007-04-20 | 2007-04-20 | Parallel AC measurement method |
US11/788499 | 2007-04-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008268203A true JP2008268203A (ja) | 2008-11-06 |
JP5198125B2 JP5198125B2 (ja) | 2013-05-15 |
Family
ID=39871576
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008104874A Expired - Fee Related JP5198125B2 (ja) | 2007-04-20 | 2008-04-14 | 半導体dutの電気測定を行う方法 |
Country Status (2)
Country | Link |
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US (1) | US7545155B2 (ja) |
JP (1) | JP5198125B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1926047A1 (en) * | 2006-11-21 | 2008-05-28 | STMicroelectronics (Research & Development) Limited | Artefact Removal from Phase Encoded Images |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002357643A (ja) * | 2001-03-10 | 2002-12-13 | Samsung Electronics Co Ltd | 半導体メモリ素子用の並列実装検査基板 |
JP2004117247A (ja) * | 2002-09-27 | 2004-04-15 | Advantest Corp | 半導体試験装置のプローバインタフェース装置及び半導体試験装置のデバイスインターフェース装置 |
JP2005221433A (ja) * | 2004-02-06 | 2005-08-18 | Advantest Corp | 試験装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4353031A (en) * | 1980-04-14 | 1982-10-05 | Calspan Corporation | Orthogonal signal generator |
DE19709203C2 (de) * | 1997-03-06 | 2000-06-29 | Siemens Ag | Verfahren zum Erzeugen von Meßsignalen für Meßsysteme zum Messen der Übertragungseigenschaften von sich gegenseitig durch Übersprechen beeinflussenden Übertragungsstrecken in elektrischen Nachrichtensystemen, insbesondere von Freisprecheinrichtungen |
US6181754B1 (en) * | 1998-06-12 | 2001-01-30 | Cadence Design Systems, Inc. | System and method for modeling mixed signal RF circuits in a digital signal environment |
US6658362B1 (en) * | 1999-10-15 | 2003-12-02 | Trimble Navigation Limited | Method and apparatus for testing components |
US6366099B1 (en) * | 1999-12-21 | 2002-04-02 | Conrad Technologies, Inc. | Differential capacitance sampler |
CN100442724C (zh) * | 2005-09-16 | 2008-12-10 | 华为技术有限公司 | 多用户通讯线路串扰测试方法及设备 |
DE102005045183B4 (de) * | 2005-09-21 | 2011-03-31 | Infineon Technologies Ag | Testvorrichtung und Verfahren zum Auswerten einer digitalisierten Testantwort |
US7962823B2 (en) * | 2006-06-06 | 2011-06-14 | Litepoint Corporation | System and method for testing multiple packet data transmitters |
-
2007
- 2007-04-20 US US11/788,499 patent/US7545155B2/en not_active Expired - Fee Related
-
2008
- 2008-04-14 JP JP2008104874A patent/JP5198125B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002357643A (ja) * | 2001-03-10 | 2002-12-13 | Samsung Electronics Co Ltd | 半導体メモリ素子用の並列実装検査基板 |
JP2004117247A (ja) * | 2002-09-27 | 2004-04-15 | Advantest Corp | 半導体試験装置のプローバインタフェース装置及び半導体試験装置のデバイスインターフェース装置 |
JP2005221433A (ja) * | 2004-02-06 | 2005-08-18 | Advantest Corp | 試験装置 |
Also Published As
Publication number | Publication date |
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JP5198125B2 (ja) | 2013-05-15 |
US7545155B2 (en) | 2009-06-09 |
US20080258741A1 (en) | 2008-10-23 |
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