JP2008267996A - Semiconductor inspecting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor inspecting device causing no correction error even if there is a change in frequency setting during a period from the implementation of calibration to implementation of phase difference measurement via a DUT. <P>SOLUTION: The semiconductor inspecting device for applying a high frequency signal from a signal generating module to an input terminal of a semiconductor under inspection and measuring a signal of an output terminal of the semiconductor by a high frequency measuring module, includes a first divider for dividing the high frequency signal into two signals; a second divider for dividing one output signal of the first divider into two signals; a switching means for switching a signal direct or through the semiconductor under inspection from the other output signal of the first divider and one output signal of the second divider; a first high frequency measuring module for inputting the output signal of the switching means; and a second high frequency measuring module for inputting the other output signal of the second divider. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention applies a high-frequency signal from a signal generation module to an input terminal of a semiconductor to be inspected, and measures a phase shift occurring in the semiconductor to be inspected, in particular, a semiconductor inspection apparatus that measures the signal at the output terminal of the semiconductor with a high-frequency measurement module. The present invention relates to a semiconductor inspection apparatus having a function to perform.

  A phase difference measuring device for measuring a phase difference between two signals is disclosed in Patent Document 1. FIG. 3 is a functional block diagram showing a configuration example of a conventional semiconductor inspection apparatus having a function of measuring a phase shift generated in a semiconductor to be inspected.

  A high-frequency signal So in the microwave region (for example, 2.7 GHz) from the signal generation module 1 is distributed to the signals S1 and S2 by the first divider 2. The signal S1 is applied to an input terminal of a semiconductor to be inspected (hereinafter DUT: Device Under Test) 3.

  The signal Sd at the output terminal of the DUT 3 is input to the first high frequency measurement module 5. The distributed signal S2 is input to the second high frequency measurement module 6. The high-frequency measurement modules 5 and 6 are composed of level selectors and are synchronized with each other by a reference clock.

  The input terminal and the output terminal of the DUT 3 are short-circuited by the bypass means 4 during phase difference measurement calibration, and the distributed signal S1 is directly input to the first high-frequency measurement module 5. The bypass unit 4 is mounted at the mounting position of the DUT 3 and is realized by a jig unit that short-circuits the input terminal and the output terminal.

  High frequency signals in the microwave region input to the high frequency measurement modules 5 and 6 are down-converted to the VHF region, AD converted by the digitizers 7 and 8, and then input to a DSP (Digital Signal Processor) 9 for signal processing. .

  The DSP 9 includes a phase shift calculation means 91 for calculating the phase shift generated in the DUT 3, and the phase difference signal θ 1 between the high frequency measurement modules 5 and 6 measured at the time of calibration for short-circuiting the DUT 3 and the DUT 3. The measured phase difference signal θ2 is input, and the phase shift θd generated in the DUT 3 is calculated by θd = (θ2-θ1) and output.

  Prior to the measurement of the phase shift of the DUT 3, the calibration executed in a state where the input / output terminals of the DUT 3 are short-circuited by the bypass means 4 is performed by the high-frequency signals S 1 and S 2 in the distributed microwave region being respectively measured by different paths. The phase shift caused by the difference in path environment input to the modules 5 and 6 is compensated, and the measurement accuracy of the phase shift measurement of the DUT 3 is increased.

Japanese Patent Laid-Open No. 9-61472

The conventional phase difference measurement method has the following problems.
(1) In the high-frequency signal measurement modules (level selectors) 5 and 6, when the measurement frequency setting is changed, the output phase of the down-converted signal changes due to the influence of the internal circuit (PLL, DDS). is there.

(2) At the time of calibration, the jig means is mounted at the mounting position of the DUT 3 before mass production, and the input / output terminals are short-circuited to acquire data. After that, the frequency setting for executing the mass production program is likely to be changed to a setting different from that at the time of calibration.

(3) The phase difference signal of the path measured at the time of calibration before mass production and the phase difference signal of the path after the history in which the frequency setting has been changed are not the same but have changed. Therefore, when the phase difference signal θ2 via the DUT 3 is corrected with the signal θ1 measured at the time of calibration before mass production, a correction error occurs.

  The present invention has been made to solve the above-described problems, and even when there is a change in frequency setting during the period from calibration execution to phase difference measurement execution via the DUT, a semiconductor inspection in which no correction error occurs. The purpose is to realize the device.

In order to achieve such a subject, the present invention has the following configuration.
(1) In a semiconductor inspection apparatus that applies a high-frequency signal from a signal generation module to an input terminal of a semiconductor to be inspected, and measures a signal at the output terminal of the semiconductor with a high-frequency measurement module.
A first divider that distributes the high-frequency signal into two parts;
A second divider that distributes one output signal of the first divider into two;
Switching means for switching the other output signal of the first divider directly or through the semiconductor to be inspected and one output signal of the second divider;
A first high frequency measurement module for inputting an output signal of the switching means;
A second high frequency measurement module for inputting the other output signal of the second divider;
A semiconductor inspection apparatus comprising:

(2) θ1 measuring means for measuring and holding a phase difference θ1 between the first and second high frequency measurement modules in a state where the switching means selects one output signal of the second divider;
With the switching means bypassing the semiconductor to be inspected by the bypass means and directly selecting one output signal of the first divider, the phase difference θ2 between the first and second high-frequency measurement modules is measured. Holding θ2 measuring means,
Θ3 measuring means for measuring and holding the phase difference θ3 between the first and second high frequency measurement modules in a state where the switching means selects one output signal of the second divider;
Θ4 measuring means for measuring and holding the phase difference θ4 between the first and second high frequency measurement modules in a state where the switching means selects the output signal of the semiconductor to be inspected;
A phase shift calculation means for calculating a phase shift θd generated in the semiconductor to be inspected based on the measured phase difference signals θ1 to θ4 by θd = (θ4−θ2) + (θ3−θ1);
(1) The semiconductor inspection apparatus according to (1).

(3) The semiconductor inspection apparatus according to (1) or (2), wherein the first and second high-frequency measurement modules are level selectors.

(4) The semiconductor inspection apparatus according to (2) or (3), wherein the bypass unit is a jig unit that is mounted at a mounting position of the inspection target semiconductor and short-circuits the input terminal and the output terminal. .

(5) The semiconductor inspection apparatus according to any one of (2) to (4), wherein the measurement by the θ3 measurement unit is performed after the measurement execution by the θ1 measurement unit.

According to the present invention, the following effects can be expected.
(1) At the time of calibration using the jig means and at the time of mounting the DUT, the phase difference measurement of the path is performed by switching only to the path, and the correction calculation based on the two phase difference signals obtained by each measurement By executing the above, even if there is a change in frequency setting during the period from the calibration execution to the phase difference measurement execution via the DUT, it is possible to perform an operation without generating a correction error.

(2) As a high-frequency signal measurement module, it is possible to measure the phase shift generated in the DUT without changing the level selection meter, and to detect the phase shift of the DUT without using a high-level measuring instrument such as a network analyzer. Can be realized with high accuracy.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a functional block diagram showing an embodiment of a semiconductor inspection apparatus to which the present invention is applied. The same elements as those of the conventional apparatus described with reference to FIG.

  The structural features of the present invention added to the configuration of the conventional apparatus lie in the configuration of the second divider 100, the switching means 200 for path switching, and the DSP 300.

  The second divider 100 receives the signal S2 distributed by the first divider 2 and further distributes it to the signals S3 and S4. One of the distributed signals S3 is input to the switching means 200, and the other S4 is input to the second high-frequency measurement module 6.

  The switching unit 200 selectively switches between the output signal Sd of the DUT 3 or the signal S1 via the bypass unit 4 and one signal S3 distributed by the second divider 100 and inputs the signal S1 to the first high-frequency measurement module 5. To do.

  The phase shift calculation means 301 provided in the DSP 300 inputs the measured and held phase difference signals θ1 to θ4, and calculates and outputs the phase shift θd generated in the DUT 3. Hereinafter, the measurement procedure of the phase difference signals θ1 to θ4 and the calculation of θd will be described.

(1) First calibration: The switch means 200 is switched to the selected state of the signal S3, and the phase difference between the signal S3 and the signal S4 is measured. The measurement result θ1 is held in the DSP 300.

(2) The switch means 200 is switched to the DUT 3 side, and the phase difference between the signal S1 and the signal S4 via the bypass means 4 is measured. The measurement result θ2 is held in the DSP 300.

(3) Second calibration: The switch means 200 is switched to the selected state of the signal S3, and the phase difference between the signal S3 and the signal S4 is measured. The measurement result θ3 is held in the DSP 300.

(4) The switch means 200 is switched to the DUT 3 side, and the phase difference between the output signal Sd of the DUT 3 and the signal S4 is measured. The measurement result θ4 is held in the DSP 300.

(5) The phase shift calculation means of the DSP 300 inputs the phase difference signals θ1 to θ4 held in the DSP, and calculates the phase shift θd generated in the DUT 3.
θd = (θ4-θ2) + (θ3-θ1)
Calculate and output by.

FIG. 2 is a functional block diagram showing another embodiment of a semiconductor inspection apparatus to which the present invention is applied.
In the embodiment of FIG. 1, the digitizers 7 and 8 and the DSP 300 are separate from the high frequency measurement modules 5 and 6, but each high frequency measurement module 10 and 11 can have the function.

  In a general high-frequency measurement module, an ADC and a CPU are mounted inside, so that the functions of a digitizer and a DSP can be realized by using them. In the case of adopting this configuration, the phase shift calculation means may be constructed in one of the high frequency measurement modules 10 and 11.

It is a functional block diagram showing one embodiment of a semiconductor inspection device to which the present invention is applied. It is a functional block diagram which shows other embodiment of the semiconductor inspection apparatus to which this invention is applied. It is a functional block diagram which shows the structural example of the conventional semiconductor inspection apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Signal generation module 2 1st divider 3 Semiconductor to be examined (denoted by DUT)
4 Bypass means 5 First high frequency measurement module 6 Second high frequency measurement module 7, 8 Digitizer 100 Second divider 200 Switching means 300 DSP
301 Phase shift calculation means

Claims (5)

In a semiconductor inspection apparatus that applies a high-frequency signal from a signal generation module to an input terminal of a semiconductor to be inspected, and measures a signal at the output terminal of the semiconductor by a high-frequency measurement module,
A first divider that distributes the high-frequency signal into two parts;
A second divider that distributes one output signal of the first divider into two;
Switching means for switching the other output signal of the first divider directly or through the semiconductor to be inspected and one output signal of the second divider;
A first high frequency measurement module for inputting an output signal of the switching means;
A second high frequency measurement module for inputting the other output signal of the second divider;
A semiconductor inspection apparatus comprising: Θ1 measuring means for measuring and holding a phase difference θ1 between the first and second high frequency measurement modules in a state where the switching means selects one output signal of the second divider;
With the switching means bypassing the semiconductor to be inspected by the bypass means and directly selecting one output signal of the first divider, the phase difference θ2 between the first and second high-frequency measurement modules is measured. Holding θ2 measuring means,
Θ3 measuring means for measuring and holding the phase difference θ3 between the first and second high frequency measurement modules in a state where the switching means selects one output signal of the second divider;
Θ4 measuring means for measuring and holding the phase difference θ4 between the first and second high frequency measurement modules in a state where the switching means selects the output signal of the semiconductor to be inspected;
A phase shift calculation means for calculating a phase shift θd generated in the semiconductor to be inspected based on the measured phase difference signals θ1 to θ4 by θd = (θ4−θ2) + (θ3−θ1);
The semiconductor inspection apparatus according to claim 1, further comprising:   The semiconductor inspection apparatus according to claim 1, wherein the first and second high-frequency measurement modules are level selectors.   4. The semiconductor inspection apparatus according to claim 2, wherein the bypass means is a jig means that is mounted at a mounting position of the semiconductor to be inspected and short-circuits the input terminal and the output terminal.   The semiconductor inspection apparatus according to claim 2, wherein the measurement by the θ3 measurement unit is performed after the measurement by the θ1 measurement unit.

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