JP2008263021A - Dielectric package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a package structure capable of suppressing unnecessary resonance frequency while satisfying the nonreflective condition of a resistor or an electric wave absorber. <P>SOLUTION: The dielectric package 20 is constituted of a dielectric multi-layered substrate 6, in which a cavity 21 for receiving a semiconductor element is formed, a plurality of metal filled through holes 4 arrayed in the side wall of the cavity so as to surround the cavity 21, and a plurality of resistor filled through holes 7, provided so as to surround the cavity 21 and arrayed at the inside of the array of the metal-filled through holes 4 in the side wall of the cavity by a distance of a quarter wavelengths of unnecessary resonance wave while being provided with a plurality of resistor-filled through holes 7 by which no reflection termination is effected, which are provided therein. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a dielectric package having a cavity in which a semiconductor element is accommodated.

  2. Description of the Related Art Conventionally, in a semiconductor package in which a semiconductor element and a circuit board are mounted in a cavity and hermetically sealed with a metal cap, in order to suppress resonance that occurs in the cavity of the package, a portion or cavity facing the cavity in the package Known is a film in which a resistor film is formed on at least a part of a side surface or a radio wave absorber is attached (for example, see Patent Document 1).

JP-A-8-18310 (FIG. 1)

  In the conventional package, when a resistor or a radio wave absorber is arranged in the cavity, there is a problem that the resistor or the radio wave absorber does not satisfy the non-reflection condition. For this reason, reflection occurs in the resistor and the radio wave absorber, resulting in a problem that a sufficient resonance suppression effect is not obtained.

  In order to prevent the resonance itself from occurring, a measure for reducing the cavity size to be equal to or lower than the cut-off frequency is conceivable. However, in this case, there is a problem that as the frequency increases, there is a limitation in mounting.

  The present invention has been made in order to solve the above-described problem, and an object of the present invention is to obtain a package structure capable of suppressing an unnecessary resonance frequency while satisfying the non-reflection condition of a resistor or a wave absorber. .

A dielectric package according to a first aspect of the present invention is a dielectric multi-layer substrate in which a cavity for housing a semiconductor element is formed, a plurality of metal-filled through holes arranged in a cavity side wall so as to surround the cavity, and surrounding the cavity And a plurality of resistor-filled through-holes arranged inward by a distance of a quarter wavelength of the unnecessary resonance wave from the arrangement of the metal-filled through-holes in the cavity side wall.
In addition, the metal-filled through holes may be arranged at intervals of 1/2 wavelength or less of the unnecessary resonance wave, and the resistance-filled through holes may be arranged at intervals of 1/2 wavelength or less of the unnecessary resonance wave.

Further, the second invention is a dielectric multilayer substrate in which a cavity for housing a semiconductor element is formed, a plurality of metal-filled through holes arranged in the cavity side wall so as to surround the cavity, and so as to surround the cavity. Unnecessary resonance waves from multiple metal-filled through-holes for connection arranged inside the array of metal-filled through-holes in the cavity wall surface and metal-filled through-holes in the inner layer of the cavity side wall so as to surround the cavity And a resistor connected to the ground pattern and the seal ring by a metal-filled through hole for connection.
In addition, the metal-filled through holes may be arranged at intervals of 1/2 wavelength or less of the unnecessary resonance wave, and the metal-filled through holes for connection may be arranged at intervals of 1/2 wavelength or less of the unnecessary resonance wave.

  According to the present invention, it is possible to suppress unnecessary resonance waves in the dielectric package in which the cavity is formed in a state where the non-reflection condition is satisfied.

Embodiment 1 FIG.
1 is a cross-sectional view showing a configuration of a dielectric package according to Embodiment 1 of the present invention.
In the figure, a dielectric package 20 includes a metal carrier 1, a dielectric multilayer substrate 6 mounted on the metal carrier 1, and a seal bonded to the upper surface of the dielectric multilayer substrate 6 by brazing or a conductive adhesive. A ring 2 is provided. The dielectric package 20 has a cavity 21 forming a cavity, and one or a plurality of semiconductor elements 22 are accommodated in the space formed by the cavity 21. Further, the lid 3 is joined to the upper surface of the seal ring 2 in the dielectric package 20 by welding or brazing or a conductive adhesive to hermetically seal the inside of the cavity 21. The lid 3 is made of a conductive metal such as aluminum or iron-nickel-cobalt alloy, or a dielectric plate formed so that the surface is covered with a conductive film. The metal carrier 1 and the seal ring 2 are made of a conductive metal. For example, an iron nickel cobalt alloy is used as a representative metal. The seal ring 2 has a rectangular through hole and is shaped like a frame. The cavity 21 is constituted by a space formed by communicating a recess formed in the dielectric multilayer substrate 6 and a through hole of the seal ring 2. The semiconductor element 22 constitutes an active element such as an amplifier and an attenuator and a passive element such as a capacitor and an inductor.

  The dielectric multilayer substrate 6 is a ceramic substrate or an organic substrate formed by laminating a plurality of dielectric sheets (dielectric layers). At this time, the dielectric multilayer substrate 6 is formed by laminating a dielectric layer having a through hole on an upper layer of the lower dielectric layer so as to form a hollow portion forming a part of the cavity 21. A wiring conductor pattern and a ground conductor pattern are formed between the dielectric layers. On the upper surface of the dielectric multilayer substrate 6, conductor pads for mounting the semiconductor elements 22 and wiring conductor patterns connected to the semiconductor elements 22 are formed. A ground conductor pattern 5 is provided on the inner surface of the lower surface of the dielectric layer 6 a that forms the bottom surface of the cavity 21 of the dielectric multilayer substrate 6.

  Inside the side wall (cavity side wall) of the dielectric multilayer substrate 6, there are a plurality of metal-filled through holes 4 that are connected up and down between the layers so as to surround the side wall surface (cavity wall surface) 30 that forms a boundary with the cavity 21. Arranged. The metal-filled through hole 4 is formed by filling a metal in a fine hole of the dielectric multilayer substrate 6. The metal-filled through holes 4 are arranged at intervals of λ / 2 or less along the periphery of the side wall surface 30 that forms a boundary with the cavity 21. Here, λ is an unnecessary resonance wavelength corresponding to the propagation frequency f of the unnecessary resonance wave 8 propagating in the dielectric multilayer substrate 6. The propagation frequency f of the unnecessary resonance wave 8 is determined according to the dimension of the electromagnetic shield wall formed by being surrounded by the metal-filled through hole 4, the ground conductor pattern 5, the seal ring 2, and the lid 3. When the propagation frequency f of the unnecessary resonance wave 8 is close to the operating frequency of the semiconductor element 22 and the input / output RF (Radio Frequency) signal frequency, the operation of the semiconductor element 22 and the operating frequency of the entire dielectric package are affected. FIG. 1 illustrates an image of a standing waveform of the electric field due to the unnecessary resonance wave 8. The metal-filled through hole 4 is connected between the seal ring 2 and the ground conductor pattern 5 and is electrically connected. That is, the metal-filled through hole 4 stands upright in the electric field direction of the unnecessary resonance wave 8 from the lid 3 toward the ground conductor pattern 5.

  Inside the side wall (cavity side wall) of the dielectric multilayer substrate 6, a plurality of resistor-filled through-holes 7 connected in layers up and down are arranged so as to surround the periphery of the side wall surface 30 that forms a boundary with the cavity 21. . The resistor-filled through hole 7 is formed by filling a resistor in the fine hole of the dielectric multilayer substrate 6. The resistor-filled through holes 7 are arranged along the periphery of the side wall surface 30 that forms a boundary with the cavity 21. The resistor-filled through hole 7 is connected between the seal ring 2 and the ground conductor pattern 5 to be conducted. The resistor-filled through hole 7 stands upright in the electric field direction of the unnecessary resonance wave 8 from the lid 3 toward the ground conductor pattern 5.

  Further, the resistor-filled through-holes 7 are arranged on the cavity 21 side by a distance of a quarter wavelength of the unnecessary resonance wave 8 from the arrangement of the metal-filled through-holes 4. Further, the resistor-filled through-hole 7 is provided at the position of the maximum electric field portion that is separated from the arrangement of the metal-filled through-holes 4 by an odd multiple of λ / 4 (λ is an unnecessary resonance wavelength of the unnecessary resonance wave 8). At this time, the non-reflection condition of the unnecessary resonance wave 8 by the resistor-filled through hole 7 is defined as follows so that the reflection-free termination is performed at the position of the electric field maximum portion of the unnecessary resonance wave 8.

Here, the impedance R of the resistance filling through hole 7 is approximated by the characteristic impedance of the square waveguide TE10 wave per unit square section,
R = ωμ / β (Formula 1)
Give to be satisfied.

  However, ω = Propagation angular velocity of unnecessary resonance wave 8 in dielectric multilayer substrate 6 (= 2πf), μ = Permeability of dielectric multilayer substrate 6, β = Phase constant of unnecessary resonance wave 8 in dielectric multilayer substrate 6 (= 2π / λ)

FIG. 2A shows a principle diagram of the non-reflection termination in the rectangular waveguide.
In the figure, when one end of the waveguide is terminated with a conductor, the surface separated from it by λg (signal wavelength for non-reflective termination) / 4 is an electrically open surface, and therefore there is a TE10 wave characteristic impedance Zh = ωμ. When a resistor film having a resistance value (per unit cross-sectional area) equal to / β is placed, a non-reflective terminal is obtained as shown in the equivalent circuit of FIG.

  As described above, in the dielectric package according to the first embodiment, in the dielectric package 20 composed of the dielectric multilayer substrate 6, the unnecessary resonance wave 8 generated between the metal-filled through-holes 4 inside the cavity side wall is reduced by the metal. Non-reflective termination is performed by a resistor-filled through-hole 7 provided at an odd multiple of a distance λ / 4 (λ is an unnecessary resonance wavelength) from the filled through-hole 4. Thereby, the unnecessary resonance wave 8 in the dielectric package 20 in which the cavity 21 is formed can be suppressed in a state where the non-reflection condition is satisfied.

Embodiment 2. FIG.
3A and 3B are diagrams showing a configuration of a dielectric package according to Embodiment 2 of the present invention, in which FIG. 3A is a sectional view of the dielectric package, and FIG. 3B is a resistance pattern 11, a metal-filled through hole 9, and a metal-fill. 2 is a perspective view showing a connection configuration of a through hole 10. FIG. The dielectric package 40 according to the second embodiment is provided with a resistor pattern 11, a metal filled through hole 9, and a metal filled through hole 10 instead of the resistor filled through hole 7 in the dielectric package 20 of the first embodiment. Configured. Since the other configuration is the same as that shown in the first embodiment, detailed description will be omitted in the following description.

  In the figure, a dielectric package 40 includes a metal carrier 1, a dielectric multilayer substrate 6 mounted on the metal carrier 1, and a seal bonded to the upper surface of the dielectric multilayer substrate 6 by brazing or a conductive adhesive. A ring 2 is provided. The dielectric package 20 has a cavity 21 forming a cavity, and one or a plurality of semiconductor elements 22 are accommodated in the space formed by the cavity 21. Further, the lid 3 is joined to the upper surface of the seal ring 2 in the dielectric package 20 by welding or brazing or a conductive adhesive to hermetically seal the inside of the cavity 21. A ground conductor pattern 5 is provided on the inner surface of the lower surface of the dielectric layer 6 a that forms the bottom surface of the cavity 21 of the dielectric multilayer substrate 6.

  Inside the side wall (cavity side wall) of the dielectric multilayer substrate 6, there are a plurality of metal-filled through holes 4 that are connected up and down between the layers so as to surround the side wall surface (cavity wall surface) 30 that forms a boundary with the cavity 21. Arranged. The metal-filled through-holes 4 are arranged at intervals of λ / 2 or less along the periphery of the side wall surface 30 that forms the boundary with the cavity 21 (λ is an unnecessary resonance wave 8 that propagates in the dielectric multilayer substrate 6). Unnecessary resonance wavelength corresponding to the propagation frequency f). FIG. 3 shows an image of the standing waveform of the electric field due to the unnecessary resonance wave 8. The metal-filled through hole 4 is connected between the seal ring 2 and the ground conductor pattern 5 and is electrically connected. That is, the metal-filled through hole 4 stands upright in the electric field direction of the unnecessary resonance wave 8 from the lid 3 toward the ground conductor pattern 5.

  In addition, inside the side wall (cavity side wall) of the dielectric multilayer substrate 6, a resistance pattern 11 disposed in an inner layer is provided so as to surround the periphery of the side wall surface 30 that forms a boundary with the cavity 21. Further, the upper surface of the resistance pattern 11 is connected to the lower end of the metal-filled through hole 9 whose upper end is connected to the lower surface of the seal ring 2 and is conducted. The lower surface of the resistance pattern 11 is connected to the upper end of the metal-filled through hole 10 whose lower end is connected to the upper surface of the ground conductor pattern 5 and is conducted. The metal-filled through holes 9 and 10 are arranged at intervals of λ / 2 or less along the periphery of the side wall surface 30 that forms a boundary with the cavity 21 (λ is an unnecessary resonance wave that propagates in the dielectric multilayer substrate 6. (Unnecessary resonance wavelength corresponding to a propagation frequency f of 8). The resistance pattern 11 is provided perpendicular to the electric field direction of the unnecessary resonance wave 8 from the lid 3 toward the ground conductor pattern 5.

  In addition, the resistance pattern 11 is provided at the position of the maximum electric field portion that is away from the cavity 21 by an odd multiple of λ / 4 (λ is an unnecessary resonance wavelength of the unnecessary resonance wave 8) from the arrangement of the metal-filled through holes 4. It is done. It is set so that it is terminated with an impedance close to a non-reflection termination at the position of the electric field maximum portion of the unnecessary resonance wave 8. At this time, since the shape of the resistance pattern 11 can be formed relatively freely, the degree of freedom in setting impedance close to the non-reflection condition is great.

  As described above, in the dielectric package according to the second embodiment, in the dielectric package 40 constituted by the dielectric multilayer substrate 6, unnecessary resonant waves generated between the metal-filled through holes 4 inside the cavity sidewall are filled with the metal. The resistor pattern 11 provided at an odd multiple of a distance λ / 4 (λ is an unnecessary resonance wavelength) from the through hole 4 is terminated with an impedance close to non-reflection. The resistance pattern 11 is connected to the ground conductor pattern 5 and the seal ring 2 through the metal filled through holes 9 and 10. Thereby, it is possible to suppress unnecessary resonance waves in the dielectric package 40 in which the cavity 21 is formed in a state where the impedance close to the non-reflection condition is satisfied.

It is a block diagram of the dielectric package which concerns on Embodiment 1 of this invention. It is a principle diagram and an equivalent circuit diagram of a non-reflection termination in a rectangular waveguide. It is a block diagram of the dielectric package which concerns on Embodiment 2 of this invention.

Explanation of symbols

  1 Metal carrier, 2 Seal ring, 3 Lid, 4 Metal filled through hole, 6 Dielectric multilayer substrate, 5 Ground conductor pattern, 7 Resistor filled through hole, 9 Metal filled through hole, 10 Metal filled through hole, 11 Resistance pattern , 20 Dielectric package, 21 cavity, 22 semiconductor element, 30 cavity side wall surface.

Claims (2)

A dielectric multilayer substrate having a cavity for housing a semiconductor element;
A plurality of metal-filled through-holes arranged in the cavity sidewalls to surround the cavity;
A plurality of resistor-filled through-holes provided so as to surround the cavity, arranged inward by a distance of a quarter wavelength of unnecessary resonance waves from the arrangement of the metal-filled through-holes in the cavity side wall, and terminated without reflection ,
The metal-filled through-holes are arranged at intervals of 1/2 wavelength or less of unnecessary resonance waves, and the resistance-filled through-holes are arranged at intervals of 1/2 wavelength or less of unnecessary resonance waves. Dielectric package. A dielectric multilayer substrate having a cavity for housing a semiconductor element;
A plurality of metal filled through holes arranged in the cavity sidewalls to surround the cavity;
A plurality of connecting metal-filled through-holes arranged around the cavity inside the array of metal-filled through-holes in the cavity sidewall;
It is provided so as to surround the cavity, and is provided at an inner position by a distance of a quarter wavelength of the unnecessary resonance wave from the arrangement of the metal-filled through-holes in the inner layer of the cavity side wall. Non-reflective terminated resistor pattern,
With
The metal-filled through-holes are arranged at intervals of 1/2 wavelength or less of unnecessary resonance waves, and the metal-filled through-holes for connection are arranged at intervals of 1/2 wavelengths or less of unnecessary resonance waves Body package.

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