JP2008258481A - Laminated ceramic electronic component, and manufacturing method thereof - Google Patents

Laminated ceramic electronic component, and manufacturing method thereof Download PDF

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JP2008258481A
JP2008258481A JP2007100402A JP2007100402A JP2008258481A JP 2008258481 A JP2008258481 A JP 2008258481A JP 2007100402 A JP2007100402 A JP 2007100402A JP 2007100402 A JP2007100402 A JP 2007100402A JP 2008258481 A JP2008258481 A JP 2008258481A
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conductor film
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conductor
laminate
electronic component
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JP4992523B2 (en
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Yasuo Fuchi
康雄 渕
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Murata Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated ceramic electronic component (such as a laminated ceramic capacitor having a small size and a large capacitance) having a small size and high characteristics which can have a large surface area of internal electrode with respect to product dimensions, and to provide a method of manufacturing the laminated ceramic electronic component. <P>SOLUTION: Ceramic green sheets each having a conductor film 2 having a spot-like conductor film nonformation region 13 formed by a thin film formation method are laminated so that the conductor film nonformation regions 13 are located at such positions as to overlapped in a plane form for each layer to thereby form a mother laminate, the laminate is cut into individual separated ceramic laminates 1, each of the laminates 1 has such a structure that a vertical cut line intersects a horizontal cut line in the conductor nonformation region, the conductor films 2 (2a, 2b) are led out for each other layer at one of a pair of corners 4a, 4b, and the conductor films not led out at one corner are led out at the other corner, and then external electrodes 5a, 5b are formed to be electrically connected with leads-out 12 (12a, 12b) of the conductor films. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

この発明は、積層セラミック電子部品及びその製造方法に関し、詳しくは、セラミック積層体中に、複数の導体膜がセラミック層を介して積層され、かつ、複数の導体膜が交互に、セラミック積層体の一対の領域の異なる側に引き出されて、外部電極に接続された構造を有する積層セラミック電子部品およびその製造方法に関する。   The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same, and more specifically, in a ceramic laminate, a plurality of conductor films are laminated via ceramic layers, and a plurality of conductor films are alternately arranged in the ceramic laminate. The present invention relates to a multilayer ceramic electronic component having a structure drawn to different sides of a pair of regions and connected to an external electrode, and a method for manufacturing the same.

近年、積層セラミックコンデンサは種々の用途に広く用いられており、電子機器の小型、高性能化にともない、積層セラミックコンデンサの小型大容量化への要求も大きくなっている。   In recent years, monolithic ceramic capacitors have been widely used for various applications, and the demand for miniaturization and large capacity of monolithic ceramic capacitors has increased as electronic devices have become smaller and higher performance.

このような状況下、誘電体層を薄くして、小型大容量化を図ることを可能にする方法として、内部電極の形成方法として薄膜形成法を採用するとともに、そのパターニング方法としてオイルマスク法を採用して、所定のパターン形状を有する内部電極が得られるようにした方法が提案されている(特許文献1参照)。   Under such circumstances, as a method for making the dielectric layer thin and enabling a reduction in size and capacity, a thin film forming method is adopted as a method for forming an internal electrode, and an oil mask method is used as a patterning method. A method has been proposed in which an internal electrode having a predetermined pattern shape is obtained (see Patent Document 1).

また、内部電極層をパターン化せず、セラミックグリーンシートの表面に全面電極として形成し、この内部電極層を備えたセラミックグリーンシート(誘電体層)を積層した後、全面電極の不要部分を除去してパターン化し、その後、内部電極と導通するように外部電極を形成するようにした積層セラミックコンデンサの製造方法が提案されている(特許文献2)。   Also, the internal electrode layer is not patterned and formed as a full surface electrode on the surface of the ceramic green sheet. After the ceramic green sheet (dielectric layer) having this internal electrode layer is laminated, unnecessary portions of the full surface electrode are removed. A method for manufacturing a multilayer ceramic capacitor in which an external electrode is formed so as to be patterned and then electrically connected to the internal electrode has been proposed (Patent Document 2).

しかしながら、上記特許文献1の方法の場合、規格寸法に合わせて積層セラミック電子部品を製造しようとすると、内部電極の重なり面積(積層セラミックコンデンサの場合における容量取得に寄与する面積)を十分に確保することが困難になり、大容量化が妨げられるという問題点がある。これは、内部電極のパターニング精度、積層時の変形、マザー積層体を切断する際の直線性などを考慮して加工マージンを決定する必要があり、セラミック積層体の平面面積よりも内部電極の寸法を、マージンを確保できる程度にまで小さくしなければならないことによる。   However, in the case of the method disclosed in Patent Document 1, when an attempt is made to produce a multilayer ceramic electronic component in conformity with the standard size, a sufficient overlapping area of internal electrodes (area contributing to capacity acquisition in the case of a multilayer ceramic capacitor) is sufficiently ensured. There is a problem that it is difficult to increase the capacity. This is because the processing margin needs to be determined in consideration of the patterning accuracy of the internal electrode, deformation during stacking, linearity when cutting the mother stack, etc., and the dimensions of the internal electrode rather than the planar area of the ceramic stack This is because it must be reduced to such an extent that a margin can be secured.

また、上記特許文献2の方法の場合、内部電極層を全面電極としているので、特許文献1のように内部電極の周囲にマージンを確保するために内部電極をパターン化することに伴う、製品寸法に対して内部電極の平面面積が小さくなるという問題点は低減できるが、積層後に内部電極の不要部分を除去して絶縁性を確保するようにしているので、十分な絶縁性を確保できる程度にまで内部電極層を除去するのに時間がかかり、生産性が低いという問題点がある。
特開2003−234241号公報 特開2003−109841号公報
Further, in the case of the method of Patent Document 2, the internal electrode layer is a full-surface electrode. Therefore, as described in Patent Document 1, product dimensions associated with patterning the internal electrode in order to ensure a margin around the internal electrode. In contrast, the problem that the plane area of the internal electrode is reduced can be reduced, but after the lamination, unnecessary portions of the internal electrode are removed to ensure insulation, so that sufficient insulation can be secured. However, it takes time to remove the internal electrode layer, and the productivity is low.
JP 2003-234241 A JP 2003-109841 A

この発明は、上記課題を解決するものであり、製品寸法に対して、内部電極の面積を大きくとることが可能で、例えば積層セラミックコンデンサの場合、小型大容量化を図ることができ、しかも、内部電極の不要部を除去する必要がなく、効率よく小型高特性の積層セラミック電子部品を製造することが可能な積層セラミック電子部品の製造方法を提供することを目的とする。   The present invention solves the above-mentioned problem, and it is possible to increase the area of the internal electrode with respect to the product dimensions. For example, in the case of a multilayer ceramic capacitor, it is possible to achieve a small size and a large capacity, It is an object of the present invention to provide a method for manufacturing a multilayer ceramic electronic component that can efficiently manufacture a small and high-performance multilayer ceramic electronic component without having to remove unnecessary portions of internal electrodes.

上記課題を解決するために、この発明の積層セラミック電子部品の製造方法は、セラミック積層体中に、複数の導体膜がセラミック層を介して積層され、かつ、セラミック層を介して対向する各導体膜が交互に、セラミック積層体の側面の一対の領域の異なる側に引き出され、前記一対の領域のそれぞれに配設された外部電極に電気的に接続された構造を有する電子部品の製造方法であって、
所定位置にスポット状に導体膜非形成領域を備えた導体膜を、薄膜形成法によりセラミックグリーンシートの一方主面に形成する工程と、
セラミックグリーンシートの一方主面に形成された前記導体膜非形成領域が一層おきに平面的に重なる位置にくるように前記セラミックグリーンシートを複数枚積層して、マザー積層体を形成する工程と、
前記マザー積層体を、平面方向から見て縦横方向に切断するに際し、縦方向の切断線と横方向の切断線が前記導体膜非形成領域において交わるように切断して、一対のコーナ部における一方のコーナ部には、前記導体膜が一層おきに引き出され、かつ、他方のコーナ部には、前記一方のコーナ部に引き出されていない方の導体膜が引き出された構造を有する個々のセラミック積層体に分割する工程と、
前記一対のコーナ部に引き出された前記導体膜の引出部と導通するように、前記セラミック積層体の前記一対のコーナ部に外部電極を形成する工程と
を具備することを特徴としている。
In order to solve the above-described problems, a method for manufacturing a multilayer ceramic electronic component according to the present invention includes: a plurality of conductor films laminated in a ceramic laminate through ceramic layers, and each conductor facing through the ceramic layers; A method of manufacturing an electronic component having a structure in which films are alternately drawn out to different sides of a pair of regions on a side surface of a ceramic laminate and electrically connected to external electrodes disposed in each of the pair of regions. There,
Forming a conductive film having a conductive film non-formation region in a spot shape at a predetermined position on one main surface of the ceramic green sheet by a thin film forming method;
A step of forming a mother laminate by laminating a plurality of the ceramic green sheets so that the conductor film non-formation regions formed on one main surface of the ceramic green sheets are overlapped in a plane every other layer; and
When the mother laminate is cut in the vertical and horizontal directions when viewed from the plane direction, the mother laminated body is cut so that the vertical cutting lines and the horizontal cutting lines intersect in the conductor film non-forming region, Each of the ceramic laminates has a structure in which the conductor film is drawn every other layer at the corner portion, and the conductor film not drawn out at the one corner portion is drawn at the other corner portion. Dividing the body,
Forming an external electrode at the pair of corner portions of the ceramic laminate so as to be electrically connected to the conductor film lead portions drawn to the pair of corner portions.

外部電極を形成した後に、外部電極は被覆されずに露出し、導体膜は被覆されて外部に露出しないような態様で、セラミック積層体の主要部を被覆層により被覆することが望ましい。   After forming the external electrode, it is desirable to cover the main part of the ceramic laminate with the coating layer in such a manner that the external electrode is exposed without being coated and the conductor film is coated and not exposed to the outside.

また、外部電極を形成する前に、コーナ部に引き出された導体膜の引出部は露出し、かつ、コーナ部以外の領域からは導体膜が露出しないような態様で、セラミック積層体を絶縁性の被覆層により被覆した後、コーナ部に引き出された導体膜の引出部と導通するように外部電極を形成してもよい。   In addition, before forming the external electrode, the conductive film drawn out to the corner is exposed, and the conductive film is not exposed from areas other than the corner. After coating with the coating layer, an external electrode may be formed so as to be electrically connected to the lead portion of the conductor film drawn to the corner portion.

また、前記導体膜非形成領域を備えた導体膜を形成するにあたって、オイルマスク法により前記導体膜非形成領域を備えた導体膜を形成することができる。   Moreover, when forming the conductor film provided with the conductor film non-formation region, the conductor film provided with the conductor film non-formation region can be formed by an oil mask method.

この発明の積層セラミック電子部品の製造方法は、所定位置にスポット状に導体膜非形成領域を備えた導体膜をセラミックグリーンシートの一方主面に形成し、このセラミックグリーンシートを導体膜非形成領域が一層おきに平面的に重なる位置にくるように複数枚積層してマザー積層体を形成し、このマザー積層体を、平面方向から見て縦横方向に切断する際に、縦方向の切断線と横方向の切断線が導体膜非形成領域において交わるように切断して、一対のコーナ部における一方のコーナ部には、導体膜が一層おきに引き出され、かつ、他方のコーナ部には、上記一方のコーナ部に引き出されていない方の導体膜が引き出された構造を有する、個々のセラミック積層体に分割する工程と、導体膜の引出部と導通するように外部電極を形成する工程とを備えているので、内部電極の不要部分を除去したりすることを必要とせずに、効率よくセラミック層を介して対向する各導体膜を交互に、セラミック積層体の側面の一対の領域の異なる側に引き出すことが可能になる。
その結果、製品寸法に対して、内部電極の面積を大きくとることが可能になり、小型高特性の積層セラミック電子部品、例えば、小型大容量の積層セラミックコンデンサなどを効率よく製造することが可能になる。
In the method for manufacturing a multilayer ceramic electronic component according to the present invention, a conductor film having a conductor film non-formation region in a spot shape at a predetermined position is formed on one main surface of a ceramic green sheet, and the ceramic green sheet is formed in a conductor film non-formation region A mother laminate is formed by laminating a plurality of sheets so that the layers overlap each other in a plane, and when this mother laminate is cut in the vertical and horizontal directions when viewed from the plane, Cut so that the transverse cutting line intersects in the conductor film non-formation region, the conductor film is drawn every other layer in one corner portion of the pair of corner portions, and the other corner portion has the above-mentioned The step of dividing into individual ceramic laminates having a structure in which the conductor film not drawn to one corner is drawn, and the external electrode is formed so as to be electrically connected to the lead of the conductor film. A pair of regions on the side surface of the ceramic laminate, each of the conductive films facing each other through the ceramic layer efficiently without needing to remove unnecessary portions of the internal electrodes. Can be pulled out to different sides.
As a result, it is possible to increase the area of the internal electrode relative to the product dimensions, and it is possible to efficiently manufacture small and high characteristic multilayer ceramic electronic components, such as small and large capacity multilayer ceramic capacitors. Become.

また、この発明によれば、セラミックグリーンシートの一方主面のほぼ全面に導体膜が配設された状態のセラミックグリーンシートを取り扱うようにすることができるので、導体膜(電極)の形成の有無によるセラミックグリーンシートの面内の強度差をなくすことが可能になり、ハンドリングダメージを抑制して、信頼性の高いセラミック積層体を形成することが可能になる。   In addition, according to the present invention, since it is possible to handle the ceramic green sheet in which the conductor film is disposed on almost the entire main surface of one side of the ceramic green sheet, the presence or absence of the formation of the conductor film (electrode) It is possible to eliminate the in-plane strength difference of the ceramic green sheet, and it is possible to suppress handling damage and form a highly reliable ceramic laminate.

また、外部電極を形成した後に、外部電極は被覆されずに露出し、導体膜は被覆されて外部に露出しないような態様で、セラミック積層体の主要部を被覆層により被覆することにより、内部電極が外部電極を介さずに外部と導通してしまうことを防止して、信頼性の高い積層セラミック電子部品を得ることが可能になる。   In addition, after the external electrode is formed, the external electrode is exposed without being covered, and the conductor film is covered and not exposed to the outside. It is possible to obtain a highly reliable multilayer ceramic electronic component by preventing the electrode from conducting to the outside without going through the external electrode.

また、外部電極を形成する前に、コーナ部に引き出された導体膜の引出部は露出し、かつ、コーナ部以外の領域からは導体膜が露出しないような態様で、セラミック積層体を絶縁性の被覆層により被覆した後、導体膜の引出部と導通するように外部電極を形成するようにした場合にも、信頼性の高い積層セラミック電子部品を得ることができる。   In addition, before forming the external electrode, the conductive film drawn out to the corner is exposed, and the conductive film is not exposed from areas other than the corner. Even when the external electrode is formed so as to be electrically connected to the lead portion of the conductor film after being covered with the covering layer, a highly reliable multilayer ceramic electronic component can be obtained.

また、導体膜非形成領域を備えた導体膜を形成するにあたって、いわゆるオイルマスク法を用いて導体膜非形成領域を形成することにより、容易かつ、確実に導体膜非形成領域を備えた導体膜を形成することができる。   In forming a conductor film having a conductor film non-formation region, a conductor film having a conductor film non-formation region can be easily and surely formed by forming the conductor film non-formation region using a so-called oil mask method. Can be formed.

なお、オイルマスク法は、例えばフッ素系樹脂などを、セラミックグリーンシートの一方主面の導体膜非形成領域が形成されるべき位置に、インクジェットなどの方法でスポット状に印刷(塗布)してオイルマスクを形成し、その状態でセラミックグリーンシートの一方主面に薄膜形成法により成膜を行い、オイルマスクが施された領域を導体膜非形成領域とし、オイルマスクが施されていない領域に導体膜が形成されるようにする方法である。   In the oil mask method, for example, a fluororesin is printed (applied) in a spot shape by a method such as ink jet at a position where the conductive film non-formation region on one main surface of the ceramic green sheet is to be formed. A mask is formed, and in this state, a film is formed on one main surface of the ceramic green sheet by a thin film forming method. A region where the oil mask is applied is defined as a conductive film non-formed region, and a conductor is formed in a region where the oil mask is not applied. This is a method for forming a film.

なお、オイルマスク法により、導体膜非形成領域を備えた導体膜を有するセラミックグリーンシートを形成するにあたっては、上述の方法の他にも、オイルマスクをPETフィルムなどの基材上に形成し、その上から薄膜形成法により導体膜を成膜し、さらにその上にセラミックグリーンシートを成形する方法などが例示される。この方法によっても、導体膜非形成領域を備えた導体膜を一方主面に備えたセラミックグリーンシートを得ることができる。   In addition, in forming a ceramic green sheet having a conductor film having a conductor film non-formation region by an oil mask method, in addition to the above method, an oil mask is formed on a substrate such as a PET film, Examples thereof include a method in which a conductor film is formed by a thin film forming method and a ceramic green sheet is further formed thereon. Also by this method, it is possible to obtain a ceramic green sheet having a conductor film having a conductor film non-formation region on one main surface.

また、オイルマスクは、厚みのある高弾性のフレキソ版を用いるフレキソ印刷法によっても形成することが可能である。
さらに、導体膜の導体膜非形成領域は、フォトリソグラフィーによるエッチングの方法によっても形成することも可能である。
The oil mask can also be formed by a flexographic printing method using a thick, highly elastic flexographic plate.
Furthermore, the conductor film non-formation region of the conductor film can also be formed by an etching method by photolithography.

また、セラミック積層体の、外部電極が形成されるコーナ部以外の領域を絶縁性の被覆層で被覆する場合、コーナ部に露出した導体膜の引出部に撥水性を付与した後、引出部に弾かれる性質を有する被覆層材料の塗布、または、被覆層材料への浸漬の方法によりセラミック積層体を被覆層により被覆する方法を適用することにより、効率よくセラミック積層体を被覆層で被覆することができる。   In addition, when a region of the ceramic laminate other than the corner portion where the external electrode is formed is covered with an insulating coating layer, the conductive film lead portion exposed at the corner portion is given water repellency, and then the lead portion is exposed. Efficiently coating the ceramic laminate with the coating layer by applying a method of coating the ceramic laminate with the coating layer by applying the coating layer material having a repelling property or by dipping in the coating layer material Can do.

なお、導体膜の引出部に撥水性を持たせることにより、例えば、セラミック積層体を被覆層を構成する材料に浸漬して、引出部を露出させた状態で、セラミック積層体の全面あるいは所定の領域に、例えば30μm以下というような薄い被覆層を形成することができる。さらに、被覆層の構成材料を調整することにより10μm程度の均一な被覆層を形成することもできる。   In addition, by giving water repellency to the lead portion of the conductor film, for example, the ceramic laminate is immersed in the material constituting the coating layer and the lead portion is exposed, or the entire surface of the ceramic laminate or a predetermined portion is exposed. For example, a thin covering layer of 30 μm or less can be formed in the region. Furthermore, a uniform coating layer of about 10 μm can be formed by adjusting the constituent material of the coating layer.

また、この発明において、撥水性を有しているとは、被覆材を弾く作用を果たす性質を有していることを意味するものであり、この発明でいう撥水性とは、文字どおりの、水を弾くという意味での撥水性に限らず、例えば油性の被覆材を弾くことができるような撥油性などの意味をも含む概念である。   Further, in the present invention, having water repellency means having the property of repelling the coating material, and the water repellency in the present invention is literally water. It is a concept including not only the water repellency in the sense of repelling but also the meaning of oil repellency that can repel an oil-based coating material, for example.

なお、具体的には、露出した導体膜の引出部に撥水めっき膜を形成する方法や、導体膜の引出部に金めっき膜を形成し、その表面にフッ素変性チオールを塗布して自己組織化膜を金めっき膜の表面に形成する方法などにより、導体膜の引出部に撥水性を付与することができる。   Specifically, a method of forming a water-repellent plating film on the exposed portion of the conductor film, or forming a gold plating film on the lead portion of the conductor film, and applying fluorine-modified thiol on the surface to self-organize Water repellency can be imparted to the drawn-out portion of the conductor film by a method of forming a chemical film on the surface of the gold plating film.

以下にこの発明の実施例を示して、この発明の特徴とするところをさらに詳しく説明する。   Examples of the present invention will be described below to describe the features of the present invention in more detail.

図1は、この発明の一実施例にかかる積層セラミック電子部品(この実施例では積層セラミックコンデンサ)の外観構成を示す斜視図、図2は導体膜である内部電極の引出部と外部電極との接続態様を示す図であって、(a)は一方のコーナ部で外部電極と導通する内部電極を示す図、(b)は他方のコーナ部で外部電極と導通する内部電極を示す図である。
また、図3は図1,2のA−A線断面図である。
FIG. 1 is a perspective view showing an external configuration of a multilayer ceramic electronic component (in this embodiment, a multilayer ceramic capacitor) according to one embodiment of the present invention, and FIG. 2 is a drawing of an internal electrode lead portion and an external electrode that are conductor films. It is a figure which shows a connection aspect, (a) is a figure which shows the internal electrode which conducts with an external electrode in one corner part, (b) is a figure which shows the internal electrode which conducts with an external electrode in the other corner part. .
3 is a cross-sectional view taken along line AA of FIGS.

この積層セラミックコンデンサ10においては、図1〜3に示すように、セラミック積層体1中に、複数の内部電極(導体膜)2がセラミック層3を介して積層されている。また、この複数の内部電極2(2a,2b)はセラミック積層体1の、互いに対角の位置にある一対のコーナ部4a,4bに引き出されている。   In this multilayer ceramic capacitor 10, as shown in FIGS. 1 to 3, a plurality of internal electrodes (conductor films) 2 are laminated via a ceramic layer 3 in a ceramic laminate 1. Further, the plurality of internal electrodes 2 (2a, 2b) are drawn out to a pair of corner portions 4a, 4b in the ceramic laminate 1 at diagonal positions.

そして、複数の内部電極2(2a,2b)は交互に、セラミック積層体1の対角に位置する一対のコーナ部4a,4bの異なる側に引き出され、その引出部12(12a,12b)を介して、一対のコーナ部4a,4bに配設された外部電極5a,5bのいずれか一方に電気的に接続されている。また、セラミック積層体1の、外部電極5a,5bが配設されていない領域は、絶縁性の樹脂からなる被覆層6により被覆されており、内部電極2(2a,2b)の平面面積がセラミック積層体1の平面面積とほぼ同じ大きさであるにもかかわらず、内部電極2(2a,2b)が外部と短絡したりすることがないように構成されている。   The plurality of internal electrodes 2 (2a, 2b) are alternately drawn out to different sides of the pair of corner portions 4a, 4b located at the opposite corners of the ceramic laminate 1, and the lead portions 12 (12a, 12b) are drawn out. Through which the external electrodes 5a and 5b disposed in the pair of corner portions 4a and 4b are electrically connected. Moreover, the area | region where the external electrodes 5a and 5b are not arrange | positioned of the ceramic laminated body 1 is coat | covered with the coating layer 6 which consists of insulating resin, and the planar area of the internal electrode 2 (2a, 2b) is ceramic. The internal electrodes 2 (2a, 2b) are configured not to be short-circuited with the outside, although they are almost the same size as the planar area of the multilayer body 1.

次に、この積層セラミックコンデンサの製造方法について説明する。
(1)セラミックグリーンシート20の一方主面に、薄膜形成法により、所定位置にスポット状に導体膜非形成領域を備えた導体膜を形成する。
この実施例では、図4に示すように、セラミックグリーンシート20の一方主面の導体膜非形成領域13を形成すべき位置に、フッ素系樹脂をインクジェットなどの方法でスポット状に印刷(塗布)してオイルマスク11を形成し、その状態でセラミックグリーンシート20の一方主面の全面に、例えば、スパッタリング法などの薄膜形成法により導体膜を成膜して、オイルマスク11が施された領域を導体膜非形成領域13とする導体膜2を形成する。
なお、セラミックグリーンシートとしては、通常、PETフィルムなどのキャリアフィルムにより支持されたものを用いる。
Next, a method for manufacturing this multilayer ceramic capacitor will be described.
(1) On one main surface of the ceramic green sheet 20, a conductor film having a conductor film non-formation region in a spot shape at a predetermined position is formed by a thin film forming method.
In this embodiment, as shown in FIG. 4, the fluororesin is printed (applied) in a spot shape by a method such as inkjet at a position where the conductor film non-formation region 13 on one main surface of the ceramic green sheet 20 is to be formed. Then, an oil mask 11 is formed, and in that state, a conductor film is formed on the entire surface of one main surface of the ceramic green sheet 20 by, for example, a thin film forming method such as a sputtering method. The conductor film 2 having the conductor film non-formation region 13 is formed.
In addition, as a ceramic green sheet, what was normally supported by carrier films, such as PET film, is used.

また、この実施例1では、セラミックグリーンシート20の一方主面の導体膜非形成領域13を形成すべき位置に、フッ素系樹脂をスポット状に印刷(塗布)してオイルマスク11を形成するようにしているが、オイルマスクをPETフィルムなどの基材上に形成し、その上から薄膜形成法により導体膜を成膜し、さらにその上にセラミックグリーンシートを成形することにより、導体膜非形成領域を有する導体膜を一方主面に備えたセラミックグリーンシートを作製することも可能である。   In Example 1, the oil mask 11 is formed by printing (applying) a fluorine-based resin in a spot shape at a position where the conductor film non-formation region 13 on one main surface of the ceramic green sheet 20 is to be formed. However, an oil mask is formed on a substrate such as a PET film, a conductor film is formed on the substrate by a thin film formation method, and a ceramic green sheet is further formed thereon to form a conductor film. It is also possible to produce a ceramic green sheet having a conductor film having a region on one main surface.

(2)それから、セラミックグリーンシート20の一方主面に形成された導体膜2の導体膜非形成領域13が一層おきに平面的に重なる位置にくるように、隣接する各セラミックグリーンシート20(図5(a))を、図5(b)に示すように所定量だけ位置をずらして積層することによりマザー積層体14を形成する。   (2) Then, the adjacent ceramic green sheets 20 (see FIG. 5) so that the conductor film non-formation regions 13 of the conductor film 2 formed on one main surface of the ceramic green sheet 20 overlap each other in a plane. 5 (a)) is laminated by shifting the position by a predetermined amount as shown in FIG. 5 (b) to form the mother laminate 14.

なお、セラミックグリーンシート20を積層する方法としては、キャリアフィルムから剥離した後、圧着する方法、あるいは、一枚ずつ圧着した後、キャリアフィルムを剥離し、これを繰り返す方法のいずれの方法を用いることも可能である。
また、セラミック積層体の上下両側に外装用シートを積層するにあたっては、上記セラミックグリーンシートを積層する工程で、同様にして積み重ねることも可能であり、また、上記セラミックグリーンシートの積層工程の終了後に、プレスで一体化することも可能である。
In addition, as a method of laminating the ceramic green sheets 20, use any method of peeling from the carrier film and then pressing, or after pressing one by one and then peeling the carrier film and repeating this method. Is also possible.
In addition, when laminating the exterior sheets on the upper and lower sides of the ceramic laminate, in the step of laminating the ceramic green sheets, it is also possible to stack in the same manner, and after the ceramic green sheet laminating step It is also possible to integrate with a press.

(3)それから、マザー積層体14を、平面方向から見て縦横方向に、所定の切断線L1,L2に沿って切断する(図6参照)。このとき、縦方向の切断線L1と横方向の切断線L2が導体膜非形成領域13の中央において交わるように切断する。   (3) Then, the mother laminate 14 is cut along predetermined cutting lines L1 and L2 in the vertical and horizontal directions as seen from the plane direction (see FIG. 6). At this time, the cutting is performed so that the vertical cutting line L1 and the horizontal cutting line L2 intersect at the center of the conductor film non-forming region 13.

これにより、一対のコーナ4aおよび4bのうちの一方のコーナ部(例えば、4a)には、導体膜2(2a)が一層おきに引き出され、かつ、他方のコーナ部(例えば4b)には、一方のコーナ部4aに引き出されていない方の導体膜2(2b)が引き出された構造を有する個々のセラミック積層体に分割する(図1〜3参照)。   As a result, the conductor film 2 (2a) is pulled out every other corner portion (for example, 4a) of the pair of corners 4a and 4b, and the other corner portion (for example, 4b) The conductor film 2 (2b) that is not drawn to one corner 4a is divided into individual ceramic laminates having a drawn structure (see FIGS. 1 to 3).

(4)次に、セラミック積層体1を所定の条件で焼成した後、コーナ部4a,4bに引き出された導体膜(内部電極2a,2b)の引出部12a,12bと導通するように外部電極5a,5bを形成する。
外部電極5a,5bは例えば、導電ペーストを塗布して焼き付ける方法などの周知の種々の方法で形成することができる。
(4) Next, after firing the ceramic laminate 1 under predetermined conditions, external electrodes are connected so as to be electrically connected to the lead portions 12a and 12b of the conductor films (internal electrodes 2a and 2b) drawn to the corner portions 4a and 4b. 5a and 5b are formed.
The external electrodes 5a and 5b can be formed by various known methods such as a method of applying and baking a conductive paste.

(5)それから、外部電極5a,5bが形成された領域以外の領域を絶縁性の被覆層6により被覆する。これにより図1に示すような構造を有する積層セラミックコンデンサ10が得られる。
なお、セラミック積層体1を、被覆層6により被覆する方法としては、例えば、絶縁樹脂原料の溶剤溶液などに浸漬した後、絶縁樹脂を硬化させる方法などを適用することができる。
(5) Then, a region other than the region where the external electrodes 5 a and 5 b are formed is covered with the insulating coating layer 6. Thereby, a multilayer ceramic capacitor 10 having a structure as shown in FIG. 1 is obtained.
In addition, as a method of coating the ceramic laminate 1 with the coating layer 6, for example, a method in which the insulating resin is cured after being immersed in a solvent solution of the insulating resin raw material can be applied.

なお、被覆層6による被覆の方法により、外部電極5a,5bが被覆層6により被覆されてしまう場合があるが、その場合には、例えばサンドブラストなどの方法で、外部電極5a,5bの表面を露出させることができる。   Note that the external electrodes 5a and 5b may be covered with the coating layer 6 depending on the method of coating with the coating layer 6. In this case, for example, the surface of the external electrodes 5a and 5b is coated by a method such as sandblasting. Can be exposed.

また、被覆層6により外部電極5a,5bが被覆されないように、外部電極5a,5bに撥水めっきを施しておくことにより、ディッピングなどの方法で容易に被覆層を形成することができる。   Further, by applying water-repellent plating to the external electrodes 5a and 5b so that the external electrodes 5a and 5b are not covered with the coating layer 6, the coating layer can be easily formed by a method such as dipping.

また、マザー積層体を形成するにあたっては、導体膜の成膜、シート成形を繰り返す方法で必要積層数を得ることも可能であり、また、例えば、10層分を繰り返し積層したのち、これを打ち抜き、積層することにより必要積層数を得ることも可能である。   In forming a mother laminate, it is also possible to obtain the required number of layers by a method of repeatedly forming a conductor film and forming a sheet. For example, after repeatedly laminating 10 layers, this is punched out. It is also possible to obtain the required number of layers by laminating.

この実施例1の積層セラミック電子部品の製造方法によれば、導体膜がほぼ全面に配設されたセラミックグリーンシートが用いられることから、その強度が、導体膜を備えていないセラミックグリーンシート単体の場合に比べて約1.5倍に向上し、ハンドリングダメージを回避しつつ、厚みの薄いセラミックグリーンシートを取り扱うことが可能になる。具体的には、焼成前の厚みが0.8μmのセラミックグリーンシートを用いることが可能になる。
また、得られた積層セラミックコンデンサについてみると、焼成後の導体膜(内部電極)の厚みが0.6μmの積層セラミックコンデンサを得ることが可能になる。
According to the method of manufacturing the multilayer ceramic electronic component of Example 1, since the ceramic green sheet having the conductor film disposed on almost the entire surface is used, the strength of the ceramic green sheet alone that does not include the conductor film is used. Compared with the case, the ceramic green sheet having a small thickness can be handled while avoiding handling damage. Specifically, it becomes possible to use a ceramic green sheet having a thickness of 0.8 μm before firing.
Further, regarding the obtained multilayer ceramic capacitor, it becomes possible to obtain a multilayer ceramic capacitor having a fired conductor film (internal electrode) thickness of 0.6 μm.

上述のように、この実施例1の方法によれば、いわゆる多数個取りの方法により、製品寸法の平面面積と内部電極の面積がほぼ同じで、小型大容量の積層セラミックコンデンサを効率よく製造することができる。   As described above, according to the method of the first embodiment, a so-called multi-cavity method efficiently manufactures a small-sized and large-capacity monolithic ceramic capacitor in which the planar area of the product dimensions is substantially the same as the area of the internal electrodes. be able to.

本願発明の他の実施例にかかる積層セラミックコンデンサの製造法について説明する。
(1)まず、上記実施例1の(1),(2)で説明した方法と同じ方法で、マザー積層体14を形成する。
A method for manufacturing a multilayer ceramic capacitor according to another embodiment of the present invention will be described.
(1) First, the mother laminated body 14 is formed by the same method as described in the first embodiment (1) and (2).

(2)それから、図7,図8に示すように、上述の導体膜非形成領域13に、該導体膜非形成領域13よりも一回り小さな径のスルーホール23(23a,23b)を形成する。
このとき、図8に示すように、導体膜2(2a,2b)は一層おきに、一対のスルーホール23(23a,23b)の内周面に露出し、一対のスルーホール23(23a,23b)どうしでは、その内周面にそれぞれに異なる導体膜2(2aまたは2b)が露出する。
(2) Then, as shown in FIGS. 7 and 8, through holes 23 (23a, 23b) having a diameter slightly smaller than that of the conductor film non-formation region 13 are formed in the conductor film non-formation region 13 described above. .
At this time, as shown in FIG. 8, the conductor films 2 (2a, 2b) are exposed on the inner peripheral surface of the pair of through holes 23 (23a, 23b) every other layer, and the pair of through holes 23 (23a, 23b). ) In some cases, different conductor films 2 (2a or 2b) are exposed on the inner peripheral surfaces thereof.

(3)そして、露出した導体膜2の引出部12(12a,12b)に、撥水めっきを行うことにより撥水性を付与する。
この実施例2では、フッ素系高分子のエマルジョンとNiを含むめっき浴にセラミック積層体を積層して、Ni金属とともに、フッ素系高分子を共析させることにより撥水性を付与する方法を用いて撥水めっきを行い、引出部12a,12bに撥水性を付与した。
(3) Water repellency is imparted to the exposed portions 12 (12a, 12b) of the conductor film 2 by performing water-repellent plating.
In Example 2, a ceramic laminate is laminated on a plating bath containing an emulsion of a fluorine polymer and Ni, and a method of imparting water repellency by co-depositing the fluorine polymer together with Ni metal is used. Water repellent plating was performed to impart water repellency to the lead portions 12a and 12b.

フッ素系高分子としては、ポリテトラフルオロエチレン(PTFE)、ポリパーフルオロアルコキシブタジエン(PFA)、ポリフルオロビニリデンなどを単独で、あるいは、これらを組み合わせて用いることができる。撥水めっき膜の厚さは、1μm〜5μm程度であれば、この発明において必要とされる撥水性を十分に確保することができる。   As the fluorine-based polymer, polytetrafluoroethylene (PTFE), polyperfluoroalkoxybutadiene (PFA), polyfluorovinylidene, or the like can be used alone or in combination. If the thickness of the water-repellent plating film is about 1 μm to 5 μm, the water repellency required in the present invention can be sufficiently secured.

なお、撥水めっき膜の厚さが1μm未満になると、撥水性が不十分になり、引出部が被覆層により被覆されてしまう場合が生じるため好ましくない。また、撥水めっき膜が5μmを超えると、撥水性としては十分であるが、厚みが1μm以下の導体膜(内部電極)に適用することが困難になるため好ましくない。
また、導体膜の引出部に金めっきを施し、形成された金めっき膜の表面にフッ素変性チオールを塗布することによっても引出部に撥水性をもたらすことができる。
In addition, when the thickness of the water-repellent plating film is less than 1 μm, the water repellency becomes insufficient, and the lead portion may be covered with the coating layer, which is not preferable. On the other hand, when the water-repellent plating film exceeds 5 μm, the water repellency is sufficient, but it is not preferable because it becomes difficult to apply to a conductor film (internal electrode) having a thickness of 1 μm or less.
Moreover, water repellency can be brought to the lead-out portion by applying gold plating to the lead-out portion of the conductor film and applying fluorine-modified thiol to the surface of the formed gold-plated film.

(4)次に、マザー積層体14を、平面方向から見て縦横方向に、所定の切断線L1,L2に沿って切断する。このとき、縦方向の切断線L1と横方向の切断線L2が導体膜非形成領域13に形成されたスルーホール23において交わるように切断して、個々のセラミック積層体1に分割する。   (4) Next, the mother laminate 14 is cut along predetermined cutting lines L1 and L2 in the vertical and horizontal directions when viewed from the plane. At this time, the cutting line L1 in the vertical direction and the cutting line L2 in the horizontal direction are cut so as to intersect at the through hole 23 formed in the conductor film non-formation region 13, and divided into individual ceramic laminates 1.

(5)そして、分割されたセラミック積層体1を、撥水性を有する引出部12(12a,12b)に弾かれる材料からなる被覆層により被覆して、図9に示すように、一対のコーナ部4a,4bに引出部12(12a,12b)が露出し、他の領域が被覆層6により被覆された構造を有する被覆セラミック積層体11を形成する。
なお、この実施例では、セラミックスラリーに浸漬して、引出部12(12a,12b)が露出し、他の領域がセラミック層からなる被覆層6(6a)により被覆された被覆セラミック積層体11を形成する。
(5) Then, the divided ceramic laminate 1 is covered with a coating layer made of a material repelled by the water repellent lead portions 12 (12a, 12b), and as shown in FIG. The lead portion 12 (12a, 12b) is exposed at 4a, 4b, and the coated ceramic laminate 11 having a structure in which other regions are covered with the coating layer 6 is formed.
In this embodiment, the coated ceramic laminate 11 is immersed in a ceramic slurry so that the lead portion 12 (12a, 12b) is exposed and the other region is coated with the coating layer 6 (6a) made of a ceramic layer. Form.

(6)この被覆セラミック積層体を一体的に焼成した後、引出部12(12a,12b)が露出した被覆セラミック積層体11の一対のコーナ部4a,4bに、引出部12a,12bと導通するように外部電極形成用の導電ペーストを塗布し、焼き付けることにより、外部電極5a,5bを形成する。これにより、図10に示すような構造を有する積層セラミックコンデンサが得られる。
この実施例2の方法によれば、一度の熱処理により、セラミック積層体1の焼成と外部電極5a,5bの焼付けとを同時に行うことが可能になり、製造プロセスの簡略化を図ることができる。
(6) After this coated ceramic laminate is integrally fired, the lead portions 12a and 12b are electrically connected to the pair of corner portions 4a and 4b of the coated ceramic laminate 11 where the drawn portions 12 (12a and 12b) are exposed. Thus, the external electrodes 5a and 5b are formed by applying and baking the conductive paste for forming the external electrodes. Thereby, a multilayer ceramic capacitor having a structure as shown in FIG. 10 is obtained.
According to the method of the second embodiment, the ceramic laminate 1 and the external electrodes 5a and 5b can be simultaneously fired by a single heat treatment, and the manufacturing process can be simplified.

なお、露出した導体膜の引出部に撥水性を付与する方法としては、引出部に撥水めっき膜を形成する方法に限らず、導体膜の引出部に金めっき膜を形成し、その表面にフッ素変性チオールを塗布して自己組織化膜を金めっき膜の表面に形成する方法などを適用することも可能である。   The method for imparting water repellency to the exposed portion of the conductor film is not limited to the method of forming a water-repellent plating film on the lead portion, but a gold plating film is formed on the lead portion of the conductor film and the surface thereof is formed. It is also possible to apply a method in which a fluorine-modified thiol is applied to form a self-assembled film on the surface of the gold plating film.

また、上記実施例では、積層セラミックコンデンサを例にとって説明したが、この発明は、LC複合部品など、積層セラミックコンデンサ以外の積層セラミック電子部品にも適用することが可能である。   In the above embodiment, the multilayer ceramic capacitor has been described as an example. However, the present invention can also be applied to multilayer ceramic electronic components other than the multilayer ceramic capacitor, such as LC composite components.

また、上記実施例では、対角位置にある一対のコーナ部に導体部を引き出すようにしているが、対角位置ではなく、同一側の一対のコーナ部に導体部を引き出すようにすることも可能である。   In the above embodiment, the conductor portion is drawn out to the pair of corner portions at the diagonal position, but the conductor portion may be drawn out to the pair of corner portions on the same side instead of the diagonal position. Is possible.

この発明は、その他の点においても上記実施例に限定されるものではなく、導体膜(内部電極)の積層数、導体膜非形成領域の具体的な形成方法などに関し、発明の範囲内において、種々の応用、変形を加えることが可能である。   In other respects, the present invention is not limited to the above-described embodiments, and relates to the number of conductor films (internal electrodes) stacked, a specific method for forming a conductor film non-formation region, and the like within the scope of the invention. Various applications and modifications can be added.

上述のように、この発明によれば、内部電極の面積を製品寸法の平面面積とほぼ同一とすることが可能で、小型高特性の積層セラミック電子部品を効率よく製造することが可能になり、例えば、積層セラミックコンデンサの場合には、小型大容量化を実現することができる。
したがって、この発明は、積層セラミックコンデンサや積層LC複合部品などの積層セラミック電子部品、その製造に関する技術分野に広く利用することが可能である。
As described above, according to the present invention, the area of the internal electrode can be made substantially the same as the plane area of the product dimensions, and it becomes possible to efficiently manufacture a small and high-performance multilayer ceramic electronic component, For example, in the case of a multilayer ceramic capacitor, it is possible to realize a small size and large capacity.
Therefore, the present invention can be widely used in the technical fields related to multilayer ceramic electronic components such as multilayer ceramic capacitors and multilayer LC composite components and their manufacture.

この発明の実施例1にかかる積層セラミック電子部品(積層セラミックコンデンサ)の構成を示す斜視図である。It is a perspective view which shows the structure of the multilayer ceramic electronic component (multilayer ceramic capacitor) concerning Example 1 of this invention. この発明の実施例1にかかる積層セラミックコンデンサの、内部電極の引出部と外部電極との接続態様を示す図であって、(a)は一方のコーナ部で外部電極と導通する内部電極を示す図、(b)は他方のコーナ部で外部電極と導通する内部電極を示す図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the connection aspect of the drawer | drawing-out part of an internal electrode, and an external electrode of the multilayer ceramic capacitor concerning Example 1 of this invention, Comprising: (a) shows the internal electrode electrically connected with an external electrode in one corner part. FIG. 4B is a diagram showing the internal electrode that is electrically connected to the external electrode at the other corner. 図1〜3のA−A線断面図である。It is the sectional view on the AA line of FIGS. この発明の実施例1にかかる積層セラミックコンデンサの製造工程においてセラミックグリーンシートに、導体膜非形成領域を備えた導体膜を形成する方法を説明する図である。It is a figure explaining the method to form the conductor film provided with the conductor film non-formation area | region in the ceramic green sheet in the manufacturing process of the multilayer ceramic capacitor concerning Example 1 of this invention. (a),(b)は、この発明の実施例1にかかる積層セラミックコンデンサの製造工程においてセラミックグリーンシートを積層する方法を説明する図である。(a), (b) is a figure explaining the method to laminate | stack a ceramic green sheet in the manufacturing process of the multilayer ceramic capacitor concerning Example 1 of this invention. この発明の実施例1にかかる積層セラミックコンデンサの製造工程でマザー積層体を切断する方法を説明する図である。It is a figure explaining the method to cut | disconnect a mother laminated body at the manufacturing process of the multilayer ceramic capacitor concerning Example 1 of this invention. この発明の実施例2にかかる積層セラミックコンデンサの製造方法の一工程で、導体膜非形成領域にそれよりも径の小さいスルーホールを形成した状態を示す平面図である。It is a top view which shows the state which formed the through hole with a diameter smaller than it in the conductor film non-formation area | region in 1 process of the manufacturing method of the multilayer ceramic capacitor concerning Example 2 of this invention. この発明の実施例2にかかる積層セラミックコンデンサの製造方法の一工程で、導体膜非形成領域にそれよりも径の小さいスルーホールを形成した状態を模式的に示す正面断面図である。It is front sectional drawing which shows typically the state which formed the through hole with a diameter smaller than it in the conductor film non-formation area | region in 1 process of the manufacturing method of the multilayer ceramic capacitor concerning Example 2 of this invention. この発明の実施例2にかかる積層セラミックコンデンサの製造方法の一工程で形成した被覆セラミック積層体を示す断面図である。It is sectional drawing which shows the covering ceramic laminated body formed at 1 process of the manufacturing method of the laminated ceramic capacitor concerning Example 2 of this invention. この発明の実施例2にかかる積層セラミックコンデンサの製造方法により製造した積層セラミックコンデンサを示す断面図である。It is sectional drawing which shows the multilayer ceramic capacitor manufactured by the manufacturing method of the multilayer ceramic capacitor concerning Example 2 of this invention.

符号の説明Explanation of symbols

1 セラミック積層体
2(2a,2b) 内部電極(導体層)
3 セラミック層
4a,4b コーナ部
5a,5b 外部電極
6 被覆層
10 積層セラミックコンデンサ
11 オイルマスク
12(12a,12b) 内部電極(導体層)の引出部
13 導体膜非形成領域
14 マザー積層体
20 セラミックグリーンシート
23(23a,23b) スルーホール
L1,L2 切断線
1 Ceramic laminate 2 (2a, 2b) Internal electrode (conductor layer)
DESCRIPTION OF SYMBOLS 3 Ceramic layer 4a, 4b Corner part 5a, 5b External electrode 6 Coating layer 10 Multilayer ceramic capacitor 11 Oil mask 12 (12a, 12b) Lead part of internal electrode (conductor layer) 13 Conductor film non-formation area 14 Mother laminated body 20 Ceramic Green sheet 23 (23a, 23b) Through hole L1, L2 Cutting line

Claims (5)

セラミック積層体中に、複数の導体膜がセラミック層を介して積層され、かつ、セラミック層を介して対向する各導体膜が交互に、セラミック積層体の側面の一対の領域の異なる側に引き出され、前記一対の領域のそれぞれに配設された外部電極に電気的に接続された構造を有する電子部品の製造方法であって、
所定位置にスポット状に導体膜非形成領域を備えた導体膜を、薄膜形成法によりセラミックグリーンシートの一方主面に形成する工程と、
セラミックグリーンシートの一方主面に形成された前記導体膜非形成領域が一層おきに平面的に重なる位置にくるように前記セラミックグリーンシートを複数枚積層して、マザー積層体を形成する工程と、
前記マザー積層体を、平面方向から見て縦横方向に切断するに際し、縦方向の切断線と横方向の切断線が前記導体膜非形成領域において交わるように切断して、一対のコーナ部における一方のコーナ部には、前記導体膜が一層おきに引き出され、かつ、他方のコーナ部には、前記一方のコーナ部に引き出されていない方の導体膜が引き出された構造を有する個々のセラミック積層体に分割する工程と、
前記一対のコーナ部に引き出された前記導体膜の引出部と導通するように、前記セラミック積層体の前記一対のコーナ部に外部電極を形成する工程と
を具備することを特徴とする積層セラミック電子部品の製造方法。
In the ceramic laminate, a plurality of conductor films are laminated via a ceramic layer, and the respective conductor films facing each other via the ceramic layer are alternately drawn out to different sides of a pair of regions on the side surface of the ceramic laminate. A method of manufacturing an electronic component having a structure electrically connected to an external electrode disposed in each of the pair of regions,
Forming a conductive film having a conductive film non-formation region in a spot shape at a predetermined position on one main surface of the ceramic green sheet by a thin film forming method;
A step of forming a mother laminate by laminating a plurality of the ceramic green sheets so that the conductor film non-formation regions formed on one main surface of the ceramic green sheets are overlapped in a plane every other layer; and
When the mother laminate is cut in the vertical and horizontal directions when viewed from the plane direction, the mother laminated body is cut so that the vertical cutting lines and the horizontal cutting lines intersect in the conductor film non-forming region, Each of the ceramic laminates has a structure in which the conductor film is drawn every other layer at the corner portion, and the conductor film not drawn out at the one corner portion is drawn at the other corner portion. Dividing the body,
Forming an external electrode on the pair of corner portions of the ceramic laminate so as to be electrically connected to the conductor film lead portions drawn to the pair of corner portions. A manufacturing method for parts.
前記外部電極を形成した後に、前記外部電極は被覆されずに露出し、前記導体膜は被覆されて外部に露出しないような態様で、前記セラミック積層体を絶縁性の被覆層で被覆することを特徴とする請求項1記載の積層セラミック電子部品の製造方法。   After forming the external electrode, the external electrode is exposed without being covered, and the conductive film is covered and not exposed to the outside, and the ceramic laminate is covered with an insulating coating layer. The method for producing a multilayer ceramic electronic component according to claim 1, wherein: 前記外部電極を形成する前に、前記コーナ部に引き出された前記導体膜の引出部は露出し、かつ、前記コーナ部以外の領域からは前記導体膜が露出しないような態様で、前記セラミック積層体を絶縁性の被覆層により被覆した後、前記コーナ部に引き出された前記導体膜の引出部と導通するように前記外部電極を形成することを特徴とする請求項1記載の積層セラミック電子部品の製造方法。   Prior to forming the external electrode, the lead-out portion of the conductor film drawn to the corner portion is exposed, and the conductor film is not exposed from a region other than the corner portion. 2. The multilayer ceramic electronic component according to claim 1, wherein the external electrode is formed so as to be electrically connected to the lead portion of the conductor film drawn to the corner portion after the body is covered with an insulating coating layer. Manufacturing method. オイルマスク法により前記導体膜非形成領域を備えた前記導体膜を形成することを特徴とする請求項1〜3のいずれかに記載の積層セラミック電子部品の製造方法。   The method for producing a multilayer ceramic electronic component according to claim 1, wherein the conductor film having the conductor film non-formation region is formed by an oil mask method. 前記セラミック積層体の、前記外部電極が形成されるコーナ部以外の領域を絶縁性の被覆層で被覆するにあたって、前記コーナ部に露出した導体膜の引出部に撥水性を付与した後、前記引出部に弾かれる性質を有する被覆層材料の塗布、または、該被覆層材料への浸漬の方法により前記セラミック積層体を前記被覆層により被覆して、少なくとも前記引出部は露出し、前記導体膜の前記引出部以外は絶縁性の被覆層で被覆されたセラミック積層体を形成することを特徴とする請求項1〜4のいずれかに記載の積層セラミック電子部品の製造方法。   In covering the region other than the corner portion where the external electrode is formed of the ceramic laminate with an insulating coating layer, the lead portion of the conductor film exposed to the corner portion is given water repellency, and then the lead The ceramic laminate is coated with the coating layer by a method of applying a coating layer material having a property of being repelled by the coating portion or dipping in the coating layer material, and at least the lead portion is exposed, and the conductor film The method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, wherein a ceramic multilayer body covered with an insulating coating layer is formed except for the lead portion.
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