JP2008244965A - Detection apparatus, driving method thereof, and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce noise in a unit circuit comprising various detection elements such as a photo-diode. <P>SOLUTION: Each horizontal scan period includes a reset term Trest, an initialization term Tini, and a detection term Tdet. During the reset term Trest, a second power supply potential turning off an amplification transistor is supplied to a power line, and a selection potential turning on a reset transistor is supplied to all a plurality of scanning lines. Thus, a gate of the amplification transistor can be reset in every horizontal scan period, and noise can be prevented from being output to a detection line by increasing a gate potential of the amplification transistor by a leak current of the reset transistor. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a technique for driving a unit circuit including various detection elements such as photodiodes.

There is a solid-state imaging device that captures an image using a photodiode that outputs a current corresponding to the amount of incident light. In a solid-state imaging device, a photodiode and a MOSFET are generally formed on a semiconductor substrate.
A circuit shown in FIG. 21 is known as a pixel circuit used in a solid-state imaging device (Non-Patent Document 1). In this pixel circuit, during a period for detecting the amount of incident light, the transfer transistor Tr3 is turned on, and a current generated in the photodiode PD is supplied to the amplification transistor Tr1. The amplification transistor Tr1 outputs a detection current via the detection line SEN. On the other hand, in a period in which the amount of incident light is not detected, the transfer transistor Tr3 is turned off, while the reset transistor Tr2 is turned on to supply the potential of the reset line RSD to the amplification transistor Tr1. Here, the potential of the reset line RSD is set to the low potential VSS so that the amplification transistor Tr1 can be turned off. In this case, for the row to be detected, the gate potential of the amplification transistor Tr1 is initialized, the detection current is supplied from the amplification transistor Tr1 to the detection line SEN, and then the detection current is prevented from flowing from the amplification transistor Tr1. The potential was set to the reset potential. That is, after a reset potential is supplied to the gate of an amplification transistor, the reset potential is supplied next after one frame period has elapsed.
The Journal of the Institute of Image Information and Television Engineers Vol.60, No.3 p295〜298

By the way, it is abbreviated as a thin film transistor (hereinafter referred to as TFT) formed on a glass substrate. ) Has a large off-state current. FIG. 22 shows the characteristics of an n-channel TFT. As shown in this figure, when the gate-source voltage Vgs becomes negative, the drain current Ids tends to increase. The off-state current increases as the gate potential is lower than the source potential, and increases as the drain-source voltage increases.
In the conventional pixel circuit described above, the gate potential of the amplification transistor Tr1 of the pixel circuit that is not in the order of exposure needs to be set to the low potential VSS. However, before detection, the potential of the reset line RSD needs to be set to an initialization potential (for example, VDD) for initialization. For this reason, every time the potential of the reset line RSD becomes the reset potential, the leak current of the reset transistor Tr2 flows into the gate of the amplification transistor Tr1. As a result, the gate potential of the amplification transistor Tr1 of the pixel that is not in the reading order gradually rises, leak current flows into the detection line SEN, and a normal signal cannot be extracted.
The present invention has been made in view of such circumstances, and an object of the present invention is to solve the problem of suppressing noise caused by off-state current even when a thin film transistor is used.

  In order to solve this problem, a detection apparatus driving method according to the present invention includes a plurality of scanning lines, a plurality of detection lines, and a plurality of scanning lines provided corresponding to intersections of the scanning lines and the detection lines. A unit circuit (for example, 40 in FIG. 2), and each of the plurality of unit circuits includes a first transistor (for example, 45 in FIG. 2) that supplies a detection signal corresponding to a gate potential to the detection line; A detection element (for example, 47 in FIG. 2) connected to the gate of the first transistor and changing the gate potential of the first transistor according to an external factor, and between the gate of the first transistor and the power supply line And a second transistor having a gate connected to the scanning line (for example, 41 in FIG. 2), and a frame comprising a plurality of horizontal scanning periods, Multiple horizontal scanning periods Each includes a reset period, an initialization period, and a detection period. In the reset period, a selection is made to supply a second potential to turn off the first transistor to the power supply line and turn on the second transistor. A potential is supplied to all of the plurality of scanning lines, and a first potential for turning on the first transistor is supplied to the power supply line in the initialization period, and the selection is performed in each of the plurality of horizontal scanning periods. A potential is sequentially supplied to the plurality of scanning lines, and in the detection period, a non-selection potential that turns off the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines. Features.

  According to the present invention, the selection potential is supplied to all the scanning lines in the reset period. At this time, the second potential is supplied to the power supply line. For this reason, in the reset period for each horizontal scanning period, the gate potential of the amplification transistor is set to the second potential in all the unit circuits. As a result, even if a leakage current occurs in the second transistor, the gate potential of the first transistor can be reset to be turned off every horizontal scanning period, so that the leakage current of the second transistor is greatly reduced. be able to. As a result, the SN ratio of the detection signal can be greatly improved.

  Further, the detection apparatus driving method according to the present invention includes a plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to intersections of the scanning lines and the detection lines, Each of the plurality of unit circuits is connected to a first transistor that supplies a detection signal corresponding to a gate potential to the detection line, and a gate of the first transistor, and the gate of the first transistor according to an external factor. A method of driving a detection device comprising: a detection element that changes a potential; and a second transistor that is provided between a gate of the first transistor and a power supply line, and the gate is connected to the scanning line, One frame includes a plurality of horizontal scanning periods, and the plurality of horizontal scanning periods includes an initialization period, a detection period, and a reset period. In the initialization period, the first transistor is turned on. A potential is supplied to the power supply line, and a selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines, and the plurality of horizontal scanning is performed in the detection period. In each of the periods, a non-selection potential that turns off the second transistor is sequentially supplied to the plurality of scanning lines, and in the reset period, the second potential is supplied to the power supply line, and the plurality of horizontal scanning periods When the selection potential is supplied to the scanning line to which the selection potential has been supplied in the initialization period and each of the plurality of scanning lines is divided into a plurality of blocks, the selection potential is changed in the initialization period. The selection potential is supplied to all the scanning lines belonging to the block next to the block to which the supplied scanning line belongs.

  According to the present invention, reset in units of scanning lines and reset in units of blocks are performed simultaneously. Here, the reset in units of blocks is executed by supplying the selection potential to all the scanning lines belonging to the block next to the block to which the scanning line to which the selection potential is supplied in the initialization period belongs. Therefore, since the number of unit circuits to be reset can be reduced, power consumption can be reduced. In particular, in the next block, since time has elapsed since the reset in units of scanning lines has been executed, the gate potential of the first transistor is likely to be turned on by the leakage current of the second transistor. Since the reset is executed for such a block, the power consumption can be reduced while improving the SN ratio of the detection signal.

  Further, the detection apparatus driving method according to the present invention includes a plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to intersections of the scanning lines and the detection lines, Each of the plurality of unit circuits is connected to a first transistor that supplies a detection signal corresponding to a gate potential to the detection line, and a gate of the first transistor, and the gate of the first transistor according to an external factor. A method of driving a detection device comprising: a detection element that changes a potential; and a second transistor that is provided between a gate of the first transistor and a power supply line, and the gate is connected to the scanning line, One frame includes a plurality of horizontal scanning periods, and the plurality of horizontal scanning periods includes an initialization period, a detection period, and a reset period. In the initialization period, the first transistor is turned on. A potential is supplied to the power supply line, and a selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines, and the plurality of horizontal scanning is performed in the detection period. In each of the periods, a non-selection potential that turns off the second transistor is sequentially supplied to the plurality of scan lines, and in the reset period, the second potential is supplied to the power supply line, and a horizontal including the reset period is included. The selection potential is applied to the scanning line supplied with the selection potential in the initialization period of the scanning period and a predetermined number of scanning lines including the scanning line supplied with the selection potential in the next initialization period. The predetermined number of scanning lines are shifted every horizontal scanning period.

  According to the present invention, the block to be reset can be sequentially shifted in accordance with the selection of the scanning line corresponding to the unit circuit to be detected. Improvement in the S / N ratio of the detection signal and reduction in power consumption are in a trade-off relationship. In order to reduce power consumption, it is necessary to reduce the number of unit circuits to be reset. For this reason, it is efficient to selectively reset the unit circuit that has passed the longest time since resetting that is likely to output noise to the detection line. Such a unit circuit is a unit circuit of a row selected next to a row to be detected. According to the present invention, since the unit circuits of a predetermined number of scanning lines including the next selected scanning line are reset, it is possible to further improve the SN ratio of the detection signal while reducing power consumption. it can.

  Here, it is preferable that the first transistor is provided between the power supply line and the detection line and supplies the first potential to the power supply line in the detection period. In this case, since the power supply to the first transistor can be used also as the power supply line for supplying the reset potential and the initialization potential, no special power supply line is required. As a result, the aperture ratio can be improved.

  Preferably, the first transistor is provided between a node that supplies a predetermined potential and the detection line, and supplies the second potential to the power supply line during the detection period. In this case, since the potential of the power supply line can be set to the second potential in the detection period, the leakage current of the second transistor can be reduced, and the SN ratio of the detection signal can be further improved.

  Next, a detection device according to the present invention includes a plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to intersections of the scanning lines and the detection lines, and the potential of the gate. A first transistor that supplies a detection signal corresponding to the detection line to the detection line; a detection element that is connected to a gate of the first transistor and changes a gate potential of the first transistor according to an external factor; A second transistor provided between the gate of the transistor and a power supply line, the gate of which is connected to the scanning line, and one frame includes a plurality of horizontal scanning periods, and each of the plurality of horizontal scanning periods is reset The plurality of unit circuits are divided into the reset period, the initialization period, and the detection period, and includes a period, an initialization period, and a detection period. And supplying a second potential for turning off the first transistor to the power supply line, and supplying a first potential for turning on the first transistor to the power supply line during the initialization period. In the reset period, a selection potential for turning on the second transistor is supplied to all of the plurality of scanning lines, and in the initialization period, the selection potential is set in each of the plurality of horizontal scanning periods. Scanning line driving means for sequentially supplying a plurality of scanning lines to each of the plurality of scanning lines and sequentially supplying a non-selection potential for turning off the second transistor in each of the plurality of horizontal scanning periods in the detection period; It is characterized by providing.

  According to the present invention, since the selection potential is supplied to all the scanning lines in the reset period, all the unit circuits can be reset every horizontal scanning period. As a result, even if a leakage current occurs in the second transistor, the gate potential of the first transistor can be reset to be turned off every horizontal scanning period, so that the leakage current of the second transistor is greatly reduced. be able to. As a result, the SN ratio of the detection signal can be greatly improved.

  Next, a detection device according to the present invention includes a plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to intersections of the scanning lines and the detection lines, and the potential of the gate. A first transistor that supplies a detection signal corresponding to the detection line to the detection line; a detection element that is connected to a gate of the first transistor and changes a gate potential of the first transistor according to an external factor; A second transistor provided between a gate of the transistor and a power supply line, the gate of which is connected to the scanning line, and one frame includes a plurality of horizontal scanning periods, and each of the plurality of horizontal scanning periods is an initial period The plurality of unit circuits are divided into the initialization period, the detection period, and the reset period, and includes a reset period, a detection period, and a reset period. Power supply means for supplying a second potential for turning off the first transistor to the power supply line, and supplying a first potential for turning on the first transistor to the power supply line during the initialization period; In the initialization period, a selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines. In the detection period, each of the plurality of horizontal scanning periods is supplied. The non-selection potential for turning off the second transistor is sequentially supplied to the plurality of scanning lines, and the selection potential is supplied in the initialization period in each of the plurality of horizontal scanning periods in the reset period. The selection potential is supplied to the scanning line, and the selection potential is supplied in the initialization period when the plurality of scanning lines are divided into a plurality of blocks. Wherein the serial scan line and a scan line drive means for supplying the selection electric potential to all the scanning lines belonging to the next block of the block belongs.

  According to the present invention, reset in units of scanning lines and reset in units of blocks are performed simultaneously, so that the number of unit circuits to be reset can be reduced and power consumption can be reduced. In particular, in the next block, since time has elapsed since the reset in units of scanning lines has been executed, the gate potential of the first transistor is likely to be turned on by the leakage current of the second transistor. Since the reset is executed for such a block, the power consumption can be reduced while improving the SN ratio of the detection signal.

  Next, a detection device according to the present invention includes a plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to intersections of the scanning lines and the detection lines, and the potential of the gate. A first transistor that supplies a detection signal corresponding to the detection line to the detection line; a detection element that is connected to a gate of the first transistor and changes a gate potential of the first transistor according to an external factor; A second transistor provided between a gate of the transistor and a power supply line, the gate of which is connected to the scanning line, and one frame includes a plurality of horizontal scanning periods, and each of the plurality of horizontal scanning periods is an initial period The plurality of unit circuits are divided into the initialization period, the detection period, and the reset period, and includes a reset period, a detection period, and a reset period. Power supply means for supplying a second potential for turning off the first transistor to the power supply line, and supplying a first potential for turning on the first transistor to the power supply line during the initialization period; In the initialization period, a selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines. In the detection period, each of the plurality of horizontal scanning periods is supplied. The non-selection potential for turning off the second transistor is sequentially supplied to the plurality of scanning lines, and in the reset period, the selection potential is supplied in the initialization period of a horizontal scanning period including the reset period. Supplying the selection potential to a scanning line and a predetermined number of scanning lines including the scanning line to which the selection potential is supplied at least in the next initialization period; Characterized by comprising a scanning line drive means for shifting said predetermined number of scan lines per scan period.

  According to the present invention, since the block to be reset can be sequentially shifted in accordance with the selection of the scanning line corresponding to the unit circuit to be detected, the reset is highly likely to output noise to the detection line. Then, the unit circuit whose time has elapsed most has been selectively reset. As a result, the SN ratio of the detection signal can be further improved while reducing the power consumption.

  In the above-described detection device, it is preferable that the first transistor is provided between the power supply line and the detection line, and the power supply means supplies the first potential to the power supply line during the detection period. . Alternatively, the first transistor is provided between a node for supplying a predetermined potential and the detection line, and the power supply means supplies the second potential to the power supply line in the detection period. preferable.

In the detection device described above, it is preferable that the first transistor and the second transistor are thin film transistors. Although the thin film transistor has a characteristic of a large leakage current, this detection device can reduce the leakage current and improve the SN ratio of the detection signal. Furthermore, the detection element is preferably a photoelectric conversion element that converts light energy into electrical energy. In this case, an image can be read. A typical example of the photoelectric conversion element is a photodiode.
Next, an electronic apparatus according to the present invention includes the above-described detection device. Examples of such an electronic device include an imaging device such as a scanner, a video camera, and an electronic still camera, a touch panel, a temperature measuring device, and the like.

<1. First Embodiment>
FIG. 1 shows the configuration of the detection apparatus according to the first embodiment of the present invention. The detection device 1 is applied to an image reading device such as a scanner or an imaging device. As shown in the figure, the detection apparatus 1 includes a pixel region A, a Y driver 100, a first X driver 200A, a second X driver 200B, and a control circuit 300. Among these, in the pixel region A, m scanning lines 10 extending in the X direction, m first power supply lines 11 extending in the X direction in pairs with each scanning line 10, and in the X direction N power supply lines 12 extending in the orthogonal Y direction and n detection lines 14 extending in the Y direction in pairs with the second power supply lines 14 are formed. A pixel circuit 40 (unit circuit) is disposed at a position corresponding to each intersection of the scanning line 10 and the power supply line 12. Therefore, these pixel circuits 40 are arranged in a matrix of m rows × n columns.

  The Y driver 100 selects the pixel circuits 40 arranged in the pixel region A in units of rows for each horizontal scanning period, and outputs the scanning signals Y1 to Ym to each scanning line 10. The first X driver 200A samples and holds the detection signals X1 to Xn supplied from the n detection lines 14, and generates an image signal VID based on the result of the sample and hold. The second X driver 200 </ b> B supplies the power supply voltage RSL to the power supply line 12. The power supply voltage RSL is one of the first power supply potential VDD and the second power supply potential VSS. Further, the first X driver 200A precharges each detection line 14 to the second power supply potential VSS at a predetermined timing. As will be described later, when the potential of the first power supply line 11 is the first power supply potential VDD, detection signals X1 to Xn having a magnitude corresponding to the amount of incident light are output from each pixel circuit 40. Note that signals output from the m pixel circuits 40 arranged in the column direction are time-division multiplexed on each of the detection signals X1 to Xn. The control circuit 300 supplies various control signals such as a clock signal to the Y driver 100, the first X driver 200A, and the second X driver 200B.

  FIG. 2 shows the configuration of the pixel circuit 40. The pixel circuit 40 is arranged in the i (i is an integer of 1 ≦ i ≦ m) row j (j is an integer of 1 ≦ j ≦ n) column, but the other pixel circuits 40 are similarly configured. ing. The pixel circuit 40 includes a photodiode 47. The photodiode 47 outputs a current having a magnitude corresponding to the amount of incident light, and functions as a photoelectric conversion element that converts light energy into electrical energy. The anode (first terminal) of the photodiode 47 is connected to a fixed potential, and the cathode is connected to the gate of the amplification transistor 45. In addition, a capacitive element 43 is provided between the gate of the amplification transistor 45 and the first power supply line 11. The electric charge output from the photodiode 47 is accumulated in the capacitive element 43. A reset transistor 41 is provided between the gate of the amplification transistor 45 and the power supply line 12. The reset transistor 41 functions as a switching element, and is turned on when the scanning signal Yi becomes a selection potential, and turned off when the scanning signal Yi becomes a non-selection potential. When the reset transistor 41 is on, the potential of the power supply line 12 is supplied to the gate of the amplification transistor 45. Further, the drain of the amplification transistor 45 is electrically connected to the power supply line 12, while its source is electrically connected to the detection line 14. Note that the relationship between the drain and the source in the amplification transistor 45 is defined as the drain having the higher potential and the source having the lower potential, so the drain and the source may be reversed depending on the bias.

  FIG. 3 shows a block diagram of the Y driver 100. The shift register 110 sequentially shifts the start pulse SP according to the Y clock signal YCK to generate each shift signal. Each shift signal becomes active sequentially in the initialization period Tini (see FIG. 6) of one horizontal scanning period. A shift signal is supplied to one input terminal of the NOR circuit 120, and a reset signal RS is supplied to the other input terminal. The reset signal RS is sequentially activated in the reset period Trest (see FIG. 6) of the horizontal scanning period. The output signal of the NOR circuit 120 is supplied to each scanning line 10 as scanning signals Y1 to Ym via the buffer circuit 130.

  FIG. 4 shows a block diagram of the first X driver 200A. The first X driver 200A includes processing units Ua1 to Uan respectively corresponding to the n detection lines 14. Here, the processing unit Ua1 will be described, but the other processing units are configured similarly. The transfer gate 20, the capacitive element 21, and the capacitive element 22 function as a sample and hold circuit. The transfer gate 20 is turned on when the sampling signal SHG is at a high level, and is turned off when the sampling signal SHG is at a low level. As a result, the detection signal X1 is captured and held. The inverter 23 functions as an amplifier circuit. The transfer gate 24 is used to bias the input of the inverter 23 to an intermediate potential. That is, when the control signal AMG goes high, the input and output of the inverter 23 are short-circuited, and the input potential is biased to the intermediate potential. The output terminal of the inverter 23 is connected to the wiring L through the switching transistor 25. The output signal of the shift register 26 is supplied to the gate of the switching transistor 25. The shift register 26 sequentially transfers the transfer start pulse DX according to the X clock signal XCK to generate an output signal. Each processing unit Ua1 to Uan exclusively supplies the detection signal to the wiring L by this output signal, and the detection signal is synthesized by the wiring L and output as an image signal VID via the buffer B. The sampling signal SHG, the control signal AMG, the transfer start pulse DX, and the X clock signal XCK are supplied from the control circuit 300.

  FIG. 5 is a block diagram showing a configuration of the second X driver 200B. The second X driver 200B includes processing units Ub1 to Ubn corresponding to n columns. Here, the processing unit Ub1 will be described, but the other processing units are similarly configured. The transistors 27 and 28 are turned on / off by control signals SG1 and SG2. Here, the control signal SG2 is obtained by inverting the control signal SG1. Accordingly, the transistor 27 and the transistor 28 are exclusively turned on to supply the first power supply potential VDD or the second power supply potential VSS to the power supply line 12. Further, the transistor 29 is turned on when the control signal RG becomes high level, and supplies the second power supply potential VSS to the detection line 14. Thereby, the detection line 14 can be precharged.

  Next, the operation of the detection device 1 will be described. FIG. 6 is a timing chart showing signal waveforms at various parts of the detection apparatus 1. The scanning signals Y1 to Ym sequentially become high level during a part of each horizontal scanning period. As shown in this figure, the i-th horizontal scanning period includes a reset period Trest, an initialization period Tini, a detection period Tdet, and a readout period Tread.

  First, in the reset period Trest, the gate potential of the amplification transistor 45 is set to the second power supply potential VSS. As shown in FIG. 6, during this period, the scanning signal Yi is at a high level, so that the reset transistor 41 is turned on. At this time, since the control signal SG1 becomes low level and the control signal SG2 becomes high level, the transistor 28 is turned on, and the second power supply potential VSS becomes the power supply voltage RSL and the amplification transistor via the power supply line 12. 45 gates are supplied. Further, since the control signal RG becomes high level, the transistor 29 is turned on and the second power supply potential VSS is precharged to the detection line 14. When m = n = 3, the gate potential of the amplification transistor 45 is set to the second power supply potential VSS in all the pixel circuits 40 as shown in FIG.

  Next, in the initialization period Tini, the control signal SG1 becomes high level, the transistor 27 is turned on, and the first power supply potential VDD is supplied as the power supply voltage RSL to the gate of the amplification transistor 45 via the power supply line 12 and the reset transistor 41. Is done. As shown in FIG. 8, in the initialization period Tini, the first power supply potential VDD is supplied only to the row where the scanning signals Y1 to Ym are at the high level. In the example shown in FIG. In the pixel circuits 40 in other rows, the second power supply potential VSS written in the reset period Trest is held by the capacitor element 43. In the initialization period Tini, since the sampling signal SHG and the control signal AMG are at a high level, the transfer gates 20 and 24 are turned on. At this time, since the second power supply potential VSS is supplied to the detection line 14, the potential of one terminal of the capacitor 21 becomes the second power supply potential VSS, and the potential of the other terminal is set to an intermediate potential. Thereby, the potential of the capacitive element 21 is initialized.

Next, in the detection period Tdet, as shown in FIG. 6, the control signal SG1 becomes high level, the transistor 27 is turned on, and the first power supply potential VDD is supplied to the power supply line 12 as the power supply voltage RSL. Further, since the control signal RG is at a low level, the transistor 29 is turned off, and the second power supply potential VSS is not supplied to the detection line 14. As shown in FIG. 10, in the detection period Tdet, the detection signals X1 to X3 are output from the pixel circuits 40 in the selected row (in this example, the second row). Further, in the detection period Tdet, since the control signal SG1 is at a high level as in the initialization period Tini, the transistor 27 is turned on and the first power supply potential VDD is supplied to the power supply line 12. However, in the detection period Tdet, since the scanning signal Yi is at a low level, the reset transistor 41 is turned off.
FIG. 9 shows the bias of the pixel circuit 40 in the second row and second column selected. As shown in this figure, the gate potential Vg of the amplification transistor 45 becomes Vg = VDD−Vpd when the voltage of the photodiode 47 is Vpd. The voltage Vpd changes according to the amount of light incident on the photodiode 47. Then, a current determined according to the gate potential is output to the detection line 14 as the detection signal X2.

  If the potential of the detection line 14 is Vsense, the potential Vsense changes as shown in FIG. Here, the characteristic Q1 indicates a case where the amount of incident light is small and dark, and the characteristic Q2 indicates a case where the amount of incident light is large and bright. That is, in the dark, since the voltage Vpd of the photodiode 47 is small, the gate potential Vg is high. For this reason, a large current flows out from the source of the amplification transistor 45, and the potential Vsense of the detection line 14 rises rapidly. On the other hand, when the light is bright, the voltage Vpd of the photodiode 47 is large, so the gate potential Vg is high. For this reason, since the current flowing out from the source of the amplification transistor 45 is small, the potential Vsense of the detection line 14 rises gently. When Vsense = Vg−Vth, the amplification transistor 45 is turned off. As described above, since the amount of electric charge flowing out to the detection line 14 differs according to the amount of incident light, this is detected as a voltage in the processing unit Ua2.

  As described above, in this embodiment, since the scanning signals Y1 to Yi are set to the selection potential in the reset period Trest of all the horizontal scanning periods, the gate potential of the amplification transistor 45 is set to the first power supply potential VDD every horizontal scanning period. can do. That is, even if the power supply voltage RSL transitions to the second power supply potential VSS in the initialization period Tini and a leak current flows into the gate of the amplification transistor 45, the gate potential is reset in the cycle of the horizontal scanning period. Therefore, since the amplification transistor 45 that is not selected does not approach the ON state due to the rise in the gate potential, it is possible to reliably reduce the leakage current from the pixel circuit 40 that does not output the detection signal, and the SN ratio of the detection signal. Can be improved.

Next, the reading period Tread will be described. As shown in FIG. 6, in the readout period Tread, the sampling signal SHG and the control signal AMG are at a low level, so that the transfer gates 20 and 24 are turned off as shown in FIG. Since charges according to incident light flow into the capacitive elements 21 and 22 in the detection period Tdet, the input potential of the inverter 23 rises according to the amount of charge flowing in. In the read period Tread, the inverter 23 can amplify the change in charge and take it out as a voltage.
In the read period Tread, the control signal SG2 is at the high level as in the reset period Trest, so that the transistor 28 is turned on and the second power supply potential VSS is supplied to the power supply line 12. However, in the detection period Tdet, since the scanning signal Yi is at a low level, the reset transistor 41 is turned off. For this reason, the potential of the power supply line 12 is not questioned and may be the first power supply potential VDD or the second power supply potential VSS.

In the above-described embodiment, the charge flowing out to the detection line 14 is integrated by the capacitive elements 21 and 22, and the light quantity is read based on the result. However, the light quantity may be read by the difference in the on-resistance of the amplification transistor 45. Good.
Further, as shown in FIG. 13, the power supply line 12 and the wiring for supplying power to the amplification transistor 45 may be separated. In this case, since the power supply voltage RSL can be set to the second power supply potential VSS in the detection period Tdet as shown in FIG. 14, the leakage current of the reset transistor 41 can be reduced. As a result, since the increase in the gate potential of the amplification transistor 45 is reduced, it is possible to prevent leakage current from flowing out from the unselected pixel circuit 40 to the detection line 14.

<2. Second Embodiment>
In the first embodiment described above, the selection potential is supplied to all the scanning lines 10 every horizontal scanning period, the first power supply potential VDD supplied via the power supply line 12 is supplied to the gate of the amplification transistor 45, and The rise in gate potential due to leakage current was suppressed. On the other hand, the detection device 1 of the second embodiment sequentially selects the scanning lines 10, outputs the detection signal in the selected pixel circuit 40, and then supplies the first power supply potential VDD to the gate of the amplification transistor 45. The detection area is divided into a plurality of blocks along the scanning line 10, and the reset is executed in units of divided blocks. In this example, blocks B1 to B4 in which the detection area is divided into four are assumed (see FIG. 17).

  The detection device 1 of the present embodiment is configured in the same manner as the detection device 1 of the first embodiment shown in FIG. 1 except that a Y driver 100A is used instead of the Y driver 100. FIG. 15 shows the configuration of the Y driver 100A. As shown in this figure, the Y driver 100A includes a shift register 110 that sequentially shifts the start pulse SP in accordance with the Y clock signal YCK to generate each shift signal, and drive units Ua to Ud. Each drive unit Ua-Ud respond | corresponds to block B1-B4. In the first embodiment, all the pixel circuits 40 are reset every horizontal scanning period by supplying a reset signal RS defining the reset period Trest to all the NOR circuits 120.

  On the other hand, in the second embodiment, four reset signals RSa to RSd are used. These reset signals RSa to RSd become active in the first to fourth periods T1 to T4 obtained by dividing one frame into four as shown in FIG. The reset in units of blocks will be described with reference to FIG. A block-by-block reset is the block following the block on which the row to be detected is stepped. That is, when the row to be detected is included in the block B1, the block to be reset is the block B2, and when the row to be detected is included in the block B2, the block to be reset is the block B3, and the row to be detected is included in the block B3. If the block to be reset is included in block B4, the block to be reset is block B1.

  For example, as shown in FIG. 17A, when a row to be detected is included in the block B2, the block B3 is a reset block. Then, as shown in FIG. 17B, even if the row to be detected is shifted, if the row belongs to the previous block B2, the reset block does not change. Thereafter, when the row to be detected is included in the block B3, the block to be reset shifts from the block B3 to the block B4.

  FIG. 18 shows the relationship between the power supply voltage RSL and the scanning signals Yi and Yi + 1. As shown in this figure, in the reset period Trest, the selection potential is supplied to the scanning line 10 to which the selection potential has been supplied in the initialization period Tini. At this time, the selection potential is supplied to all the scanning lines 10 belonging to the block (for example, B3) next to the block (for example, B2) to which the scanning line 10 to which the selection potential is supplied in the initialization period Tini. Therefore, when the scanning signal belonging to the next block in the row to be detected is Yj, the scanning signal Yj is as shown in FIG.

When resetting in units of blocks is executed in this way, power consumption can be reduced compared to the first embodiment in which resetting is performed on all the pixel circuits 40 every horizontal scanning period. In addition, since the leak current flowing into the detection line 14 increases due to the rise in the gate potential of the amplification transistor 45, the leak current increases as the pixel circuit 40 has a longer elapsed time since the reset. In the present embodiment, the reset is executed on the block next to the block to be detected because the most time has elapsed since the next block was reset. There is a trade-off between improving the signal-to-noise ratio of the detection signal and reducing the power consumption. By setting the next block as the reset target as in this embodiment, the power-saving ratio is reduced and the signal-to-noise ratio is improved. Can be made.
Note that two blocks may be reset at the same time as shown in FIG. 19A, or all blocks other than the block to which the row to be detected belongs as shown in FIG. It is good.

<3. Third Embodiment>
In the second embodiment described above, the Y driver 100A is used to simultaneously execute reset in units of scanning lines and reset in units of blocks. In this case, the block to be reset is fixed. On the other hand, the detection apparatus 1 according to the third embodiment is different in that the blocks to be reset are sequentially shifted in accordance with the selected scanning line 10.

  FIG. 20 shows a block diagram of a Y driver 100B used in the third embodiment, and FIG. 21 shows a timing chart thereof. The start pulse SP in this example has a width corresponding to the block range, and in this example, it is 5 horizontal scanning periods. That is, the block size is in the range of five scanning lines 10. The shift register 110 sequentially shifts the start pulse SP according to the X clock signal XCK to generate shift signals S2 and S3. The shift signal S2 has a high level period shifted by one horizontal scanning period 1H with respect to the start pulse SP, and the shift signal S3 has a high level period shifted by one horizontal scanning period with respect to the shift signal S2. It is.

  The NOR circuit 112 is supplied with a start pulse SP (previous stage shift signal) and a signal obtained by inverting the stage shift signal S2 by the inverter 111. For this reason, the output signal S6 of the NOR circuit 112 becomes high level in the last one horizontal scanning period when the shift signal S2 becomes high level. The NAND circuit 113 calculates an inverted logical product of the initialization signal INIT and the signal S6 which become high in the initialization period Tini of each horizontal scanning period, and generates an output signal S7. The output signal S7 is a signal that specifies the initialization period Tini in the last horizontal scanning period of the selection period Ts.

  Next, the NOR circuit 114 calculates the inverted OR of the start pulse SP and the shift signal S2, and generates an output signal S4. The NOR circuit 115 calculates the inverted OR of the output signal S4 and the inverted reset signal / RS to generate the output signal S5. The inversion reset signal / RS becomes low level in the reset period Trest of each horizontal scanning period. The output signal S5 is a signal that specifies a reset period Trest included in the period Ta. The NAND circuit 117 calculates the inverted logical product of the signal obtained by inverting the output signal S5 by the inverter 116 and the output signal S7, and generates the scanning signal Y1. The scanning signal Y1 becomes active in the reset period Trest over 6 horizontal scanning periods, and becomes active in the initialization period Tini of the last horizontal scanning period. On the other hand, the scanning signal Y2 is obtained by shifting the scanning signal Y1 by one horizontal scanning period.

  Here, paying attention to the first scanning line 10 to which the scanning signal Y1 is supplied, in the horizontal scanning period Tx in which the selection potential is supplied in the initialization period Tini, the selection potential is applied to the scanning line 10 in the reset period Trest. Is supplied, and the pixel circuits 40 in the first row are reset. Further, in the reset period Trest of the horizontal scanning period Tx, since the scanning signals Y2 to Y6 become the selection potential, the pixel circuits 40 in the second to sixth rows are also reset at the same time. That is, the selection potential is supplied to a predetermined number of scanning lines 10 including the scanning line 10 (second row) to which the selection potential is supplied at least in the next initialization period Tini. Thereby, the block to be reset can be sequentially shifted in accordance with the selection of the scanning line 10 corresponding to the pixel circuit 40 to be detected.

  As described above, improvement in the S / N ratio of the detection signal and reduction in power consumption are in a trade-off relationship. In order to reduce power consumption, it is necessary to reduce the number of pixel circuits 40 to be reset. For this reason, it is efficient to selectively reset the pixel circuit 40 that has passed the longest time since the reset that is likely to output noise to the detection line 14. Such a pixel circuit 40 is a pixel circuit 40 in a row selected next to a row to be detected. In the present embodiment, since the pixel circuits 40 in a predetermined number of rows including the next selected row are reset, the SN ratio of the detection signal can be further improved while reducing power consumption.

<4. Modification>
In each of the above-described embodiments, the detection device 1 is configured using the photodiode 47 as a detection element. However, the present invention is not limited to this, and depends on external factors (light, temperature, pressure change). As long as the gate potential of the amplification transistor 45 can be changed, any detection element may be used. For example, if a PIN diode is used as a thermal sensor, a detection device that detects temperature can be configured. Further, if a piezoelectric element is used instead of the photodiode, a detection device for detecting pressure can be configured.
Furthermore, the photodiodes 45 as detection elements may be arranged in a line. Moreover, you may use the detection apparatus 1 as a touch panel (a liquid crystal, OLED, inorganic LED, EPD).
In addition, the pixel circuit shown in FIG. 13 may be employed in the second and third embodiments described above. In this case, in the detection period Tdet shown in FIGS. 18 and 21, the second X driver 200B may supply the second power supply potential VSS to the power supply line 12 as the power supply voltage RSL.

It is a block diagram which shows the structure of the detection apparatus which concerns on embodiment of this invention. It is a circuit diagram which shows the structure of a pixel circuit. It is a block diagram which shows the structure of Y driver. It is a block diagram which shows the structure of a 1st X driver. It is a block diagram which shows the structure of a 2nd X driver. It is a timing chart which shows the signal waveform of each part of a detecting device. It is explanatory drawing which shows the flow of the signal in a reset period. It is explanatory drawing which shows the flow of the signal in an initialization period. It is explanatory drawing which shows the flow of the signal in a detection period. It is explanatory drawing which shows the bias of a pixel circuit. It is a graph which shows the time change of the electric potential of a detection line. It is explanatory drawing which shows the flow of the signal in a reading period. It is a circuit diagram which shows the example of another pixel circuit. 6 is a timing chart showing the operation of another pixel circuit. It is a block diagram which shows the structure of Y driver 100A which concerns on 2nd Embodiment. It is a timing chart of a reset signal. It is explanatory drawing for demonstrating the relationship between the scanning line used as the detection object, and the block used as the reset object. It is a timing chart which shows the signal waveform of each part of a detecting device. It is explanatory drawing for demonstrating the relationship between the scanning line used as the detection object which concerns on a modification, and the block used as reset object. It is a block diagram which shows the structure of Y driver 100B which concerns on 3rd Embodiment. It is a timing chart which shows the signal waveform of each part of a detecting device. It is a circuit diagram which shows the structure of the conventional pixel circuit. It is explanatory drawing which shows the characteristic of a thin-film transistor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Detection apparatus, 12 ... Power supply line, 14 ... Detection line, 40 ... Pixel circuit, 41 ... Reset transistor (2nd transistor), 43 ... Capacitance element, 45 ... Amplification transistor (1st transistor) ), 100, 100A, 100B ... Y driver, 200A ... first X driver, 200B ... second X driver, Trest ... reset period, Tini ... initialization period, Tdet ... detection period, Tread ... read period .

Claims (13)

A plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to the intersections of the scanning lines and the detection lines, each of the plurality of unit circuits corresponding to a gate potential A first transistor that supplies the detected signal to the detection line; a detection element that is connected to a gate of the first transistor and changes a gate potential of the first transistor according to an external factor; A driving method of a detection device comprising a second transistor provided between a gate and a power supply line, the gate of which is connected to the scanning line,
One frame includes a plurality of horizontal scanning periods, and each of the plurality of horizontal scanning periods includes a reset period, an initialization period, and a detection period,
In the reset period,
Supplying a second potential to turn off the first transistor to the power line;
Supplying a selection potential for turning on the second transistor to all of the plurality of scanning lines;
In the initialization period,
Supplying a first potential to turn on the first transistor to the power line;
Sequentially supplying the selection potential to the plurality of scanning lines in each of the plurality of horizontal scanning periods;
In the detection period,
A non-selection potential for sequentially turning off the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines;
A method for driving a detection apparatus. A plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to the intersections of the scanning lines and the detection lines, each of the plurality of unit circuits corresponding to a gate potential A first transistor that supplies the detected signal to the detection line; a detection element that is connected to a gate of the first transistor and changes a gate potential of the first transistor according to an external factor; A driving method of a detection device comprising a second transistor provided between a gate and a power supply line, the gate of which is connected to the scanning line,
One frame is composed of a plurality of horizontal scanning periods, and the plurality of horizontal scanning periods includes an initialization period, a detection period, and a reset period,
In the initialization period,
Supplying a first potential to turn on the first transistor to the power line;
A selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines;
In the detection period,
A non-selection potential for turning off the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines;
In the reset period,
Supplying the second potential to the power line;
In each of the plurality of horizontal scanning periods, the initialization is performed when the selection potential is supplied to the scanning line to which the selection potential has been supplied in the initialization period and the plurality of scanning lines are divided into a plurality of blocks. Supplying the selection potential to all the scanning lines belonging to the block next to the block to which the scanning line to which the selection potential has been supplied in a period is;
A method for driving a detection apparatus. A plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to the intersections of the scanning lines and the detection lines, each of the plurality of unit circuits corresponding to a gate potential A first transistor that supplies the detected signal to the detection line; a detection element that is connected to a gate of the first transistor and changes a gate potential of the first transistor according to an external factor; A driving method of a detection device comprising a second transistor provided between a gate and a power supply line, the gate of which is connected to the scanning line,
One frame is composed of a plurality of horizontal scanning periods, and the plurality of horizontal scanning periods includes an initialization period, a detection period, and a reset period,
In the initialization period,
Supplying a first potential to turn on the first transistor to the power line;
A selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines;
In the detection period,
A non-selection potential for turning off the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines;
In the reset period,
Supplying the second potential to the power line;
A predetermined number of scanning lines including the scanning line to which the selection potential is supplied in the initialization period of the horizontal scanning period including the reset period and the scanning line to which the selection potential is supplied at least in the next initialization period. Supplying the selection potential to each other and shifting the predetermined number of scanning lines every horizontal scanning period;
A method for driving a detection apparatus. The first transistor is provided between the power supply line and the detection line,
Supplying the first potential to the power line in the detection period;
The method of driving a detection device according to claim 1, wherein The first transistor is provided between a node supplying a predetermined potential and the detection line,
Supplying the second potential to the power line in the detection period;
The method of driving a detection device according to claim 1, wherein A plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to the intersections of the scanning lines and the detection lines are provided, and a detection signal corresponding to a gate potential is supplied to the detection lines. And a detection element connected to the gate of the first transistor and changing the gate potential of the first transistor according to an external factor, and provided between the gate of the first transistor and a power supply line And a second transistor having a gate connected to the scan line, wherein one frame includes a plurality of horizontal scan periods, and each of the plurality of horizontal scan periods includes a reset period, an initialization period, and a detection period. A detection device that drives the plurality of unit circuits divided into the reset period, the initialization period, and the detection period,
In the reset period, a second potential for turning off the first transistor is supplied to the power supply line, and in the initialization period, a first potential for turning on the first transistor is supplied to the power supply line. Power supply means;
In the reset period, a selection potential for turning on the second transistor is supplied to all of the plurality of scanning lines, and in the initialization period, the selection potential is applied to each of the plurality of horizontal scanning periods. Scanning line driving means for sequentially supplying a plurality of scanning lines with a non-selection potential for sequentially turning off the second transistor in each of the plurality of horizontal scanning periods;
A detection apparatus comprising: A plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to the intersections of the scanning lines and the detection lines are provided, and a detection signal corresponding to a gate potential is supplied to the detection lines. And a detection element connected to the gate of the first transistor and changing the gate potential of the first transistor according to an external factor, and provided between the gate of the first transistor and a power supply line And a second transistor having a gate connected to the scan line, wherein one frame includes a plurality of horizontal scan periods, and each of the plurality of horizontal scan periods includes an initialization period, a detection period, and a reset period. A detection device that drives the plurality of unit circuits divided into the initialization period, the detection period, and the reset period,
In the reset period, a second potential for turning off the first transistor is supplied to the power supply line, and in the initialization period, a first potential for turning on the first transistor is supplied to the power supply line. Power supply means;
In the initialization period, a selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines. In the detection period, each of the plurality of horizontal scanning periods is supplied. The non-selection potential for turning off the second transistor is sequentially supplied to the plurality of scanning lines, and the selection potential is supplied in the initialization period in each of the plurality of horizontal scanning periods in the reset period. When the selection potential is supplied to a scanning line and the plurality of scanning lines are divided into a plurality of blocks, all of the blocks belonging to a block next to the block to which the scanning line to which the selection potential is supplied in the initialization period belongs Scanning line driving means for supplying the selected potential to the scanning line,
A detection device characterized by comprising. A plurality of scanning lines, a plurality of detection lines, and a plurality of unit circuits provided corresponding to the intersections of the scanning lines and the detection lines are provided, and a detection signal corresponding to a gate potential is supplied to the detection lines. And a detection element connected to the gate of the first transistor and changing the gate potential of the first transistor according to an external factor, and provided between the gate of the first transistor and a power supply line And a second transistor having a gate connected to the scan line, wherein one frame includes a plurality of horizontal scan periods, and each of the plurality of horizontal scan periods includes an initialization period, a detection period, and a reset period. A detection device that drives the plurality of unit circuits divided into the initialization period, the detection period, and the reset period,
In the reset period, a second potential for turning off the first transistor is supplied to the power supply line, and in the initialization period, a first potential for turning on the first transistor is supplied to the power supply line. Power supply means;
In the initialization period, a selection potential for turning on the second transistor in each of the plurality of horizontal scanning periods is sequentially supplied to the plurality of scanning lines. In the detection period, each of the plurality of horizontal scanning periods is supplied. The non-selection potential for turning off the second transistor is sequentially supplied to the plurality of scanning lines, and in the reset period, the selection potential is supplied in the initialization period of a horizontal scanning period including the reset period. The selection potential is supplied to a scanning line and a predetermined number of scanning lines including the scanning line to which the selection potential is supplied at least in the next initialization period, and the predetermined number of scanning lines is set for each horizontal scanning period. Scanning line driving means for shifting,
A detection device characterized by comprising. The first transistor is provided between the power supply line and the detection line,
The power supply means supplies the first potential to the power line in the detection period;
The detection apparatus according to claim 6, wherein the detection apparatus is any one of claims 6 to 8. The first transistor is provided between a node supplying a predetermined potential and the detection line,
The power supply means supplies the second potential to the power line in the detection period;
The detection apparatus according to claim 6, wherein the detection apparatus is any one of claims 6 to 8.   The detection device according to claim 6, wherein the first transistor and the second transistor are thin film transistors.   The detection device according to claim 6, wherein the detection element is a photoelectric conversion element that converts light energy into electrical energy.   An electronic apparatus comprising the detection device according to claim 6.

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